Input: i8042 - fix retrun value of i8042_aux_test_irq
[deliverable/linux.git] / drivers / input / serio / i8042.c
CommitLineData
1da177e4
LT
1/*
2 * i8042 keyboard and mouse controller driver for Linux
3 *
4 * Copyright (c) 1999-2004 Vojtech Pavlik
5 */
6
7/*
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/interrupt.h>
17#include <linux/ioport.h>
1da177e4
LT
18#include <linux/init.h>
19#include <linux/serio.h>
20#include <linux/err.h>
21#include <linux/rcupdate.h>
d052d1be 22#include <linux/platform_device.h>
1da177e4
LT
23
24#include <asm/io.h>
25
26MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
27MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
28MODULE_LICENSE("GPL");
29
945ef0d4
DT
30static unsigned int i8042_nokbd;
31module_param_named(nokbd, i8042_nokbd, bool, 0);
32MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
33
1da177e4
LT
34static unsigned int i8042_noaux;
35module_param_named(noaux, i8042_noaux, bool, 0);
36MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
37
38static unsigned int i8042_nomux;
39module_param_named(nomux, i8042_nomux, bool, 0);
40MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
41
42static unsigned int i8042_unlock;
43module_param_named(unlock, i8042_unlock, bool, 0);
44MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
45
46static unsigned int i8042_reset;
47module_param_named(reset, i8042_reset, bool, 0);
48MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
49
50static unsigned int i8042_direct;
51module_param_named(direct, i8042_direct, bool, 0);
52MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
53
54static unsigned int i8042_dumbkbd;
55module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
56MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
57
58static unsigned int i8042_noloop;
59module_param_named(noloop, i8042_noloop, bool, 0);
60MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
61
62static unsigned int i8042_blink_frequency = 500;
63module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
64MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
65
66#ifdef CONFIG_PNP
67static int i8042_nopnp;
68module_param_named(nopnp, i8042_nopnp, bool, 0);
69MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
70#endif
71
72#define DEBUG
73#ifdef DEBUG
74static int i8042_debug;
75module_param_named(debug, i8042_debug, bool, 0600);
76MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
77#endif
78
1da177e4
LT
79#include "i8042.h"
80
81static DEFINE_SPINLOCK(i8042_lock);
82
83struct i8042_port {
84 struct serio *serio;
85 int irq;
1da177e4
LT
86 unsigned char exists;
87 signed char mux;
1da177e4
LT
88};
89
90#define I8042_KBD_PORT_NO 0
91#define I8042_AUX_PORT_NO 1
92#define I8042_MUX_PORT_NO 2
93#define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
de9ce703
DT
94
95static struct i8042_port i8042_ports[I8042_NUM_PORTS];
1da177e4
LT
96
97static unsigned char i8042_initial_ctr;
98static unsigned char i8042_ctr;
1da177e4 99static unsigned char i8042_mux_present;
de9ce703
DT
100static unsigned char i8042_kbd_irq_registered;
101static unsigned char i8042_aux_irq_registered;
817e6ba3 102static unsigned char i8042_suppress_kbd_ack;
1da177e4
LT
103static struct platform_device *i8042_platform_device;
104
7d12e780 105static irqreturn_t i8042_interrupt(int irq, void *dev_id);
1da177e4
LT
106
107/*
108 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
109 * be ready for reading values from it / writing values to it.
110 * Called always with i8042_lock held.
111 */
112
113static int i8042_wait_read(void)
114{
115 int i = 0;
de9ce703 116
1da177e4
LT
117 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
118 udelay(50);
119 i++;
120 }
121 return -(i == I8042_CTL_TIMEOUT);
122}
123
124static int i8042_wait_write(void)
125{
126 int i = 0;
de9ce703 127
1da177e4
LT
128 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
129 udelay(50);
130 i++;
131 }
132 return -(i == I8042_CTL_TIMEOUT);
133}
134
135/*
136 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
137 * of the i8042 down the toilet.
138 */
139
140static int i8042_flush(void)
141{
142 unsigned long flags;
143 unsigned char data, str;
144 int i = 0;
145
146 spin_lock_irqsave(&i8042_lock, flags);
147
148 while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
149 udelay(50);
150 data = i8042_read_data();
151 i++;
152 dbg("%02x <- i8042 (flush, %s)", data,
153 str & I8042_STR_AUXDATA ? "aux" : "kbd");
154 }
155
156 spin_unlock_irqrestore(&i8042_lock, flags);
157
158 return i;
159}
160
161/*
162 * i8042_command() executes a command on the i8042. It also sends the input
163 * parameter(s) of the commands to it, and receives the output value(s). The
164 * parameters are to be stored in the param array, and the output is placed
165 * into the same array. The number of the parameters and output values is
166 * encoded in bits 8-11 of the command number.
167 */
168
de9ce703 169static int __i8042_command(unsigned char *param, int command)
1da177e4 170{
de9ce703 171 int i, error;
1da177e4
LT
172
173 if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
174 return -1;
175
de9ce703
DT
176 error = i8042_wait_write();
177 if (error)
178 return error;
463a4f76
DT
179
180 dbg("%02x -> i8042 (command)", command & 0xff);
181 i8042_write_command(command & 0xff);
182
183 for (i = 0; i < ((command >> 12) & 0xf); i++) {
de9ce703
DT
184 error = i8042_wait_write();
185 if (error)
186 return error;
463a4f76
DT
187 dbg("%02x -> i8042 (parameter)", param[i]);
188 i8042_write_data(param[i]);
1da177e4
LT
189 }
190
463a4f76 191 for (i = 0; i < ((command >> 8) & 0xf); i++) {
de9ce703
DT
192 error = i8042_wait_read();
193 if (error) {
194 dbg(" -- i8042 (timeout)");
195 return error;
196 }
1da177e4 197
463a4f76
DT
198 if (command == I8042_CMD_AUX_LOOP &&
199 !(i8042_read_status() & I8042_STR_AUXDATA)) {
de9ce703
DT
200 dbg(" -- i8042 (auxerr)");
201 return -1;
1da177e4
LT
202 }
203
463a4f76
DT
204 param[i] = i8042_read_data();
205 dbg("%02x <- i8042 (return)", param[i]);
206 }
1da177e4 207
de9ce703
DT
208 return 0;
209}
1da177e4 210
de9ce703
DT
211static int i8042_command(unsigned char *param, int command)
212{
213 unsigned long flags;
214 int retval;
215
216 spin_lock_irqsave(&i8042_lock, flags);
217 retval = __i8042_command(param, command);
463a4f76 218 spin_unlock_irqrestore(&i8042_lock, flags);
de9ce703 219
1da177e4
LT
220 return retval;
221}
222
223/*
224 * i8042_kbd_write() sends a byte out through the keyboard interface.
225 */
226
227static int i8042_kbd_write(struct serio *port, unsigned char c)
228{
229 unsigned long flags;
230 int retval = 0;
231
232 spin_lock_irqsave(&i8042_lock, flags);
233
de9ce703 234 if (!(retval = i8042_wait_write())) {
1da177e4
LT
235 dbg("%02x -> i8042 (kbd-data)", c);
236 i8042_write_data(c);
237 }
238
239 spin_unlock_irqrestore(&i8042_lock, flags);
240
241 return retval;
242}
243
244/*
245 * i8042_aux_write() sends a byte out through the aux interface.
246 */
247
248static int i8042_aux_write(struct serio *serio, unsigned char c)
249{
250 struct i8042_port *port = serio->port_data;
1da177e4 251
f4e3c711
DT
252 return i8042_command(&c, port->mux == -1 ?
253 I8042_CMD_AUX_SEND :
254 I8042_CMD_MUX_SEND + port->mux);
1da177e4
LT
255}
256
1da177e4
LT
257/*
258 * i8042_start() is called by serio core when port is about to finish
259 * registering. It will mark port as existing so i8042_interrupt can
260 * start sending data through it.
261 */
262static int i8042_start(struct serio *serio)
263{
264 struct i8042_port *port = serio->port_data;
265
266 port->exists = 1;
267 mb();
268 return 0;
269}
270
271/*
272 * i8042_stop() marks serio port as non-existing so i8042_interrupt
273 * will not try to send data to the port that is about to go away.
274 * The function is called by serio core as part of unregister procedure.
275 */
276static void i8042_stop(struct serio *serio)
277{
278 struct i8042_port *port = serio->port_data;
279
280 port->exists = 0;
b2b18660 281 synchronize_sched();
1da177e4
LT
282 port->serio = NULL;
283}
284
285/*
286 * i8042_interrupt() is the most important function in this driver -
287 * it handles the interrupts from the i8042, and sends incoming bytes
288 * to the upper layers.
289 */
290
7d12e780 291static irqreturn_t i8042_interrupt(int irq, void *dev_id)
1da177e4
LT
292{
293 struct i8042_port *port;
294 unsigned long flags;
295 unsigned char str, data;
296 unsigned int dfl;
297 unsigned int port_no;
817e6ba3 298 int ret = 1;
1da177e4 299
1da177e4
LT
300 spin_lock_irqsave(&i8042_lock, flags);
301 str = i8042_read_status();
302 if (unlikely(~str & I8042_STR_OBF)) {
303 spin_unlock_irqrestore(&i8042_lock, flags);
304 if (irq) dbg("Interrupt %d, without any data", irq);
305 ret = 0;
306 goto out;
307 }
308 data = i8042_read_data();
309 spin_unlock_irqrestore(&i8042_lock, flags);
310
311 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
312 static unsigned long last_transmit;
313 static unsigned char last_str;
314
315 dfl = 0;
316 if (str & I8042_STR_MUXERR) {
317 dbg("MUX error, status is %02x, data is %02x", str, data);
1da177e4
LT
318/*
319 * When MUXERR condition is signalled the data register can only contain
320 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
a216a4b6
DT
321 * it is not always the case. Some KBCs also report 0xfc when there is
322 * nothing connected to the port while others sometimes get confused which
323 * port the data came from and signal error leaving the data intact. They
324 * _do not_ revert to legacy mode (actually I've never seen KBC reverting
325 * to legacy mode yet, when we see one we'll add proper handling).
326 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
327 * rest assume that the data came from the same serio last byte
1da177e4
LT
328 * was transmitted (if transmission happened not too long ago).
329 */
a216a4b6
DT
330
331 switch (data) {
332 default:
1da177e4
LT
333 if (time_before(jiffies, last_transmit + HZ/10)) {
334 str = last_str;
335 break;
336 }
337 /* fall through - report timeout */
a216a4b6 338 case 0xfc:
1da177e4
LT
339 case 0xfd:
340 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
341 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
342 }
343 }
344
345 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
346 last_str = str;
347 last_transmit = jiffies;
348 } else {
349
350 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
351 ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
352
353 port_no = (str & I8042_STR_AUXDATA) ?
354 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
355 }
356
357 port = &i8042_ports[port_no];
358
de9ce703
DT
359 dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
360 data, port_no, irq,
1da177e4
LT
361 dfl & SERIO_PARITY ? ", bad parity" : "",
362 dfl & SERIO_TIMEOUT ? ", timeout" : "");
363
817e6ba3
DT
364 if (unlikely(i8042_suppress_kbd_ack))
365 if (port_no == I8042_KBD_PORT_NO &&
366 (data == 0xfa || data == 0xfe)) {
19f3c3e3 367 i8042_suppress_kbd_ack--;
817e6ba3
DT
368 goto out;
369 }
370
1da177e4 371 if (likely(port->exists))
7d12e780 372 serio_interrupt(port->serio, data, dfl);
1da177e4 373
0854e52d 374 out:
1da177e4
LT
375 return IRQ_RETVAL(ret);
376}
377
de9ce703
DT
378/*
379 * i8042_enable_kbd_port enables keybaord port on chip
380 */
381
382static int i8042_enable_kbd_port(void)
383{
384 i8042_ctr &= ~I8042_CTR_KBDDIS;
385 i8042_ctr |= I8042_CTR_KBDINT;
386
387 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
388 printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
389 return -EIO;
390 }
391
392 return 0;
393}
394
395/*
396 * i8042_enable_aux_port enables AUX (mouse) port on chip
397 */
398
399static int i8042_enable_aux_port(void)
400{
401 i8042_ctr &= ~I8042_CTR_AUXDIS;
402 i8042_ctr |= I8042_CTR_AUXINT;
403
404 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
405 printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
406 return -EIO;
407 }
408
409 return 0;
410}
411
412/*
413 * i8042_enable_mux_ports enables 4 individual AUX ports after
414 * the controller has been switched into Multiplexed mode
415 */
416
417static int i8042_enable_mux_ports(void)
418{
419 unsigned char param;
420 int i;
421
422 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
423 i8042_command(&param, I8042_CMD_MUX_PFX + i);
424 i8042_command(&param, I8042_CMD_AUX_ENABLE);
425 }
426
427 return i8042_enable_aux_port();
428}
429
1da177e4
LT
430/*
431 * i8042_set_mux_mode checks whether the controller has an active
432 * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
433 */
434
435static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
436{
437
438 unsigned char param;
439/*
440 * Get rid of bytes in the queue.
441 */
442
443 i8042_flush();
444
445/*
446 * Internal loopback test - send three bytes, they should come back from the
de9ce703 447 * mouse interface, the last should be version.
1da177e4
LT
448 */
449
450 param = 0xf0;
463a4f76 451 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
1da177e4
LT
452 return -1;
453 param = mode ? 0x56 : 0xf6;
463a4f76 454 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
1da177e4
LT
455 return -1;
456 param = mode ? 0xa4 : 0xa5;
463a4f76 457 if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
1da177e4
LT
458 return -1;
459
460 if (mux_version)
463a4f76 461 *mux_version = param;
1da177e4
LT
462
463 return 0;
464}
465
1da177e4 466/*
de9ce703
DT
467 * i8042_check_mux() checks whether the controller supports the PS/2 Active
468 * Multiplexing specification by Synaptics, Phoenix, Insyde and
469 * LCS/Telegraphics.
1da177e4
LT
470 */
471
de9ce703 472static int __devinit i8042_check_mux(void)
1da177e4 473{
de9ce703
DT
474 unsigned char mux_version;
475
476 if (i8042_set_mux_mode(1, &mux_version))
477 return -1;
478
1da177e4 479/*
de9ce703
DT
480 * Workaround for interference with USB Legacy emulation
481 * that causes a v10.12 MUX to be found.
1da177e4 482 */
de9ce703
DT
483 if (mux_version == 0xAC)
484 return -1;
485
486 printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
487 (mux_version >> 4) & 0xf, mux_version & 0xf);
1da177e4 488
de9ce703
DT
489/*
490 * Disable all muxed ports by disabling AUX.
491 */
1da177e4
LT
492 i8042_ctr |= I8042_CTR_AUXDIS;
493 i8042_ctr &= ~I8042_CTR_AUXINT;
494
495 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
496 printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
de9ce703 497 return -EIO;
1da177e4
LT
498 }
499
de9ce703 500 i8042_mux_present = 1;
1da177e4
LT
501
502 return 0;
503}
504
1da177e4 505/*
de9ce703 506 * The following is used to test AUX IRQ delivery.
1da177e4 507 */
de9ce703
DT
508static struct completion i8042_aux_irq_delivered __devinitdata;
509static int i8042_irq_being_tested __devinitdata;
1da177e4 510
7d12e780 511static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
1da177e4 512{
de9ce703
DT
513 unsigned long flags;
514 unsigned char str, data;
e3758b2a 515 int ret = 0;
1da177e4 516
de9ce703
DT
517 spin_lock_irqsave(&i8042_lock, flags);
518 str = i8042_read_status();
519 if (str & I8042_STR_OBF) {
520 data = i8042_read_data();
521 if (i8042_irq_being_tested &&
522 data == 0xa5 && (str & I8042_STR_AUXDATA))
523 complete(&i8042_aux_irq_delivered);
e3758b2a 524 ret = 1;
de9ce703
DT
525 }
526 spin_unlock_irqrestore(&i8042_lock, flags);
1da177e4 527
e3758b2a 528 return IRQ_RETVAL(ret);
1da177e4
LT
529}
530
d2ada559
RS
531/*
532 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
533 * verifies success by readinng CTR. Used when testing for presence of AUX
534 * port.
535 */
536static int __devinit i8042_toggle_aux(int on)
537{
538 unsigned char param;
539 int i;
540
541 if (i8042_command(&param,
542 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
543 return -1;
544
545 /* some chips need some time to set the I8042_CTR_AUXDIS bit */
546 for (i = 0; i < 100; i++) {
547 udelay(50);
548
549 if (i8042_command(&param, I8042_CMD_CTL_RCTR))
550 return -1;
551
552 if (!(param & I8042_CTR_AUXDIS) == on)
553 return 0;
554 }
555
556 return -1;
557}
1da177e4
LT
558
559/*
560 * i8042_check_aux() applies as much paranoia as it can at detecting
561 * the presence of an AUX interface.
562 */
563
87fd6318 564static int __devinit i8042_check_aux(void)
1da177e4 565{
de9ce703
DT
566 int retval = -1;
567 int irq_registered = 0;
1e4865f8 568 int aux_loop_broken = 0;
de9ce703 569 unsigned long flags;
1da177e4 570 unsigned char param;
1da177e4
LT
571
572/*
573 * Get rid of bytes in the queue.
574 */
575
576 i8042_flush();
577
578/*
579 * Internal loopback test - filters out AT-type i8042's. Unfortunately
580 * SiS screwed up and their 5597 doesn't support the LOOP command even
581 * though it has an AUX port.
582 */
583
584 param = 0x5a;
3ca5de6d
DT
585 retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
586 if (retval || param != 0x5a) {
1da177e4
LT
587
588/*
589 * External connection test - filters out AT-soldered PS/2 i8042's
590 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
591 * 0xfa - no error on some notebooks which ignore the spec
592 * Because it's common for chipsets to return error on perfectly functioning
593 * AUX ports, we test for this only when the LOOP command failed.
594 */
595
de9ce703
DT
596 if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
597 (param && param != 0xfa && param != 0xff))
598 return -1;
1e4865f8 599
3ca5de6d
DT
600/*
601 * If AUX_LOOP completed without error but returned unexpected data
602 * mark it as broken
603 */
604 if (!retval)
605 aux_loop_broken = 1;
1da177e4
LT
606 }
607
608/*
609 * Bit assignment test - filters out PS/2 i8042's in AT mode
610 */
611
d2ada559 612 if (i8042_toggle_aux(0)) {
1da177e4
LT
613 printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
614 printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
615 }
616
d2ada559 617 if (i8042_toggle_aux(1))
1da177e4
LT
618 return -1;
619
620/*
de9ce703
DT
621 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
622 * used it for a PCI card or somethig else.
1da177e4
LT
623 */
624
1e4865f8 625 if (i8042_noloop || aux_loop_broken) {
de9ce703
DT
626/*
627 * Without LOOP command we can't test AUX IRQ delivery. Assume the port
628 * is working and hope we are right.
629 */
630 retval = 0;
631 goto out;
632 }
1da177e4 633
de9ce703
DT
634 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
635 "i8042", i8042_platform_device))
636 goto out;
1da177e4 637
de9ce703
DT
638 irq_registered = 1;
639
640 if (i8042_enable_aux_port())
641 goto out;
642
643 spin_lock_irqsave(&i8042_lock, flags);
1da177e4 644
de9ce703
DT
645 init_completion(&i8042_aux_irq_delivered);
646 i8042_irq_being_tested = 1;
647
648 param = 0xa5;
649 retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
650
651 spin_unlock_irqrestore(&i8042_lock, flags);
652
653 if (retval)
654 goto out;
1da177e4 655
de9ce703
DT
656 if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
657 msecs_to_jiffies(250)) == 0) {
1da177e4 658/*
de9ce703
DT
659 * AUX IRQ was never delivered so we need to flush the controller to
660 * get rid of the byte we put there; otherwise keyboard may not work.
1da177e4 661 */
de9ce703
DT
662 i8042_flush();
663 retval = -1;
664 }
1da177e4 665
de9ce703 666 out:
1da177e4 667
de9ce703
DT
668/*
669 * Disable the interface.
670 */
1da177e4 671
de9ce703
DT
672 i8042_ctr |= I8042_CTR_AUXDIS;
673 i8042_ctr &= ~I8042_CTR_AUXINT;
1da177e4 674
de9ce703
DT
675 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
676 retval = -1;
1da177e4 677
de9ce703
DT
678 if (irq_registered)
679 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1da177e4 680
de9ce703
DT
681 return retval;
682}
1da177e4 683
de9ce703 684static int i8042_controller_check(void)
1da177e4 685{
de9ce703
DT
686 if (i8042_flush() == I8042_BUFFER_SIZE) {
687 printk(KERN_ERR "i8042.c: No controller found.\n");
688 return -ENODEV;
689 }
690
691 return 0;
1da177e4
LT
692}
693
de9ce703 694static int i8042_controller_selftest(void)
2673c836
VP
695{
696 unsigned char param;
697
698 if (!i8042_reset)
699 return 0;
700
701 if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
702 printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
de9ce703 703 return -ENODEV;
2673c836
VP
704 }
705
706 if (param != I8042_RET_CTL_TEST) {
707 printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
708 param, I8042_RET_CTL_TEST);
de9ce703 709 return -EIO;
2673c836
VP
710 }
711
712 return 0;
713}
1da177e4
LT
714
715/*
716 * i8042_controller init initializes the i8042 controller, and,
717 * most importantly, sets it into non-xlated mode if that's
718 * desired.
719 */
720
721static int i8042_controller_init(void)
722{
723 unsigned long flags;
724
1da177e4
LT
725/*
726 * Save the CTR for restoral on unload / reboot.
727 */
728
729 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
730 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
de9ce703 731 return -EIO;
1da177e4
LT
732 }
733
734 i8042_initial_ctr = i8042_ctr;
735
736/*
737 * Disable the keyboard interface and interrupt.
738 */
739
740 i8042_ctr |= I8042_CTR_KBDDIS;
741 i8042_ctr &= ~I8042_CTR_KBDINT;
742
743/*
744 * Handle keylock.
745 */
746
747 spin_lock_irqsave(&i8042_lock, flags);
748 if (~i8042_read_status() & I8042_STR_KEYLOCK) {
749 if (i8042_unlock)
750 i8042_ctr |= I8042_CTR_IGNKEYLOCK;
82dd9eff 751 else
1da177e4
LT
752 printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
753 }
754 spin_unlock_irqrestore(&i8042_lock, flags);
755
756/*
757 * If the chip is configured into nontranslated mode by the BIOS, don't
758 * bother enabling translating and be happy.
759 */
760
761 if (~i8042_ctr & I8042_CTR_XLATE)
762 i8042_direct = 1;
763
764/*
765 * Set nontranslated mode for the kbd interface if requested by an option.
766 * After this the kbd interface becomes a simple serial in/out, like the aux
767 * interface is. We don't do this by default, since it can confuse notebook
768 * BIOSes.
769 */
770
771 if (i8042_direct)
772 i8042_ctr &= ~I8042_CTR_XLATE;
773
774/*
775 * Write CTR back.
776 */
777
778 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
779 printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
de9ce703 780 return -EIO;
1da177e4
LT
781 }
782
783 return 0;
784}
785
786
787/*
de9ce703 788 * Reset the controller and reset CRT to the original value set by BIOS.
1da177e4 789 */
de9ce703 790
1da177e4
LT
791static void i8042_controller_reset(void)
792{
de9ce703 793 i8042_flush();
1da177e4 794
8d04ddb6
DT
795/*
796 * Disable both KBD and AUX interfaces so they don't get in the way
797 */
798
799 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
800 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
801
1da177e4
LT
802/*
803 * Disable MUX mode if present.
804 */
805
806 if (i8042_mux_present)
807 i8042_set_mux_mode(0, NULL);
808
809/*
de9ce703 810 * Reset the controller if requested.
1da177e4
LT
811 */
812
de9ce703 813 i8042_controller_selftest();
1da177e4 814
de9ce703
DT
815/*
816 * Restore the original control register setting.
817 */
818
819 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
1da177e4
LT
820 printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
821}
822
823
1da177e4
LT
824/*
825 * i8042_panic_blink() will flash the keyboard LEDs and is called when
826 * kernel panics. Flashing LEDs is useful for users running X who may
827 * not see the console and will help distingushing panics from "real"
828 * lockups.
829 *
830 * Note that DELAY has a limit of 10ms so we will not get stuck here
831 * waiting for KBC to free up even if KBD interrupt is off
832 */
833
834#define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
835
836static long i8042_panic_blink(long count)
837{
838 long delay = 0;
839 static long last_blink;
840 static char led;
841
842 /*
843 * We expect frequency to be about 1/2s. KDB uses about 1s.
844 * Make sure they are different.
845 */
846 if (!i8042_blink_frequency)
847 return 0;
848 if (count - last_blink < i8042_blink_frequency)
849 return 0;
850
851 led ^= 0x01 | 0x04;
852 while (i8042_read_status() & I8042_STR_IBF)
853 DELAY;
19f3c3e3
DT
854 dbg("%02x -> i8042 (panic blink)", 0xed);
855 i8042_suppress_kbd_ack = 2;
1da177e4
LT
856 i8042_write_data(0xed); /* set leds */
857 DELAY;
858 while (i8042_read_status() & I8042_STR_IBF)
859 DELAY;
860 DELAY;
19f3c3e3 861 dbg("%02x -> i8042 (panic blink)", led);
1da177e4
LT
862 i8042_write_data(led);
863 DELAY;
864 last_blink = count;
865 return delay;
866}
867
868#undef DELAY
869
82dd9eff 870#ifdef CONFIG_PM
1da177e4 871/*
82dd9eff
DT
872 * Here we try to restore the original BIOS settings. We only want to
873 * do that once, when we really suspend, not when we taking memory
874 * snapshot for swsusp (in this case we'll perform required cleanup
875 * as part of shutdown process).
1da177e4
LT
876 */
877
3ae5eaec 878static int i8042_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 879{
82dd9eff
DT
880 if (dev->dev.power.power_state.event != state.event) {
881 if (state.event == PM_EVENT_SUSPEND)
882 i8042_controller_reset();
883
884 dev->dev.power.power_state = state;
885 }
1da177e4
LT
886
887 return 0;
888}
889
890
891/*
892 * Here we try to reset everything back to a state in which suspended
893 */
894
3ae5eaec 895static int i8042_resume(struct platform_device *dev)
1da177e4 896{
de9ce703 897 int error;
1da177e4 898
82dd9eff
DT
899/*
900 * Do not bother with restoring state if we haven't suspened yet
901 */
902 if (dev->dev.power.power_state.event == PM_EVENT_ON)
903 return 0;
904
de9ce703
DT
905 error = i8042_controller_check();
906 if (error)
907 return error;
2673c836 908
de9ce703
DT
909 error = i8042_controller_selftest();
910 if (error)
911 return error;
1da177e4
LT
912
913/*
82dd9eff 914 * Restore original CTR value and disable all ports
1da177e4
LT
915 */
916
82dd9eff
DT
917 i8042_ctr = i8042_initial_ctr;
918 if (i8042_direct)
919 i8042_ctr &= ~I8042_CTR_XLATE;
de9ce703
DT
920 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
921 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
922 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
923 printk(KERN_ERR "i8042: Can't write CTR to resume\n");
924 return -EIO;
925 }
1da177e4 926
de9ce703
DT
927 if (i8042_mux_present) {
928 if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
929 printk(KERN_WARNING
930 "i8042: failed to resume active multiplexor, "
931 "mouse won't work.\n");
932 } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
933 i8042_enable_aux_port();
1da177e4 934
de9ce703
DT
935 if (i8042_ports[I8042_KBD_PORT_NO].serio)
936 i8042_enable_kbd_port();
937
7d12e780 938 i8042_interrupt(0, NULL);
1da177e4 939
82dd9eff
DT
940 dev->dev.power.power_state = PMSG_ON;
941
1da177e4 942 return 0;
1da177e4 943}
82dd9eff 944#endif /* CONFIG_PM */
1da177e4
LT
945
946/*
947 * We need to reset the 8042 back to original mode on system shutdown,
948 * because otherwise BIOSes will be confused.
949 */
950
3ae5eaec 951static void i8042_shutdown(struct platform_device *dev)
1da177e4 952{
82dd9eff 953 i8042_controller_reset();
1da177e4
LT
954}
955
87fd6318 956static int __devinit i8042_create_kbd_port(void)
1da177e4
LT
957{
958 struct serio *serio;
959 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
960
d39969de 961 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
0854e52d
DT
962 if (!serio)
963 return -ENOMEM;
964
965 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
966 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
0854e52d
DT
967 serio->start = i8042_start;
968 serio->stop = i8042_stop;
969 serio->port_data = port;
970 serio->dev.parent = &i8042_platform_device->dev;
de9ce703 971 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
0854e52d
DT
972 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
973
974 port->serio = serio;
de9ce703 975 port->irq = I8042_KBD_IRQ;
0854e52d 976
de9ce703 977 return 0;
1da177e4
LT
978}
979
de9ce703 980static int __devinit i8042_create_aux_port(int idx)
1da177e4
LT
981{
982 struct serio *serio;
de9ce703
DT
983 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
984 struct i8042_port *port = &i8042_ports[port_no];
1da177e4 985
d39969de 986 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
0854e52d
DT
987 if (!serio)
988 return -ENOMEM;
989
990 serio->id.type = SERIO_8042;
991 serio->write = i8042_aux_write;
0854e52d
DT
992 serio->start = i8042_start;
993 serio->stop = i8042_stop;
994 serio->port_data = port;
995 serio->dev.parent = &i8042_platform_device->dev;
de9ce703
DT
996 if (idx < 0) {
997 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
998 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
999 } else {
1000 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
1001 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
1002 }
0854e52d
DT
1003
1004 port->serio = serio;
de9ce703
DT
1005 port->mux = idx;
1006 port->irq = I8042_AUX_IRQ;
0854e52d 1007
de9ce703 1008 return 0;
1da177e4
LT
1009}
1010
de9ce703 1011static void __devinit i8042_free_kbd_port(void)
1da177e4 1012{
de9ce703
DT
1013 kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
1014 i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
1015}
1da177e4 1016
de9ce703
DT
1017static void __devinit i8042_free_aux_ports(void)
1018{
1019 int i;
0854e52d 1020
de9ce703
DT
1021 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
1022 kfree(i8042_ports[i].serio);
1023 i8042_ports[i].serio = NULL;
1024 }
1025}
0854e52d 1026
de9ce703
DT
1027static void __devinit i8042_register_ports(void)
1028{
1029 int i;
0854e52d 1030
de9ce703
DT
1031 for (i = 0; i < I8042_NUM_PORTS; i++) {
1032 if (i8042_ports[i].serio) {
1033 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
1034 i8042_ports[i].serio->name,
1035 (unsigned long) I8042_DATA_REG,
1036 (unsigned long) I8042_COMMAND_REG,
1037 i8042_ports[i].irq);
1038 serio_register_port(i8042_ports[i].serio);
1039 }
1040 }
1da177e4
LT
1041}
1042
de9ce703 1043static void __devinit i8042_unregister_ports(void)
1da177e4 1044{
de9ce703 1045 int i;
1da177e4 1046
de9ce703
DT
1047 for (i = 0; i < I8042_NUM_PORTS; i++) {
1048 if (i8042_ports[i].serio) {
1049 serio_unregister_port(i8042_ports[i].serio);
1050 i8042_ports[i].serio = NULL;
1051 }
1052 }
1053}
1054
1055static void i8042_free_irqs(void)
1056{
1057 if (i8042_aux_irq_registered)
1058 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1059 if (i8042_kbd_irq_registered)
1060 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1061
1062 i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
1063}
1064
1065static int __devinit i8042_setup_aux(void)
1066{
1067 int (*aux_enable)(void);
1068 int error;
1069 int i;
1da177e4 1070
de9ce703 1071 if (i8042_check_aux())
87fd6318 1072 return -ENODEV;
1da177e4 1073
de9ce703
DT
1074 if (i8042_nomux || i8042_check_mux()) {
1075 error = i8042_create_aux_port(-1);
1076 if (error)
1077 goto err_free_ports;
1078 aux_enable = i8042_enable_aux_port;
1079 } else {
1080 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
1081 error = i8042_create_aux_port(i);
1082 if (error)
1083 goto err_free_ports;
0854e52d 1084 }
de9ce703 1085 aux_enable = i8042_enable_mux_ports;
1da177e4
LT
1086 }
1087
de9ce703
DT
1088 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
1089 "i8042", i8042_platform_device);
1090 if (error)
1091 goto err_free_ports;
945ef0d4 1092
de9ce703
DT
1093 if (aux_enable())
1094 goto err_free_irq;
1da177e4 1095
de9ce703 1096 i8042_aux_irq_registered = 1;
1da177e4 1097 return 0;
0854e52d 1098
de9ce703
DT
1099 err_free_irq:
1100 free_irq(I8042_AUX_IRQ, i8042_platform_device);
1101 err_free_ports:
1102 i8042_free_aux_ports();
1103 return error;
1104}
0854e52d 1105
de9ce703
DT
1106static int __devinit i8042_setup_kbd(void)
1107{
1108 int error;
1109
1110 error = i8042_create_kbd_port();
1111 if (error)
1112 return error;
1113
1114 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
1115 "i8042", i8042_platform_device);
1116 if (error)
1117 goto err_free_port;
1118
1119 error = i8042_enable_kbd_port();
1120 if (error)
1121 goto err_free_irq;
1122
1123 i8042_kbd_irq_registered = 1;
1124 return 0;
1125
1126 err_free_irq:
1127 free_irq(I8042_KBD_IRQ, i8042_platform_device);
1128 err_free_port:
1129 i8042_free_kbd_port();
1130 return error;
1da177e4
LT
1131}
1132
de9ce703 1133static int __devinit i8042_probe(struct platform_device *dev)
1da177e4 1134{
de9ce703 1135 int error;
1da177e4 1136
de9ce703
DT
1137 error = i8042_controller_selftest();
1138 if (error)
1139 return error;
1da177e4 1140
de9ce703
DT
1141 error = i8042_controller_init();
1142 if (error)
1143 return error;
1144
1145 if (!i8042_noaux) {
1146 error = i8042_setup_aux();
1147 if (error && error != -ENODEV && error != -EBUSY)
1148 goto out_fail;
1149 }
1150
1151 if (!i8042_nokbd) {
1152 error = i8042_setup_kbd();
1153 if (error)
1154 goto out_fail;
1155 }
1da177e4 1156
de9ce703
DT
1157/*
1158 * Ok, everything is ready, let's register all serio ports
1159 */
1160 i8042_register_ports();
1161
1162 return 0;
1163
1164 out_fail:
1165 i8042_free_aux_ports(); /* in case KBD failed but AUX not */
1166 i8042_free_irqs();
1167 i8042_controller_reset();
1168
1169 return error;
1170}
1171
1172static int __devexit i8042_remove(struct platform_device *dev)
1173{
1174 i8042_unregister_ports();
1175 i8042_free_irqs();
1176 i8042_controller_reset();
1da177e4 1177
87fd6318
DT
1178 return 0;
1179}
1180
1181static struct platform_driver i8042_driver = {
1182 .driver = {
1183 .name = "i8042",
1184 .owner = THIS_MODULE,
1185 },
1186 .probe = i8042_probe,
1187 .remove = __devexit_p(i8042_remove),
82dd9eff
DT
1188 .shutdown = i8042_shutdown,
1189#ifdef CONFIG_PM
87fd6318
DT
1190 .suspend = i8042_suspend,
1191 .resume = i8042_resume,
82dd9eff 1192#endif
87fd6318
DT
1193};
1194
1195static int __init i8042_init(void)
1196{
1197 int err;
1198
1199 dbg_init();
1200
1201 err = i8042_platform_init();
1202 if (err)
1203 return err;
1204
de9ce703
DT
1205 err = i8042_controller_check();
1206 if (err)
1207 goto err_platform_exit;
87fd6318
DT
1208
1209 err = platform_driver_register(&i8042_driver);
1210 if (err)
1211 goto err_platform_exit;
1212
1213 i8042_platform_device = platform_device_alloc("i8042", -1);
1214 if (!i8042_platform_device) {
1215 err = -ENOMEM;
1216 goto err_unregister_driver;
1217 }
1218
1219 err = platform_device_add(i8042_platform_device);
1220 if (err)
1221 goto err_free_device;
1222
de9ce703
DT
1223 panic_blink = i8042_panic_blink;
1224
87fd6318
DT
1225 return 0;
1226
1227 err_free_device:
1228 platform_device_put(i8042_platform_device);
1229 err_unregister_driver:
1230 platform_driver_unregister(&i8042_driver);
1231 err_platform_exit:
1232 i8042_platform_exit();
1233
1234 return err;
1235}
1236
1237static void __exit i8042_exit(void)
1238{
1da177e4 1239 platform_device_unregister(i8042_platform_device);
3ae5eaec 1240 platform_driver_unregister(&i8042_driver);
1da177e4
LT
1241 i8042_platform_exit();
1242
1243 panic_blink = NULL;
1244}
1245
1246module_init(i8042_init);
1247module_exit(i8042_exit);
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