Commit | Line | Data |
---|---|---|
ab493a0f OBC |
1 | # IOMMU_API always gets selected by whoever wants it. |
2 | config IOMMU_API | |
3 | bool | |
b10f127e | 4 | |
68255b62 JR |
5 | menuconfig IOMMU_SUPPORT |
6 | bool "IOMMU Hardware Support" | |
e5144c93 | 7 | depends on MMU |
68255b62 JR |
8 | default y |
9 | ---help--- | |
10 | Say Y here if you want to compile device drivers for IO Memory | |
11 | Management Units into the kernel. These devices usually allow to | |
12 | remap DMA requests and/or remap interrupts from other devices on the | |
13 | system. | |
14 | ||
15 | if IOMMU_SUPPORT | |
16 | ||
fdb1d7be WD |
17 | menu "Generic IOMMU Pagetable Support" |
18 | ||
19 | # Selected by the actual pagetable implementations | |
20 | config IOMMU_IO_PGTABLE | |
21 | bool | |
22 | ||
e1d3c0fd WD |
23 | config IOMMU_IO_PGTABLE_LPAE |
24 | bool "ARMv7/v8 Long Descriptor Format" | |
25 | select IOMMU_IO_PGTABLE | |
ffcb6d16 | 26 | depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST) |
e1d3c0fd WD |
27 | help |
28 | Enable support for the ARM long descriptor pagetable format. | |
29 | This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page | |
30 | sizes at both stage-1 and stage-2, as well as address spaces | |
31 | up to 48-bits in size. | |
32 | ||
fe4b991d WD |
33 | config IOMMU_IO_PGTABLE_LPAE_SELFTEST |
34 | bool "LPAE selftests" | |
35 | depends on IOMMU_IO_PGTABLE_LPAE | |
36 | help | |
37 | Enable self-tests for LPAE page table allocator. This performs | |
38 | a series of page-table consistency checks during boot. | |
39 | ||
40 | If unsure, say N here. | |
41 | ||
fdb1d7be WD |
42 | endmenu |
43 | ||
114150d8 | 44 | config IOMMU_IOVA |
15bbdec3 | 45 | tristate |
114150d8 | 46 | |
4e0ee78f HD |
47 | config OF_IOMMU |
48 | def_bool y | |
7eba1d51 | 49 | depends on OF && IOMMU_API |
4e0ee78f | 50 | |
0db2e5d1 RM |
51 | # IOMMU-agnostic DMA-mapping layer |
52 | config IOMMU_DMA | |
53 | bool | |
54 | depends on NEED_SG_DMA_LENGTH | |
55 | select IOMMU_API | |
56 | select IOMMU_IOVA | |
57 | ||
695093e3 VS |
58 | config FSL_PAMU |
59 | bool "Freescale IOMMU support" | |
477ab7a1 JR |
60 | depends on PPC32 |
61 | depends on PPC_E500MC || COMPILE_TEST | |
695093e3 VS |
62 | select IOMMU_API |
63 | select GENERIC_ALLOCATOR | |
64 | help | |
65 | Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. | |
66 | PAMU can authorize memory access, remap the memory address, and remap I/O | |
67 | transaction types. | |
68 | ||
b10f127e OBC |
69 | # MSM IOMMU support |
70 | config MSM_IOMMU | |
71 | bool "MSM IOMMU Support" | |
477ab7a1 JR |
72 | depends on ARM |
73 | depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST | |
a3f447a4 | 74 | depends on BROKEN |
b10f127e OBC |
75 | select IOMMU_API |
76 | help | |
77 | Support for the IOMMUs found on certain Qualcomm SOCs. | |
78 | These IOMMUs allow virtualization of the address space used by most | |
79 | cores within the multimedia subsystem. | |
80 | ||
81 | If unsure, say N here. | |
82 | ||
83 | config IOMMU_PGTABLES_L2 | |
84 | def_bool y | |
85 | depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n | |
29b68415 OBC |
86 | |
87 | # AMD IOMMU support | |
88 | config AMD_IOMMU | |
89 | bool "AMD IOMMU support" | |
90 | select SWIOTLB | |
91 | select PCI_MSI | |
52815b75 JR |
92 | select PCI_ATS |
93 | select PCI_PRI | |
94 | select PCI_PASID | |
29b68415 | 95 | select IOMMU_API |
0dbc6078 | 96 | depends on X86_64 && PCI && ACPI |
29b68415 OBC |
97 | ---help--- |
98 | With this option you can enable support for AMD IOMMU hardware in | |
99 | your system. An IOMMU is a hardware component which provides | |
100 | remapping of DMA memory accesses from devices. With an AMD IOMMU you | |
59bf8964 | 101 | can isolate the DMA memory of different devices and protect the |
29b68415 OBC |
102 | system from misbehaving device drivers or hardware. |
103 | ||
104 | You can find out if your system has an AMD IOMMU if you look into | |
105 | your BIOS for an option to enable it or if you have an IVRS ACPI | |
106 | table. | |
107 | ||
108 | config AMD_IOMMU_STATS | |
109 | bool "Export AMD IOMMU statistics to debugfs" | |
110 | depends on AMD_IOMMU | |
111 | select DEBUG_FS | |
112 | ---help--- | |
113 | This option enables code in the AMD IOMMU driver to collect various | |
114 | statistics about whats happening in the driver and exports that | |
115 | information to userspace via debugfs. | |
116 | If unsure, say N. | |
166e9278 | 117 | |
e3c495c7 | 118 | config AMD_IOMMU_V2 |
a446e219 | 119 | tristate "AMD IOMMU Version 2 driver" |
e5cac32c | 120 | depends on AMD_IOMMU |
8736b2c3 | 121 | select MMU_NOTIFIER |
e3c495c7 JR |
122 | ---help--- |
123 | This option enables support for the AMD IOMMUv2 features of the IOMMU | |
124 | hardware. Select this option if you want to use devices that support | |
59bf8964 | 125 | the PCI PRI and PASID interface. |
e3c495c7 | 126 | |
166e9278 | 127 | # Intel IOMMU support |
d3f13810 SS |
128 | config DMAR_TABLE |
129 | bool | |
130 | ||
131 | config INTEL_IOMMU | |
132 | bool "Support for Intel IOMMU using DMA Remapping Devices" | |
166e9278 OBC |
133 | depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
134 | select IOMMU_API | |
114150d8 | 135 | select IOMMU_IOVA |
d3f13810 | 136 | select DMAR_TABLE |
166e9278 OBC |
137 | help |
138 | DMA remapping (DMAR) devices support enables independent address | |
139 | translations for Direct Memory Access (DMA) from devices. | |
140 | These DMA remapping devices are reported via ACPI tables | |
141 | and include PCI device scope covered by these DMA | |
142 | remapping devices. | |
143 | ||
8a94ade4 DW |
144 | config INTEL_IOMMU_SVM |
145 | bool "Support for Shared Virtual Memory with Intel IOMMU" | |
146 | depends on INTEL_IOMMU && X86 | |
b16d0cb9 | 147 | select PCI_PASID |
2f26e0a9 | 148 | select MMU_NOTIFIER |
8a94ade4 DW |
149 | help |
150 | Shared Virtual Memory (SVM) provides a facility for devices | |
151 | to access DMA resources through process address space by | |
152 | means of a Process Address Space ID (PASID). | |
153 | ||
d3f13810 | 154 | config INTEL_IOMMU_DEFAULT_ON |
166e9278 | 155 | def_bool y |
d3f13810 SS |
156 | prompt "Enable Intel DMA Remapping Devices by default" |
157 | depends on INTEL_IOMMU | |
166e9278 OBC |
158 | help |
159 | Selecting this option will enable a DMAR device at boot time if | |
160 | one is found. If this option is not selected, DMAR support can | |
161 | be enabled by passing intel_iommu=on to the kernel. | |
162 | ||
d3f13810 | 163 | config INTEL_IOMMU_BROKEN_GFX_WA |
166e9278 | 164 | bool "Workaround broken graphics drivers (going away soon)" |
d3f13810 | 165 | depends on INTEL_IOMMU && BROKEN && X86 |
166e9278 OBC |
166 | ---help--- |
167 | Current Graphics drivers tend to use physical address | |
168 | for DMA and avoid using DMA APIs. Setting this config | |
169 | option permits the IOMMU driver to set a unity map for | |
170 | all the OS-visible memory. Hence the driver can continue | |
171 | to use physical addresses for DMA, at least until this | |
172 | option is removed in the 2.6.32 kernel. | |
173 | ||
d3f13810 | 174 | config INTEL_IOMMU_FLOPPY_WA |
166e9278 | 175 | def_bool y |
d3f13810 | 176 | depends on INTEL_IOMMU && X86 |
166e9278 OBC |
177 | ---help--- |
178 | Floppy disk drivers are known to bypass DMA API calls | |
179 | thereby failing to work when IOMMU is enabled. This | |
180 | workaround will setup a 1:1 mapping for the first | |
181 | 16MiB to make floppy (an ISA device) work. | |
182 | ||
d3f13810 | 183 | config IRQ_REMAP |
a446e219 KC |
184 | bool "Support for Interrupt Remapping" |
185 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI | |
d3f13810 | 186 | select DMAR_TABLE |
166e9278 OBC |
187 | ---help--- |
188 | Supports Interrupt remapping for IO-APIC and MSI devices. | |
189 | To use x2apic mode in the CPU's which support x2APIC enhancements or | |
190 | to support platforms with CPU's having > 8 bit APIC ID, say Y. | |
68255b62 | 191 | |
fcf3a6ef OBC |
192 | # OMAP IOMMU support |
193 | config OMAP_IOMMU | |
194 | bool "OMAP IOMMU Support" | |
477ab7a1 JR |
195 | depends on ARM && MMU |
196 | depends on ARCH_OMAP2PLUS || COMPILE_TEST | |
fcf3a6ef | 197 | select IOMMU_API |
06b718c0 GH |
198 | ---help--- |
199 | The OMAP3 media platform drivers depend on iommu support, | |
200 | if you need them say Y here. | |
fcf3a6ef | 201 | |
fcf3a6ef | 202 | config OMAP_IOMMU_DEBUG |
61c75352 SA |
203 | bool "Export OMAP IOMMU internals in DebugFS" |
204 | depends on OMAP_IOMMU && DEBUG_FS | |
205 | ---help--- | |
206 | Select this to see extensive information about | |
207 | the internal state of OMAP IOMMU in debugfs. | |
fcf3a6ef | 208 | |
61c75352 | 209 | Say N unless you know you need this. |
fcf3a6ef | 210 | |
c68a2921 DK |
211 | config ROCKCHIP_IOMMU |
212 | bool "Rockchip IOMMU Support" | |
11175886 JR |
213 | depends on ARM |
214 | depends on ARCH_ROCKCHIP || COMPILE_TEST | |
c68a2921 DK |
215 | select IOMMU_API |
216 | select ARM_DMA_USE_IOMMU | |
217 | help | |
218 | Support for IOMMUs found on Rockchip rk32xx SOCs. | |
219 | These IOMMUs allow virtualization of the address space used by most | |
220 | cores within the multimedia subsystem. | |
221 | Say Y here if you are using a Rockchip SoC that includes an IOMMU | |
222 | device. | |
fcf3a6ef | 223 | |
d53e54b4 HD |
224 | config TEGRA_IOMMU_GART |
225 | bool "Tegra GART IOMMU Support" | |
226 | depends on ARCH_TEGRA_2x_SOC | |
227 | select IOMMU_API | |
228 | help | |
229 | Enables support for remapping discontiguous physical memory | |
230 | shared with the operating system into contiguous I/O virtual | |
231 | space through the GART (Graphics Address Relocation Table) | |
232 | hardware included on Tegra SoCs. | |
233 | ||
7a31f6f4 | 234 | config TEGRA_IOMMU_SMMU |
89184651 TR |
235 | bool "NVIDIA Tegra SMMU Support" |
236 | depends on ARCH_TEGRA | |
237 | depends on TEGRA_AHB | |
238 | depends on TEGRA_MC | |
7a31f6f4 HD |
239 | select IOMMU_API |
240 | help | |
89184651 | 241 | This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra |
588c43a7 | 242 | SoCs (Tegra30 up to Tegra210). |
7a31f6f4 | 243 | |
2a96536e KC |
244 | config EXYNOS_IOMMU |
245 | bool "Exynos IOMMU Support" | |
e5144c93 | 246 | depends on ARCH_EXYNOS && ARM && MMU |
2a96536e | 247 | select IOMMU_API |
4802c1d0 | 248 | select ARM_DMA_USE_IOMMU |
2a96536e | 249 | help |
5455d700 SK |
250 | Support for the IOMMU (System MMU) of Samsung Exynos application |
251 | processor family. This enables H/W multimedia accelerators to see | |
252 | non-linear physical memory chunks as linear memory in their | |
253 | address space. | |
2a96536e KC |
254 | |
255 | If unsure, say N here. | |
256 | ||
257 | config EXYNOS_IOMMU_DEBUG | |
258 | bool "Debugging log for Exynos IOMMU" | |
259 | depends on EXYNOS_IOMMU | |
260 | help | |
261 | Select this to see the detailed log message that shows what | |
5455d700 | 262 | happens in the IOMMU driver. |
2a96536e | 263 | |
5455d700 | 264 | Say N unless you need kernel log message for IOMMU debugging. |
2a96536e | 265 | |
d25a2a16 LP |
266 | config IPMMU_VMSA |
267 | bool "Renesas VMSA-compatible IPMMU" | |
268 | depends on ARM_LPAE | |
269 | depends on ARCH_SHMOBILE || COMPILE_TEST | |
270 | select IOMMU_API | |
f20ed39f | 271 | select IOMMU_IO_PGTABLE_LPAE |
d25a2a16 LP |
272 | select ARM_DMA_USE_IOMMU |
273 | help | |
274 | Support for the Renesas VMSA-compatible IPMMU Renesas found in the | |
275 | R-Mobile APE6 and R-Car H2/M2 SoCs. | |
276 | ||
277 | If unsure, say N. | |
278 | ||
4e13c1ac AK |
279 | config SPAPR_TCE_IOMMU |
280 | bool "sPAPR TCE IOMMU Support" | |
5b25199e | 281 | depends on PPC_POWERNV || PPC_PSERIES |
4e13c1ac AK |
282 | select IOMMU_API |
283 | help | |
284 | Enables bits of IOMMU API required by VFIO. The iommu_ops | |
285 | is not implemented as it is not necessary for VFIO. | |
286 | ||
48ec83bc | 287 | # ARM IOMMU support |
45ae7cff WD |
288 | config ARM_SMMU |
289 | bool "ARM Ltd. System MMU (SMMU) Support" | |
a20cc76b | 290 | depends on (ARM64 || ARM) && MMU |
45ae7cff | 291 | select IOMMU_API |
518f7136 | 292 | select IOMMU_IO_PGTABLE_LPAE |
45ae7cff WD |
293 | select ARM_DMA_USE_IOMMU if ARM |
294 | help | |
295 | Support for implementations of the ARM System MMU architecture | |
518f7136 | 296 | versions 1 and 2. |
45ae7cff WD |
297 | |
298 | Say Y here if your SoC includes an IOMMU device implementing | |
299 | the ARM SMMU architecture. | |
300 | ||
48ec83bc WD |
301 | config ARM_SMMU_V3 |
302 | bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" | |
303 | depends on ARM64 && PCI | |
304 | select IOMMU_API | |
305 | select IOMMU_IO_PGTABLE_LPAE | |
166bdbd2 | 306 | select GENERIC_MSI_IRQ_DOMAIN |
48ec83bc WD |
307 | help |
308 | Support for implementations of the ARM System MMU architecture | |
309 | version 3 providing translation support to a PCIe root complex. | |
310 | ||
311 | Say Y here if your system includes an IOMMU device implementing | |
312 | the ARM SMMUv3 architecture. | |
313 | ||
8128f23c GS |
314 | config S390_IOMMU |
315 | def_bool y if S390 && PCI | |
316 | depends on S390 && PCI | |
317 | select IOMMU_API | |
318 | help | |
319 | Support for the IOMMU API for s390 PCI devices. | |
320 | ||
68255b62 | 321 | endif # IOMMU_SUPPORT |