iommu/vt-d: Add basic SVM PASID support
[deliverable/linux.git] / drivers / iommu / Kconfig
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1# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
b10f127e 4
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5menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
e5144c93 7 depends on MMU
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8 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
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17menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
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23config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
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26 # SWIOTLB guarantees a dma_to_phys() implementation
27 depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB)
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28 help
29 Enable support for the ARM long descriptor pagetable format.
30 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
31 sizes at both stage-1 and stage-2, as well as address spaces
32 up to 48-bits in size.
33
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34config IOMMU_IO_PGTABLE_LPAE_SELFTEST
35 bool "LPAE selftests"
36 depends on IOMMU_IO_PGTABLE_LPAE
37 help
38 Enable self-tests for LPAE page table allocator. This performs
39 a series of page-table consistency checks during boot.
40
41 If unsure, say N here.
42
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43endmenu
44
114150d8 45config IOMMU_IOVA
15bbdec3 46 tristate
114150d8 47
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48config OF_IOMMU
49 def_bool y
7eba1d51 50 depends on OF && IOMMU_API
4e0ee78f 51
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52config FSL_PAMU
53 bool "Freescale IOMMU support"
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54 depends on PPC32
55 depends on PPC_E500MC || COMPILE_TEST
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56 select IOMMU_API
57 select GENERIC_ALLOCATOR
58 help
59 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
60 PAMU can authorize memory access, remap the memory address, and remap I/O
61 transaction types.
62
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63# MSM IOMMU support
64config MSM_IOMMU
65 bool "MSM IOMMU Support"
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66 depends on ARM
67 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
a3f447a4 68 depends on BROKEN
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69 select IOMMU_API
70 help
71 Support for the IOMMUs found on certain Qualcomm SOCs.
72 These IOMMUs allow virtualization of the address space used by most
73 cores within the multimedia subsystem.
74
75 If unsure, say N here.
76
77config IOMMU_PGTABLES_L2
78 def_bool y
79 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
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80
81# AMD IOMMU support
82config AMD_IOMMU
83 bool "AMD IOMMU support"
84 select SWIOTLB
85 select PCI_MSI
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86 select PCI_ATS
87 select PCI_PRI
88 select PCI_PASID
29b68415 89 select IOMMU_API
0dbc6078 90 depends on X86_64 && PCI && ACPI
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91 ---help---
92 With this option you can enable support for AMD IOMMU hardware in
93 your system. An IOMMU is a hardware component which provides
94 remapping of DMA memory accesses from devices. With an AMD IOMMU you
59bf8964 95 can isolate the DMA memory of different devices and protect the
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96 system from misbehaving device drivers or hardware.
97
98 You can find out if your system has an AMD IOMMU if you look into
99 your BIOS for an option to enable it or if you have an IVRS ACPI
100 table.
101
102config AMD_IOMMU_STATS
103 bool "Export AMD IOMMU statistics to debugfs"
104 depends on AMD_IOMMU
105 select DEBUG_FS
106 ---help---
107 This option enables code in the AMD IOMMU driver to collect various
108 statistics about whats happening in the driver and exports that
109 information to userspace via debugfs.
110 If unsure, say N.
166e9278 111
e3c495c7 112config AMD_IOMMU_V2
a446e219 113 tristate "AMD IOMMU Version 2 driver"
e5cac32c 114 depends on AMD_IOMMU
8736b2c3 115 select MMU_NOTIFIER
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116 ---help---
117 This option enables support for the AMD IOMMUv2 features of the IOMMU
118 hardware. Select this option if you want to use devices that support
59bf8964 119 the PCI PRI and PASID interface.
e3c495c7 120
166e9278 121# Intel IOMMU support
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122config DMAR_TABLE
123 bool
124
125config INTEL_IOMMU
126 bool "Support for Intel IOMMU using DMA Remapping Devices"
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127 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
128 select IOMMU_API
114150d8 129 select IOMMU_IOVA
d3f13810 130 select DMAR_TABLE
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131 help
132 DMA remapping (DMAR) devices support enables independent address
133 translations for Direct Memory Access (DMA) from devices.
134 These DMA remapping devices are reported via ACPI tables
135 and include PCI device scope covered by these DMA
136 remapping devices.
137
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138config INTEL_IOMMU_SVM
139 bool "Support for Shared Virtual Memory with Intel IOMMU"
140 depends on INTEL_IOMMU && X86
b16d0cb9 141 select PCI_PASID
2f26e0a9 142 select MMU_NOTIFIER
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143 help
144 Shared Virtual Memory (SVM) provides a facility for devices
145 to access DMA resources through process address space by
146 means of a Process Address Space ID (PASID).
147
d3f13810 148config INTEL_IOMMU_DEFAULT_ON
166e9278 149 def_bool y
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150 prompt "Enable Intel DMA Remapping Devices by default"
151 depends on INTEL_IOMMU
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152 help
153 Selecting this option will enable a DMAR device at boot time if
154 one is found. If this option is not selected, DMAR support can
155 be enabled by passing intel_iommu=on to the kernel.
156
d3f13810 157config INTEL_IOMMU_BROKEN_GFX_WA
166e9278 158 bool "Workaround broken graphics drivers (going away soon)"
d3f13810 159 depends on INTEL_IOMMU && BROKEN && X86
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160 ---help---
161 Current Graphics drivers tend to use physical address
162 for DMA and avoid using DMA APIs. Setting this config
163 option permits the IOMMU driver to set a unity map for
164 all the OS-visible memory. Hence the driver can continue
165 to use physical addresses for DMA, at least until this
166 option is removed in the 2.6.32 kernel.
167
d3f13810 168config INTEL_IOMMU_FLOPPY_WA
166e9278 169 def_bool y
d3f13810 170 depends on INTEL_IOMMU && X86
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171 ---help---
172 Floppy disk drivers are known to bypass DMA API calls
173 thereby failing to work when IOMMU is enabled. This
174 workaround will setup a 1:1 mapping for the first
175 16MiB to make floppy (an ISA device) work.
176
d3f13810 177config IRQ_REMAP
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178 bool "Support for Interrupt Remapping"
179 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
d3f13810 180 select DMAR_TABLE
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181 ---help---
182 Supports Interrupt remapping for IO-APIC and MSI devices.
183 To use x2apic mode in the CPU's which support x2APIC enhancements or
184 to support platforms with CPU's having > 8 bit APIC ID, say Y.
68255b62 185
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186# OMAP IOMMU support
187config OMAP_IOMMU
188 bool "OMAP IOMMU Support"
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189 depends on ARM && MMU
190 depends on ARCH_OMAP2PLUS || COMPILE_TEST
fcf3a6ef 191 select IOMMU_API
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192 ---help---
193 The OMAP3 media platform drivers depend on iommu support,
194 if you need them say Y here.
fcf3a6ef 195
fcf3a6ef 196config OMAP_IOMMU_DEBUG
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197 bool "Export OMAP IOMMU internals in DebugFS"
198 depends on OMAP_IOMMU && DEBUG_FS
199 ---help---
200 Select this to see extensive information about
201 the internal state of OMAP IOMMU in debugfs.
fcf3a6ef 202
61c75352 203 Say N unless you know you need this.
fcf3a6ef 204
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205config ROCKCHIP_IOMMU
206 bool "Rockchip IOMMU Support"
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207 depends on ARM
208 depends on ARCH_ROCKCHIP || COMPILE_TEST
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209 select IOMMU_API
210 select ARM_DMA_USE_IOMMU
211 help
212 Support for IOMMUs found on Rockchip rk32xx SOCs.
213 These IOMMUs allow virtualization of the address space used by most
214 cores within the multimedia subsystem.
215 Say Y here if you are using a Rockchip SoC that includes an IOMMU
216 device.
fcf3a6ef 217
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218config TEGRA_IOMMU_GART
219 bool "Tegra GART IOMMU Support"
220 depends on ARCH_TEGRA_2x_SOC
221 select IOMMU_API
222 help
223 Enables support for remapping discontiguous physical memory
224 shared with the operating system into contiguous I/O virtual
225 space through the GART (Graphics Address Relocation Table)
226 hardware included on Tegra SoCs.
227
7a31f6f4 228config TEGRA_IOMMU_SMMU
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229 bool "NVIDIA Tegra SMMU Support"
230 depends on ARCH_TEGRA
231 depends on TEGRA_AHB
232 depends on TEGRA_MC
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233 select IOMMU_API
234 help
89184651 235 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
588c43a7 236 SoCs (Tegra30 up to Tegra210).
7a31f6f4 237
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238config EXYNOS_IOMMU
239 bool "Exynos IOMMU Support"
e5144c93 240 depends on ARCH_EXYNOS && ARM && MMU
2a96536e 241 select IOMMU_API
4802c1d0 242 select ARM_DMA_USE_IOMMU
2a96536e 243 help
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244 Support for the IOMMU (System MMU) of Samsung Exynos application
245 processor family. This enables H/W multimedia accelerators to see
246 non-linear physical memory chunks as linear memory in their
247 address space.
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248
249 If unsure, say N here.
250
251config EXYNOS_IOMMU_DEBUG
252 bool "Debugging log for Exynos IOMMU"
253 depends on EXYNOS_IOMMU
254 help
255 Select this to see the detailed log message that shows what
5455d700 256 happens in the IOMMU driver.
2a96536e 257
5455d700 258 Say N unless you need kernel log message for IOMMU debugging.
2a96536e 259
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260config SHMOBILE_IPMMU
261 bool
262
263config SHMOBILE_IPMMU_TLB
264 bool
265
266config SHMOBILE_IOMMU
267 bool "IOMMU for Renesas IPMMU/IPMMUI"
268 default n
e5144c93 269 depends on ARM && MMU
b8354439 270 depends on ARCH_SHMOBILE || COMPILE_TEST
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271 select IOMMU_API
272 select ARM_DMA_USE_IOMMU
273 select SHMOBILE_IPMMU
274 select SHMOBILE_IPMMU_TLB
275 help
276 Support for Renesas IPMMU/IPMMUI. This option enables
277 remapping of DMA memory accesses from all of the IP blocks
278 on the ICB.
279
280 Warning: Drivers (including userspace drivers of UIO
281 devices) of the IP blocks on the ICB *must* use addresses
282 allocated from the IPMMU (iova) for DMA with this option
283 enabled.
284
285 If unsure, say N.
286
287choice
288 prompt "IPMMU/IPMMUI address space size"
289 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
290 depends on SHMOBILE_IOMMU
291 help
292 This option sets IPMMU/IPMMUI address space size by
293 adjusting the 1st level page table size. The page table size
294 is calculated as follows:
295
296 page table size = number of page table entries * 4 bytes
297 number of page table entries = address space size / 1 MiB
298
299 For example, when the address space size is 2048 MiB, the
300 1st level page table size is 8192 bytes.
301
302 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
303 bool "2 GiB"
304
305 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
306 bool "1 GiB"
307
308 config SHMOBILE_IOMMU_ADDRSIZE_512MB
309 bool "512 MiB"
310
311 config SHMOBILE_IOMMU_ADDRSIZE_256MB
312 bool "256 MiB"
313
314 config SHMOBILE_IOMMU_ADDRSIZE_128MB
315 bool "128 MiB"
316
317 config SHMOBILE_IOMMU_ADDRSIZE_64MB
318 bool "64 MiB"
319
320 config SHMOBILE_IOMMU_ADDRSIZE_32MB
321 bool "32 MiB"
322
323endchoice
324
325config SHMOBILE_IOMMU_L1SIZE
326 int
327 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
328 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
329 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
330 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
331 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
332 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
333 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
334
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335config IPMMU_VMSA
336 bool "Renesas VMSA-compatible IPMMU"
337 depends on ARM_LPAE
338 depends on ARCH_SHMOBILE || COMPILE_TEST
339 select IOMMU_API
f20ed39f 340 select IOMMU_IO_PGTABLE_LPAE
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341 select ARM_DMA_USE_IOMMU
342 help
343 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
344 R-Mobile APE6 and R-Car H2/M2 SoCs.
345
346 If unsure, say N.
347
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348config SPAPR_TCE_IOMMU
349 bool "sPAPR TCE IOMMU Support"
5b25199e 350 depends on PPC_POWERNV || PPC_PSERIES
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351 select IOMMU_API
352 help
353 Enables bits of IOMMU API required by VFIO. The iommu_ops
354 is not implemented as it is not necessary for VFIO.
355
48ec83bc 356# ARM IOMMU support
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357config ARM_SMMU
358 bool "ARM Ltd. System MMU (SMMU) Support"
a20cc76b 359 depends on (ARM64 || ARM) && MMU
45ae7cff 360 select IOMMU_API
518f7136 361 select IOMMU_IO_PGTABLE_LPAE
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362 select ARM_DMA_USE_IOMMU if ARM
363 help
364 Support for implementations of the ARM System MMU architecture
518f7136 365 versions 1 and 2.
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366
367 Say Y here if your SoC includes an IOMMU device implementing
368 the ARM SMMU architecture.
369
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370config ARM_SMMU_V3
371 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
372 depends on ARM64 && PCI
373 select IOMMU_API
374 select IOMMU_IO_PGTABLE_LPAE
375 help
376 Support for implementations of the ARM System MMU architecture
377 version 3 providing translation support to a PCIe root complex.
378
379 Say Y here if your system includes an IOMMU device implementing
380 the ARM SMMUv3 architecture.
381
68255b62 382endif # IOMMU_SUPPORT
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