dt-bindings: iommu: Add documentation for rockchip iommu
[deliverable/linux.git] / drivers / iommu / Kconfig
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1# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
b10f127e 4
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5menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
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16config OF_IOMMU
17 def_bool y
18 depends on OF
19
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20config FSL_PAMU
21 bool "Freescale IOMMU support"
22 depends on PPC_E500MC
23 select IOMMU_API
24 select GENERIC_ALLOCATOR
25 help
26 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
27 PAMU can authorize memory access, remap the memory address, and remap I/O
28 transaction types.
29
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30# MSM IOMMU support
31config MSM_IOMMU
32 bool "MSM IOMMU Support"
33 depends on ARCH_MSM8X60 || ARCH_MSM8960
34 select IOMMU_API
35 help
36 Support for the IOMMUs found on certain Qualcomm SOCs.
37 These IOMMUs allow virtualization of the address space used by most
38 cores within the multimedia subsystem.
39
40 If unsure, say N here.
41
42config IOMMU_PGTABLES_L2
43 def_bool y
44 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
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45
46# AMD IOMMU support
47config AMD_IOMMU
48 bool "AMD IOMMU support"
49 select SWIOTLB
50 select PCI_MSI
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51 select PCI_ATS
52 select PCI_PRI
53 select PCI_PASID
29b68415 54 select IOMMU_API
0dbc6078 55 depends on X86_64 && PCI && ACPI
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56 ---help---
57 With this option you can enable support for AMD IOMMU hardware in
58 your system. An IOMMU is a hardware component which provides
59 remapping of DMA memory accesses from devices. With an AMD IOMMU you
59bf8964 60 can isolate the DMA memory of different devices and protect the
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61 system from misbehaving device drivers or hardware.
62
63 You can find out if your system has an AMD IOMMU if you look into
64 your BIOS for an option to enable it or if you have an IVRS ACPI
65 table.
66
67config AMD_IOMMU_STATS
68 bool "Export AMD IOMMU statistics to debugfs"
69 depends on AMD_IOMMU
70 select DEBUG_FS
71 ---help---
72 This option enables code in the AMD IOMMU driver to collect various
73 statistics about whats happening in the driver and exports that
74 information to userspace via debugfs.
75 If unsure, say N.
166e9278 76
e3c495c7 77config AMD_IOMMU_V2
a446e219 78 tristate "AMD IOMMU Version 2 driver"
e5cac32c 79 depends on AMD_IOMMU
8736b2c3 80 select MMU_NOTIFIER
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81 ---help---
82 This option enables support for the AMD IOMMUv2 features of the IOMMU
83 hardware. Select this option if you want to use devices that support
59bf8964 84 the PCI PRI and PASID interface.
e3c495c7 85
166e9278 86# Intel IOMMU support
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87config DMAR_TABLE
88 bool
89
90config INTEL_IOMMU
91 bool "Support for Intel IOMMU using DMA Remapping Devices"
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92 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
93 select IOMMU_API
d3f13810 94 select DMAR_TABLE
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95 help
96 DMA remapping (DMAR) devices support enables independent address
97 translations for Direct Memory Access (DMA) from devices.
98 These DMA remapping devices are reported via ACPI tables
99 and include PCI device scope covered by these DMA
100 remapping devices.
101
d3f13810 102config INTEL_IOMMU_DEFAULT_ON
166e9278 103 def_bool y
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104 prompt "Enable Intel DMA Remapping Devices by default"
105 depends on INTEL_IOMMU
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106 help
107 Selecting this option will enable a DMAR device at boot time if
108 one is found. If this option is not selected, DMAR support can
109 be enabled by passing intel_iommu=on to the kernel.
110
d3f13810 111config INTEL_IOMMU_BROKEN_GFX_WA
166e9278 112 bool "Workaround broken graphics drivers (going away soon)"
d3f13810 113 depends on INTEL_IOMMU && BROKEN && X86
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114 ---help---
115 Current Graphics drivers tend to use physical address
116 for DMA and avoid using DMA APIs. Setting this config
117 option permits the IOMMU driver to set a unity map for
118 all the OS-visible memory. Hence the driver can continue
119 to use physical addresses for DMA, at least until this
120 option is removed in the 2.6.32 kernel.
121
d3f13810 122config INTEL_IOMMU_FLOPPY_WA
166e9278 123 def_bool y
d3f13810 124 depends on INTEL_IOMMU && X86
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125 ---help---
126 Floppy disk drivers are known to bypass DMA API calls
127 thereby failing to work when IOMMU is enabled. This
128 workaround will setup a 1:1 mapping for the first
129 16MiB to make floppy (an ISA device) work.
130
d3f13810 131config IRQ_REMAP
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132 bool "Support for Interrupt Remapping"
133 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
d3f13810 134 select DMAR_TABLE
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135 ---help---
136 Supports Interrupt remapping for IO-APIC and MSI devices.
137 To use x2apic mode in the CPU's which support x2APIC enhancements or
138 to support platforms with CPU's having > 8 bit APIC ID, say Y.
68255b62 139
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140# OMAP IOMMU support
141config OMAP_IOMMU
142 bool "OMAP IOMMU Support"
ae191589 143 depends on ARCH_OMAP2PLUS
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144 select IOMMU_API
145
fcf3a6ef 146config OMAP_IOMMU_DEBUG
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147 tristate "Export OMAP IOMMU internals in DebugFS"
148 depends on OMAP_IOMMU && DEBUG_FS
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149 help
150 Select this to see extensive information about
baaa7b5d 151 the internal state of OMAP IOMMU in debugfs.
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152
153 Say N unless you know you need this.
154
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155config ROCKCHIP_IOMMU
156 bool "Rockchip IOMMU Support"
157 depends on ARCH_ROCKCHIP
158 select IOMMU_API
159 select ARM_DMA_USE_IOMMU
160 help
161 Support for IOMMUs found on Rockchip rk32xx SOCs.
162 These IOMMUs allow virtualization of the address space used by most
163 cores within the multimedia subsystem.
164 Say Y here if you are using a Rockchip SoC that includes an IOMMU
165 device.
166
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167config TEGRA_IOMMU_GART
168 bool "Tegra GART IOMMU Support"
169 depends on ARCH_TEGRA_2x_SOC
170 select IOMMU_API
171 help
172 Enables support for remapping discontiguous physical memory
173 shared with the operating system into contiguous I/O virtual
174 space through the GART (Graphics Address Relocation Table)
175 hardware included on Tegra SoCs.
176
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177config TEGRA_IOMMU_SMMU
178 bool "Tegra SMMU IOMMU Support"
d300356c 179 depends on ARCH_TEGRA && TEGRA_AHB
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180 select IOMMU_API
181 help
182 Enables support for remapping discontiguous physical memory
183 shared with the operating system into contiguous I/O virtual
184 space through the SMMU (System Memory Management Unit)
185 hardware included on Tegra SoCs.
186
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187config EXYNOS_IOMMU
188 bool "Exynos IOMMU Support"
b28165da 189 depends on ARCH_EXYNOS
2a96536e 190 select IOMMU_API
4802c1d0 191 select ARM_DMA_USE_IOMMU
2a96536e 192 help
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193 Support for the IOMMU (System MMU) of Samsung Exynos application
194 processor family. This enables H/W multimedia accelerators to see
195 non-linear physical memory chunks as linear memory in their
196 address space.
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197
198 If unsure, say N here.
199
200config EXYNOS_IOMMU_DEBUG
201 bool "Debugging log for Exynos IOMMU"
202 depends on EXYNOS_IOMMU
203 help
204 Select this to see the detailed log message that shows what
5455d700 205 happens in the IOMMU driver.
2a96536e 206
5455d700 207 Say N unless you need kernel log message for IOMMU debugging.
2a96536e 208
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209config SHMOBILE_IPMMU
210 bool
211
212config SHMOBILE_IPMMU_TLB
213 bool
214
215config SHMOBILE_IOMMU
216 bool "IOMMU for Renesas IPMMU/IPMMUI"
217 default n
f63c4824 218 depends on ARM
b8354439 219 depends on ARCH_SHMOBILE || COMPILE_TEST
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220 select IOMMU_API
221 select ARM_DMA_USE_IOMMU
222 select SHMOBILE_IPMMU
223 select SHMOBILE_IPMMU_TLB
224 help
225 Support for Renesas IPMMU/IPMMUI. This option enables
226 remapping of DMA memory accesses from all of the IP blocks
227 on the ICB.
228
229 Warning: Drivers (including userspace drivers of UIO
230 devices) of the IP blocks on the ICB *must* use addresses
231 allocated from the IPMMU (iova) for DMA with this option
232 enabled.
233
234 If unsure, say N.
235
236choice
237 prompt "IPMMU/IPMMUI address space size"
238 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
239 depends on SHMOBILE_IOMMU
240 help
241 This option sets IPMMU/IPMMUI address space size by
242 adjusting the 1st level page table size. The page table size
243 is calculated as follows:
244
245 page table size = number of page table entries * 4 bytes
246 number of page table entries = address space size / 1 MiB
247
248 For example, when the address space size is 2048 MiB, the
249 1st level page table size is 8192 bytes.
250
251 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
252 bool "2 GiB"
253
254 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
255 bool "1 GiB"
256
257 config SHMOBILE_IOMMU_ADDRSIZE_512MB
258 bool "512 MiB"
259
260 config SHMOBILE_IOMMU_ADDRSIZE_256MB
261 bool "256 MiB"
262
263 config SHMOBILE_IOMMU_ADDRSIZE_128MB
264 bool "128 MiB"
265
266 config SHMOBILE_IOMMU_ADDRSIZE_64MB
267 bool "64 MiB"
268
269 config SHMOBILE_IOMMU_ADDRSIZE_32MB
270 bool "32 MiB"
271
272endchoice
273
274config SHMOBILE_IOMMU_L1SIZE
275 int
276 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
277 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
278 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
279 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
280 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
281 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
282 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
283
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284config IPMMU_VMSA
285 bool "Renesas VMSA-compatible IPMMU"
286 depends on ARM_LPAE
287 depends on ARCH_SHMOBILE || COMPILE_TEST
288 select IOMMU_API
289 select ARM_DMA_USE_IOMMU
290 help
291 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
292 R-Mobile APE6 and R-Car H2/M2 SoCs.
293
294 If unsure, say N.
295
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296config SPAPR_TCE_IOMMU
297 bool "sPAPR TCE IOMMU Support"
5b25199e 298 depends on PPC_POWERNV || PPC_PSERIES
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299 select IOMMU_API
300 help
301 Enables bits of IOMMU API required by VFIO. The iommu_ops
302 is not implemented as it is not necessary for VFIO.
303
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304config ARM_SMMU
305 bool "ARM Ltd. System MMU (SMMU) Support"
306 depends on ARM64 || (ARM_LPAE && OF)
307 select IOMMU_API
308 select ARM_DMA_USE_IOMMU if ARM
309 help
310 Support for implementations of the ARM System MMU architecture
311 versions 1 and 2. The driver supports both v7l and v8l table
312 formats with 4k and 64k page sizes.
313
314 Say Y here if your SoC includes an IOMMU device implementing
315 the ARM SMMU architecture.
316
68255b62 317endif # IOMMU_SUPPORT
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