Commit | Line | Data |
---|---|---|
9b1b0e42 | 1 | #include <linux/seq_file.h> |
1c4248ca | 2 | #include <linux/cpumask.h> |
736baef4 JR |
3 | #include <linux/kernel.h> |
4 | #include <linux/string.h> | |
98f1ad25 | 5 | #include <linux/cpumask.h> |
736baef4 | 6 | #include <linux/errno.h> |
98f1ad25 | 7 | #include <linux/msi.h> |
5afba62c JR |
8 | #include <linux/irq.h> |
9 | #include <linux/pci.h> | |
98f1ad25 JR |
10 | |
11 | #include <asm/hw_irq.h> | |
12 | #include <asm/irq_remapping.h> | |
1c4248ca JR |
13 | #include <asm/processor.h> |
14 | #include <asm/x86_init.h> | |
15 | #include <asm/apic.h> | |
736baef4 | 16 | |
8a8f422d | 17 | #include "irq_remapping.h" |
736baef4 | 18 | |
95a02e97 | 19 | int irq_remapping_enabled; |
736baef4 | 20 | |
95a02e97 | 21 | int disable_irq_remap; |
736baef4 JR |
22 | int disable_sourceid_checking; |
23 | int no_x2apic_optout; | |
24 | ||
25 | static struct irq_remap_ops *remap_ops; | |
26 | ||
5afba62c JR |
27 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec); |
28 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, | |
29 | int index, int sub_handle); | |
373dd7a2 JR |
30 | static int set_remapped_irq_affinity(struct irq_data *data, |
31 | const struct cpumask *mask, | |
32 | bool force); | |
5afba62c | 33 | |
1c4248ca JR |
34 | static void irq_remapping_disable_io_apic(void) |
35 | { | |
36 | /* | |
37 | * With interrupt-remapping, for now we will use virtual wire A | |
38 | * mode, as virtual wire B is little complex (need to configure | |
39 | * both IOAPIC RTE as well as interrupt-remapping table entry). | |
40 | * As this gets called during crash dump, keep this simple for | |
41 | * now. | |
42 | */ | |
43 | if (cpu_has_apic || apic_from_smp_config()) | |
44 | disconnect_bsp_APIC(0); | |
45 | } | |
46 | ||
5afba62c JR |
47 | static int do_setup_msi_irqs(struct pci_dev *dev, int nvec) |
48 | { | |
49 | int node, ret, sub_handle, index = 0; | |
50 | unsigned int irq; | |
51 | struct msi_desc *msidesc; | |
52 | ||
53 | nvec = __roundup_pow_of_two(nvec); | |
54 | ||
55 | WARN_ON(!list_is_singular(&dev->msi_list)); | |
56 | msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); | |
57 | WARN_ON(msidesc->irq); | |
58 | WARN_ON(msidesc->msi_attrib.multiple); | |
59 | ||
60 | node = dev_to_node(&dev->dev); | |
61 | irq = __create_irqs(get_nr_irqs_gsi(), nvec, node); | |
62 | if (irq == 0) | |
63 | return -ENOSPC; | |
64 | ||
65 | msidesc->msi_attrib.multiple = ilog2(nvec); | |
66 | for (sub_handle = 0; sub_handle < nvec; sub_handle++) { | |
67 | if (!sub_handle) { | |
68 | index = msi_alloc_remapped_irq(dev, irq, nvec); | |
69 | if (index < 0) { | |
70 | ret = index; | |
71 | goto error; | |
72 | } | |
73 | } else { | |
74 | ret = msi_setup_remapped_irq(dev, irq + sub_handle, | |
75 | index, sub_handle); | |
76 | if (ret < 0) | |
77 | goto error; | |
78 | } | |
79 | ret = setup_msi_irq(dev, msidesc, irq, sub_handle); | |
80 | if (ret < 0) | |
81 | goto error; | |
82 | } | |
83 | return 0; | |
84 | ||
85 | error: | |
86 | destroy_irqs(irq, nvec); | |
87 | ||
88 | /* | |
89 | * Restore altered MSI descriptor fields and prevent just destroyed | |
90 | * IRQs from tearing down again in default_teardown_msi_irqs() | |
91 | */ | |
92 | msidesc->irq = 0; | |
93 | msidesc->msi_attrib.multiple = 0; | |
94 | ||
95 | return ret; | |
96 | } | |
97 | ||
98 | static int do_setup_msix_irqs(struct pci_dev *dev, int nvec) | |
99 | { | |
100 | int node, ret, sub_handle, index = 0; | |
101 | struct msi_desc *msidesc; | |
102 | unsigned int irq; | |
103 | ||
104 | node = dev_to_node(&dev->dev); | |
105 | irq = get_nr_irqs_gsi(); | |
106 | sub_handle = 0; | |
107 | ||
108 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
109 | ||
110 | irq = create_irq_nr(irq, node); | |
111 | if (irq == 0) | |
112 | return -1; | |
113 | ||
114 | if (sub_handle == 0) | |
115 | ret = index = msi_alloc_remapped_irq(dev, irq, nvec); | |
116 | else | |
117 | ret = msi_setup_remapped_irq(dev, irq, index, sub_handle); | |
118 | ||
119 | if (ret < 0) | |
120 | goto error; | |
121 | ||
122 | ret = setup_msi_irq(dev, msidesc, irq, 0); | |
123 | if (ret < 0) | |
124 | goto error; | |
125 | ||
126 | sub_handle += 1; | |
127 | irq += 1; | |
128 | } | |
129 | ||
130 | return 0; | |
131 | ||
132 | error: | |
133 | destroy_irq(irq); | |
134 | return ret; | |
135 | } | |
136 | ||
137 | static int irq_remapping_setup_msi_irqs(struct pci_dev *dev, | |
138 | int nvec, int type) | |
139 | { | |
140 | if (type == PCI_CAP_ID_MSI) | |
141 | return do_setup_msi_irqs(dev, nvec); | |
142 | else | |
143 | return do_setup_msix_irqs(dev, nvec); | |
144 | } | |
145 | ||
1c4248ca JR |
146 | static void __init irq_remapping_modify_x86_ops(void) |
147 | { | |
71054d88 | 148 | x86_io_apic_ops.disable = irq_remapping_disable_io_apic; |
373dd7a2 | 149 | x86_io_apic_ops.set_affinity = set_remapped_irq_affinity; |
a6a25dd3 | 150 | x86_io_apic_ops.setup_entry = setup_ioapic_remapped_entry; |
5afba62c | 151 | x86_msi.setup_msi_irqs = irq_remapping_setup_msi_irqs; |
71054d88 | 152 | x86_msi.setup_hpet_msi = setup_hpet_msi_remapped; |
1c4248ca JR |
153 | } |
154 | ||
736baef4 JR |
155 | static __init int setup_nointremap(char *str) |
156 | { | |
95a02e97 | 157 | disable_irq_remap = 1; |
736baef4 JR |
158 | return 0; |
159 | } | |
160 | early_param("nointremap", setup_nointremap); | |
161 | ||
95a02e97 | 162 | static __init int setup_irqremap(char *str) |
736baef4 JR |
163 | { |
164 | if (!str) | |
165 | return -EINVAL; | |
166 | ||
167 | while (*str) { | |
168 | if (!strncmp(str, "on", 2)) | |
95a02e97 | 169 | disable_irq_remap = 0; |
736baef4 | 170 | else if (!strncmp(str, "off", 3)) |
95a02e97 | 171 | disable_irq_remap = 1; |
736baef4 JR |
172 | else if (!strncmp(str, "nosid", 5)) |
173 | disable_sourceid_checking = 1; | |
174 | else if (!strncmp(str, "no_x2apic_optout", 16)) | |
175 | no_x2apic_optout = 1; | |
176 | ||
177 | str += strcspn(str, ","); | |
178 | while (*str == ',') | |
179 | str++; | |
180 | } | |
181 | ||
182 | return 0; | |
183 | } | |
95a02e97 | 184 | early_param("intremap", setup_irqremap); |
736baef4 | 185 | |
95a02e97 | 186 | void __init setup_irq_remapping_ops(void) |
736baef4 JR |
187 | { |
188 | remap_ops = &intel_irq_remap_ops; | |
c18d2388 JR |
189 | |
190 | #ifdef CONFIG_AMD_IOMMU | |
191 | if (amd_iommu_irq_ops.prepare() == 0) | |
192 | remap_ops = &amd_iommu_irq_ops; | |
193 | #endif | |
736baef4 JR |
194 | } |
195 | ||
95a02e97 | 196 | int irq_remapping_supported(void) |
736baef4 | 197 | { |
95a02e97 | 198 | if (disable_irq_remap) |
736baef4 JR |
199 | return 0; |
200 | ||
201 | if (!remap_ops || !remap_ops->supported) | |
202 | return 0; | |
203 | ||
204 | return remap_ops->supported(); | |
205 | } | |
206 | ||
95a02e97 | 207 | int __init irq_remapping_prepare(void) |
736baef4 | 208 | { |
95a02e97 | 209 | if (!remap_ops || !remap_ops->prepare) |
736baef4 JR |
210 | return -ENODEV; |
211 | ||
95a02e97 | 212 | return remap_ops->prepare(); |
736baef4 JR |
213 | } |
214 | ||
95a02e97 | 215 | int __init irq_remapping_enable(void) |
736baef4 | 216 | { |
1c4248ca JR |
217 | int ret; |
218 | ||
95a02e97 | 219 | if (!remap_ops || !remap_ops->enable) |
736baef4 JR |
220 | return -ENODEV; |
221 | ||
1c4248ca JR |
222 | ret = remap_ops->enable(); |
223 | ||
224 | if (irq_remapping_enabled) | |
225 | irq_remapping_modify_x86_ops(); | |
226 | ||
227 | return ret; | |
736baef4 | 228 | } |
4f3d8b67 | 229 | |
95a02e97 | 230 | void irq_remapping_disable(void) |
4f3d8b67 | 231 | { |
70733e0c JR |
232 | if (!irq_remapping_enabled || |
233 | !remap_ops || | |
234 | !remap_ops->disable) | |
4f3d8b67 JR |
235 | return; |
236 | ||
95a02e97 | 237 | remap_ops->disable(); |
4f3d8b67 JR |
238 | } |
239 | ||
95a02e97 | 240 | int irq_remapping_reenable(int mode) |
4f3d8b67 | 241 | { |
70733e0c JR |
242 | if (!irq_remapping_enabled || |
243 | !remap_ops || | |
244 | !remap_ops->reenable) | |
4f3d8b67 JR |
245 | return 0; |
246 | ||
95a02e97 | 247 | return remap_ops->reenable(mode); |
4f3d8b67 JR |
248 | } |
249 | ||
95a02e97 | 250 | int __init irq_remap_enable_fault_handling(void) |
4f3d8b67 | 251 | { |
70733e0c JR |
252 | if (!irq_remapping_enabled) |
253 | return 0; | |
254 | ||
4f3d8b67 JR |
255 | if (!remap_ops || !remap_ops->enable_faulting) |
256 | return -ENODEV; | |
257 | ||
258 | return remap_ops->enable_faulting(); | |
259 | } | |
0c3f173a | 260 | |
95a02e97 SS |
261 | int setup_ioapic_remapped_entry(int irq, |
262 | struct IO_APIC_route_entry *entry, | |
263 | unsigned int destination, int vector, | |
264 | struct io_apic_irq_attr *attr) | |
0c3f173a JR |
265 | { |
266 | if (!remap_ops || !remap_ops->setup_ioapic_entry) | |
267 | return -ENODEV; | |
268 | ||
269 | return remap_ops->setup_ioapic_entry(irq, entry, destination, | |
270 | vector, attr); | |
271 | } | |
4c1bad6a | 272 | |
95a02e97 SS |
273 | int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask, |
274 | bool force) | |
4c1bad6a | 275 | { |
7eb9ae07 SS |
276 | if (!config_enabled(CONFIG_SMP) || !remap_ops || |
277 | !remap_ops->set_affinity) | |
4c1bad6a JR |
278 | return 0; |
279 | ||
280 | return remap_ops->set_affinity(data, mask, force); | |
281 | } | |
9d619f65 | 282 | |
95a02e97 | 283 | void free_remapped_irq(int irq) |
9d619f65 | 284 | { |
11b4a1cc JR |
285 | struct irq_cfg *cfg = irq_get_chip_data(irq); |
286 | ||
9d619f65 JR |
287 | if (!remap_ops || !remap_ops->free_irq) |
288 | return; | |
289 | ||
11b4a1cc JR |
290 | if (irq_remapped(cfg)) |
291 | remap_ops->free_irq(irq); | |
9d619f65 | 292 | } |
5e2b930b | 293 | |
95a02e97 SS |
294 | void compose_remapped_msi_msg(struct pci_dev *pdev, |
295 | unsigned int irq, unsigned int dest, | |
296 | struct msi_msg *msg, u8 hpet_id) | |
5e2b930b JR |
297 | { |
298 | if (!remap_ops || !remap_ops->compose_msi_msg) | |
299 | return; | |
300 | ||
301 | remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id); | |
302 | } | |
303 | ||
5afba62c | 304 | static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec) |
5e2b930b JR |
305 | { |
306 | if (!remap_ops || !remap_ops->msi_alloc_irq) | |
307 | return -ENODEV; | |
308 | ||
309 | return remap_ops->msi_alloc_irq(pdev, irq, nvec); | |
310 | } | |
311 | ||
5afba62c JR |
312 | static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, |
313 | int index, int sub_handle) | |
5e2b930b JR |
314 | { |
315 | if (!remap_ops || !remap_ops->msi_setup_irq) | |
316 | return -ENODEV; | |
317 | ||
318 | return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle); | |
319 | } | |
320 | ||
95a02e97 | 321 | int setup_hpet_msi_remapped(unsigned int irq, unsigned int id) |
5e2b930b JR |
322 | { |
323 | if (!remap_ops || !remap_ops->setup_hpet_msi) | |
324 | return -ENODEV; | |
325 | ||
326 | return remap_ops->setup_hpet_msi(irq, id); | |
327 | } | |
6a9f5de2 JR |
328 | |
329 | void panic_if_irq_remap(const char *msg) | |
330 | { | |
331 | if (irq_remapping_enabled) | |
332 | panic(msg); | |
333 | } | |
9b1b0e42 JR |
334 | |
335 | static void ir_ack_apic_edge(struct irq_data *data) | |
336 | { | |
337 | ack_APIC_irq(); | |
338 | } | |
339 | ||
340 | static void ir_ack_apic_level(struct irq_data *data) | |
341 | { | |
342 | ack_APIC_irq(); | |
343 | eoi_ioapic_irq(data->irq, data->chip_data); | |
344 | } | |
345 | ||
346 | static void ir_print_prefix(struct irq_data *data, struct seq_file *p) | |
347 | { | |
348 | seq_printf(p, " IR-%s", data->chip->name); | |
349 | } | |
350 | ||
351 | void irq_remap_modify_chip_defaults(struct irq_chip *chip) | |
352 | { | |
353 | chip->irq_print_chip = ir_print_prefix; | |
354 | chip->irq_ack = ir_ack_apic_edge; | |
355 | chip->irq_eoi = ir_ack_apic_level; | |
356 | chip->irq_set_affinity = x86_io_apic_ops.set_affinity; | |
357 | } |