[deliverable/linux.git] / drivers / irqchip / Kconfig

config IRQCHIP
	def_bool y
	depends on OF_IRQ

config ARM_GIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select MULTI_IRQ_HANDLER

config ARM_GIC_MAX_NR
	int
	default 2 if ARCH_REALVIEW
	default 1

config ARM_GIC_V2M
	bool
	depends on ARM_GIC
	depends on PCI && PCI_MSI
	select PCI_MSI_IRQ_DOMAIN

config GIC_NON_BANKED
	bool

config ARM_GIC_V3
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select IRQ_DOMAIN_HIERARCHY
	select PARTITION_PERCPU

config ARM_GIC_V3_ITS
	bool
	select PCI_MSI_IRQ_DOMAIN

config ARM_NVIC
	bool
	select IRQ_DOMAIN
	select IRQ_DOMAIN_HIERARCHY
	select GENERIC_IRQ_CHIP

config ARM_VIC
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config ARM_VIC_NR
	int
	default 4 if ARCH_S5PV210
	default 2
	depends on ARM_VIC
	help
	  The maximum number of VICs available in the system, for
	  power management.

config ARMADA_370_XP_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select PCI_MSI_IRQ_DOMAIN if PCI_MSI

config ALPINE_MSI
	bool
	depends on PCI && PCI_MSI
	select GENERIC_IRQ_CHIP
	select PCI_MSI_IRQ_DOMAIN

config ATMEL_AIC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config ATMEL_AIC5_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ

config I8259
	bool
	select IRQ_DOMAIN

config BCM6345_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BCM7038_L1_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BCM7120_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config BRCMSTB_L2_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config DW_APB_ICTL
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config HISILICON_IRQ_MBIGEN
	bool
	select ARM_GIC_V3
	select ARM_GIC_V3_ITS
	select GENERIC_MSI_IRQ_DOMAIN

config IMGPDC_IRQ
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config IRQ_MIPS_CPU
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config CLPS711X_IRQCHIP
	bool
	depends on ARCH_CLPS711X
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER
	select SPARSE_IRQ
	default y

config OR1K_PIC
	bool
	select IRQ_DOMAIN

config OMAP_IRQCHIP
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ORION_IRQCHIP
	bool
	select IRQ_DOMAIN
	select MULTI_IRQ_HANDLER

config PIC32_EVIC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config RENESAS_INTC_IRQPIN
	bool
	select IRQ_DOMAIN

config RENESAS_IRQC
	bool
	select GENERIC_IRQ_CHIP
	select IRQ_DOMAIN

config ST_IRQCHIP
	bool
	select REGMAP
	select MFD_SYSCON
	help
	  Enables SysCfg Controlled IRQs on STi based platforms.

config TANGO_IRQ
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config TB10X_IRQC
	bool
	select IRQ_DOMAIN
	select GENERIC_IRQ_CHIP

config TS4800_IRQ
	tristate "TS-4800 IRQ controller"
	select IRQ_DOMAIN
	depends on HAS_IOMEM
	depends on SOC_IMX51 || COMPILE_TEST
	help
	  Support for the TS-4800 FPGA IRQ controller

config VERSATILE_FPGA_IRQ
	bool
	select IRQ_DOMAIN

config VERSATILE_FPGA_IRQ_NR
       int
       default 4
       depends on VERSATILE_FPGA_IRQ

config XTENSA_MX
	bool
	select IRQ_DOMAIN

config IRQ_CROSSBAR
	bool
	help
	  Support for a CROSSBAR ip that precedes the main interrupt controller.
	  The primary irqchip invokes the crossbar's callback which inturn allocates
	  a free irq and configures the IP. Thus the peripheral interrupts are
	  routed to one of the free irqchip interrupt lines.

config KEYSTONE_IRQ
	tristate "Keystone 2 IRQ controller IP"
	depends on ARCH_KEYSTONE
	help
		Support for Texas Instruments Keystone 2 IRQ controller IP which
		is part of the Keystone 2 IPC mechanism

config MIPS_GIC
	bool
	select GENERIC_IRQ_IPI
	select IRQ_DOMAIN_HIERARCHY
	select MIPS_CM

config INGENIC_IRQ
	bool
	depends on MACH_INGENIC
	default y

config RENESAS_H8300H_INTC
        bool
	select IRQ_DOMAIN

config RENESAS_H8S_INTC
        bool
	select IRQ_DOMAIN

config IMX_GPCV2
	bool
	select IRQ_DOMAIN
	help
	  Enables the wakeup IRQs for IMX platforms with GPCv2 block

config IRQ_MXS
	def_bool y if MACH_ASM9260 || ARCH_MXS
	select IRQ_DOMAIN
	select STMP_DEVICE

config MVEBU_ODMI
	bool
	select GENERIC_MSI_IRQ_DOMAIN

config LS_SCFG_MSI
	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
	depends on PCI && PCI_MSI
	select PCI_MSI_IRQ_DOMAIN

config PARTITION_PERCPU
	bool

config EZNPS_GIC
	bool "NPS400 Global Interrupt Manager (GIM)"
	depends on ARC || (COMPILE_TEST && !64BIT)
	select IRQ_DOMAIN
	help
	  Support the EZchip NPS400 global interrupt controller
Commit	Line	Data
f6e916b8 TP	1	config IRQCHIP
	2	def_bool y
	3	depends on OF_IRQ
	4
81243e44 RH	5	config ARM_GIC
	6	bool
	7	select IRQ_DOMAIN
9a1091ef	8	select IRQ_DOMAIN_HIERARCHY
81243e44 RH	9	select MULTI_IRQ_HANDLER
81243e44 RH	10
a27d21e0 LW	11	config ARM_GIC_MAX_NR
	12	int
	13	default 2 if ARCH_REALVIEW
	14	default 1
	15
853a33ce SS	16	config ARM_GIC_V2M
	17	bool
	18	depends on ARM_GIC
	19	depends on PCI && PCI_MSI
	20	select PCI_MSI_IRQ_DOMAIN
	21
81243e44 RH	22	config GIC_NON_BANKED
	23	bool
	24
021f6537 MZ	25	config ARM_GIC_V3
	26	bool
	27	select IRQ_DOMAIN
	28	select MULTI_IRQ_HANDLER
443acc4f	29	select IRQ_DOMAIN_HIERARCHY
e3825ba1	30	select PARTITION_PERCPU
021f6537	31
19812729 MZ	32	config ARM_GIC_V3_ITS
	33	bool
	34	select PCI_MSI_IRQ_DOMAIN
021f6537	35
292ec080 UKK	36	config ARM_NVIC
	37	bool
	38	select IRQ_DOMAIN
2d9f59f7	39	select IRQ_DOMAIN_HIERARCHY
292ec080 UKK	40	select GENERIC_IRQ_CHIP
292ec080 UKK	41
44430ec0 RH	42	config ARM_VIC
	43	bool
	44	select IRQ_DOMAIN
	45	select MULTI_IRQ_HANDLER
	46
	47	config ARM_VIC_NR
	48	int
	49	default 4 if ARCH_S5PV210
44430ec0 RH	50	default 2
	51	depends on ARM_VIC
	52	help
	53	The maximum number of VICs available in the system, for
	54	power management.
	55
fed6d336 TP	56	config ARMADA_370_XP_IRQ
fed6d336 TP	57	bool
fed6d336	58	select GENERIC_IRQ_CHIP
fcc392d5	59	select PCI_MSI_IRQ_DOMAIN if PCI_MSI
fed6d336	60
e6b78f2c AT	61	config ALPINE_MSI
	62	bool
	63	depends on PCI && PCI_MSI
	64	select GENERIC_IRQ_CHIP
	65	select PCI_MSI_IRQ_DOMAIN
	66
b1479ebb BB	67	config ATMEL_AIC_IRQ
	68	bool
	69	select GENERIC_IRQ_CHIP
	70	select IRQ_DOMAIN
	71	select MULTI_IRQ_HANDLER
	72	select SPARSE_IRQ
	73
	74	config ATMEL_AIC5_IRQ
	75	bool
	76	select GENERIC_IRQ_CHIP
	77	select IRQ_DOMAIN
	78	select MULTI_IRQ_HANDLER
	79	select SPARSE_IRQ
	80
0509cfde RB	81	config I8259
	82	bool
	83	select IRQ_DOMAIN
	84
c7c42ec2 SA	85	config BCM6345_L1_IRQ
	86	bool
	87	select GENERIC_IRQ_CHIP
	88	select IRQ_DOMAIN
	89
5f7f0317 KC	90	config BCM7038_L1_IRQ
	91	bool
	92	select GENERIC_IRQ_CHIP
	93	select IRQ_DOMAIN
	94
a4fcbb86 KC	95	config BCM7120_L2_IRQ
	96	bool
	97	select GENERIC_IRQ_CHIP
	98	select IRQ_DOMAIN
	99
7f646e92 FF	100	config BRCMSTB_L2_IRQ
7f646e92 FF	101	bool
7f646e92 FF	102	select GENERIC_IRQ_CHIP
	103	select IRQ_DOMAIN
	104
350d71b9 SH	105	config DW_APB_ICTL
350d71b9 SH	106	bool
e1588490	107	select GENERIC_IRQ_CHIP
350d71b9 SH	108	select IRQ_DOMAIN
350d71b9 SH	109
9a7c4abd M	110	config HISILICON_IRQ_MBIGEN
	111	bool
	112	select ARM_GIC_V3
	113	select ARM_GIC_V3_ITS
	114	select GENERIC_MSI_IRQ_DOMAIN
	115
b6ef9161 JH	116	config IMGPDC_IRQ
	117	bool
	118	select GENERIC_IRQ_CHIP
	119	select IRQ_DOMAIN
	120
67e38cf2 RB	121	config IRQ_MIPS_CPU
	122	bool
	123	select GENERIC_IRQ_CHIP
	124	select IRQ_DOMAIN
	125
afc98d90 AS	126	config CLPS711X_IRQCHIP
	127	bool
	128	depends on ARCH_CLPS711X
	129	select IRQ_DOMAIN
	130	select MULTI_IRQ_HANDLER
	131	select SPARSE_IRQ
	132	default y
	133
4db8e6d2 SK	134	config OR1K_PIC
	135	bool
	136	select IRQ_DOMAIN
	137
8598066c FB	138	config OMAP_IRQCHIP
	139	bool
	140	select GENERIC_IRQ_CHIP
	141	select IRQ_DOMAIN
	142
9dbd90f1 SH	143	config ORION_IRQCHIP
	144	bool
	145	select IRQ_DOMAIN
	146	select MULTI_IRQ_HANDLER
	147
aaa8666a CB	148	config PIC32_EVIC
	149	bool
	150	select GENERIC_IRQ_CHIP
	151	select IRQ_DOMAIN
	152
44358048 MD	153	config RENESAS_INTC_IRQPIN
	154	bool
	155	select IRQ_DOMAIN
	156
fbc83b7f MD	157	config RENESAS_IRQC
fbc83b7f MD	158	bool
99c221df	159	select GENERIC_IRQ_CHIP
fbc83b7f MD	160	select IRQ_DOMAIN
fbc83b7f MD	161
07088484 LJ	162	config ST_IRQCHIP
	163	bool
	164	select REGMAP
	165	select MFD_SYSCON
	166	help
	167	Enables SysCfg Controlled IRQs on STi based platforms.
	168
4bba6689 MR	169	config TANGO_IRQ
	170	bool
	171	select IRQ_DOMAIN
	172	select GENERIC_IRQ_CHIP
	173
b06eb017 CR	174	config TB10X_IRQC
	175	bool
	176	select IRQ_DOMAIN
	177	select GENERIC_IRQ_CHIP
	178
d01f8633 DR	179	config TS4800_IRQ
	180	tristate "TS-4800 IRQ controller"
	181	select IRQ_DOMAIN
0df337cf	182	depends on HAS_IOMEM
d2b383dc	183	depends on SOC_IMX51 \|\| COMPILE_TEST
d01f8633 DR	184	help
	185	Support for the TS-4800 FPGA IRQ controller
	186
2389d501 LW	187	config VERSATILE_FPGA_IRQ
	188	bool
	189	select IRQ_DOMAIN
	190
	191	config VERSATILE_FPGA_IRQ_NR
	192	int
	193	default 4
	194	depends on VERSATILE_FPGA_IRQ
26a8e96a MF	195
	196	config XTENSA_MX
	197	bool
	198	select IRQ_DOMAIN
96ca848e S	199
	200	config IRQ_CROSSBAR
	201	bool
	202	help
f54619f2	203	Support for a CROSSBAR ip that precedes the main interrupt controller.
96ca848e S	204	The primary irqchip invokes the crossbar's callback which inturn allocates
	205	a free irq and configures the IP. Thus the peripheral interrupts are
	206	routed to one of the free irqchip interrupt lines.
89323f8c GS	207
	208	config KEYSTONE_IRQ
	209	tristate "Keystone 2 IRQ controller IP"
	210	depends on ARCH_KEYSTONE
	211	help
	212	Support for Texas Instruments Keystone 2 IRQ controller IP which
	213	is part of the Keystone 2 IPC mechanism
8a19b8f1 AB	214
	215	config MIPS_GIC
	216	bool
bb11cff3	217	select GENERIC_IRQ_IPI
2af70a96	218	select IRQ_DOMAIN_HIERARCHY
8a19b8f1	219	select MIPS_CM
8a764482	220
44e08e70 PB	221	config INGENIC_IRQ
	222	bool
	223	depends on MACH_INGENIC
	224	default y
78c10e55	225
8a764482 YS	226	config RENESAS_H8300H_INTC
	227	bool
	228	select IRQ_DOMAIN
	229
	230	config RENESAS_H8S_INTC
	231	bool
78c10e55	232	select IRQ_DOMAIN
e324c4dc SW	233
	234	config IMX_GPCV2
	235	bool
	236	select IRQ_DOMAIN
	237	help
	238	Enables the wakeup IRQs for IMX platforms with GPCv2 block
7e4ac676 OR	239
	240	config IRQ_MXS
	241	def_bool y if MACH_ASM9260 \|\| ARCH_MXS
	242	select IRQ_DOMAIN
	243	select STMP_DEVICE
c27f29bb TP	244
	245	config MVEBU_ODMI
	246	bool
	247	select GENERIC_MSI_IRQ_DOMAIN
9e2c986c	248
b8f3ebe6 ML	249	config LS_SCFG_MSI
	250	def_bool y if SOC_LS1021A \|\| ARCH_LAYERSCAPE
	251	depends on PCI && PCI_MSI
	252	select PCI_MSI_IRQ_DOMAIN
	253
9e2c986c MZ	254	config PARTITION_PERCPU
9e2c986c MZ	255	bool
0efacbba	256
44df427c NC	257	config EZNPS_GIC
44df427c NC	258	bool "NPS400 Global Interrupt Manager (GIM)"
ffd565e3	259	depends on ARC \|\| (COMPILE_TEST && !64BIT)
44df427c NC	260	select IRQ_DOMAIN
	261	help
	262	Support the EZchip NPS400 global interrupt controller