Commit | Line | Data |
---|---|---|
f6e916b8 TP |
1 | obj-$(CONFIG_IRQCHIP) += irqchip.o |
2 | ||
df1590d9 | 3 | obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o |
1a15aaa9 | 4 | obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o |
a900e5d9 | 5 | obj-$(CONFIG_ARCH_EXYNOS) += exynos-combiner.o |
8e4bebe0 | 6 | obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o |
c052d13c | 7 | obj-$(CONFIG_ARCH_MMP) += irq-mmp.o |
9339d432 | 8 | obj-$(CONFIG_ARCH_MVEBU) += irq-armada-370-xp.o |
7e4ac676 | 9 | obj-$(CONFIG_IRQ_MXS) += irq-mxs.o |
de3ce080 | 10 | obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o |
8a407835 | 11 | obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o |
350d71b9 | 12 | obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o |
5698c50d JH |
13 | obj-$(CONFIG_METAG) += irq-metag-ext.o |
14 | obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o | |
4de563ae | 15 | obj-$(CONFIG_ARCH_MOXART) += irq-moxart.o |
afc98d90 | 16 | obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o |
4db8e6d2 | 17 | obj-$(CONFIG_OR1K_PIC) += irq-or1k-pic.o |
9dbd90f1 | 18 | obj-$(CONFIG_ORION_IRQCHIP) += irq-orion.o |
8598066c | 19 | obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o |
d7fbc6ca | 20 | obj-$(CONFIG_ARCH_SUNXI) += irq-sun4i.o |
6058bb36 | 21 | obj-$(CONFIG_ARCH_SUNXI) += irq-sunxi-nmi.o |
df1590d9 | 22 | obj-$(CONFIG_ARCH_SPEAR3XX) += spear-shirq.o |
d51d0af4 | 23 | obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o |
8673c1d7 | 24 | obj-$(CONFIG_REALVIEW_DT) += irq-gic-realview.o |
853a33ce | 25 | obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o |
021f6537 | 26 | obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o |
1e6db000 | 27 | obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-pci-msi.o irq-gic-v3-its-platform-msi.o |
717c3dbc | 28 | obj-$(CONFIG_HISILICON_IRQ_MBIGEN) += irq-mbigen.o |
292ec080 | 29 | obj-$(CONFIG_ARM_NVIC) += irq-nvic.o |
44430ec0 | 30 | obj-$(CONFIG_ARM_VIC) += irq-vic.o |
b1479ebb BB |
31 | obj-$(CONFIG_ATMEL_AIC_IRQ) += irq-atmel-aic-common.o irq-atmel-aic.o |
32 | obj-$(CONFIG_ATMEL_AIC5_IRQ) += irq-atmel-aic-common.o irq-atmel-aic5.o | |
0509cfde | 33 | obj-$(CONFIG_I8259) += irq-i8259.o |
b6ef9161 | 34 | obj-$(CONFIG_IMGPDC_IRQ) += irq-imgpdc.o |
67e38cf2 | 35 | obj-$(CONFIG_IRQ_MIPS_CPU) += irq-mips-cpu.o |
60dbd768 | 36 | obj-$(CONFIG_SIRF_IRQ) += irq-sirfsoc.o |
44358048 | 37 | obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o |
fbc83b7f | 38 | obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o |
81243e44 | 39 | obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o |
397e7b51 | 40 | obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o |
06ff14c0 | 41 | obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o |
07088484 | 42 | obj-$(CONFIG_ST_IRQCHIP) += irq-st.o |
b06eb017 | 43 | obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o |
d01f8633 | 44 | obj-$(CONFIG_TS4800_IRQ) += irq-ts4800.o |
cbd1de2e | 45 | obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o |
26a8e96a | 46 | obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o |
96ca848e | 47 | obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o |
0494e11a | 48 | obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o |
5f7f0317 | 49 | obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o |
a4fcbb86 KC |
50 | obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o |
51 | obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o | |
89323f8c | 52 | obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o |
8a19b8f1 | 53 | obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o |
5fe3bba3 | 54 | obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o |
8041dfbd | 55 | obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o |
8a764482 YS |
56 | obj-$(CONFIG_RENESAS_H8300H_INTC) += irq-renesas-h8300h.o |
57 | obj-$(CONFIG_RENESAS_H8S_INTC) += irq-renesas-h8s.o | |
22b67acd | 58 | obj-$(CONFIG_ARCH_SA1100) += irq-sa11x0.o |
44e08e70 | 59 | obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o |
e324c4dc | 60 | obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o |
aaa8666a | 61 | obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o |