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Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[deliverable/linux.git] / drivers / isdn / hisax / hisax.h
CommitLineData
1da177e4
LT		 1/* $Id: hisax.h,v 2.64.2.4 2004/02/11 13:21:33 keil Exp $
2 *
3 * Basic declarations, defines and prototypes
4 *
5 * This software may be used and distributed according to the terms
6 * of the GNU General Public License, incorporated herein by reference.
7 *
8 */
1da177e4
LT		 9#include <linux/errno.h>
10#include <linux/fs.h>
11#include <linux/major.h>
1da177e4
LT		 12#include <asm/io.h>
13#include <linux/delay.h>
14#include <linux/kernel.h>
15#include <linux/signal.h>
16#include <linux/slab.h>
17#include <linux/mm.h>
18#include <linux/mman.h>
19#include <linux/ioport.h>
20#include <linux/timer.h>
21#include <linux/wait.h>
22#include <linux/isdnif.h>
23#include <linux/tty.h>
24#include <linux/serial_reg.h>
25#include <linux/netdevice.h>
26
27#define ERROR_STATISTIC
28
29#define REQUEST 0
30#define CONFIRM 1
31#define INDICATION 2
32#define RESPONSE 3
33
34#define HW_ENABLE 0x0000
35#define HW_RESET 0x0004
36#define HW_POWERUP 0x0008
37#define HW_ACTIVATE 0x0010
38#define HW_DEACTIVATE 0x0018
39
40#define HW_INFO1 0x0010
41#define HW_INFO2 0x0020
42#define HW_INFO3 0x0030
43#define HW_INFO4 0x0040
44#define HW_INFO4_P8 0x0040
45#define HW_INFO4_P10 0x0048
46#define HW_RSYNC 0x0060
47#define HW_TESTLOOP 0x0070
48#define CARD_RESET 0x00F0
49#define CARD_INIT 0x00F2
50#define CARD_RELEASE 0x00F3
51#define CARD_TEST 0x00F4
52#define CARD_AUX_IND 0x00F5
53
54#define PH_ACTIVATE 0x0100
55#define PH_DEACTIVATE 0x0110
56#define PH_DATA 0x0120
57#define PH_PULL 0x0130
58#define PH_TESTLOOP 0x0140
59#define PH_PAUSE 0x0150
60#define MPH_ACTIVATE 0x0180
61#define MPH_DEACTIVATE 0x0190
62#define MPH_INFORMATION 0x01A0
63
64#define DL_ESTABLISH 0x0200
65#define DL_RELEASE 0x0210
66#define DL_DATA 0x0220
67#define DL_FLUSH 0x0224
68#define DL_UNIT_DATA 0x0230
69
70#define MDL_BC_RELEASE 0x0278 // Formula-n enter:now
71#define MDL_BC_ASSIGN 0x027C // Formula-n enter:now
72#define MDL_ASSIGN 0x0280
73#define MDL_REMOVE 0x0284
74#define MDL_ERROR 0x0288
75#define MDL_INFO_SETUP 0x02E0
76#define MDL_INFO_CONN 0x02E4
77#define MDL_INFO_REL 0x02E8
78
79#define CC_SETUP 0x0300
80#define CC_RESUME 0x0304
81#define CC_MORE_INFO 0x0310
82#define CC_IGNORE 0x0320
83#define CC_REJECT 0x0324
84#define CC_SETUP_COMPL 0x0330
85#define CC_PROCEEDING 0x0340
86#define CC_ALERTING 0x0344
87#define CC_PROGRESS 0x0348
88#define CC_CONNECT 0x0350
89#define CC_CHARGE 0x0354
90#define CC_NOTIFY 0x0358
91#define CC_DISCONNECT 0x0360
92#define CC_RELEASE 0x0368
93#define CC_SUSPEND 0x0370
94#define CC_PROCEED_SEND 0x0374
95#define CC_REDIR 0x0378
96#define CC_T302 0x0382
97#define CC_T303 0x0383
98#define CC_T304 0x0384
99#define CC_T305 0x0385
100#define CC_T308_1 0x0388
101#define CC_T308_2 0x038A
102#define CC_T309 0x0309
103#define CC_T310 0x0390
104#define CC_T313 0x0393
105#define CC_T318 0x0398
106#define CC_T319 0x0399
107#define CC_TSPID 0x03A0
108#define CC_NOSETUP_RSP 0x03E0
109#define CC_SETUP_ERR 0x03E1
110#define CC_SUSPEND_ERR 0x03E2
111#define CC_RESUME_ERR 0x03E3
112#define CC_CONNECT_ERR 0x03E4
113#define CC_RELEASE_ERR 0x03E5
114#define CC_RESTART 0x03F4
115#define CC_TDSS1_IO 0x13F4 /* DSS1 IO user timer */
116#define CC_TNI1_IO 0x13F5 /* NI1 IO user timer */
117
118/* define maximum number of possible waiting incoming calls */
119#define MAX_WAITING_CALLS 2
120
121
122#ifdef __KERNEL__
123
124/* include l3dss1 & ni1 specific process structures, but no other defines */
125#ifdef CONFIG_HISAX_EURO
126 #define l3dss1_process
127 #include "l3dss1.h"
128 #undef l3dss1_process
129#endif /* CONFIG_HISAX_EURO */
130
131#ifdef CONFIG_HISAX_NI1
132 #define l3ni1_process
133 #include "l3ni1.h"
134 #undef l3ni1_process
135#endif /* CONFIG_HISAX_NI1 */
136
137#define MAX_DFRAME_LEN 260
138#define MAX_DFRAME_LEN_L1 300
139#define HSCX_BUFMAX 4096
140#define MAX_DATA_SIZE (HSCX_BUFMAX - 4)
141#define MAX_DATA_MEM (HSCX_BUFMAX + 64)
142#define RAW_BUFMAX (((HSCX_BUFMAX*6)/5) + 5)
143#define MAX_HEADER_LEN 4
144#define MAX_WINDOW 8
145#define MAX_MON_FRAME 32
146#define MAX_DLOG_SPACE 2048
147#define MAX_BLOG_SPACE 256
148
149/* #define I4L_IRQ_FLAG SA_INTERRUPT */
150#define I4L_IRQ_FLAG 0
151
152/*
153 * Statemachine
154 */
155
156struct FsmInst;
157
158typedef void (* FSMFNPTR)(struct FsmInst *, int, void *);
159
160struct Fsm {
161 FSMFNPTR *jumpmatrix;
162 int state_count, event_count;
163 char **strEvent, **strState;
164};
165
166struct FsmInst {
167 struct Fsm *fsm;
168 int state;
169 int debug;
170 void *userdata;
171 int userint;
172 void (*printdebug) (struct FsmInst *, char *, ...);
173};
174
175struct FsmNode {
176 int state, event;
177 void (*routine) (struct FsmInst *, int, void *);
178};
179
180struct FsmTimer {
181 struct FsmInst *fi;
182 struct timer_list tl;
183 int event;
184 void *arg;
185};
186
187struct L3Timer {
188 struct l3_process *pc;
189 struct timer_list tl;
190 int event;
191};
192
193#define FLG_L1_ACTIVATING 1
194#define FLG_L1_ACTIVATED 2
195#define FLG_L1_DEACTTIMER 3
196#define FLG_L1_ACTTIMER 4
197#define FLG_L1_T3RUN 5
198#define FLG_L1_PULL_REQ 6
199#define FLG_L1_UINT 7
200
201struct Layer1 {
202 void *hardware;
203 struct BCState *bcs;
204 struct PStack **stlistp;
64b33619 205 unsigned long Flags;
1da177e4
LT		 206 struct FsmInst l1m;
207 struct FsmTimer timer;
208 void (*l1l2) (struct PStack *, int, void *);
209 void (*l1hw) (struct PStack *, int, void *);
210 void (*l1tei) (struct PStack *, int, void *);
211 int mode, bc;
212 int delay;
213};
214
215#define GROUP_TEI 127
216#define TEI_SAPI 63
217#define CTRL_SAPI 0
ddca2488 218#define PACKET_NOACK 7
1da177e4
LT		 219
220/* Layer2 Flags */
221
222#define FLG_LAPB 0
223#define FLG_LAPD 1
224#define FLG_ORIG 2
225#define FLG_MOD128 3
226#define FLG_PEND_REL 4
227#define FLG_L3_INIT 5
228#define FLG_T200_RUN 6
229#define FLG_ACK_PEND 7
230#define FLG_REJEXC 8
231#define FLG_OWN_BUSY 9
232#define FLG_PEER_BUSY 10
233#define FLG_DCHAN_BUSY 11
234#define FLG_L1_ACTIV 12
235#define FLG_ESTAB_PEND 13
236#define FLG_PTP 14
237#define FLG_FIXED_TEI 15
238#define FLG_L2BLOCK 16
239
240struct Layer2 {
241 int tei;
242 int sap;
243 int maxlen;
244 u_long flag;
245 spinlock_t lock;
246 u_int vs, va, vr;
247 int rc;
248 unsigned int window;
249 unsigned int sow;
250 struct sk_buff *windowar[MAX_WINDOW];
251 struct sk_buff_head i_queue;
252 struct sk_buff_head ui_queue;
253 void (*l2l1) (struct PStack *, int, void *);
254 void (*l2l3) (struct PStack *, int, void *);
255 void (*l2tei) (struct PStack *, int, void *);
256 struct FsmInst l2m;
257 struct FsmTimer t200, t203;
258 int T200, N200, T203;
259 int debug;
260 char debug_id[16];
261};
262
263struct Layer3 {
264 void (*l3l4) (struct PStack *, int, void *);
265 void (*l3ml3) (struct PStack *, int, void *);
266 void (*l3l2) (struct PStack *, int, void *);
267 struct FsmInst l3m;
268 struct FsmTimer l3m_timer;
269 struct sk_buff_head squeue;
270 struct l3_process *proc;
271 struct l3_process *global;
272 int N303;
273 int debug;
274 char debug_id[8];
275};
276
277struct LLInterface {
278 void (*l4l3) (struct PStack *, int, void *);
279 int (*l4l3_proto) (struct PStack *, isdn_ctrl *);
280 void *userdata;
281 u_long flag;
282};
283
284#define FLG_LLI_L1WAKEUP 1
285#define FLG_LLI_L2WAKEUP 2
286
287struct Management {
288 int ri;
289 struct FsmInst tei_m;
290 struct FsmTimer t202;
291 int T202, N202, debug;
292 void (*layer) (struct PStack *, int, void *);
293};
294
295#define NO_CAUSE 254
296
297struct Param {
298 u_char cause;
299 u_char loc;
300 u_char diag[6];
301 int bchannel;
302 int chargeinfo;
303 int spv; /* SPV Flag */
304 setup_parm setup; /* from isdnif.h numbers and Serviceindicator */
305 u_char moderate; /* transfer mode and rate (bearer octet 4) */
306};
307
308
309struct PStack {
310 struct PStack *next;
311 struct Layer1 l1;
312 struct Layer2 l2;
313 struct Layer3 l3;
314 struct LLInterface lli;
315 struct Management ma;
316 int protocol; /* EDSS1, 1TR6 or NI1 */
317
318 /* protocol specific data fields */
319 union
320 { u_char uuuu; /* only as dummy */
321#ifdef CONFIG_HISAX_EURO
322 dss1_stk_priv dss1; /* private dss1 data */
323#endif /* CONFIG_HISAX_EURO */
324#ifdef CONFIG_HISAX_NI1
325 ni1_stk_priv ni1; /* private ni1 data */
326#endif /* CONFIG_HISAX_NI1 */
327 } prot;
328};
329
330struct l3_process {
331 int callref;
332 int state;
333 struct L3Timer timer;
334 int N303;
335 int debug;
336 struct Param para;
337 struct Channel *chan;
338 struct PStack *st;
339 struct l3_process *next;
340 ulong redir_result;
341
342 /* protocol specific data fields */
343 union
344 { u_char uuuu; /* only when euro not defined, avoiding empty union */
345#ifdef CONFIG_HISAX_EURO
346 dss1_proc_priv dss1; /* private dss1 data */
347#endif /* CONFIG_HISAX_EURO */
348#ifdef CONFIG_HISAX_NI1
349 ni1_proc_priv ni1; /* private ni1 data */
350#endif /* CONFIG_HISAX_NI1 */
351 } prot;
352};
353
354struct hscx_hw {
355 int hscx;
356 int rcvidx;
357 int count; /* Current skb sent count */
358 u_char *rcvbuf; /* B-Channel receive Buffer */
359 u_char tsaxr0;
360 u_char tsaxr1;
361};
362
363struct w6692B_hw {
364 int bchan;
365 int rcvidx;
366 int count; /* Current skb sent count */
367 u_char *rcvbuf; /* B-Channel receive Buffer */
368};
369
370struct isar_reg {
371 unsigned long Flags;
372 volatile u_char bstat;
373 volatile u_char iis;
374 volatile u_char cmsb;
375 volatile u_char clsb;
376 volatile u_char par[8];
377};
378
379struct isar_hw {
380 int dpath;
381 int rcvidx;
382 int txcnt;
383 int mml;
384 u_char state;
385 u_char cmd;
386 u_char mod;
387 u_char newcmd;
388 u_char newmod;
389 char try_mod;
390 struct timer_list ftimer;
391 u_char *rcvbuf; /* B-Channel receive Buffer */
392 u_char conmsg[16];
393 struct isar_reg *reg;
394};
395
396struct hdlc_stat_reg {
397#ifdef __BIG_ENDIAN
6a878184
JB		 398 u_char fill;
399 u_char mode;
400 u_char xml;
401 u_char cmd;
1da177e4 402#else
6a878184
JB		 403 u_char cmd;
404 u_char xml;
405 u_char mode;
406 u_char fill;
1da177e4 407#endif
6a878184 408} __attribute__((packed));
1da177e4
LT		 409
410struct hdlc_hw {
411 union {
412 u_int ctrl;
413 struct hdlc_stat_reg sr;
414 } ctrl;
415 u_int stat;
416 int rcvidx;
417 int count; /* Current skb sent count */
418 u_char *rcvbuf; /* B-Channel receive Buffer */
419};
420
421struct hfcB_hw {
422 unsigned int *send;
423 int f1;
424 int f2;
425};
426
427struct tiger_hw {
428 u_int *send;
429 u_int *s_irq;
430 u_int *s_end;
431 u_int *sendp;
432 u_int *rec;
433 int free;
434 u_char *rcvbuf;
435 u_char *sendbuf;
436 u_char *sp;
437 int sendcnt;
438 u_int s_tot;
439 u_int r_bitcnt;
440 u_int r_tot;
441 u_int r_err;
442 u_int r_fcs;
443 u_char r_state;
444 u_char r_one;
445 u_char r_val;
446 u_char s_state;
447};
448
449struct amd7930_hw {
450 u_char *tx_buff;
451 u_char *rv_buff;
452 int rv_buff_in;
453 int rv_buff_out;
454 struct sk_buff *rv_skb;
455 struct hdlc_state *hdlc_state;
456 struct work_struct tq_rcv;
457 struct work_struct tq_xmt;
458};
459
460#define BC_FLG_INIT 1
461#define BC_FLG_ACTIV 2
462#define BC_FLG_BUSY 3
463#define BC_FLG_NOFRAME 4
464#define BC_FLG_HALF 5
465#define BC_FLG_EMPTY 6
466#define BC_FLG_ORIG 7
467#define BC_FLG_DLEETX 8
468#define BC_FLG_LASTDLE 9
469#define BC_FLG_FIRST 10
470#define BC_FLG_LASTDATA 11
471#define BC_FLG_NMD_DATA 12
472#define BC_FLG_FTI_RUN 13
473#define BC_FLG_LL_OK 14
474#define BC_FLG_LL_CONN 15
475#define BC_FLG_FTI_FTS 16
476#define BC_FLG_FRH_WAIT 17
477
478#define L1_MODE_NULL 0
479#define L1_MODE_TRANS 1
480#define L1_MODE_HDLC 2
481#define L1_MODE_EXTRN 3
482#define L1_MODE_HDLC_56K 4
483#define L1_MODE_MODEM 7
484#define L1_MODE_V32 8
485#define L1_MODE_FAX 9
486
487struct BCState {
488 int channel;
489 int mode;
490 u_long Flag;
491 struct IsdnCardState *cs;
492 int tx_cnt; /* B-Channel transmit counter */
493 struct sk_buff *tx_skb; /* B-Channel transmit Buffer */
494 struct sk_buff_head rqueue; /* B-Channel receive Queue */
495 struct sk_buff_head squeue; /* B-Channel send Queue */
496 int ackcnt;
497 spinlock_t aclock;
498 struct PStack *st;
499 u_char *blog;
500 u_char *conmsg;
501 struct timer_list transbusy;
502 struct work_struct tqueue;
503 u_long event;
504 int (*BC_SetStack) (struct PStack *, struct BCState *);
505 void (*BC_Close) (struct BCState *);
506#ifdef ERROR_STATISTIC
507 int err_crc;
508 int err_tx;
509 int err_rdo;
510 int err_inv;
511#endif
512 union {
513 struct hscx_hw hscx;
514 struct hdlc_hw hdlc;
515 struct isar_hw isar;
516 struct hfcB_hw hfc;
517 struct tiger_hw tiger;
518 struct amd7930_hw amd7930;
519 struct w6692B_hw w6692;
520 struct hisax_b_if *b_if;
521 } hw;
522};
523
524struct Channel {
525 struct PStack *b_st, *d_st;
526 struct IsdnCardState *cs;
527 struct BCState *bcs;
528 int chan;
529 int incoming;
530 struct FsmInst fi;
531 struct FsmTimer drel_timer, dial_timer;
532 int debug;
533 int l2_protocol, l2_active_protocol;
534 int l3_protocol;
535 int data_open;
536 struct l3_process *proc;
537 setup_parm setup; /* from isdnif.h numbers and Serviceindicator */
538 u_long Flags; /* for remembering action done in l4 */
539 int leased;
540};
541
542struct elsa_hw {
543 struct pci_dev *dev;
544 unsigned long base;
545 unsigned int cfg;
546 unsigned int ctrl;
547 unsigned int ale;
548 unsigned int isac;
549 unsigned int itac;
550 unsigned int hscx;
551 unsigned int trig;
552 unsigned int timer;
553 unsigned int counter;
554 unsigned int status;
555 struct timer_list tl;
556 unsigned int MFlag;
557 struct BCState *bcs;
558 u_char *transbuf;
559 u_char *rcvbuf;
560 unsigned int transp;
561 unsigned int rcvp;
562 unsigned int transcnt;
563 unsigned int rcvcnt;
564 u_char IER;
565 u_char FCR;
566 u_char LCR;
567 u_char MCR;
568 u_char ctrl_reg;
569};
570
571struct teles3_hw {
572 unsigned int cfg_reg;
573 signed int isac;
574 signed int hscx[2];
575 signed int isacfifo;
576 signed int hscxfifo[2];
577};
578
579struct teles0_hw {
580 unsigned int cfg_reg;
581 void __iomem *membase;
582 unsigned long phymem;
583};
584
585struct avm_hw {
586 unsigned int cfg_reg;
587 unsigned int isac;
588 unsigned int hscx[2];
589 unsigned int isacfifo;
590 unsigned int hscxfifo[2];
591 unsigned int counter;
592 struct pci_dev *dev;
593};
594
595struct ix1_hw {
596 unsigned int cfg_reg;
597 unsigned int isac_ale;
598 unsigned int isac;
599 unsigned int hscx_ale;
600 unsigned int hscx;
601};
602
603struct diva_hw {
604 unsigned long cfg_reg;
605 unsigned long pci_cfg;
606 unsigned int ctrl;
607 unsigned long isac_adr;
608 unsigned int isac;
609 unsigned long hscx_adr;
610 unsigned int hscx;
611 unsigned int status;
612 struct timer_list tl;
613 u_char ctrl_reg;
614 struct pci_dev *dev;
615};
616
617struct asus_hw {
618 unsigned int cfg_reg;
619 unsigned int adr;
620 unsigned int isac;
621 unsigned int hscx;
622 unsigned int u7;
623 unsigned int pots;
624};
625
626
627struct hfc_hw {
628 unsigned int addr;
629 unsigned int fifosize;
630 unsigned char cirm;
631 unsigned char ctmt;
632 unsigned char cip;
633 u_char isac_spcr;
634 struct timer_list timer;
635};
636
637struct sedl_hw {
638 unsigned int cfg_reg;
639 unsigned int adr;
640 unsigned int isac;
641 unsigned int hscx;
642 unsigned int reset_on;
643 unsigned int reset_off;
644 struct isar_reg isar;
645 unsigned int chip;
646 unsigned int bus;
647 struct pci_dev *dev;
648};
649
650struct spt_hw {
651 unsigned int cfg_reg;
652 unsigned int isac;
653 unsigned int hscx[2];
654 unsigned char res_irq;
655};
656
657struct mic_hw {
658 unsigned int cfg_reg;
659 unsigned int adr;
660 unsigned int isac;
661 unsigned int hscx;
662};
663
664struct njet_hw {
665 unsigned long base;
666 unsigned int isac;
667 unsigned int auxa;
668 unsigned char auxd;
669 unsigned char dmactrl;
670 unsigned char ctrl_reg;
671 unsigned char irqmask0;
672 unsigned char irqstat0;
673 unsigned char last_is0;
674 struct pci_dev *dev;
675};
676
677struct hfcPCI_hw {
678 unsigned char cirm;
679 unsigned char ctmt;
680 unsigned char conn;
681 unsigned char mst_m;
682 unsigned char int_m1;
683 unsigned char int_m2;
684 unsigned char int_s1;
685 unsigned char sctrl;
686 unsigned char sctrl_r;
687 unsigned char sctrl_e;
688 unsigned char trm;
689 unsigned char stat;
690 unsigned char fifo;
691 unsigned char fifo_en;
692 unsigned char bswapped;
693 unsigned char nt_mode;
694 int nt_timer;
695 struct pci_dev *dev;
696 unsigned char *pci_io; /* start of PCI IO memory */
697 void *share_start; /* shared memory for Fifos start */
698 void *fifos; /* FIFO memory */
699 int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */
700 struct timer_list timer;
701};
702
703struct hfcSX_hw {
704 unsigned long base;
705 unsigned char cirm;
706 unsigned char ctmt;
707 unsigned char conn;
708 unsigned char mst_m;
709 unsigned char int_m1;
710 unsigned char int_m2;
711 unsigned char int_s1;
712 unsigned char sctrl;
713 unsigned char sctrl_r;
714 unsigned char sctrl_e;
715 unsigned char trm;
716 unsigned char stat;
717 unsigned char fifo;
718 unsigned char bswapped;
719 unsigned char nt_mode;
720 unsigned char chip;
721 int b_fifo_size;
722 unsigned char last_fifo;
723 void *extra;
724 int nt_timer;
725 struct timer_list timer;
726};
727
728struct hfcD_hw {
729 unsigned int addr;
730 unsigned int bfifosize;
731 unsigned int dfifosize;
732 unsigned char cirm;
733 unsigned char ctmt;
734 unsigned char cip;
735 unsigned char conn;
736 unsigned char mst_m;
737 unsigned char int_m1;
738 unsigned char int_m2;
739 unsigned char int_s1;
740 unsigned char sctrl;
741 unsigned char stat;
742 unsigned char fifo;
743 unsigned char f1;
744 unsigned char f2;
745 unsigned int *send;
746 struct timer_list timer;
747};
748
749struct isurf_hw {
750 unsigned int reset;
751 unsigned long phymem;
752 void __iomem *isac;
753 void __iomem *isar;
754 struct isar_reg isar_r;
755};
756
757struct saphir_hw {
758 struct pci_dev *dev;
759 unsigned int cfg_reg;
760 unsigned int ale;
761 unsigned int isac;
762 unsigned int hscx;
763 struct timer_list timer;
764};
765
766struct bkm_hw {
767 struct pci_dev *dev;
768 unsigned long base;
769 /* A4T stuff */
770 unsigned long isac_adr;
771 unsigned int isac_ale;
772 unsigned long jade_adr;
773 unsigned int jade_ale;
774 /* Scitel Quadro stuff */
775 unsigned long plx_adr;
776 unsigned long data_adr;
777};
778
779struct gazel_hw {
780 struct pci_dev *dev;
781 unsigned int cfg_reg;
782 unsigned int pciaddr[2];
783 signed int ipac;
784 signed int isac;
785 signed int hscx[2];
786 signed int isacfifo;
787 signed int hscxfifo[2];
788 unsigned char timeslot;
789 unsigned char iom2;
790};
791
792struct w6692_hw {
793 struct pci_dev *dev;
794 unsigned int iobase;
795 struct timer_list timer;
796};
797
1da177e4
LT		 798struct arcofi_msg {
799 struct arcofi_msg *next;
800 u_char receive;
801 u_char len;
802 u_char msg[10];
803};
804
805struct isac_chip {
806 int ph_state;
807 u_char *mon_tx;
808 u_char *mon_rx;
809 int mon_txp;
810 int mon_txc;
811 int mon_rxp;
812 struct arcofi_msg *arcofi_list;
813 struct timer_list arcofitimer;
814 wait_queue_head_t arcofi_wait;
815 u_char arcofi_bc;
816 u_char arcofi_state;
817 u_char mocr;
818 u_char adf2;
819};
820
821struct hfcd_chip {
822 int ph_state;
823};
824
825struct hfcpci_chip {
826 int ph_state;
827};
828
829struct hfcsx_chip {
830 int ph_state;
831};
832
833struct w6692_chip {
834 int ph_state;
835};
836
837struct amd7930_chip {
838 u_char lmr1;
839 u_char ph_state;
840 u_char old_state;
841 u_char flg_t3;
842 unsigned int tx_xmtlen;
843 struct timer_list timer3;
844 void (*ph_command) (struct IsdnCardState *, u_char, char *);
845 void (*setIrqMask) (struct IsdnCardState *, u_char);
846};
847
848struct icc_chip {
849 int ph_state;
850 u_char *mon_tx;
851 u_char *mon_rx;
852 int mon_txp;
853 int mon_txc;
854 int mon_rxp;
855 struct arcofi_msg *arcofi_list;
856 struct timer_list arcofitimer;
857 wait_queue_head_t arcofi_wait;
858 u_char arcofi_bc;
859 u_char arcofi_state;
860 u_char mocr;
861 u_char adf2;
862};
863
864#define HW_IOM1 0
865#define HW_IPAC 1
866#define HW_ISAR 2
867#define HW_ARCOFI 3
868#define FLG_TWO_DCHAN 4
869#define FLG_L1_DBUSY 5
870#define FLG_DBUSY_TIMER 6
871#define FLG_LOCK_ATOMIC 7
872#define FLG_ARCOFI_TIMER 8
873#define FLG_ARCOFI_ERROR 9
874#define FLG_HW_L1_UINT 10
875
876struct IsdnCardState {
877 spinlock_t lock;
878 u_char typ;
879 u_char subtyp;
880 int protocol;
881 u_int irq;
882 u_long irq_flags;
883 u_long HW_Flags;
884 int *busy_flag;
885 int chanlimit; /* limited number of B-chans to use */
886 int logecho; /* log echo if supported by card */
887 union {
888 struct elsa_hw elsa;
889 struct teles0_hw teles0;
890 struct teles3_hw teles3;
891 struct avm_hw avm;
892 struct ix1_hw ix1;
893 struct diva_hw diva;
894 struct asus_hw asus;
895 struct hfc_hw hfc;
896 struct sedl_hw sedl;
897 struct spt_hw spt;
898 struct mic_hw mic;
899 struct njet_hw njet;
900 struct hfcD_hw hfcD;
901 struct hfcPCI_hw hfcpci;
902 struct hfcSX_hw hfcsx;
903 struct ix1_hw niccy;
904 struct isurf_hw isurf;
905 struct saphir_hw saphir;
1da177e4
LT		 906 struct bkm_hw ax;
907 struct gazel_hw gazel;
908 struct w6692_hw w6692;
909 struct hisax_d_if *hisax_d_if;
910 } hw;
911 int myid;
912 isdn_if iif;
913 spinlock_t statlock;
914 u_char *status_buf;
915 u_char *status_read;
916 u_char *status_write;
917 u_char *status_end;
918 u_char (*readisac) (struct IsdnCardState *, u_char);
919 void (*writeisac) (struct IsdnCardState *, u_char, u_char);
920 void (*readisacfifo) (struct IsdnCardState *, u_char *, int);
921 void (*writeisacfifo) (struct IsdnCardState *, u_char *, int);
922 u_char (*BC_Read_Reg) (struct IsdnCardState *, int, u_char);
923 void (*BC_Write_Reg) (struct IsdnCardState *, int, u_char, u_char);
924 void (*BC_Send_Data) (struct BCState *);
925 int (*cardmsg) (struct IsdnCardState *, int, void *);
926 void (*setstack_d) (struct PStack *, struct IsdnCardState *);
927 void (*DC_Close) (struct IsdnCardState *);
7d12e780 928 int (*irq_func) (int, void *);
1da177e4
LT		 929 int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
930 struct Channel channel[2+MAX_WAITING_CALLS];
931 struct BCState bcs[2+MAX_WAITING_CALLS];
932 struct PStack *stlist;
933 struct sk_buff_head rq, sq; /* D-channel queues */
934 int cardnr;
935 char *dlog;
936 int debug;
937 union {
938 struct isac_chip isac;
939 struct hfcd_chip hfcd;
940 struct hfcpci_chip hfcpci;
941 struct hfcsx_chip hfcsx;
942 struct w6692_chip w6692;
943 struct amd7930_chip amd7930;
944 struct icc_chip icc;
945 } dc;
946 u_char *rcvbuf;
947 int rcvidx;
948 struct sk_buff *tx_skb;
949 int tx_cnt;
950 u_long event;
951 struct work_struct tqueue;
952 struct timer_list dbusytimer;
953#ifdef ERROR_STATISTIC
954 int err_crc;
955 int err_tx;
956 int err_rx;
957#endif
958};
959
960
961#define schedule_event(s, ev) do {test_and_set_bit(ev, &s->event);schedule_work(&s->tqueue); } while(0)
962
963#define MON0_RX 1
964#define MON1_RX 2
965#define MON0_TX 4
966#define MON1_TX 8
967
968
969#ifdef ISDN_CHIP_ISAC
970#undef ISDN_CHIP_ISAC
971#endif
972
973#ifdef CONFIG_HISAX_16_0
974#define CARD_TELES0 1
975#ifndef ISDN_CHIP_ISAC
976#define ISDN_CHIP_ISAC 1
977#endif
978#else
979#define CARD_TELES0 0
980#endif
981
982#ifdef CONFIG_HISAX_16_3
983#define CARD_TELES3 1
984#ifndef ISDN_CHIP_ISAC
985#define ISDN_CHIP_ISAC 1
986#endif
987#else
988#define CARD_TELES3 0
989#endif
990
991#ifdef CONFIG_HISAX_TELESPCI
992#define CARD_TELESPCI 1
993#ifndef ISDN_CHIP_ISAC
994#define ISDN_CHIP_ISAC 1
995#endif
996#else
997#define CARD_TELESPCI 0
998#endif
999
1000#ifdef CONFIG_HISAX_AVM_A1
1001#define CARD_AVM_A1 1
1002#ifndef ISDN_CHIP_ISAC
1003#define ISDN_CHIP_ISAC 1
1004#endif
1005#else
1006#define CARD_AVM_A1 0
1007#endif
1008
1009#ifdef CONFIG_HISAX_AVM_A1_PCMCIA
1010#define CARD_AVM_A1_PCMCIA 1
1011#ifndef ISDN_CHIP_ISAC
1012#define ISDN_CHIP_ISAC 1
1013#endif
1014#else
1015#define CARD_AVM_A1_PCMCIA 0
1016#endif
1017
1018#ifdef CONFIG_HISAX_FRITZPCI
1019#define CARD_FRITZPCI 1
1020#ifndef ISDN_CHIP_ISAC
1021#define ISDN_CHIP_ISAC 1
1022#endif
1023#else
1024#define CARD_FRITZPCI 0
1025#endif
1026
1027#ifdef CONFIG_HISAX_ELSA
1028#define CARD_ELSA 1
1029#ifndef ISDN_CHIP_ISAC
1030#define ISDN_CHIP_ISAC 1
1031#endif
1032#else
1033#define CARD_ELSA 0
1034#endif
1035
1036#ifdef CONFIG_HISAX_IX1MICROR2
1037#define CARD_IX1MICROR2 1
1038#ifndef ISDN_CHIP_ISAC
1039#define ISDN_CHIP_ISAC 1
1040#endif
1041#else
1042#define CARD_IX1MICROR2 0
1043#endif
1044
1045#ifdef CONFIG_HISAX_DIEHLDIVA
1046#define CARD_DIEHLDIVA 1
1047#ifndef ISDN_CHIP_ISAC
1048#define ISDN_CHIP_ISAC 1
1049#endif
1050#else
1051#define CARD_DIEHLDIVA 0
1052#endif
1053
1054#ifdef CONFIG_HISAX_ASUSCOM
1055#define CARD_ASUSCOM 1
1056#ifndef ISDN_CHIP_ISAC
1057#define ISDN_CHIP_ISAC 1
1058#endif
1059#else
1060#define CARD_ASUSCOM 0
1061#endif
1062
1063#ifdef CONFIG_HISAX_TELEINT
1064#define CARD_TELEINT 1
1065#ifndef ISDN_CHIP_ISAC
1066#define ISDN_CHIP_ISAC 1
1067#endif
1068#else
1069#define CARD_TELEINT 0
1070#endif
1071
1072#ifdef CONFIG_HISAX_SEDLBAUER
1073#define CARD_SEDLBAUER 1
1074#ifndef ISDN_CHIP_ISAC
1075#define ISDN_CHIP_ISAC 1
1076#endif
1077#else
1078#define CARD_SEDLBAUER 0
1079#endif
1080
1081#ifdef CONFIG_HISAX_SPORTSTER
1082#define CARD_SPORTSTER 1
1083#ifndef ISDN_CHIP_ISAC
1084#define ISDN_CHIP_ISAC 1
1085#endif
1086#else
1087#define CARD_SPORTSTER 0
1088#endif
1089
1090#ifdef CONFIG_HISAX_MIC
1091#define CARD_MIC 1
1092#ifndef ISDN_CHIP_ISAC
1093#define ISDN_CHIP_ISAC 1
1094#endif
1095#else
1096#define CARD_MIC 0
1097#endif
1098
1099#ifdef CONFIG_HISAX_NETJET
1100#define CARD_NETJET_S 1
1101#ifndef ISDN_CHIP_ISAC
1102#define ISDN_CHIP_ISAC 1
1103#endif
1104#else
1105#define CARD_NETJET_S 0
1106#endif
1107
1108#ifdef CONFIG_HISAX_HFCS
1109#define CARD_HFCS 1
1110#else
1111#define CARD_HFCS 0
1112#endif
1113
1114#ifdef CONFIG_HISAX_HFC_PCI
1115#define CARD_HFC_PCI 1
1116#else
1117#define CARD_HFC_PCI 0
1118#endif
1119
1120#ifdef CONFIG_HISAX_HFC_SX
1121#define CARD_HFC_SX 1
1122#else
1123#define CARD_HFC_SX 0
1124#endif
1125
1da177e4
LT		 1126#ifdef CONFIG_HISAX_NICCY
1127#define CARD_NICCY 1
1128#ifndef ISDN_CHIP_ISAC
1129#define ISDN_CHIP_ISAC 1
1130#endif
1131#else
1132#define CARD_NICCY 0
1133#endif
1134
1135#ifdef CONFIG_HISAX_ISURF
1136#define CARD_ISURF 1
1137#ifndef ISDN_CHIP_ISAC
1138#define ISDN_CHIP_ISAC 1
1139#endif
1140#else
1141#define CARD_ISURF 0
1142#endif
1143
1144#ifdef CONFIG_HISAX_S0BOX
1145#define CARD_S0BOX 1
1146#ifndef ISDN_CHIP_ISAC
1147#define ISDN_CHIP_ISAC 1
1148#endif
1149#else
1150#define CARD_S0BOX 0
1151#endif
1152
1153#ifdef CONFIG_HISAX_HSTSAPHIR
1154#define CARD_HSTSAPHIR 1
1155#ifndef ISDN_CHIP_ISAC
1156#define ISDN_CHIP_ISAC 1
1157#endif
1158#else
1159#define CARD_HSTSAPHIR 0
1160#endif
1161
1da177e4
LT		 1162#ifdef CONFIG_HISAX_BKM_A4T
1163#define CARD_BKM_A4T 1
1164#ifndef ISDN_CHIP_ISAC
1165#define ISDN_CHIP_ISAC 1
1166#endif
1167#else
1168#define CARD_BKM_A4T 0
1169#endif
1170
1171#ifdef CONFIG_HISAX_SCT_QUADRO
1172#define CARD_SCT_QUADRO 1
1173#ifndef ISDN_CHIP_ISAC
1174#define ISDN_CHIP_ISAC 1
1175#endif
1176#else
1177#define CARD_SCT_QUADRO 0
1178#endif
1179
1180#ifdef CONFIG_HISAX_GAZEL
1181#define CARD_GAZEL 1
1182#ifndef ISDN_CHIP_ISAC
1183#define ISDN_CHIP_ISAC 1
1184#endif
1185#else
1186#define CARD_GAZEL 0
1187#endif
1188
1189#ifdef CONFIG_HISAX_W6692
1190#define CARD_W6692 1
1191#ifndef ISDN_CHIP_W6692
1192#define ISDN_CHIP_W6692 1
1193#endif
1194#else
1195#define CARD_W6692 0
1196#endif
1197
1198#ifdef CONFIG_HISAX_NETJET_U
1199#define CARD_NETJET_U 1
1200#ifndef ISDN_CHIP_ICC
1201#define ISDN_CHIP_ICC 1
1202#endif
1203#ifndef HISAX_UINTERFACE
1204#define HISAX_UINTERFACE 1
1205#endif
1206#else
1207#define CARD_NETJET_U 0
1208#endif
1209
1210#ifdef CONFIG_HISAX_ENTERNOW_PCI
1211#define CARD_FN_ENTERNOW_PCI 1
f718404a
Z		 1212#else
1213#define CARD_FN_ENTERNOW_PCI 0
1da177e4
LT		 1214#endif
1215
1216#define TEI_PER_CARD 1
1217
1218/* L1 Debug */
1219#define L1_DEB_WARN 0x01
1220#define L1_DEB_INTSTAT 0x02
1221#define L1_DEB_ISAC 0x04
1222#define L1_DEB_ISAC_FIFO 0x08
1223#define L1_DEB_HSCX 0x10
1224#define L1_DEB_HSCX_FIFO 0x20
1225#define L1_DEB_LAPD 0x40
1226#define L1_DEB_IPAC 0x80
1227#define L1_DEB_RECEIVE_FRAME 0x100
1228#define L1_DEB_MONITOR 0x200
1229#define DEB_DLOG_HEX 0x400
1230#define DEB_DLOG_VERBOSE 0x800
1231
1232#define L2FRAME_DEBUG
1233
1234#ifdef L2FRAME_DEBUG
1235extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir);
1236#endif
1237
1238#include "hisax_cfg.h"
1239
1240void init_bcstate(struct IsdnCardState *cs, int bc);
1241
1242void setstack_HiSax(struct PStack *st, struct IsdnCardState *cs);
1da177e4
LT		 1243void HiSax_addlist(struct IsdnCardState *sp, struct PStack *st);
1244void HiSax_rmlist(struct IsdnCardState *sp, struct PStack *st);
1245
1246void setstack_l1_B(struct PStack *st);
1247
1248void setstack_tei(struct PStack *st);
1249void setstack_manager(struct PStack *st);
1250
1251void setstack_isdnl2(struct PStack *st, char *debug_id);
1252void releasestack_isdnl2(struct PStack *st);
1253void setstack_transl2(struct PStack *st);
1254void releasestack_transl2(struct PStack *st);
1255void lli_writewakeup(struct PStack *st, int len);
1256
1257void setstack_l3dc(struct PStack *st, struct Channel *chanp);
1258void setstack_l3bc(struct PStack *st, struct Channel *chanp);
1259void releasestack_isdnl3(struct PStack *st);
1260
1261u_char *findie(u_char * p, int size, u_char ie, int wanted_set);
1262int getcallref(u_char * p);
1263int newcallref(void);
1264
1265int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
1266void FsmFree(struct Fsm *fsm);
1267int FsmEvent(struct FsmInst *fi, int event, void *arg);
1268void FsmChangeState(struct FsmInst *fi, int newstate);
1269void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
1270int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
1271 void *arg, int where);
1272void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
1273 void *arg, int where);
1274void FsmDelTimer(struct FsmTimer *ft, int where);
1275int jiftime(char *s, long mark);
1276
1277int HiSax_command(isdn_ctrl * ic);
1278int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
1279void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
1280void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
1281void HiSax_reportcard(int cardnr, int sel);
1282int QuickHex(char *txt, u_char * p, int cnt);
1283void LogFrame(struct IsdnCardState *cs, u_char * p, int size);
1284void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
1285void iecpy(u_char * dest, u_char * iestart, int ieoffset);
1da177e4
LT		 1286#endif /* __KERNEL__ */
1287
ca8af486
AM		 1288/*
1289 * Busywait delay for `jiffs' jiffies
1290 */
1291#define HZDELAY(jiffs) do { \
1292 int tout = jiffs; \
1293 \
1294 while (tout--) { \
1295 int loops = USEC_PER_SEC / HZ; \
1296 while (loops--) \
1297 udelay(1); \
1298 } \
1299 } while (0)
1da177e4
LT		 1300
1301int ll_run(struct IsdnCardState *cs, int addfeatures);
1da177e4
LT		 1302int CallcNew(void);
1303void CallcFree(void);
1304int CallcNewChan(struct IsdnCardState *cs);
1305void CallcFreeChan(struct IsdnCardState *cs);
1306int Isdnl1New(void);
1307void Isdnl1Free(void);
1308int Isdnl2New(void);
1309void Isdnl2Free(void);
1310int Isdnl3New(void);
1311void Isdnl3Free(void);
1312void init_tei(struct IsdnCardState *cs, int protocol);
1313void release_tei(struct IsdnCardState *cs);
1314char *HiSax_getrev(const char *revision);
1315int TeiNew(void);
1316void TeiFree(void);
Linux kernel - Deliverables
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