KVM: MMU: Move set_pte() into guest paging mode independent code
[deliverable/linux.git] / drivers / kvm / mmu.c
CommitLineData
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
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19
20#include "vmx.h"
21#include "kvm.h"
34c16eec 22#include "x86.h"
e495606d 23
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24#include <linux/types.h>
25#include <linux/string.h>
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26#include <linux/mm.h>
27#include <linux/highmem.h>
28#include <linux/module.h>
448353ca 29#include <linux/swap.h>
6aa8b732 30
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31#include <asm/page.h>
32#include <asm/cmpxchg.h>
4e542370 33#include <asm/io.h>
6aa8b732 34
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35#undef MMU_DEBUG
36
37#undef AUDIT
38
39#ifdef AUDIT
40static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
41#else
42static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
43#endif
44
45#ifdef MMU_DEBUG
46
47#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
48#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
49
50#else
51
52#define pgprintk(x...) do { } while (0)
53#define rmap_printk(x...) do { } while (0)
54
55#endif
56
57#if defined(MMU_DEBUG) || defined(AUDIT)
58static int dbg = 1;
59#endif
6aa8b732 60
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61#ifndef MMU_DEBUG
62#define ASSERT(x) do { } while (0)
63#else
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64#define ASSERT(x) \
65 if (!(x)) { \
66 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
67 __FILE__, __LINE__, #x); \
68 }
d6c69ee9 69#endif
6aa8b732 70
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71#define PT64_PT_BITS 9
72#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
73#define PT32_PT_BITS 10
74#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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75
76#define PT_WRITABLE_SHIFT 1
77
78#define PT_PRESENT_MASK (1ULL << 0)
79#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
80#define PT_USER_MASK (1ULL << 2)
81#define PT_PWT_MASK (1ULL << 3)
82#define PT_PCD_MASK (1ULL << 4)
83#define PT_ACCESSED_MASK (1ULL << 5)
84#define PT_DIRTY_MASK (1ULL << 6)
85#define PT_PAGE_SIZE_MASK (1ULL << 7)
86#define PT_PAT_MASK (1ULL << 7)
87#define PT_GLOBAL_MASK (1ULL << 8)
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88#define PT64_NX_SHIFT 63
89#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
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90
91#define PT_PAT_SHIFT 7
92#define PT_DIR_PAT_SHIFT 12
93#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
94
95#define PT32_DIR_PSE36_SIZE 4
96#define PT32_DIR_PSE36_SHIFT 13
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97#define PT32_DIR_PSE36_MASK \
98 (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
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99
100
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101#define PT_FIRST_AVAIL_BITS_SHIFT 9
102#define PT64_SECOND_AVAIL_BITS_SHIFT 52
103
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104#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
105
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106#define VALID_PAGE(x) ((x) != INVALID_PAGE)
107
108#define PT64_LEVEL_BITS 9
109
110#define PT64_LEVEL_SHIFT(level) \
d77c26fc 111 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
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112
113#define PT64_LEVEL_MASK(level) \
114 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
115
116#define PT64_INDEX(address, level)\
117 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
118
119
120#define PT32_LEVEL_BITS 10
121
122#define PT32_LEVEL_SHIFT(level) \
d77c26fc 123 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
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124
125#define PT32_LEVEL_MASK(level) \
126 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
127
128#define PT32_INDEX(address, level)\
129 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
130
131
27aba766 132#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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133#define PT64_DIR_BASE_ADDR_MASK \
134 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
135
136#define PT32_BASE_ADDR_MASK PAGE_MASK
137#define PT32_DIR_BASE_ADDR_MASK \
138 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
139
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140#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141 | PT64_NX_MASK)
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142
143#define PFERR_PRESENT_MASK (1U << 0)
144#define PFERR_WRITE_MASK (1U << 1)
145#define PFERR_USER_MASK (1U << 2)
73b1087e 146#define PFERR_FETCH_MASK (1U << 4)
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147
148#define PT64_ROOT_LEVEL 4
149#define PT32_ROOT_LEVEL 2
150#define PT32E_ROOT_LEVEL 3
151
152#define PT_DIRECTORY_LEVEL 2
153#define PT_PAGE_TABLE_LEVEL 1
154
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155#define RMAP_EXT 4
156
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157#define ACC_EXEC_MASK 1
158#define ACC_WRITE_MASK PT_WRITABLE_MASK
159#define ACC_USER_MASK PT_USER_MASK
160#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
161
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162struct kvm_rmap_desc {
163 u64 *shadow_ptes[RMAP_EXT];
164 struct kvm_rmap_desc *more;
165};
166
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167static struct kmem_cache *pte_chain_cache;
168static struct kmem_cache *rmap_desc_cache;
d3d25b04 169static struct kmem_cache *mmu_page_header_cache;
b5a33a75 170
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171static u64 __read_mostly shadow_trap_nonpresent_pte;
172static u64 __read_mostly shadow_notrap_nonpresent_pte;
173
174void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
175{
176 shadow_trap_nonpresent_pte = trap_pte;
177 shadow_notrap_nonpresent_pte = notrap_pte;
178}
179EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
180
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181static int is_write_protection(struct kvm_vcpu *vcpu)
182{
707d92fa 183 return vcpu->cr0 & X86_CR0_WP;
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184}
185
186static int is_cpuid_PSE36(void)
187{
188 return 1;
189}
190
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191static int is_nx(struct kvm_vcpu *vcpu)
192{
193 return vcpu->shadow_efer & EFER_NX;
194}
195
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196static int is_present_pte(unsigned long pte)
197{
198 return pte & PT_PRESENT_MASK;
199}
200
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201static int is_shadow_present_pte(u64 pte)
202{
203 pte &= ~PT_SHADOW_IO_MARK;
204 return pte != shadow_trap_nonpresent_pte
205 && pte != shadow_notrap_nonpresent_pte;
206}
207
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208static int is_writeble_pte(unsigned long pte)
209{
210 return pte & PT_WRITABLE_MASK;
211}
212
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213static int is_dirty_pte(unsigned long pte)
214{
215 return pte & PT_DIRTY_MASK;
216}
217
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218static int is_io_pte(unsigned long pte)
219{
220 return pte & PT_SHADOW_IO_MARK;
221}
222
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223static int is_rmap_pte(u64 pte)
224{
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225 return pte != shadow_trap_nonpresent_pte
226 && pte != shadow_notrap_nonpresent_pte;
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227}
228
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229static gfn_t pse36_gfn_delta(u32 gpte)
230{
231 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
232
233 return (gpte & PT32_DIR_PSE36_MASK) << shift;
234}
235
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236static void set_shadow_pte(u64 *sptep, u64 spte)
237{
238#ifdef CONFIG_X86_64
239 set_64bit((unsigned long *)sptep, spte);
240#else
241 set_64bit((unsigned long long *)sptep, spte);
242#endif
243}
244
e2dec939 245static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
2e3e5882 246 struct kmem_cache *base_cache, int min)
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247{
248 void *obj;
249
250 if (cache->nobjs >= min)
e2dec939 251 return 0;
714b93da 252 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 253 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
714b93da 254 if (!obj)
e2dec939 255 return -ENOMEM;
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256 cache->objects[cache->nobjs++] = obj;
257 }
e2dec939 258 return 0;
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259}
260
261static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
262{
263 while (mc->nobjs)
264 kfree(mc->objects[--mc->nobjs]);
265}
266
c1158e63 267static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
2e3e5882 268 int min)
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269{
270 struct page *page;
271
272 if (cache->nobjs >= min)
273 return 0;
274 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
2e3e5882 275 page = alloc_page(GFP_KERNEL);
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276 if (!page)
277 return -ENOMEM;
278 set_page_private(page, 0);
279 cache->objects[cache->nobjs++] = page_address(page);
280 }
281 return 0;
282}
283
284static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
285{
286 while (mc->nobjs)
c4d198d5 287 free_page((unsigned long)mc->objects[--mc->nobjs]);
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288}
289
2e3e5882 290static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
714b93da 291{
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292 int r;
293
2e3e5882 294 kvm_mmu_free_some_pages(vcpu);
e2dec939 295 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
2e3e5882 296 pte_chain_cache, 4);
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297 if (r)
298 goto out;
299 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
2e3e5882 300 rmap_desc_cache, 1);
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301 if (r)
302 goto out;
290fc38d 303 r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
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304 if (r)
305 goto out;
306 r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
2e3e5882 307 mmu_page_header_cache, 4);
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308out:
309 return r;
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310}
311
312static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
313{
314 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
315 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
c1158e63 316 mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
d3d25b04 317 mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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318}
319
320static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
321 size_t size)
322{
323 void *p;
324
325 BUG_ON(!mc->nobjs);
326 p = mc->objects[--mc->nobjs];
327 memset(p, 0, size);
328 return p;
329}
330
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331static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
332{
333 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
334 sizeof(struct kvm_pte_chain));
335}
336
90cb0529 337static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
714b93da 338{
90cb0529 339 kfree(pc);
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340}
341
342static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
343{
344 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
345 sizeof(struct kvm_rmap_desc));
346}
347
90cb0529 348static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
714b93da 349{
90cb0529 350 kfree(rd);
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351}
352
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353/*
354 * Take gfn and return the reverse mapping to it.
355 * Note: gfn must be unaliased before this function get called
356 */
357
358static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
359{
360 struct kvm_memory_slot *slot;
361
362 slot = gfn_to_memslot(kvm, gfn);
363 return &slot->rmap[gfn - slot->base_gfn];
364}
365
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366/*
367 * Reverse mapping data structures:
368 *
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369 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
370 * that points to page_address(page).
cd4a4e53 371 *
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372 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
373 * containing more mappings.
cd4a4e53 374 */
290fc38d 375static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
cd4a4e53 376{
4db35314 377 struct kvm_mmu_page *sp;
cd4a4e53 378 struct kvm_rmap_desc *desc;
290fc38d 379 unsigned long *rmapp;
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380 int i;
381
382 if (!is_rmap_pte(*spte))
383 return;
290fc38d 384 gfn = unalias_gfn(vcpu->kvm, gfn);
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385 sp = page_header(__pa(spte));
386 sp->gfns[spte - sp->spt] = gfn;
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387 rmapp = gfn_to_rmap(vcpu->kvm, gfn);
388 if (!*rmapp) {
cd4a4e53 389 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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390 *rmapp = (unsigned long)spte;
391 } else if (!(*rmapp & 1)) {
cd4a4e53 392 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
714b93da 393 desc = mmu_alloc_rmap_desc(vcpu);
290fc38d 394 desc->shadow_ptes[0] = (u64 *)*rmapp;
cd4a4e53 395 desc->shadow_ptes[1] = spte;
290fc38d 396 *rmapp = (unsigned long)desc | 1;
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397 } else {
398 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
290fc38d 399 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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400 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
401 desc = desc->more;
402 if (desc->shadow_ptes[RMAP_EXT-1]) {
714b93da 403 desc->more = mmu_alloc_rmap_desc(vcpu);
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404 desc = desc->more;
405 }
406 for (i = 0; desc->shadow_ptes[i]; ++i)
407 ;
408 desc->shadow_ptes[i] = spte;
409 }
410}
411
290fc38d 412static void rmap_desc_remove_entry(unsigned long *rmapp,
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413 struct kvm_rmap_desc *desc,
414 int i,
415 struct kvm_rmap_desc *prev_desc)
416{
417 int j;
418
419 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
420 ;
421 desc->shadow_ptes[i] = desc->shadow_ptes[j];
11718b4d 422 desc->shadow_ptes[j] = NULL;
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423 if (j != 0)
424 return;
425 if (!prev_desc && !desc->more)
290fc38d 426 *rmapp = (unsigned long)desc->shadow_ptes[0];
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427 else
428 if (prev_desc)
429 prev_desc->more = desc->more;
430 else
290fc38d 431 *rmapp = (unsigned long)desc->more | 1;
90cb0529 432 mmu_free_rmap_desc(desc);
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433}
434
290fc38d 435static void rmap_remove(struct kvm *kvm, u64 *spte)
cd4a4e53 436{
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437 struct kvm_rmap_desc *desc;
438 struct kvm_rmap_desc *prev_desc;
4db35314 439 struct kvm_mmu_page *sp;
76c35c6e 440 struct page *page;
290fc38d 441 unsigned long *rmapp;
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442 int i;
443
444 if (!is_rmap_pte(*spte))
445 return;
4db35314 446 sp = page_header(__pa(spte));
76c35c6e 447 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
448353ca 448 mark_page_accessed(page);
b4231d61 449 if (is_writeble_pte(*spte))
76c35c6e 450 kvm_release_page_dirty(page);
b4231d61 451 else
76c35c6e 452 kvm_release_page_clean(page);
4db35314 453 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]);
290fc38d 454 if (!*rmapp) {
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455 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
456 BUG();
290fc38d 457 } else if (!(*rmapp & 1)) {
cd4a4e53 458 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
290fc38d 459 if ((u64 *)*rmapp != spte) {
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460 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
461 spte, *spte);
462 BUG();
463 }
290fc38d 464 *rmapp = 0;
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465 } else {
466 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
290fc38d 467 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
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468 prev_desc = NULL;
469 while (desc) {
470 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
471 if (desc->shadow_ptes[i] == spte) {
290fc38d 472 rmap_desc_remove_entry(rmapp,
714b93da 473 desc, i,
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474 prev_desc);
475 return;
476 }
477 prev_desc = desc;
478 desc = desc->more;
479 }
480 BUG();
481 }
482}
483
98348e95 484static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
374cbac0 485{
374cbac0 486 struct kvm_rmap_desc *desc;
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IE
487 struct kvm_rmap_desc *prev_desc;
488 u64 *prev_spte;
489 int i;
490
491 if (!*rmapp)
492 return NULL;
493 else if (!(*rmapp & 1)) {
494 if (!spte)
495 return (u64 *)*rmapp;
496 return NULL;
497 }
498 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
499 prev_desc = NULL;
500 prev_spte = NULL;
501 while (desc) {
502 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
503 if (prev_spte == spte)
504 return desc->shadow_ptes[i];
505 prev_spte = desc->shadow_ptes[i];
506 }
507 desc = desc->more;
508 }
509 return NULL;
510}
511
512static void rmap_write_protect(struct kvm *kvm, u64 gfn)
513{
290fc38d 514 unsigned long *rmapp;
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515 u64 *spte;
516
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517 gfn = unalias_gfn(kvm, gfn);
518 rmapp = gfn_to_rmap(kvm, gfn);
374cbac0 519
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520 spte = rmap_next(kvm, rmapp, NULL);
521 while (spte) {
374cbac0 522 BUG_ON(!spte);
374cbac0 523 BUG_ON(!(*spte & PT_PRESENT_MASK));
374cbac0 524 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
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525 if (is_writeble_pte(*spte))
526 set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
4a4c9924 527 kvm_flush_remote_tlbs(kvm);
9647c14c 528 spte = rmap_next(kvm, rmapp, spte);
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529 }
530}
531
d6c69ee9 532#ifdef MMU_DEBUG
47ad8e68 533static int is_empty_shadow_page(u64 *spt)
6aa8b732 534{
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535 u64 *pos;
536 u64 *end;
537
47ad8e68 538 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
c7addb90 539 if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
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540 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
541 pos, *pos);
6aa8b732 542 return 0;
139bdb2d 543 }
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544 return 1;
545}
d6c69ee9 546#endif
6aa8b732 547
4db35314 548static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
260746c0 549{
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550 ASSERT(is_empty_shadow_page(sp->spt));
551 list_del(&sp->link);
552 __free_page(virt_to_page(sp->spt));
553 __free_page(virt_to_page(sp->gfns));
554 kfree(sp);
90cb0529 555 ++kvm->n_free_mmu_pages;
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556}
557
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558static unsigned kvm_page_table_hashfn(gfn_t gfn)
559{
560 return gfn;
561}
562
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563static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
564 u64 *parent_pte)
6aa8b732 565{
4db35314 566 struct kvm_mmu_page *sp;
6aa8b732 567
d3d25b04 568 if (!vcpu->kvm->n_free_mmu_pages)
25c0de2c 569 return NULL;
6aa8b732 570
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571 sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp);
572 sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
573 sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
574 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
575 list_add(&sp->link, &vcpu->kvm->active_mmu_pages);
576 ASSERT(is_empty_shadow_page(sp->spt));
577 sp->slot_bitmap = 0;
578 sp->multimapped = 0;
579 sp->parent_pte = parent_pte;
ebeace86 580 --vcpu->kvm->n_free_mmu_pages;
4db35314 581 return sp;
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582}
583
714b93da 584static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
4db35314 585 struct kvm_mmu_page *sp, u64 *parent_pte)
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586{
587 struct kvm_pte_chain *pte_chain;
588 struct hlist_node *node;
589 int i;
590
591 if (!parent_pte)
592 return;
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593 if (!sp->multimapped) {
594 u64 *old = sp->parent_pte;
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595
596 if (!old) {
4db35314 597 sp->parent_pte = parent_pte;
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598 return;
599 }
4db35314 600 sp->multimapped = 1;
714b93da 601 pte_chain = mmu_alloc_pte_chain(vcpu);
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602 INIT_HLIST_HEAD(&sp->parent_ptes);
603 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
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604 pte_chain->parent_ptes[0] = old;
605 }
4db35314 606 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
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607 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
608 continue;
609 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
610 if (!pte_chain->parent_ptes[i]) {
611 pte_chain->parent_ptes[i] = parent_pte;
612 return;
613 }
614 }
714b93da 615 pte_chain = mmu_alloc_pte_chain(vcpu);
cea0f0e7 616 BUG_ON(!pte_chain);
4db35314 617 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
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618 pte_chain->parent_ptes[0] = parent_pte;
619}
620
4db35314 621static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
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622 u64 *parent_pte)
623{
624 struct kvm_pte_chain *pte_chain;
625 struct hlist_node *node;
626 int i;
627
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628 if (!sp->multimapped) {
629 BUG_ON(sp->parent_pte != parent_pte);
630 sp->parent_pte = NULL;
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631 return;
632 }
4db35314 633 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
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634 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
635 if (!pte_chain->parent_ptes[i])
636 break;
637 if (pte_chain->parent_ptes[i] != parent_pte)
638 continue;
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639 while (i + 1 < NR_PTE_CHAIN_ENTRIES
640 && pte_chain->parent_ptes[i + 1]) {
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641 pte_chain->parent_ptes[i]
642 = pte_chain->parent_ptes[i + 1];
643 ++i;
644 }
645 pte_chain->parent_ptes[i] = NULL;
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646 if (i == 0) {
647 hlist_del(&pte_chain->link);
90cb0529 648 mmu_free_pte_chain(pte_chain);
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649 if (hlist_empty(&sp->parent_ptes)) {
650 sp->multimapped = 0;
651 sp->parent_pte = NULL;
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652 }
653 }
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654 return;
655 }
656 BUG();
657}
658
4db35314 659static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
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660{
661 unsigned index;
662 struct hlist_head *bucket;
4db35314 663 struct kvm_mmu_page *sp;
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664 struct hlist_node *node;
665
666 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
667 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 668 bucket = &kvm->mmu_page_hash[index];
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669 hlist_for_each_entry(sp, node, bucket, hash_link)
670 if (sp->gfn == gfn && !sp->role.metaphysical) {
cea0f0e7 671 pgprintk("%s: found role %x\n",
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672 __FUNCTION__, sp->role.word);
673 return sp;
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674 }
675 return NULL;
676}
677
678static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
679 gfn_t gfn,
680 gva_t gaddr,
681 unsigned level,
682 int metaphysical,
41074d07 683 unsigned access,
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684 u64 *parent_pte)
685{
686 union kvm_mmu_page_role role;
687 unsigned index;
688 unsigned quadrant;
689 struct hlist_head *bucket;
4db35314 690 struct kvm_mmu_page *sp;
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691 struct hlist_node *node;
692
693 role.word = 0;
694 role.glevels = vcpu->mmu.root_level;
695 role.level = level;
696 role.metaphysical = metaphysical;
41074d07 697 role.access = access;
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698 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
699 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
700 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
701 role.quadrant = quadrant;
702 }
703 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
704 gfn, role.word);
705 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
706 bucket = &vcpu->kvm->mmu_page_hash[index];
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707 hlist_for_each_entry(sp, node, bucket, hash_link)
708 if (sp->gfn == gfn && sp->role.word == role.word) {
709 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
cea0f0e7 710 pgprintk("%s: found\n", __FUNCTION__);
4db35314 711 return sp;
cea0f0e7 712 }
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713 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
714 if (!sp)
715 return sp;
cea0f0e7 716 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
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717 sp->gfn = gfn;
718 sp->role = role;
719 hlist_add_head(&sp->hash_link, bucket);
720 vcpu->mmu.prefetch_page(vcpu, sp);
374cbac0 721 if (!metaphysical)
4a4c9924 722 rmap_write_protect(vcpu->kvm, gfn);
4db35314 723 return sp;
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724}
725
90cb0529 726static void kvm_mmu_page_unlink_children(struct kvm *kvm,
4db35314 727 struct kvm_mmu_page *sp)
a436036b 728{
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729 unsigned i;
730 u64 *pt;
731 u64 ent;
732
4db35314 733 pt = sp->spt;
697fe2e2 734
4db35314 735 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
697fe2e2 736 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
c7addb90 737 if (is_shadow_present_pte(pt[i]))
290fc38d 738 rmap_remove(kvm, &pt[i]);
c7addb90 739 pt[i] = shadow_trap_nonpresent_pte;
697fe2e2 740 }
90cb0529 741 kvm_flush_remote_tlbs(kvm);
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742 return;
743 }
744
745 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
746 ent = pt[i];
747
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748 pt[i] = shadow_trap_nonpresent_pte;
749 if (!is_shadow_present_pte(ent))
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750 continue;
751 ent &= PT64_BASE_ADDR_MASK;
90cb0529 752 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
697fe2e2 753 }
90cb0529 754 kvm_flush_remote_tlbs(kvm);
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755}
756
4db35314 757static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
cea0f0e7 758{
4db35314 759 mmu_page_remove_parent_pte(sp, parent_pte);
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760}
761
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762static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
763{
764 int i;
765
766 for (i = 0; i < KVM_MAX_VCPUS; ++i)
767 if (kvm->vcpus[i])
768 kvm->vcpus[i]->last_pte_updated = NULL;
769}
770
4db35314 771static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
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772{
773 u64 *parent_pte;
774
4cee5764 775 ++kvm->stat.mmu_shadow_zapped;
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776 while (sp->multimapped || sp->parent_pte) {
777 if (!sp->multimapped)
778 parent_pte = sp->parent_pte;
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779 else {
780 struct kvm_pte_chain *chain;
781
4db35314 782 chain = container_of(sp->parent_ptes.first,
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783 struct kvm_pte_chain, link);
784 parent_pte = chain->parent_ptes[0];
785 }
697fe2e2 786 BUG_ON(!parent_pte);
4db35314 787 kvm_mmu_put_page(sp, parent_pte);
c7addb90 788 set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
a436036b 789 }
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790 kvm_mmu_page_unlink_children(kvm, sp);
791 if (!sp->root_count) {
792 hlist_del(&sp->hash_link);
793 kvm_mmu_free_page(kvm, sp);
36868f7b 794 } else
4db35314 795 list_move(&sp->link, &kvm->active_mmu_pages);
12b7d28f 796 kvm_mmu_reset_last_pte_updated(kvm);
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797}
798
82ce2c96
IE
799/*
800 * Changing the number of mmu pages allocated to the vm
801 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
802 */
803void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
804{
805 /*
806 * If we set the number of mmu pages to be smaller be than the
807 * number of actived pages , we must to free some mmu pages before we
808 * change the value
809 */
810
811 if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
812 kvm_nr_mmu_pages) {
813 int n_used_mmu_pages = kvm->n_alloc_mmu_pages
814 - kvm->n_free_mmu_pages;
815
816 while (n_used_mmu_pages > kvm_nr_mmu_pages) {
817 struct kvm_mmu_page *page;
818
819 page = container_of(kvm->active_mmu_pages.prev,
820 struct kvm_mmu_page, link);
821 kvm_mmu_zap_page(kvm, page);
822 n_used_mmu_pages--;
823 }
824 kvm->n_free_mmu_pages = 0;
825 }
826 else
827 kvm->n_free_mmu_pages += kvm_nr_mmu_pages
828 - kvm->n_alloc_mmu_pages;
829
830 kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
831}
832
f67a46f4 833static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
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834{
835 unsigned index;
836 struct hlist_head *bucket;
4db35314 837 struct kvm_mmu_page *sp;
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838 struct hlist_node *node, *n;
839 int r;
840
841 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
842 r = 0;
843 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
f67a46f4 844 bucket = &kvm->mmu_page_hash[index];
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845 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
846 if (sp->gfn == gfn && !sp->role.metaphysical) {
697fe2e2 847 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
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848 sp->role.word);
849 kvm_mmu_zap_page(kvm, sp);
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850 r = 1;
851 }
852 return r;
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853}
854
f67a46f4 855static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
97a0a01e 856{
4db35314 857 struct kvm_mmu_page *sp;
97a0a01e 858
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859 while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
860 pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word);
861 kvm_mmu_zap_page(kvm, sp);
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862 }
863}
864
38c335f1 865static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
6aa8b732 866{
38c335f1 867 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
4db35314 868 struct kvm_mmu_page *sp = page_header(__pa(pte));
6aa8b732 869
4db35314 870 __set_bit(slot, &sp->slot_bitmap);
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871}
872
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873struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
874{
875 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
876
877 if (gpa == UNMAPPED_GVA)
878 return NULL;
1d28f5f4 879 return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
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880}
881
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882static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
883 unsigned pt_access, unsigned pte_access,
884 int user_fault, int write_fault, int dirty,
885 int *ptwrite, gfn_t gfn)
886{
887 u64 spte;
888 int was_rmapped = is_rmap_pte(*shadow_pte);
889 struct page *page;
890
891 pgprintk("%s: spte %llx gpte %llx access %x write_fault %d"
892 " user_fault %d gfn %lx\n",
893 __FUNCTION__, *shadow_pte, (u64)gpte, pt_access,
894 write_fault, user_fault, gfn);
895
896 /*
897 * We don't set the accessed bit, since we sometimes want to see
898 * whether the guest actually used the pte (in order to detect
899 * demand paging).
900 */
901 spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
902 if (!dirty)
903 pte_access &= ~ACC_WRITE_MASK;
904 if (!(pte_access & ACC_EXEC_MASK))
905 spte |= PT64_NX_MASK;
906
907 page = gfn_to_page(vcpu->kvm, gfn);
908
909 spte |= PT_PRESENT_MASK;
910 if (pte_access & ACC_USER_MASK)
911 spte |= PT_USER_MASK;
912
913 if (is_error_page(page)) {
914 set_shadow_pte(shadow_pte,
915 shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
916 kvm_release_page_clean(page);
917 return;
918 }
919
920 spte |= page_to_phys(page);
921
922 if ((pte_access & ACC_WRITE_MASK)
923 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
924 struct kvm_mmu_page *shadow;
925
926 spte |= PT_WRITABLE_MASK;
927 if (user_fault) {
928 mmu_unshadow(vcpu->kvm, gfn);
929 goto unshadowed;
930 }
931
932 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
933 if (shadow) {
934 pgprintk("%s: found shadow page for %lx, marking ro\n",
935 __FUNCTION__, gfn);
936 pte_access &= ~ACC_WRITE_MASK;
937 if (is_writeble_pte(spte)) {
938 spte &= ~PT_WRITABLE_MASK;
939 kvm_x86_ops->tlb_flush(vcpu);
940 }
941 if (write_fault)
942 *ptwrite = 1;
943 }
944 }
945
946unshadowed:
947
948 if (pte_access & ACC_WRITE_MASK)
949 mark_page_dirty(vcpu->kvm, gfn);
950
951 pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
952 set_shadow_pte(shadow_pte, spte);
953 page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
954 if (!was_rmapped) {
955 rmap_add(vcpu, shadow_pte, gfn);
956 if (!is_rmap_pte(*shadow_pte))
957 kvm_release_page_clean(page);
958 }
959 else
960 kvm_release_page_clean(page);
961 if (!ptwrite || !*ptwrite)
962 vcpu->last_pte_updated = shadow_pte;
963}
964
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965static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
966{
967}
968
3f3e7124 969static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, struct page *page)
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970{
971 int level = PT32E_ROOT_LEVEL;
972 hpa_t table_addr = vcpu->mmu.root_hpa;
973
974 for (; ; level--) {
975 u32 index = PT64_INDEX(v, level);
976 u64 *table;
cea0f0e7 977 u64 pte;
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978
979 ASSERT(VALID_PAGE(table_addr));
980 table = __va(table_addr);
981
982 if (level == 1) {
9647c14c
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983 int was_rmapped;
984
cea0f0e7 985 pte = table[index];
9647c14c 986 was_rmapped = is_rmap_pte(pte);
2065b372 987 if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
b4231d61 988 kvm_release_page_clean(page);
cea0f0e7 989 return 0;
2065b372 990 }
6aa8b732 991 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
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992 page_header_update_slot(vcpu->kvm, table,
993 v >> PAGE_SHIFT);
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994 table[index] = page_to_phys(page)
995 | PT_PRESENT_MASK | PT_WRITABLE_MASK
996 | PT_USER_MASK;
9647c14c
IE
997 if (!was_rmapped)
998 rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
8a7ae055 999 else
b4231d61
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1000 kvm_release_page_clean(page);
1001
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1002 return 0;
1003 }
1004
c7addb90 1005 if (table[index] == shadow_trap_nonpresent_pte) {
25c0de2c 1006 struct kvm_mmu_page *new_table;
cea0f0e7 1007 gfn_t pseudo_gfn;
6aa8b732 1008
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1009 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
1010 >> PAGE_SHIFT;
1011 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
1012 v, level - 1,
fe135d2c 1013 1, ACC_ALL, &table[index]);
25c0de2c 1014 if (!new_table) {
6aa8b732 1015 pgprintk("nonpaging_map: ENOMEM\n");
b4231d61 1016 kvm_release_page_clean(page);
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1017 return -ENOMEM;
1018 }
1019
47ad8e68 1020 table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
25c0de2c 1021 | PT_WRITABLE_MASK | PT_USER_MASK;
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1022 }
1023 table_addr = table[index] & PT64_BASE_ADDR_MASK;
1024 }
1025}
1026
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1027static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1028 struct kvm_mmu_page *sp)
1029{
1030 int i;
1031
1032 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1033 sp->spt[i] = shadow_trap_nonpresent_pte;
1034}
1035
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1036static void mmu_free_roots(struct kvm_vcpu *vcpu)
1037{
1038 int i;
4db35314 1039 struct kvm_mmu_page *sp;
17ac10ad 1040
7b53aa56
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1041 if (!VALID_PAGE(vcpu->mmu.root_hpa))
1042 return;
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1043#ifdef CONFIG_X86_64
1044 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1045 hpa_t root = vcpu->mmu.root_hpa;
1046
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1047 sp = page_header(root);
1048 --sp->root_count;
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1049 vcpu->mmu.root_hpa = INVALID_PAGE;
1050 return;
1051 }
1052#endif
1053 for (i = 0; i < 4; ++i) {
1054 hpa_t root = vcpu->mmu.pae_root[i];
1055
417726a3 1056 if (root) {
417726a3 1057 root &= PT64_BASE_ADDR_MASK;
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1058 sp = page_header(root);
1059 --sp->root_count;
417726a3 1060 }
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1061 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1062 }
1063 vcpu->mmu.root_hpa = INVALID_PAGE;
1064}
1065
1066static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
1067{
1068 int i;
cea0f0e7 1069 gfn_t root_gfn;
4db35314 1070 struct kvm_mmu_page *sp;
3bb65a22 1071
cea0f0e7 1072 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
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1073
1074#ifdef CONFIG_X86_64
1075 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1076 hpa_t root = vcpu->mmu.root_hpa;
1077
1078 ASSERT(!VALID_PAGE(root));
4db35314 1079 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
fe135d2c 1080 PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
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1081 root = __pa(sp->spt);
1082 ++sp->root_count;
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1083 vcpu->mmu.root_hpa = root;
1084 return;
1085 }
1086#endif
1087 for (i = 0; i < 4; ++i) {
1088 hpa_t root = vcpu->mmu.pae_root[i];
1089
1090 ASSERT(!VALID_PAGE(root));
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1091 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
1092 if (!is_present_pte(vcpu->pdptrs[i])) {
1093 vcpu->mmu.pae_root[i] = 0;
1094 continue;
1095 }
cea0f0e7 1096 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
417726a3 1097 } else if (vcpu->mmu.root_level == 0)
cea0f0e7 1098 root_gfn = 0;
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1099 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
1100 PT32_ROOT_LEVEL, !is_paging(vcpu),
fe135d2c 1101 ACC_ALL, NULL);
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1102 root = __pa(sp->spt);
1103 ++sp->root_count;
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1104 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
1105 }
1106 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
1107}
1108
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1109static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
1110{
1111 return vaddr;
1112}
1113
1114static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
3f3e7124 1115 u32 error_code)
6aa8b732 1116{
3f3e7124 1117 struct page *page;
e2dec939 1118 int r;
6aa8b732 1119
e2dec939
AK
1120 r = mmu_topup_memory_caches(vcpu);
1121 if (r)
1122 return r;
714b93da 1123
6aa8b732
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1124 ASSERT(vcpu);
1125 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
1126
3f3e7124 1127 page = gfn_to_page(vcpu->kvm, gva >> PAGE_SHIFT);
6aa8b732 1128
3f3e7124
AK
1129 if (is_error_page(page)) {
1130 kvm_release_page_clean(page);
ebeace86 1131 return 1;
8a7ae055 1132 }
6aa8b732 1133
3f3e7124 1134 return nonpaging_map(vcpu, gva & PAGE_MASK, page);
6aa8b732
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1135}
1136
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1137static void nonpaging_free(struct kvm_vcpu *vcpu)
1138{
17ac10ad 1139 mmu_free_roots(vcpu);
6aa8b732
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1140}
1141
1142static int nonpaging_init_context(struct kvm_vcpu *vcpu)
1143{
1144 struct kvm_mmu *context = &vcpu->mmu;
1145
1146 context->new_cr3 = nonpaging_new_cr3;
1147 context->page_fault = nonpaging_page_fault;
6aa8b732
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1148 context->gva_to_gpa = nonpaging_gva_to_gpa;
1149 context->free = nonpaging_free;
c7addb90 1150 context->prefetch_page = nonpaging_prefetch_page;
cea0f0e7 1151 context->root_level = 0;
6aa8b732 1152 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1153 context->root_hpa = INVALID_PAGE;
6aa8b732
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1154 return 0;
1155}
1156
d835dfec 1157void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
6aa8b732 1158{
1165f5fe 1159 ++vcpu->stat.tlb_flush;
cbdd1bea 1160 kvm_x86_ops->tlb_flush(vcpu);
6aa8b732
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1161}
1162
1163static void paging_new_cr3(struct kvm_vcpu *vcpu)
1164{
374cbac0 1165 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7 1166 mmu_free_roots(vcpu);
6aa8b732
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1167}
1168
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1169static void inject_page_fault(struct kvm_vcpu *vcpu,
1170 u64 addr,
1171 u32 err_code)
1172{
c3c91fee 1173 kvm_inject_page_fault(vcpu, addr, err_code);
6aa8b732
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1174}
1175
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1176static void paging_free(struct kvm_vcpu *vcpu)
1177{
1178 nonpaging_free(vcpu);
1179}
1180
1181#define PTTYPE 64
1182#include "paging_tmpl.h"
1183#undef PTTYPE
1184
1185#define PTTYPE 32
1186#include "paging_tmpl.h"
1187#undef PTTYPE
1188
17ac10ad 1189static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732
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1190{
1191 struct kvm_mmu *context = &vcpu->mmu;
1192
1193 ASSERT(is_pae(vcpu));
1194 context->new_cr3 = paging_new_cr3;
1195 context->page_fault = paging64_page_fault;
6aa8b732 1196 context->gva_to_gpa = paging64_gva_to_gpa;
c7addb90 1197 context->prefetch_page = paging64_prefetch_page;
6aa8b732 1198 context->free = paging_free;
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1199 context->root_level = level;
1200 context->shadow_root_level = level;
17c3ba9d 1201 context->root_hpa = INVALID_PAGE;
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1202 return 0;
1203}
1204
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1205static int paging64_init_context(struct kvm_vcpu *vcpu)
1206{
1207 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1208}
1209
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1210static int paging32_init_context(struct kvm_vcpu *vcpu)
1211{
1212 struct kvm_mmu *context = &vcpu->mmu;
1213
1214 context->new_cr3 = paging_new_cr3;
1215 context->page_fault = paging32_page_fault;
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1216 context->gva_to_gpa = paging32_gva_to_gpa;
1217 context->free = paging_free;
c7addb90 1218 context->prefetch_page = paging32_prefetch_page;
6aa8b732
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1219 context->root_level = PT32_ROOT_LEVEL;
1220 context->shadow_root_level = PT32E_ROOT_LEVEL;
17c3ba9d 1221 context->root_hpa = INVALID_PAGE;
6aa8b732
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1222 return 0;
1223}
1224
1225static int paging32E_init_context(struct kvm_vcpu *vcpu)
1226{
17ac10ad 1227 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
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1228}
1229
1230static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1231{
1232 ASSERT(vcpu);
1233 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1234
1235 if (!is_paging(vcpu))
1236 return nonpaging_init_context(vcpu);
a9058ecd 1237 else if (is_long_mode(vcpu))
6aa8b732
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1238 return paging64_init_context(vcpu);
1239 else if (is_pae(vcpu))
1240 return paging32E_init_context(vcpu);
1241 else
1242 return paging32_init_context(vcpu);
1243}
1244
1245static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1246{
1247 ASSERT(vcpu);
1248 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1249 vcpu->mmu.free(vcpu);
1250 vcpu->mmu.root_hpa = INVALID_PAGE;
1251 }
1252}
1253
1254int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
17c3ba9d
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1255{
1256 destroy_kvm_mmu(vcpu);
1257 return init_kvm_mmu(vcpu);
1258}
8668a3c4 1259EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
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1260
1261int kvm_mmu_load(struct kvm_vcpu *vcpu)
6aa8b732 1262{
714b93da
AK
1263 int r;
1264
11ec2804 1265 mutex_lock(&vcpu->kvm->lock);
e2dec939 1266 r = mmu_topup_memory_caches(vcpu);
17c3ba9d
AK
1267 if (r)
1268 goto out;
1269 mmu_alloc_roots(vcpu);
cbdd1bea 1270 kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
17c3ba9d 1271 kvm_mmu_flush_tlb(vcpu);
714b93da 1272out:
11ec2804 1273 mutex_unlock(&vcpu->kvm->lock);
714b93da 1274 return r;
6aa8b732 1275}
17c3ba9d
AK
1276EXPORT_SYMBOL_GPL(kvm_mmu_load);
1277
1278void kvm_mmu_unload(struct kvm_vcpu *vcpu)
1279{
1280 mmu_free_roots(vcpu);
1281}
6aa8b732 1282
09072daf 1283static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
4db35314 1284 struct kvm_mmu_page *sp,
ac1b714e
AK
1285 u64 *spte)
1286{
1287 u64 pte;
1288 struct kvm_mmu_page *child;
1289
1290 pte = *spte;
c7addb90 1291 if (is_shadow_present_pte(pte)) {
4db35314 1292 if (sp->role.level == PT_PAGE_TABLE_LEVEL)
290fc38d 1293 rmap_remove(vcpu->kvm, spte);
ac1b714e
AK
1294 else {
1295 child = page_header(pte & PT64_BASE_ADDR_MASK);
90cb0529 1296 mmu_page_remove_parent_pte(child, spte);
ac1b714e
AK
1297 }
1298 }
c7addb90 1299 set_shadow_pte(spte, shadow_trap_nonpresent_pte);
ac1b714e
AK
1300}
1301
0028425f 1302static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
4db35314 1303 struct kvm_mmu_page *sp,
0028425f 1304 u64 *spte,
c7addb90
AK
1305 const void *new, int bytes,
1306 int offset_in_pte)
0028425f 1307{
4db35314 1308 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
4cee5764 1309 ++vcpu->kvm->stat.mmu_pde_zapped;
0028425f 1310 return;
4cee5764 1311 }
0028425f 1312
4cee5764 1313 ++vcpu->kvm->stat.mmu_pte_updated;
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1314 if (sp->role.glevels == PT32_ROOT_LEVEL)
1315 paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
0028425f 1316 else
4db35314 1317 paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte);
0028425f
AK
1318}
1319
79539cec
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1320static bool need_remote_flush(u64 old, u64 new)
1321{
1322 if (!is_shadow_present_pte(old))
1323 return false;
1324 if (!is_shadow_present_pte(new))
1325 return true;
1326 if ((old ^ new) & PT64_BASE_ADDR_MASK)
1327 return true;
1328 old ^= PT64_NX_MASK;
1329 new ^= PT64_NX_MASK;
1330 return (old & ~new & PT64_PERM_MASK) != 0;
1331}
1332
1333static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
1334{
1335 if (need_remote_flush(old, new))
1336 kvm_flush_remote_tlbs(vcpu->kvm);
1337 else
1338 kvm_mmu_flush_tlb(vcpu);
1339}
1340
12b7d28f
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1341static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
1342{
1343 u64 *spte = vcpu->last_pte_updated;
1344
1345 return !!(spte && (*spte & PT_ACCESSED_MASK));
1346}
1347
09072daf 1348void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
fe551881 1349 const u8 *new, int bytes)
da4a00f0 1350{
9b7a0325 1351 gfn_t gfn = gpa >> PAGE_SHIFT;
4db35314 1352 struct kvm_mmu_page *sp;
0e7bc4b9 1353 struct hlist_node *node, *n;
9b7a0325
AK
1354 struct hlist_head *bucket;
1355 unsigned index;
79539cec 1356 u64 entry;
9b7a0325 1357 u64 *spte;
9b7a0325 1358 unsigned offset = offset_in_page(gpa);
0e7bc4b9 1359 unsigned pte_size;
9b7a0325 1360 unsigned page_offset;
0e7bc4b9 1361 unsigned misaligned;
fce0657f 1362 unsigned quadrant;
9b7a0325 1363 int level;
86a5ba02 1364 int flooded = 0;
ac1b714e 1365 int npte;
9b7a0325 1366
da4a00f0 1367 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
4cee5764 1368 ++vcpu->kvm->stat.mmu_pte_write;
c7addb90 1369 kvm_mmu_audit(vcpu, "pre pte write");
12b7d28f
AK
1370 if (gfn == vcpu->last_pt_write_gfn
1371 && !last_updated_pte_accessed(vcpu)) {
86a5ba02
AK
1372 ++vcpu->last_pt_write_count;
1373 if (vcpu->last_pt_write_count >= 3)
1374 flooded = 1;
1375 } else {
1376 vcpu->last_pt_write_gfn = gfn;
1377 vcpu->last_pt_write_count = 1;
12b7d28f 1378 vcpu->last_pte_updated = NULL;
86a5ba02 1379 }
9b7a0325
AK
1380 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1381 bucket = &vcpu->kvm->mmu_page_hash[index];
4db35314
AK
1382 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
1383 if (sp->gfn != gfn || sp->role.metaphysical)
9b7a0325 1384 continue;
4db35314 1385 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
0e7bc4b9 1386 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
e925c5ba 1387 misaligned |= bytes < 4;
86a5ba02 1388 if (misaligned || flooded) {
0e7bc4b9
AK
1389 /*
1390 * Misaligned accesses are too much trouble to fix
1391 * up; also, they usually indicate a page is not used
1392 * as a page table.
86a5ba02
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1393 *
1394 * If we're seeing too many writes to a page,
1395 * it may no longer be a page table, or we may be
1396 * forking, in which case it is better to unmap the
1397 * page.
0e7bc4b9
AK
1398 */
1399 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
4db35314
AK
1400 gpa, bytes, sp->role.word);
1401 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1402 ++vcpu->kvm->stat.mmu_flooded;
0e7bc4b9
AK
1403 continue;
1404 }
9b7a0325 1405 page_offset = offset;
4db35314 1406 level = sp->role.level;
ac1b714e 1407 npte = 1;
4db35314 1408 if (sp->role.glevels == PT32_ROOT_LEVEL) {
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AK
1409 page_offset <<= 1; /* 32->64 */
1410 /*
1411 * A 32-bit pde maps 4MB while the shadow pdes map
1412 * only 2MB. So we need to double the offset again
1413 * and zap two pdes instead of one.
1414 */
1415 if (level == PT32_ROOT_LEVEL) {
6b8d0f9b 1416 page_offset &= ~7; /* kill rounding error */
ac1b714e
AK
1417 page_offset <<= 1;
1418 npte = 2;
1419 }
fce0657f 1420 quadrant = page_offset >> PAGE_SHIFT;
9b7a0325 1421 page_offset &= ~PAGE_MASK;
4db35314 1422 if (quadrant != sp->role.quadrant)
fce0657f 1423 continue;
9b7a0325 1424 }
4db35314 1425 spte = &sp->spt[page_offset / sizeof(*spte)];
ac1b714e 1426 while (npte--) {
79539cec 1427 entry = *spte;
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AK
1428 mmu_pte_write_zap_pte(vcpu, sp, spte);
1429 mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes,
c7addb90 1430 page_offset & (pte_size - 1));
79539cec 1431 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
ac1b714e 1432 ++spte;
9b7a0325 1433 }
9b7a0325 1434 }
c7addb90 1435 kvm_mmu_audit(vcpu, "post pte write");
da4a00f0
AK
1436}
1437
a436036b
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1438int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1439{
1440 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1441
f67a46f4 1442 return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
a436036b
AK
1443}
1444
22d95b12 1445void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
ebeace86
AK
1446{
1447 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
4db35314 1448 struct kvm_mmu_page *sp;
ebeace86 1449
4db35314
AK
1450 sp = container_of(vcpu->kvm->active_mmu_pages.prev,
1451 struct kvm_mmu_page, link);
1452 kvm_mmu_zap_page(vcpu->kvm, sp);
4cee5764 1453 ++vcpu->kvm->stat.mmu_recycled;
ebeace86
AK
1454 }
1455}
ebeace86 1456
3067714c
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1457int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
1458{
1459 int r;
1460 enum emulation_result er;
1461
1462 mutex_lock(&vcpu->kvm->lock);
1463 r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
1464 if (r < 0)
1465 goto out;
1466
1467 if (!r) {
1468 r = 1;
1469 goto out;
1470 }
1471
b733bfb5
AK
1472 r = mmu_topup_memory_caches(vcpu);
1473 if (r)
1474 goto out;
1475
3067714c
AK
1476 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
1477 mutex_unlock(&vcpu->kvm->lock);
1478
1479 switch (er) {
1480 case EMULATE_DONE:
1481 return 1;
1482 case EMULATE_DO_MMIO:
1483 ++vcpu->stat.mmio_exits;
1484 return 0;
1485 case EMULATE_FAIL:
1486 kvm_report_emulation_failure(vcpu, "pagetable");
1487 return 1;
1488 default:
1489 BUG();
1490 }
1491out:
1492 mutex_unlock(&vcpu->kvm->lock);
1493 return r;
1494}
1495EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
1496
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1497static void free_mmu_pages(struct kvm_vcpu *vcpu)
1498{
4db35314 1499 struct kvm_mmu_page *sp;
6aa8b732 1500
f51234c2 1501 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
4db35314
AK
1502 sp = container_of(vcpu->kvm->active_mmu_pages.next,
1503 struct kvm_mmu_page, link);
1504 kvm_mmu_zap_page(vcpu->kvm, sp);
f51234c2 1505 }
17ac10ad 1506 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK
1507}
1508
1509static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1510{
17ac10ad 1511 struct page *page;
6aa8b732
AK
1512 int i;
1513
1514 ASSERT(vcpu);
1515
82ce2c96
IE
1516 if (vcpu->kvm->n_requested_mmu_pages)
1517 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
1518 else
1519 vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
17ac10ad
AK
1520 /*
1521 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1522 * Therefore we need to allocate shadow page tables in the first
1523 * 4GB of memory, which happens to fit the DMA32 zone.
1524 */
1525 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1526 if (!page)
1527 goto error_1;
1528 vcpu->mmu.pae_root = page_address(page);
1529 for (i = 0; i < 4; ++i)
1530 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1531
6aa8b732
AK
1532 return 0;
1533
1534error_1:
1535 free_mmu_pages(vcpu);
1536 return -ENOMEM;
1537}
1538
8018c27b 1539int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1540{
6aa8b732
AK
1541 ASSERT(vcpu);
1542 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
6aa8b732 1543
8018c27b
IM
1544 return alloc_mmu_pages(vcpu);
1545}
6aa8b732 1546
8018c27b
IM
1547int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1548{
1549 ASSERT(vcpu);
1550 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
2c264957 1551
8018c27b 1552 return init_kvm_mmu(vcpu);
6aa8b732
AK
1553}
1554
1555void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1556{
1557 ASSERT(vcpu);
1558
1559 destroy_kvm_mmu(vcpu);
1560 free_mmu_pages(vcpu);
714b93da 1561 mmu_free_memory_caches(vcpu);
6aa8b732
AK
1562}
1563
90cb0529 1564void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
6aa8b732 1565{
4db35314 1566 struct kvm_mmu_page *sp;
6aa8b732 1567
4db35314 1568 list_for_each_entry(sp, &kvm->active_mmu_pages, link) {
6aa8b732
AK
1569 int i;
1570 u64 *pt;
1571
4db35314 1572 if (!test_bit(slot, &sp->slot_bitmap))
6aa8b732
AK
1573 continue;
1574
4db35314 1575 pt = sp->spt;
6aa8b732
AK
1576 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1577 /* avoid RMW */
9647c14c 1578 if (pt[i] & PT_WRITABLE_MASK)
6aa8b732 1579 pt[i] &= ~PT_WRITABLE_MASK;
6aa8b732
AK
1580 }
1581}
37a7d8b0 1582
90cb0529 1583void kvm_mmu_zap_all(struct kvm *kvm)
e0fa826f 1584{
4db35314 1585 struct kvm_mmu_page *sp, *node;
e0fa826f 1586
4db35314
AK
1587 list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link)
1588 kvm_mmu_zap_page(kvm, sp);
e0fa826f 1589
90cb0529 1590 kvm_flush_remote_tlbs(kvm);
e0fa826f
DL
1591}
1592
b5a33a75
AK
1593void kvm_mmu_module_exit(void)
1594{
1595 if (pte_chain_cache)
1596 kmem_cache_destroy(pte_chain_cache);
1597 if (rmap_desc_cache)
1598 kmem_cache_destroy(rmap_desc_cache);
d3d25b04
AK
1599 if (mmu_page_header_cache)
1600 kmem_cache_destroy(mmu_page_header_cache);
b5a33a75
AK
1601}
1602
1603int kvm_mmu_module_init(void)
1604{
1605 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
1606 sizeof(struct kvm_pte_chain),
20c2df83 1607 0, 0, NULL);
b5a33a75
AK
1608 if (!pte_chain_cache)
1609 goto nomem;
1610 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
1611 sizeof(struct kvm_rmap_desc),
20c2df83 1612 0, 0, NULL);
b5a33a75
AK
1613 if (!rmap_desc_cache)
1614 goto nomem;
1615
d3d25b04
AK
1616 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
1617 sizeof(struct kvm_mmu_page),
20c2df83 1618 0, 0, NULL);
d3d25b04
AK
1619 if (!mmu_page_header_cache)
1620 goto nomem;
1621
b5a33a75
AK
1622 return 0;
1623
1624nomem:
1625 kvm_mmu_module_exit();
1626 return -ENOMEM;
1627}
1628
3ad82a7e
ZX
1629/*
1630 * Caculate mmu pages needed for kvm.
1631 */
1632unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
1633{
1634 int i;
1635 unsigned int nr_mmu_pages;
1636 unsigned int nr_pages = 0;
1637
1638 for (i = 0; i < kvm->nmemslots; i++)
1639 nr_pages += kvm->memslots[i].npages;
1640
1641 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
1642 nr_mmu_pages = max(nr_mmu_pages,
1643 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
1644
1645 return nr_mmu_pages;
1646}
1647
37a7d8b0
AK
1648#ifdef AUDIT
1649
1650static const char *audit_msg;
1651
1652static gva_t canonicalize(gva_t gva)
1653{
1654#ifdef CONFIG_X86_64
1655 gva = (long long)(gva << 16) >> 16;
1656#endif
1657 return gva;
1658}
1659
1660static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1661 gva_t va, int level)
1662{
1663 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1664 int i;
1665 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1666
1667 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1668 u64 ent = pt[i];
1669
c7addb90 1670 if (ent == shadow_trap_nonpresent_pte)
37a7d8b0
AK
1671 continue;
1672
1673 va = canonicalize(va);
c7addb90
AK
1674 if (level > 1) {
1675 if (ent == shadow_notrap_nonpresent_pte)
1676 printk(KERN_ERR "audit: (%s) nontrapping pte"
1677 " in nonleaf level: levels %d gva %lx"
1678 " level %d pte %llx\n", audit_msg,
1679 vcpu->mmu.root_level, va, level, ent);
1680
37a7d8b0 1681 audit_mappings_page(vcpu, ent, va, level - 1);
c7addb90 1682 } else {
37a7d8b0 1683 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1d28f5f4
AK
1684 struct page *page = gpa_to_page(vcpu, gpa);
1685 hpa_t hpa = page_to_phys(page);
37a7d8b0 1686
c7addb90 1687 if (is_shadow_present_pte(ent)
37a7d8b0 1688 && (ent & PT64_BASE_ADDR_MASK) != hpa)
c7addb90
AK
1689 printk(KERN_ERR "xx audit error: (%s) levels %d"
1690 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
37a7d8b0 1691 audit_msg, vcpu->mmu.root_level,
d77c26fc
MD
1692 va, gpa, hpa, ent,
1693 is_shadow_present_pte(ent));
c7addb90
AK
1694 else if (ent == shadow_notrap_nonpresent_pte
1695 && !is_error_hpa(hpa))
1696 printk(KERN_ERR "audit: (%s) notrap shadow,"
1697 " valid guest gva %lx\n", audit_msg, va);
b4231d61 1698 kvm_release_page_clean(page);
c7addb90 1699
37a7d8b0
AK
1700 }
1701 }
1702}
1703
1704static void audit_mappings(struct kvm_vcpu *vcpu)
1705{
1ea252af 1706 unsigned i;
37a7d8b0
AK
1707
1708 if (vcpu->mmu.root_level == 4)
1709 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1710 else
1711 for (i = 0; i < 4; ++i)
1712 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1713 audit_mappings_page(vcpu,
1714 vcpu->mmu.pae_root[i],
1715 i << 30,
1716 2);
1717}
1718
1719static int count_rmaps(struct kvm_vcpu *vcpu)
1720{
1721 int nmaps = 0;
1722 int i, j, k;
1723
1724 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1725 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1726 struct kvm_rmap_desc *d;
1727
1728 for (j = 0; j < m->npages; ++j) {
290fc38d 1729 unsigned long *rmapp = &m->rmap[j];
37a7d8b0 1730
290fc38d 1731 if (!*rmapp)
37a7d8b0 1732 continue;
290fc38d 1733 if (!(*rmapp & 1)) {
37a7d8b0
AK
1734 ++nmaps;
1735 continue;
1736 }
290fc38d 1737 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
37a7d8b0
AK
1738 while (d) {
1739 for (k = 0; k < RMAP_EXT; ++k)
1740 if (d->shadow_ptes[k])
1741 ++nmaps;
1742 else
1743 break;
1744 d = d->more;
1745 }
1746 }
1747 }
1748 return nmaps;
1749}
1750
1751static int count_writable_mappings(struct kvm_vcpu *vcpu)
1752{
1753 int nmaps = 0;
4db35314 1754 struct kvm_mmu_page *sp;
37a7d8b0
AK
1755 int i;
1756
4db35314
AK
1757 list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
1758 u64 *pt = sp->spt;
37a7d8b0 1759
4db35314 1760 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
37a7d8b0
AK
1761 continue;
1762
1763 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1764 u64 ent = pt[i];
1765
1766 if (!(ent & PT_PRESENT_MASK))
1767 continue;
1768 if (!(ent & PT_WRITABLE_MASK))
1769 continue;
1770 ++nmaps;
1771 }
1772 }
1773 return nmaps;
1774}
1775
1776static void audit_rmap(struct kvm_vcpu *vcpu)
1777{
1778 int n_rmap = count_rmaps(vcpu);
1779 int n_actual = count_writable_mappings(vcpu);
1780
1781 if (n_rmap != n_actual)
1782 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1783 __FUNCTION__, audit_msg, n_rmap, n_actual);
1784}
1785
1786static void audit_write_protection(struct kvm_vcpu *vcpu)
1787{
4db35314 1788 struct kvm_mmu_page *sp;
290fc38d
IE
1789 struct kvm_memory_slot *slot;
1790 unsigned long *rmapp;
1791 gfn_t gfn;
37a7d8b0 1792
4db35314
AK
1793 list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) {
1794 if (sp->role.metaphysical)
37a7d8b0
AK
1795 continue;
1796
4db35314
AK
1797 slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
1798 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
290fc38d
IE
1799 rmapp = &slot->rmap[gfn - slot->base_gfn];
1800 if (*rmapp)
37a7d8b0
AK
1801 printk(KERN_ERR "%s: (%s) shadow page has writable"
1802 " mappings: gfn %lx role %x\n",
4db35314
AK
1803 __FUNCTION__, audit_msg, sp->gfn,
1804 sp->role.word);
37a7d8b0
AK
1805 }
1806}
1807
1808static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1809{
1810 int olddbg = dbg;
1811
1812 dbg = 0;
1813 audit_msg = msg;
1814 audit_rmap(vcpu);
1815 audit_write_protection(vcpu);
1816 audit_mappings(vcpu);
1817 dbg = olddbg;
1818}
1819
1820#endif
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