Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
21 | #include "kvm.h" | |
34c16eec | 22 | #include "x86.h" |
e495606d | 23 | |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
6aa8b732 | 30 | |
e495606d AK |
31 | #include <asm/page.h> |
32 | #include <asm/cmpxchg.h> | |
4e542370 | 33 | #include <asm/io.h> |
6aa8b732 | 34 | |
37a7d8b0 AK |
35 | #undef MMU_DEBUG |
36 | ||
37 | #undef AUDIT | |
38 | ||
39 | #ifdef AUDIT | |
40 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
41 | #else | |
42 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
43 | #endif | |
44 | ||
45 | #ifdef MMU_DEBUG | |
46 | ||
47 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
48 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
49 | ||
50 | #else | |
51 | ||
52 | #define pgprintk(x...) do { } while (0) | |
53 | #define rmap_printk(x...) do { } while (0) | |
54 | ||
55 | #endif | |
56 | ||
57 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
58 | static int dbg = 1; | |
59 | #endif | |
6aa8b732 | 60 | |
d6c69ee9 YD |
61 | #ifndef MMU_DEBUG |
62 | #define ASSERT(x) do { } while (0) | |
63 | #else | |
6aa8b732 AK |
64 | #define ASSERT(x) \ |
65 | if (!(x)) { \ | |
66 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
67 | __FILE__, __LINE__, #x); \ | |
68 | } | |
d6c69ee9 | 69 | #endif |
6aa8b732 | 70 | |
cea0f0e7 AK |
71 | #define PT64_PT_BITS 9 |
72 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
73 | #define PT32_PT_BITS 10 | |
74 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
75 | |
76 | #define PT_WRITABLE_SHIFT 1 | |
77 | ||
78 | #define PT_PRESENT_MASK (1ULL << 0) | |
79 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
80 | #define PT_USER_MASK (1ULL << 2) | |
81 | #define PT_PWT_MASK (1ULL << 3) | |
82 | #define PT_PCD_MASK (1ULL << 4) | |
83 | #define PT_ACCESSED_MASK (1ULL << 5) | |
84 | #define PT_DIRTY_MASK (1ULL << 6) | |
85 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
86 | #define PT_PAT_MASK (1ULL << 7) | |
87 | #define PT_GLOBAL_MASK (1ULL << 8) | |
fe135d2c AK |
88 | #define PT64_NX_SHIFT 63 |
89 | #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT) | |
6aa8b732 AK |
90 | |
91 | #define PT_PAT_SHIFT 7 | |
92 | #define PT_DIR_PAT_SHIFT 12 | |
93 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
94 | ||
95 | #define PT32_DIR_PSE36_SIZE 4 | |
96 | #define PT32_DIR_PSE36_SHIFT 13 | |
d77c26fc MD |
97 | #define PT32_DIR_PSE36_MASK \ |
98 | (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
6aa8b732 AK |
99 | |
100 | ||
6aa8b732 AK |
101 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
102 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
103 | ||
6aa8b732 AK |
104 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
105 | ||
6aa8b732 AK |
106 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
107 | ||
108 | #define PT64_LEVEL_BITS 9 | |
109 | ||
110 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 111 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
112 | |
113 | #define PT64_LEVEL_MASK(level) \ | |
114 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
115 | ||
116 | #define PT64_INDEX(address, level)\ | |
117 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
118 | ||
119 | ||
120 | #define PT32_LEVEL_BITS 10 | |
121 | ||
122 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 123 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
124 | |
125 | #define PT32_LEVEL_MASK(level) \ | |
126 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
127 | ||
128 | #define PT32_INDEX(address, level)\ | |
129 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
130 | ||
131 | ||
27aba766 | 132 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
133 | #define PT64_DIR_BASE_ADDR_MASK \ |
134 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
135 | ||
136 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
137 | #define PT32_DIR_BASE_ADDR_MASK \ | |
138 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
139 | ||
79539cec AK |
140 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
141 | | PT64_NX_MASK) | |
6aa8b732 AK |
142 | |
143 | #define PFERR_PRESENT_MASK (1U << 0) | |
144 | #define PFERR_WRITE_MASK (1U << 1) | |
145 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 146 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
147 | |
148 | #define PT64_ROOT_LEVEL 4 | |
149 | #define PT32_ROOT_LEVEL 2 | |
150 | #define PT32E_ROOT_LEVEL 3 | |
151 | ||
152 | #define PT_DIRECTORY_LEVEL 2 | |
153 | #define PT_PAGE_TABLE_LEVEL 1 | |
154 | ||
cd4a4e53 AK |
155 | #define RMAP_EXT 4 |
156 | ||
fe135d2c AK |
157 | #define ACC_EXEC_MASK 1 |
158 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
159 | #define ACC_USER_MASK PT_USER_MASK | |
160 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
161 | ||
cd4a4e53 AK |
162 | struct kvm_rmap_desc { |
163 | u64 *shadow_ptes[RMAP_EXT]; | |
164 | struct kvm_rmap_desc *more; | |
165 | }; | |
166 | ||
b5a33a75 AK |
167 | static struct kmem_cache *pte_chain_cache; |
168 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 169 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 170 | |
c7addb90 AK |
171 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
172 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
173 | ||
174 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
175 | { | |
176 | shadow_trap_nonpresent_pte = trap_pte; | |
177 | shadow_notrap_nonpresent_pte = notrap_pte; | |
178 | } | |
179 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
180 | ||
6aa8b732 AK |
181 | static int is_write_protection(struct kvm_vcpu *vcpu) |
182 | { | |
707d92fa | 183 | return vcpu->cr0 & X86_CR0_WP; |
6aa8b732 AK |
184 | } |
185 | ||
186 | static int is_cpuid_PSE36(void) | |
187 | { | |
188 | return 1; | |
189 | } | |
190 | ||
73b1087e AK |
191 | static int is_nx(struct kvm_vcpu *vcpu) |
192 | { | |
193 | return vcpu->shadow_efer & EFER_NX; | |
194 | } | |
195 | ||
6aa8b732 AK |
196 | static int is_present_pte(unsigned long pte) |
197 | { | |
198 | return pte & PT_PRESENT_MASK; | |
199 | } | |
200 | ||
c7addb90 AK |
201 | static int is_shadow_present_pte(u64 pte) |
202 | { | |
203 | pte &= ~PT_SHADOW_IO_MARK; | |
204 | return pte != shadow_trap_nonpresent_pte | |
205 | && pte != shadow_notrap_nonpresent_pte; | |
206 | } | |
207 | ||
6aa8b732 AK |
208 | static int is_writeble_pte(unsigned long pte) |
209 | { | |
210 | return pte & PT_WRITABLE_MASK; | |
211 | } | |
212 | ||
e3c5e7ec AK |
213 | static int is_dirty_pte(unsigned long pte) |
214 | { | |
215 | return pte & PT_DIRTY_MASK; | |
216 | } | |
217 | ||
6aa8b732 AK |
218 | static int is_io_pte(unsigned long pte) |
219 | { | |
220 | return pte & PT_SHADOW_IO_MARK; | |
221 | } | |
222 | ||
cd4a4e53 AK |
223 | static int is_rmap_pte(u64 pte) |
224 | { | |
9647c14c IE |
225 | return pte != shadow_trap_nonpresent_pte |
226 | && pte != shadow_notrap_nonpresent_pte; | |
cd4a4e53 AK |
227 | } |
228 | ||
da928521 AK |
229 | static gfn_t pse36_gfn_delta(u32 gpte) |
230 | { | |
231 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
232 | ||
233 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
234 | } | |
235 | ||
e663ee64 AK |
236 | static void set_shadow_pte(u64 *sptep, u64 spte) |
237 | { | |
238 | #ifdef CONFIG_X86_64 | |
239 | set_64bit((unsigned long *)sptep, spte); | |
240 | #else | |
241 | set_64bit((unsigned long long *)sptep, spte); | |
242 | #endif | |
243 | } | |
244 | ||
e2dec939 | 245 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 246 | struct kmem_cache *base_cache, int min) |
714b93da AK |
247 | { |
248 | void *obj; | |
249 | ||
250 | if (cache->nobjs >= min) | |
e2dec939 | 251 | return 0; |
714b93da | 252 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 253 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 254 | if (!obj) |
e2dec939 | 255 | return -ENOMEM; |
714b93da AK |
256 | cache->objects[cache->nobjs++] = obj; |
257 | } | |
e2dec939 | 258 | return 0; |
714b93da AK |
259 | } |
260 | ||
261 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
262 | { | |
263 | while (mc->nobjs) | |
264 | kfree(mc->objects[--mc->nobjs]); | |
265 | } | |
266 | ||
c1158e63 | 267 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 268 | int min) |
c1158e63 AK |
269 | { |
270 | struct page *page; | |
271 | ||
272 | if (cache->nobjs >= min) | |
273 | return 0; | |
274 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 275 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
276 | if (!page) |
277 | return -ENOMEM; | |
278 | set_page_private(page, 0); | |
279 | cache->objects[cache->nobjs++] = page_address(page); | |
280 | } | |
281 | return 0; | |
282 | } | |
283 | ||
284 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
285 | { | |
286 | while (mc->nobjs) | |
c4d198d5 | 287 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
288 | } |
289 | ||
2e3e5882 | 290 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 291 | { |
e2dec939 AK |
292 | int r; |
293 | ||
2e3e5882 | 294 | kvm_mmu_free_some_pages(vcpu); |
e2dec939 | 295 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, |
2e3e5882 | 296 | pte_chain_cache, 4); |
e2dec939 AK |
297 | if (r) |
298 | goto out; | |
299 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
2e3e5882 | 300 | rmap_desc_cache, 1); |
d3d25b04 AK |
301 | if (r) |
302 | goto out; | |
290fc38d | 303 | r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8); |
d3d25b04 AK |
304 | if (r) |
305 | goto out; | |
306 | r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache, | |
2e3e5882 | 307 | mmu_page_header_cache, 4); |
e2dec939 AK |
308 | out: |
309 | return r; | |
714b93da AK |
310 | } |
311 | ||
312 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
313 | { | |
314 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
315 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
c1158e63 | 316 | mmu_free_memory_cache_page(&vcpu->mmu_page_cache); |
d3d25b04 | 317 | mmu_free_memory_cache(&vcpu->mmu_page_header_cache); |
714b93da AK |
318 | } |
319 | ||
320 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
321 | size_t size) | |
322 | { | |
323 | void *p; | |
324 | ||
325 | BUG_ON(!mc->nobjs); | |
326 | p = mc->objects[--mc->nobjs]; | |
327 | memset(p, 0, size); | |
328 | return p; | |
329 | } | |
330 | ||
714b93da AK |
331 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
332 | { | |
333 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
334 | sizeof(struct kvm_pte_chain)); | |
335 | } | |
336 | ||
90cb0529 | 337 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 338 | { |
90cb0529 | 339 | kfree(pc); |
714b93da AK |
340 | } |
341 | ||
342 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
343 | { | |
344 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
345 | sizeof(struct kvm_rmap_desc)); | |
346 | } | |
347 | ||
90cb0529 | 348 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 349 | { |
90cb0529 | 350 | kfree(rd); |
714b93da AK |
351 | } |
352 | ||
290fc38d IE |
353 | /* |
354 | * Take gfn and return the reverse mapping to it. | |
355 | * Note: gfn must be unaliased before this function get called | |
356 | */ | |
357 | ||
358 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn) | |
359 | { | |
360 | struct kvm_memory_slot *slot; | |
361 | ||
362 | slot = gfn_to_memslot(kvm, gfn); | |
363 | return &slot->rmap[gfn - slot->base_gfn]; | |
364 | } | |
365 | ||
cd4a4e53 AK |
366 | /* |
367 | * Reverse mapping data structures: | |
368 | * | |
290fc38d IE |
369 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
370 | * that points to page_address(page). | |
cd4a4e53 | 371 | * |
290fc38d IE |
372 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
373 | * containing more mappings. | |
cd4a4e53 | 374 | */ |
290fc38d | 375 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
cd4a4e53 | 376 | { |
4db35314 | 377 | struct kvm_mmu_page *sp; |
cd4a4e53 | 378 | struct kvm_rmap_desc *desc; |
290fc38d | 379 | unsigned long *rmapp; |
cd4a4e53 AK |
380 | int i; |
381 | ||
382 | if (!is_rmap_pte(*spte)) | |
383 | return; | |
290fc38d | 384 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
385 | sp = page_header(__pa(spte)); |
386 | sp->gfns[spte - sp->spt] = gfn; | |
290fc38d IE |
387 | rmapp = gfn_to_rmap(vcpu->kvm, gfn); |
388 | if (!*rmapp) { | |
cd4a4e53 | 389 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
390 | *rmapp = (unsigned long)spte; |
391 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 392 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 393 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 394 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 395 | desc->shadow_ptes[1] = spte; |
290fc38d | 396 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
397 | } else { |
398 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 399 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
400 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
401 | desc = desc->more; | |
402 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 403 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
404 | desc = desc->more; |
405 | } | |
406 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
407 | ; | |
408 | desc->shadow_ptes[i] = spte; | |
409 | } | |
410 | } | |
411 | ||
290fc38d | 412 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
413 | struct kvm_rmap_desc *desc, |
414 | int i, | |
415 | struct kvm_rmap_desc *prev_desc) | |
416 | { | |
417 | int j; | |
418 | ||
419 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
420 | ; | |
421 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 422 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
423 | if (j != 0) |
424 | return; | |
425 | if (!prev_desc && !desc->more) | |
290fc38d | 426 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
427 | else |
428 | if (prev_desc) | |
429 | prev_desc->more = desc->more; | |
430 | else | |
290fc38d | 431 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 432 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
433 | } |
434 | ||
290fc38d | 435 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 436 | { |
cd4a4e53 AK |
437 | struct kvm_rmap_desc *desc; |
438 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 439 | struct kvm_mmu_page *sp; |
76c35c6e | 440 | struct page *page; |
290fc38d | 441 | unsigned long *rmapp; |
cd4a4e53 AK |
442 | int i; |
443 | ||
444 | if (!is_rmap_pte(*spte)) | |
445 | return; | |
4db35314 | 446 | sp = page_header(__pa(spte)); |
76c35c6e | 447 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); |
448353ca | 448 | mark_page_accessed(page); |
b4231d61 | 449 | if (is_writeble_pte(*spte)) |
76c35c6e | 450 | kvm_release_page_dirty(page); |
b4231d61 | 451 | else |
76c35c6e | 452 | kvm_release_page_clean(page); |
4db35314 | 453 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]); |
290fc38d | 454 | if (!*rmapp) { |
cd4a4e53 AK |
455 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
456 | BUG(); | |
290fc38d | 457 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 458 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 459 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
460 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
461 | spte, *spte); | |
462 | BUG(); | |
463 | } | |
290fc38d | 464 | *rmapp = 0; |
cd4a4e53 AK |
465 | } else { |
466 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 467 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
468 | prev_desc = NULL; |
469 | while (desc) { | |
470 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
471 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 472 | rmap_desc_remove_entry(rmapp, |
714b93da | 473 | desc, i, |
cd4a4e53 AK |
474 | prev_desc); |
475 | return; | |
476 | } | |
477 | prev_desc = desc; | |
478 | desc = desc->more; | |
479 | } | |
480 | BUG(); | |
481 | } | |
482 | } | |
483 | ||
98348e95 | 484 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 485 | { |
374cbac0 | 486 | struct kvm_rmap_desc *desc; |
98348e95 IE |
487 | struct kvm_rmap_desc *prev_desc; |
488 | u64 *prev_spte; | |
489 | int i; | |
490 | ||
491 | if (!*rmapp) | |
492 | return NULL; | |
493 | else if (!(*rmapp & 1)) { | |
494 | if (!spte) | |
495 | return (u64 *)*rmapp; | |
496 | return NULL; | |
497 | } | |
498 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
499 | prev_desc = NULL; | |
500 | prev_spte = NULL; | |
501 | while (desc) { | |
502 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
503 | if (prev_spte == spte) | |
504 | return desc->shadow_ptes[i]; | |
505 | prev_spte = desc->shadow_ptes[i]; | |
506 | } | |
507 | desc = desc->more; | |
508 | } | |
509 | return NULL; | |
510 | } | |
511 | ||
512 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
513 | { | |
290fc38d | 514 | unsigned long *rmapp; |
374cbac0 AK |
515 | u64 *spte; |
516 | ||
4a4c9924 AL |
517 | gfn = unalias_gfn(kvm, gfn); |
518 | rmapp = gfn_to_rmap(kvm, gfn); | |
374cbac0 | 519 | |
98348e95 IE |
520 | spte = rmap_next(kvm, rmapp, NULL); |
521 | while (spte) { | |
374cbac0 | 522 | BUG_ON(!spte); |
374cbac0 | 523 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 524 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
9647c14c IE |
525 | if (is_writeble_pte(*spte)) |
526 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); | |
4a4c9924 | 527 | kvm_flush_remote_tlbs(kvm); |
9647c14c | 528 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 AK |
529 | } |
530 | } | |
531 | ||
d6c69ee9 | 532 | #ifdef MMU_DEBUG |
47ad8e68 | 533 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 534 | { |
139bdb2d AK |
535 | u64 *pos; |
536 | u64 *end; | |
537 | ||
47ad8e68 | 538 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
c7addb90 | 539 | if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) { |
139bdb2d AK |
540 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, |
541 | pos, *pos); | |
6aa8b732 | 542 | return 0; |
139bdb2d | 543 | } |
6aa8b732 AK |
544 | return 1; |
545 | } | |
d6c69ee9 | 546 | #endif |
6aa8b732 | 547 | |
4db35314 | 548 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 549 | { |
4db35314 AK |
550 | ASSERT(is_empty_shadow_page(sp->spt)); |
551 | list_del(&sp->link); | |
552 | __free_page(virt_to_page(sp->spt)); | |
553 | __free_page(virt_to_page(sp->gfns)); | |
554 | kfree(sp); | |
90cb0529 | 555 | ++kvm->n_free_mmu_pages; |
260746c0 AK |
556 | } |
557 | ||
cea0f0e7 AK |
558 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
559 | { | |
560 | return gfn; | |
561 | } | |
562 | ||
25c0de2c AK |
563 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
564 | u64 *parent_pte) | |
6aa8b732 | 565 | { |
4db35314 | 566 | struct kvm_mmu_page *sp; |
6aa8b732 | 567 | |
d3d25b04 | 568 | if (!vcpu->kvm->n_free_mmu_pages) |
25c0de2c | 569 | return NULL; |
6aa8b732 | 570 | |
4db35314 AK |
571 | sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp); |
572 | sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
573 | sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
574 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); | |
575 | list_add(&sp->link, &vcpu->kvm->active_mmu_pages); | |
576 | ASSERT(is_empty_shadow_page(sp->spt)); | |
577 | sp->slot_bitmap = 0; | |
578 | sp->multimapped = 0; | |
579 | sp->parent_pte = parent_pte; | |
ebeace86 | 580 | --vcpu->kvm->n_free_mmu_pages; |
4db35314 | 581 | return sp; |
6aa8b732 AK |
582 | } |
583 | ||
714b93da | 584 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 585 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
586 | { |
587 | struct kvm_pte_chain *pte_chain; | |
588 | struct hlist_node *node; | |
589 | int i; | |
590 | ||
591 | if (!parent_pte) | |
592 | return; | |
4db35314 AK |
593 | if (!sp->multimapped) { |
594 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
595 | |
596 | if (!old) { | |
4db35314 | 597 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
598 | return; |
599 | } | |
4db35314 | 600 | sp->multimapped = 1; |
714b93da | 601 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
602 | INIT_HLIST_HEAD(&sp->parent_ptes); |
603 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
604 | pte_chain->parent_ptes[0] = old; |
605 | } | |
4db35314 | 606 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
607 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
608 | continue; | |
609 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
610 | if (!pte_chain->parent_ptes[i]) { | |
611 | pte_chain->parent_ptes[i] = parent_pte; | |
612 | return; | |
613 | } | |
614 | } | |
714b93da | 615 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 616 | BUG_ON(!pte_chain); |
4db35314 | 617 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
618 | pte_chain->parent_ptes[0] = parent_pte; |
619 | } | |
620 | ||
4db35314 | 621 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
622 | u64 *parent_pte) |
623 | { | |
624 | struct kvm_pte_chain *pte_chain; | |
625 | struct hlist_node *node; | |
626 | int i; | |
627 | ||
4db35314 AK |
628 | if (!sp->multimapped) { |
629 | BUG_ON(sp->parent_pte != parent_pte); | |
630 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
631 | return; |
632 | } | |
4db35314 | 633 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
634 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
635 | if (!pte_chain->parent_ptes[i]) | |
636 | break; | |
637 | if (pte_chain->parent_ptes[i] != parent_pte) | |
638 | continue; | |
697fe2e2 AK |
639 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
640 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
641 | pte_chain->parent_ptes[i] |
642 | = pte_chain->parent_ptes[i + 1]; | |
643 | ++i; | |
644 | } | |
645 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
646 | if (i == 0) { |
647 | hlist_del(&pte_chain->link); | |
90cb0529 | 648 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
649 | if (hlist_empty(&sp->parent_ptes)) { |
650 | sp->multimapped = 0; | |
651 | sp->parent_pte = NULL; | |
697fe2e2 AK |
652 | } |
653 | } | |
cea0f0e7 AK |
654 | return; |
655 | } | |
656 | BUG(); | |
657 | } | |
658 | ||
4db35314 | 659 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
660 | { |
661 | unsigned index; | |
662 | struct hlist_head *bucket; | |
4db35314 | 663 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
664 | struct hlist_node *node; |
665 | ||
666 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
667 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 668 | bucket = &kvm->mmu_page_hash[index]; |
4db35314 AK |
669 | hlist_for_each_entry(sp, node, bucket, hash_link) |
670 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
cea0f0e7 | 671 | pgprintk("%s: found role %x\n", |
4db35314 AK |
672 | __FUNCTION__, sp->role.word); |
673 | return sp; | |
cea0f0e7 AK |
674 | } |
675 | return NULL; | |
676 | } | |
677 | ||
678 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
679 | gfn_t gfn, | |
680 | gva_t gaddr, | |
681 | unsigned level, | |
682 | int metaphysical, | |
41074d07 | 683 | unsigned access, |
cea0f0e7 AK |
684 | u64 *parent_pte) |
685 | { | |
686 | union kvm_mmu_page_role role; | |
687 | unsigned index; | |
688 | unsigned quadrant; | |
689 | struct hlist_head *bucket; | |
4db35314 | 690 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
691 | struct hlist_node *node; |
692 | ||
693 | role.word = 0; | |
694 | role.glevels = vcpu->mmu.root_level; | |
695 | role.level = level; | |
696 | role.metaphysical = metaphysical; | |
41074d07 | 697 | role.access = access; |
cea0f0e7 AK |
698 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
699 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
700 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
701 | role.quadrant = quadrant; | |
702 | } | |
703 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
704 | gfn, role.word); | |
705 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
706 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
4db35314 AK |
707 | hlist_for_each_entry(sp, node, bucket, hash_link) |
708 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
709 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
cea0f0e7 | 710 | pgprintk("%s: found\n", __FUNCTION__); |
4db35314 | 711 | return sp; |
cea0f0e7 | 712 | } |
4db35314 AK |
713 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
714 | if (!sp) | |
715 | return sp; | |
cea0f0e7 | 716 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); |
4db35314 AK |
717 | sp->gfn = gfn; |
718 | sp->role = role; | |
719 | hlist_add_head(&sp->hash_link, bucket); | |
720 | vcpu->mmu.prefetch_page(vcpu, sp); | |
374cbac0 | 721 | if (!metaphysical) |
4a4c9924 | 722 | rmap_write_protect(vcpu->kvm, gfn); |
4db35314 | 723 | return sp; |
cea0f0e7 AK |
724 | } |
725 | ||
90cb0529 | 726 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 727 | struct kvm_mmu_page *sp) |
a436036b | 728 | { |
697fe2e2 AK |
729 | unsigned i; |
730 | u64 *pt; | |
731 | u64 ent; | |
732 | ||
4db35314 | 733 | pt = sp->spt; |
697fe2e2 | 734 | |
4db35314 | 735 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 736 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 737 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 738 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 739 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 740 | } |
90cb0529 | 741 | kvm_flush_remote_tlbs(kvm); |
697fe2e2 AK |
742 | return; |
743 | } | |
744 | ||
745 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
746 | ent = pt[i]; | |
747 | ||
c7addb90 AK |
748 | pt[i] = shadow_trap_nonpresent_pte; |
749 | if (!is_shadow_present_pte(ent)) | |
697fe2e2 AK |
750 | continue; |
751 | ent &= PT64_BASE_ADDR_MASK; | |
90cb0529 | 752 | mmu_page_remove_parent_pte(page_header(ent), &pt[i]); |
697fe2e2 | 753 | } |
90cb0529 | 754 | kvm_flush_remote_tlbs(kvm); |
a436036b AK |
755 | } |
756 | ||
4db35314 | 757 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 758 | { |
4db35314 | 759 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
760 | } |
761 | ||
12b7d28f AK |
762 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
763 | { | |
764 | int i; | |
765 | ||
766 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
767 | if (kvm->vcpus[i]) | |
768 | kvm->vcpus[i]->last_pte_updated = NULL; | |
769 | } | |
770 | ||
4db35314 | 771 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
772 | { |
773 | u64 *parent_pte; | |
774 | ||
4cee5764 | 775 | ++kvm->stat.mmu_shadow_zapped; |
4db35314 AK |
776 | while (sp->multimapped || sp->parent_pte) { |
777 | if (!sp->multimapped) | |
778 | parent_pte = sp->parent_pte; | |
a436036b AK |
779 | else { |
780 | struct kvm_pte_chain *chain; | |
781 | ||
4db35314 | 782 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
783 | struct kvm_pte_chain, link); |
784 | parent_pte = chain->parent_ptes[0]; | |
785 | } | |
697fe2e2 | 786 | BUG_ON(!parent_pte); |
4db35314 | 787 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 788 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 789 | } |
4db35314 AK |
790 | kvm_mmu_page_unlink_children(kvm, sp); |
791 | if (!sp->root_count) { | |
792 | hlist_del(&sp->hash_link); | |
793 | kvm_mmu_free_page(kvm, sp); | |
36868f7b | 794 | } else |
4db35314 | 795 | list_move(&sp->link, &kvm->active_mmu_pages); |
12b7d28f | 796 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
797 | } |
798 | ||
82ce2c96 IE |
799 | /* |
800 | * Changing the number of mmu pages allocated to the vm | |
801 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
802 | */ | |
803 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
804 | { | |
805 | /* | |
806 | * If we set the number of mmu pages to be smaller be than the | |
807 | * number of actived pages , we must to free some mmu pages before we | |
808 | * change the value | |
809 | */ | |
810 | ||
811 | if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) > | |
812 | kvm_nr_mmu_pages) { | |
813 | int n_used_mmu_pages = kvm->n_alloc_mmu_pages | |
814 | - kvm->n_free_mmu_pages; | |
815 | ||
816 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
817 | struct kvm_mmu_page *page; | |
818 | ||
819 | page = container_of(kvm->active_mmu_pages.prev, | |
820 | struct kvm_mmu_page, link); | |
821 | kvm_mmu_zap_page(kvm, page); | |
822 | n_used_mmu_pages--; | |
823 | } | |
824 | kvm->n_free_mmu_pages = 0; | |
825 | } | |
826 | else | |
827 | kvm->n_free_mmu_pages += kvm_nr_mmu_pages | |
828 | - kvm->n_alloc_mmu_pages; | |
829 | ||
830 | kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages; | |
831 | } | |
832 | ||
f67a46f4 | 833 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
834 | { |
835 | unsigned index; | |
836 | struct hlist_head *bucket; | |
4db35314 | 837 | struct kvm_mmu_page *sp; |
a436036b AK |
838 | struct hlist_node *node, *n; |
839 | int r; | |
840 | ||
841 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
842 | r = 0; | |
843 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 844 | bucket = &kvm->mmu_page_hash[index]; |
4db35314 AK |
845 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
846 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
697fe2e2 | 847 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
4db35314 AK |
848 | sp->role.word); |
849 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
850 | r = 1; |
851 | } | |
852 | return r; | |
cea0f0e7 AK |
853 | } |
854 | ||
f67a46f4 | 855 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 856 | { |
4db35314 | 857 | struct kvm_mmu_page *sp; |
97a0a01e | 858 | |
4db35314 AK |
859 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
860 | pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word); | |
861 | kvm_mmu_zap_page(kvm, sp); | |
97a0a01e AK |
862 | } |
863 | } | |
864 | ||
38c335f1 | 865 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 866 | { |
38c335f1 | 867 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 868 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 869 | |
4db35314 | 870 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
871 | } |
872 | ||
039576c0 AK |
873 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
874 | { | |
875 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
876 | ||
877 | if (gpa == UNMAPPED_GVA) | |
878 | return NULL; | |
1d28f5f4 | 879 | return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
039576c0 AK |
880 | } |
881 | ||
1c4f1fd6 AK |
882 | static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, |
883 | unsigned pt_access, unsigned pte_access, | |
884 | int user_fault, int write_fault, int dirty, | |
885 | int *ptwrite, gfn_t gfn) | |
886 | { | |
887 | u64 spte; | |
888 | int was_rmapped = is_rmap_pte(*shadow_pte); | |
889 | struct page *page; | |
890 | ||
bc750ba8 | 891 | pgprintk("%s: spte %llx access %x write_fault %d" |
1c4f1fd6 | 892 | " user_fault %d gfn %lx\n", |
bc750ba8 | 893 | __FUNCTION__, *shadow_pte, pt_access, |
1c4f1fd6 AK |
894 | write_fault, user_fault, gfn); |
895 | ||
896 | /* | |
897 | * We don't set the accessed bit, since we sometimes want to see | |
898 | * whether the guest actually used the pte (in order to detect | |
899 | * demand paging). | |
900 | */ | |
901 | spte = PT_PRESENT_MASK | PT_DIRTY_MASK; | |
902 | if (!dirty) | |
903 | pte_access &= ~ACC_WRITE_MASK; | |
904 | if (!(pte_access & ACC_EXEC_MASK)) | |
905 | spte |= PT64_NX_MASK; | |
906 | ||
907 | page = gfn_to_page(vcpu->kvm, gfn); | |
908 | ||
909 | spte |= PT_PRESENT_MASK; | |
910 | if (pte_access & ACC_USER_MASK) | |
911 | spte |= PT_USER_MASK; | |
912 | ||
913 | if (is_error_page(page)) { | |
914 | set_shadow_pte(shadow_pte, | |
915 | shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK); | |
916 | kvm_release_page_clean(page); | |
917 | return; | |
918 | } | |
919 | ||
920 | spte |= page_to_phys(page); | |
921 | ||
922 | if ((pte_access & ACC_WRITE_MASK) | |
923 | || (write_fault && !is_write_protection(vcpu) && !user_fault)) { | |
924 | struct kvm_mmu_page *shadow; | |
925 | ||
926 | spte |= PT_WRITABLE_MASK; | |
927 | if (user_fault) { | |
928 | mmu_unshadow(vcpu->kvm, gfn); | |
929 | goto unshadowed; | |
930 | } | |
931 | ||
932 | shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn); | |
933 | if (shadow) { | |
934 | pgprintk("%s: found shadow page for %lx, marking ro\n", | |
935 | __FUNCTION__, gfn); | |
936 | pte_access &= ~ACC_WRITE_MASK; | |
937 | if (is_writeble_pte(spte)) { | |
938 | spte &= ~PT_WRITABLE_MASK; | |
939 | kvm_x86_ops->tlb_flush(vcpu); | |
940 | } | |
941 | if (write_fault) | |
942 | *ptwrite = 1; | |
943 | } | |
944 | } | |
945 | ||
946 | unshadowed: | |
947 | ||
948 | if (pte_access & ACC_WRITE_MASK) | |
949 | mark_page_dirty(vcpu->kvm, gfn); | |
950 | ||
951 | pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte); | |
952 | set_shadow_pte(shadow_pte, spte); | |
953 | page_header_update_slot(vcpu->kvm, shadow_pte, gfn); | |
954 | if (!was_rmapped) { | |
955 | rmap_add(vcpu, shadow_pte, gfn); | |
956 | if (!is_rmap_pte(*shadow_pte)) | |
957 | kvm_release_page_clean(page); | |
958 | } | |
959 | else | |
960 | kvm_release_page_clean(page); | |
961 | if (!ptwrite || !*ptwrite) | |
962 | vcpu->last_pte_updated = shadow_pte; | |
963 | } | |
964 | ||
6aa8b732 AK |
965 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
966 | { | |
967 | } | |
968 | ||
e833240f | 969 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn) |
6aa8b732 AK |
970 | { |
971 | int level = PT32E_ROOT_LEVEL; | |
972 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
e833240f | 973 | int pt_write = 0; |
6aa8b732 AK |
974 | |
975 | for (; ; level--) { | |
976 | u32 index = PT64_INDEX(v, level); | |
977 | u64 *table; | |
978 | ||
979 | ASSERT(VALID_PAGE(table_addr)); | |
980 | table = __va(table_addr); | |
981 | ||
982 | if (level == 1) { | |
e833240f AK |
983 | mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, |
984 | 0, write, 1, &pt_write, gfn); | |
985 | return pt_write || is_io_pte(table[index]); | |
6aa8b732 AK |
986 | } |
987 | ||
c7addb90 | 988 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 989 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 990 | gfn_t pseudo_gfn; |
6aa8b732 | 991 | |
cea0f0e7 AK |
992 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
993 | >> PAGE_SHIFT; | |
994 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
995 | v, level - 1, | |
fe135d2c | 996 | 1, ACC_ALL, &table[index]); |
25c0de2c | 997 | if (!new_table) { |
6aa8b732 AK |
998 | pgprintk("nonpaging_map: ENOMEM\n"); |
999 | return -ENOMEM; | |
1000 | } | |
1001 | ||
47ad8e68 | 1002 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 1003 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
1004 | } |
1005 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
1006 | } | |
1007 | } | |
1008 | ||
c7addb90 AK |
1009 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
1010 | struct kvm_mmu_page *sp) | |
1011 | { | |
1012 | int i; | |
1013 | ||
1014 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
1015 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
1016 | } | |
1017 | ||
17ac10ad AK |
1018 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
1019 | { | |
1020 | int i; | |
4db35314 | 1021 | struct kvm_mmu_page *sp; |
17ac10ad | 1022 | |
7b53aa56 AK |
1023 | if (!VALID_PAGE(vcpu->mmu.root_hpa)) |
1024 | return; | |
17ac10ad AK |
1025 | #ifdef CONFIG_X86_64 |
1026 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
1027 | hpa_t root = vcpu->mmu.root_hpa; | |
1028 | ||
4db35314 AK |
1029 | sp = page_header(root); |
1030 | --sp->root_count; | |
17ac10ad AK |
1031 | vcpu->mmu.root_hpa = INVALID_PAGE; |
1032 | return; | |
1033 | } | |
1034 | #endif | |
1035 | for (i = 0; i < 4; ++i) { | |
1036 | hpa_t root = vcpu->mmu.pae_root[i]; | |
1037 | ||
417726a3 | 1038 | if (root) { |
417726a3 | 1039 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
1040 | sp = page_header(root); |
1041 | --sp->root_count; | |
417726a3 | 1042 | } |
17ac10ad AK |
1043 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
1044 | } | |
1045 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1046 | } | |
1047 | ||
1048 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
1049 | { | |
1050 | int i; | |
cea0f0e7 | 1051 | gfn_t root_gfn; |
4db35314 | 1052 | struct kvm_mmu_page *sp; |
3bb65a22 | 1053 | |
cea0f0e7 | 1054 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
1055 | |
1056 | #ifdef CONFIG_X86_64 | |
1057 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
1058 | hpa_t root = vcpu->mmu.root_hpa; | |
1059 | ||
1060 | ASSERT(!VALID_PAGE(root)); | |
4db35314 | 1061 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fe135d2c | 1062 | PT64_ROOT_LEVEL, 0, ACC_ALL, NULL); |
4db35314 AK |
1063 | root = __pa(sp->spt); |
1064 | ++sp->root_count; | |
17ac10ad AK |
1065 | vcpu->mmu.root_hpa = root; |
1066 | return; | |
1067 | } | |
1068 | #endif | |
1069 | for (i = 0; i < 4; ++i) { | |
1070 | hpa_t root = vcpu->mmu.pae_root[i]; | |
1071 | ||
1072 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
1073 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
1074 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
1075 | vcpu->mmu.pae_root[i] = 0; | |
1076 | continue; | |
1077 | } | |
cea0f0e7 | 1078 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 1079 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 1080 | root_gfn = 0; |
4db35314 AK |
1081 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
1082 | PT32_ROOT_LEVEL, !is_paging(vcpu), | |
fe135d2c | 1083 | ACC_ALL, NULL); |
4db35314 AK |
1084 | root = __pa(sp->spt); |
1085 | ++sp->root_count; | |
17ac10ad AK |
1086 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
1087 | } | |
1088 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
1089 | } | |
1090 | ||
6aa8b732 AK |
1091 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1092 | { | |
1093 | return vaddr; | |
1094 | } | |
1095 | ||
1096 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1097 | u32 error_code) |
6aa8b732 | 1098 | { |
e833240f | 1099 | gfn_t gfn; |
e2dec939 | 1100 | int r; |
6aa8b732 | 1101 | |
e833240f | 1102 | pgprintk("%s: gva %lx error %x\n", __FUNCTION__, gva, error_code); |
e2dec939 AK |
1103 | r = mmu_topup_memory_caches(vcpu); |
1104 | if (r) | |
1105 | return r; | |
714b93da | 1106 | |
6aa8b732 AK |
1107 | ASSERT(vcpu); |
1108 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
1109 | ||
e833240f | 1110 | gfn = gva >> PAGE_SHIFT; |
6aa8b732 | 1111 | |
e833240f AK |
1112 | return nonpaging_map(vcpu, gva & PAGE_MASK, |
1113 | error_code & PFERR_WRITE_MASK, gfn); | |
6aa8b732 AK |
1114 | } |
1115 | ||
6aa8b732 AK |
1116 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1117 | { | |
17ac10ad | 1118 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1119 | } |
1120 | ||
1121 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1122 | { | |
1123 | struct kvm_mmu *context = &vcpu->mmu; | |
1124 | ||
1125 | context->new_cr3 = nonpaging_new_cr3; | |
1126 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1127 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1128 | context->free = nonpaging_free; | |
c7addb90 | 1129 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1130 | context->root_level = 0; |
6aa8b732 | 1131 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1132 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1133 | return 0; |
1134 | } | |
1135 | ||
d835dfec | 1136 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1137 | { |
1165f5fe | 1138 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1139 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1140 | } |
1141 | ||
1142 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1143 | { | |
374cbac0 | 1144 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 1145 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1146 | } |
1147 | ||
6aa8b732 AK |
1148 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1149 | u64 addr, | |
1150 | u32 err_code) | |
1151 | { | |
c3c91fee | 1152 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1153 | } |
1154 | ||
6aa8b732 AK |
1155 | static void paging_free(struct kvm_vcpu *vcpu) |
1156 | { | |
1157 | nonpaging_free(vcpu); | |
1158 | } | |
1159 | ||
1160 | #define PTTYPE 64 | |
1161 | #include "paging_tmpl.h" | |
1162 | #undef PTTYPE | |
1163 | ||
1164 | #define PTTYPE 32 | |
1165 | #include "paging_tmpl.h" | |
1166 | #undef PTTYPE | |
1167 | ||
17ac10ad | 1168 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1169 | { |
1170 | struct kvm_mmu *context = &vcpu->mmu; | |
1171 | ||
1172 | ASSERT(is_pae(vcpu)); | |
1173 | context->new_cr3 = paging_new_cr3; | |
1174 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1175 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1176 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1177 | context->free = paging_free; |
17ac10ad AK |
1178 | context->root_level = level; |
1179 | context->shadow_root_level = level; | |
17c3ba9d | 1180 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1181 | return 0; |
1182 | } | |
1183 | ||
17ac10ad AK |
1184 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1185 | { | |
1186 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1187 | } | |
1188 | ||
6aa8b732 AK |
1189 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1190 | { | |
1191 | struct kvm_mmu *context = &vcpu->mmu; | |
1192 | ||
1193 | context->new_cr3 = paging_new_cr3; | |
1194 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1195 | context->gva_to_gpa = paging32_gva_to_gpa; |
1196 | context->free = paging_free; | |
c7addb90 | 1197 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1198 | context->root_level = PT32_ROOT_LEVEL; |
1199 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1200 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1201 | return 0; |
1202 | } | |
1203 | ||
1204 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1205 | { | |
17ac10ad | 1206 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1207 | } |
1208 | ||
1209 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1210 | { | |
1211 | ASSERT(vcpu); | |
1212 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1213 | ||
1214 | if (!is_paging(vcpu)) | |
1215 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1216 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1217 | return paging64_init_context(vcpu); |
1218 | else if (is_pae(vcpu)) | |
1219 | return paging32E_init_context(vcpu); | |
1220 | else | |
1221 | return paging32_init_context(vcpu); | |
1222 | } | |
1223 | ||
1224 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1225 | { | |
1226 | ASSERT(vcpu); | |
1227 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1228 | vcpu->mmu.free(vcpu); | |
1229 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1230 | } | |
1231 | } | |
1232 | ||
1233 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1234 | { |
1235 | destroy_kvm_mmu(vcpu); | |
1236 | return init_kvm_mmu(vcpu); | |
1237 | } | |
8668a3c4 | 1238 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1239 | |
1240 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1241 | { |
714b93da AK |
1242 | int r; |
1243 | ||
11ec2804 | 1244 | mutex_lock(&vcpu->kvm->lock); |
e2dec939 | 1245 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1246 | if (r) |
1247 | goto out; | |
1248 | mmu_alloc_roots(vcpu); | |
cbdd1bea | 1249 | kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
17c3ba9d | 1250 | kvm_mmu_flush_tlb(vcpu); |
714b93da | 1251 | out: |
11ec2804 | 1252 | mutex_unlock(&vcpu->kvm->lock); |
714b93da | 1253 | return r; |
6aa8b732 | 1254 | } |
17c3ba9d AK |
1255 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1256 | ||
1257 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1258 | { | |
1259 | mmu_free_roots(vcpu); | |
1260 | } | |
6aa8b732 | 1261 | |
09072daf | 1262 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1263 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1264 | u64 *spte) |
1265 | { | |
1266 | u64 pte; | |
1267 | struct kvm_mmu_page *child; | |
1268 | ||
1269 | pte = *spte; | |
c7addb90 | 1270 | if (is_shadow_present_pte(pte)) { |
4db35314 | 1271 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) |
290fc38d | 1272 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1273 | else { |
1274 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1275 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1276 | } |
1277 | } | |
c7addb90 | 1278 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
ac1b714e AK |
1279 | } |
1280 | ||
0028425f | 1281 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1282 | struct kvm_mmu_page *sp, |
0028425f | 1283 | u64 *spte, |
c7addb90 AK |
1284 | const void *new, int bytes, |
1285 | int offset_in_pte) | |
0028425f | 1286 | { |
4db35314 | 1287 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
4cee5764 | 1288 | ++vcpu->kvm->stat.mmu_pde_zapped; |
0028425f | 1289 | return; |
4cee5764 | 1290 | } |
0028425f | 1291 | |
4cee5764 | 1292 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 AK |
1293 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
1294 | paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte); | |
0028425f | 1295 | else |
4db35314 | 1296 | paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte); |
0028425f AK |
1297 | } |
1298 | ||
79539cec AK |
1299 | static bool need_remote_flush(u64 old, u64 new) |
1300 | { | |
1301 | if (!is_shadow_present_pte(old)) | |
1302 | return false; | |
1303 | if (!is_shadow_present_pte(new)) | |
1304 | return true; | |
1305 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1306 | return true; | |
1307 | old ^= PT64_NX_MASK; | |
1308 | new ^= PT64_NX_MASK; | |
1309 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1310 | } | |
1311 | ||
1312 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1313 | { | |
1314 | if (need_remote_flush(old, new)) | |
1315 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1316 | else | |
1317 | kvm_mmu_flush_tlb(vcpu); | |
1318 | } | |
1319 | ||
12b7d28f AK |
1320 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1321 | { | |
1322 | u64 *spte = vcpu->last_pte_updated; | |
1323 | ||
1324 | return !!(spte && (*spte & PT_ACCESSED_MASK)); | |
1325 | } | |
1326 | ||
09072daf | 1327 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1328 | const u8 *new, int bytes) |
da4a00f0 | 1329 | { |
9b7a0325 | 1330 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1331 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1332 | struct hlist_node *node, *n; |
9b7a0325 AK |
1333 | struct hlist_head *bucket; |
1334 | unsigned index; | |
79539cec | 1335 | u64 entry; |
9b7a0325 | 1336 | u64 *spte; |
9b7a0325 | 1337 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1338 | unsigned pte_size; |
9b7a0325 | 1339 | unsigned page_offset; |
0e7bc4b9 | 1340 | unsigned misaligned; |
fce0657f | 1341 | unsigned quadrant; |
9b7a0325 | 1342 | int level; |
86a5ba02 | 1343 | int flooded = 0; |
ac1b714e | 1344 | int npte; |
9b7a0325 | 1345 | |
da4a00f0 | 1346 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
4cee5764 | 1347 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1348 | kvm_mmu_audit(vcpu, "pre pte write"); |
12b7d28f AK |
1349 | if (gfn == vcpu->last_pt_write_gfn |
1350 | && !last_updated_pte_accessed(vcpu)) { | |
86a5ba02 AK |
1351 | ++vcpu->last_pt_write_count; |
1352 | if (vcpu->last_pt_write_count >= 3) | |
1353 | flooded = 1; | |
1354 | } else { | |
1355 | vcpu->last_pt_write_gfn = gfn; | |
1356 | vcpu->last_pt_write_count = 1; | |
12b7d28f | 1357 | vcpu->last_pte_updated = NULL; |
86a5ba02 | 1358 | } |
9b7a0325 AK |
1359 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1360 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
4db35314 AK |
1361 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
1362 | if (sp->gfn != gfn || sp->role.metaphysical) | |
9b7a0325 | 1363 | continue; |
4db35314 | 1364 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1365 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1366 | misaligned |= bytes < 4; |
86a5ba02 | 1367 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1368 | /* |
1369 | * Misaligned accesses are too much trouble to fix | |
1370 | * up; also, they usually indicate a page is not used | |
1371 | * as a page table. | |
86a5ba02 AK |
1372 | * |
1373 | * If we're seeing too many writes to a page, | |
1374 | * it may no longer be a page table, or we may be | |
1375 | * forking, in which case it is better to unmap the | |
1376 | * page. | |
0e7bc4b9 AK |
1377 | */ |
1378 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1379 | gpa, bytes, sp->role.word); |
1380 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1381 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1382 | continue; |
1383 | } | |
9b7a0325 | 1384 | page_offset = offset; |
4db35314 | 1385 | level = sp->role.level; |
ac1b714e | 1386 | npte = 1; |
4db35314 | 1387 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1388 | page_offset <<= 1; /* 32->64 */ |
1389 | /* | |
1390 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1391 | * only 2MB. So we need to double the offset again | |
1392 | * and zap two pdes instead of one. | |
1393 | */ | |
1394 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1395 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1396 | page_offset <<= 1; |
1397 | npte = 2; | |
1398 | } | |
fce0657f | 1399 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1400 | page_offset &= ~PAGE_MASK; |
4db35314 | 1401 | if (quadrant != sp->role.quadrant) |
fce0657f | 1402 | continue; |
9b7a0325 | 1403 | } |
4db35314 | 1404 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
ac1b714e | 1405 | while (npte--) { |
79539cec | 1406 | entry = *spte; |
4db35314 AK |
1407 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
1408 | mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes, | |
c7addb90 | 1409 | page_offset & (pte_size - 1)); |
79539cec | 1410 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1411 | ++spte; |
9b7a0325 | 1412 | } |
9b7a0325 | 1413 | } |
c7addb90 | 1414 | kvm_mmu_audit(vcpu, "post pte write"); |
da4a00f0 AK |
1415 | } |
1416 | ||
a436036b AK |
1417 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1418 | { | |
1419 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1420 | ||
f67a46f4 | 1421 | return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
a436036b AK |
1422 | } |
1423 | ||
22d95b12 | 1424 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 AK |
1425 | { |
1426 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
4db35314 | 1427 | struct kvm_mmu_page *sp; |
ebeace86 | 1428 | |
4db35314 AK |
1429 | sp = container_of(vcpu->kvm->active_mmu_pages.prev, |
1430 | struct kvm_mmu_page, link); | |
1431 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1432 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1433 | } |
1434 | } | |
ebeace86 | 1435 | |
3067714c AK |
1436 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1437 | { | |
1438 | int r; | |
1439 | enum emulation_result er; | |
1440 | ||
1441 | mutex_lock(&vcpu->kvm->lock); | |
1442 | r = vcpu->mmu.page_fault(vcpu, cr2, error_code); | |
1443 | if (r < 0) | |
1444 | goto out; | |
1445 | ||
1446 | if (!r) { | |
1447 | r = 1; | |
1448 | goto out; | |
1449 | } | |
1450 | ||
b733bfb5 AK |
1451 | r = mmu_topup_memory_caches(vcpu); |
1452 | if (r) | |
1453 | goto out; | |
1454 | ||
3067714c AK |
1455 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
1456 | mutex_unlock(&vcpu->kvm->lock); | |
1457 | ||
1458 | switch (er) { | |
1459 | case EMULATE_DONE: | |
1460 | return 1; | |
1461 | case EMULATE_DO_MMIO: | |
1462 | ++vcpu->stat.mmio_exits; | |
1463 | return 0; | |
1464 | case EMULATE_FAIL: | |
1465 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1466 | return 1; | |
1467 | default: | |
1468 | BUG(); | |
1469 | } | |
1470 | out: | |
1471 | mutex_unlock(&vcpu->kvm->lock); | |
1472 | return r; | |
1473 | } | |
1474 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1475 | ||
6aa8b732 AK |
1476 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1477 | { | |
4db35314 | 1478 | struct kvm_mmu_page *sp; |
6aa8b732 | 1479 | |
f51234c2 | 1480 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
4db35314 AK |
1481 | sp = container_of(vcpu->kvm->active_mmu_pages.next, |
1482 | struct kvm_mmu_page, link); | |
1483 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
f51234c2 | 1484 | } |
17ac10ad | 1485 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1486 | } |
1487 | ||
1488 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1489 | { | |
17ac10ad | 1490 | struct page *page; |
6aa8b732 AK |
1491 | int i; |
1492 | ||
1493 | ASSERT(vcpu); | |
1494 | ||
82ce2c96 IE |
1495 | if (vcpu->kvm->n_requested_mmu_pages) |
1496 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages; | |
1497 | else | |
1498 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages; | |
17ac10ad AK |
1499 | /* |
1500 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1501 | * Therefore we need to allocate shadow page tables in the first | |
1502 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1503 | */ | |
1504 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1505 | if (!page) | |
1506 | goto error_1; | |
1507 | vcpu->mmu.pae_root = page_address(page); | |
1508 | for (i = 0; i < 4; ++i) | |
1509 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1510 | ||
6aa8b732 AK |
1511 | return 0; |
1512 | ||
1513 | error_1: | |
1514 | free_mmu_pages(vcpu); | |
1515 | return -ENOMEM; | |
1516 | } | |
1517 | ||
8018c27b | 1518 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1519 | { |
6aa8b732 AK |
1520 | ASSERT(vcpu); |
1521 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
6aa8b732 | 1522 | |
8018c27b IM |
1523 | return alloc_mmu_pages(vcpu); |
1524 | } | |
6aa8b732 | 1525 | |
8018c27b IM |
1526 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1527 | { | |
1528 | ASSERT(vcpu); | |
1529 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
2c264957 | 1530 | |
8018c27b | 1531 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1532 | } |
1533 | ||
1534 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1535 | { | |
1536 | ASSERT(vcpu); | |
1537 | ||
1538 | destroy_kvm_mmu(vcpu); | |
1539 | free_mmu_pages(vcpu); | |
714b93da | 1540 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1541 | } |
1542 | ||
90cb0529 | 1543 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 1544 | { |
4db35314 | 1545 | struct kvm_mmu_page *sp; |
6aa8b732 | 1546 | |
4db35314 | 1547 | list_for_each_entry(sp, &kvm->active_mmu_pages, link) { |
6aa8b732 AK |
1548 | int i; |
1549 | u64 *pt; | |
1550 | ||
4db35314 | 1551 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
1552 | continue; |
1553 | ||
4db35314 | 1554 | pt = sp->spt; |
6aa8b732 AK |
1555 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1556 | /* avoid RMW */ | |
9647c14c | 1557 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 1558 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
1559 | } |
1560 | } | |
37a7d8b0 | 1561 | |
90cb0529 | 1562 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 1563 | { |
4db35314 | 1564 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 1565 | |
4db35314 AK |
1566 | list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link) |
1567 | kvm_mmu_zap_page(kvm, sp); | |
e0fa826f | 1568 | |
90cb0529 | 1569 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
1570 | } |
1571 | ||
b5a33a75 AK |
1572 | void kvm_mmu_module_exit(void) |
1573 | { | |
1574 | if (pte_chain_cache) | |
1575 | kmem_cache_destroy(pte_chain_cache); | |
1576 | if (rmap_desc_cache) | |
1577 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1578 | if (mmu_page_header_cache) |
1579 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1580 | } |
1581 | ||
1582 | int kvm_mmu_module_init(void) | |
1583 | { | |
1584 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1585 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 1586 | 0, 0, NULL); |
b5a33a75 AK |
1587 | if (!pte_chain_cache) |
1588 | goto nomem; | |
1589 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1590 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 1591 | 0, 0, NULL); |
b5a33a75 AK |
1592 | if (!rmap_desc_cache) |
1593 | goto nomem; | |
1594 | ||
d3d25b04 AK |
1595 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
1596 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 1597 | 0, 0, NULL); |
d3d25b04 AK |
1598 | if (!mmu_page_header_cache) |
1599 | goto nomem; | |
1600 | ||
b5a33a75 AK |
1601 | return 0; |
1602 | ||
1603 | nomem: | |
1604 | kvm_mmu_module_exit(); | |
1605 | return -ENOMEM; | |
1606 | } | |
1607 | ||
3ad82a7e ZX |
1608 | /* |
1609 | * Caculate mmu pages needed for kvm. | |
1610 | */ | |
1611 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
1612 | { | |
1613 | int i; | |
1614 | unsigned int nr_mmu_pages; | |
1615 | unsigned int nr_pages = 0; | |
1616 | ||
1617 | for (i = 0; i < kvm->nmemslots; i++) | |
1618 | nr_pages += kvm->memslots[i].npages; | |
1619 | ||
1620 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
1621 | nr_mmu_pages = max(nr_mmu_pages, | |
1622 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
1623 | ||
1624 | return nr_mmu_pages; | |
1625 | } | |
1626 | ||
37a7d8b0 AK |
1627 | #ifdef AUDIT |
1628 | ||
1629 | static const char *audit_msg; | |
1630 | ||
1631 | static gva_t canonicalize(gva_t gva) | |
1632 | { | |
1633 | #ifdef CONFIG_X86_64 | |
1634 | gva = (long long)(gva << 16) >> 16; | |
1635 | #endif | |
1636 | return gva; | |
1637 | } | |
1638 | ||
1639 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1640 | gva_t va, int level) | |
1641 | { | |
1642 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1643 | int i; | |
1644 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1645 | ||
1646 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1647 | u64 ent = pt[i]; | |
1648 | ||
c7addb90 | 1649 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
1650 | continue; |
1651 | ||
1652 | va = canonicalize(va); | |
c7addb90 AK |
1653 | if (level > 1) { |
1654 | if (ent == shadow_notrap_nonpresent_pte) | |
1655 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
1656 | " in nonleaf level: levels %d gva %lx" | |
1657 | " level %d pte %llx\n", audit_msg, | |
1658 | vcpu->mmu.root_level, va, level, ent); | |
1659 | ||
37a7d8b0 | 1660 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 1661 | } else { |
37a7d8b0 | 1662 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); |
1d28f5f4 AK |
1663 | struct page *page = gpa_to_page(vcpu, gpa); |
1664 | hpa_t hpa = page_to_phys(page); | |
37a7d8b0 | 1665 | |
c7addb90 | 1666 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 1667 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
1668 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
1669 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
37a7d8b0 | 1670 | audit_msg, vcpu->mmu.root_level, |
d77c26fc MD |
1671 | va, gpa, hpa, ent, |
1672 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
1673 | else if (ent == shadow_notrap_nonpresent_pte |
1674 | && !is_error_hpa(hpa)) | |
1675 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
1676 | " valid guest gva %lx\n", audit_msg, va); | |
b4231d61 | 1677 | kvm_release_page_clean(page); |
c7addb90 | 1678 | |
37a7d8b0 AK |
1679 | } |
1680 | } | |
1681 | } | |
1682 | ||
1683 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1684 | { | |
1ea252af | 1685 | unsigned i; |
37a7d8b0 AK |
1686 | |
1687 | if (vcpu->mmu.root_level == 4) | |
1688 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1689 | else | |
1690 | for (i = 0; i < 4; ++i) | |
1691 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1692 | audit_mappings_page(vcpu, | |
1693 | vcpu->mmu.pae_root[i], | |
1694 | i << 30, | |
1695 | 2); | |
1696 | } | |
1697 | ||
1698 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1699 | { | |
1700 | int nmaps = 0; | |
1701 | int i, j, k; | |
1702 | ||
1703 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1704 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1705 | struct kvm_rmap_desc *d; | |
1706 | ||
1707 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 1708 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 1709 | |
290fc38d | 1710 | if (!*rmapp) |
37a7d8b0 | 1711 | continue; |
290fc38d | 1712 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
1713 | ++nmaps; |
1714 | continue; | |
1715 | } | |
290fc38d | 1716 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
1717 | while (d) { |
1718 | for (k = 0; k < RMAP_EXT; ++k) | |
1719 | if (d->shadow_ptes[k]) | |
1720 | ++nmaps; | |
1721 | else | |
1722 | break; | |
1723 | d = d->more; | |
1724 | } | |
1725 | } | |
1726 | } | |
1727 | return nmaps; | |
1728 | } | |
1729 | ||
1730 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1731 | { | |
1732 | int nmaps = 0; | |
4db35314 | 1733 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
1734 | int i; |
1735 | ||
4db35314 AK |
1736 | list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) { |
1737 | u64 *pt = sp->spt; | |
37a7d8b0 | 1738 | |
4db35314 | 1739 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
1740 | continue; |
1741 | ||
1742 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1743 | u64 ent = pt[i]; | |
1744 | ||
1745 | if (!(ent & PT_PRESENT_MASK)) | |
1746 | continue; | |
1747 | if (!(ent & PT_WRITABLE_MASK)) | |
1748 | continue; | |
1749 | ++nmaps; | |
1750 | } | |
1751 | } | |
1752 | return nmaps; | |
1753 | } | |
1754 | ||
1755 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1756 | { | |
1757 | int n_rmap = count_rmaps(vcpu); | |
1758 | int n_actual = count_writable_mappings(vcpu); | |
1759 | ||
1760 | if (n_rmap != n_actual) | |
1761 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1762 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1763 | } | |
1764 | ||
1765 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1766 | { | |
4db35314 | 1767 | struct kvm_mmu_page *sp; |
290fc38d IE |
1768 | struct kvm_memory_slot *slot; |
1769 | unsigned long *rmapp; | |
1770 | gfn_t gfn; | |
37a7d8b0 | 1771 | |
4db35314 AK |
1772 | list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) { |
1773 | if (sp->role.metaphysical) | |
37a7d8b0 AK |
1774 | continue; |
1775 | ||
4db35314 AK |
1776 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
1777 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
1778 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
1779 | if (*rmapp) | |
37a7d8b0 AK |
1780 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
1781 | " mappings: gfn %lx role %x\n", | |
4db35314 AK |
1782 | __FUNCTION__, audit_msg, sp->gfn, |
1783 | sp->role.word); | |
37a7d8b0 AK |
1784 | } |
1785 | } | |
1786 | ||
1787 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1788 | { | |
1789 | int olddbg = dbg; | |
1790 | ||
1791 | dbg = 0; | |
1792 | audit_msg = msg; | |
1793 | audit_rmap(vcpu); | |
1794 | audit_write_protection(vcpu); | |
1795 | audit_mappings(vcpu); | |
1796 | dbg = olddbg; | |
1797 | } | |
1798 | ||
1799 | #endif |