Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
21 | #include "kvm.h" | |
34c16eec | 22 | #include "x86.h" |
e495606d | 23 | |
6aa8b732 AK |
24 | #include <linux/types.h> |
25 | #include <linux/string.h> | |
6aa8b732 AK |
26 | #include <linux/mm.h> |
27 | #include <linux/highmem.h> | |
28 | #include <linux/module.h> | |
448353ca | 29 | #include <linux/swap.h> |
6aa8b732 | 30 | |
e495606d AK |
31 | #include <asm/page.h> |
32 | #include <asm/cmpxchg.h> | |
4e542370 | 33 | #include <asm/io.h> |
6aa8b732 | 34 | |
37a7d8b0 AK |
35 | #undef MMU_DEBUG |
36 | ||
37 | #undef AUDIT | |
38 | ||
39 | #ifdef AUDIT | |
40 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
41 | #else | |
42 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
43 | #endif | |
44 | ||
45 | #ifdef MMU_DEBUG | |
46 | ||
47 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
48 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
49 | ||
50 | #else | |
51 | ||
52 | #define pgprintk(x...) do { } while (0) | |
53 | #define rmap_printk(x...) do { } while (0) | |
54 | ||
55 | #endif | |
56 | ||
57 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
58 | static int dbg = 1; | |
59 | #endif | |
6aa8b732 | 60 | |
d6c69ee9 YD |
61 | #ifndef MMU_DEBUG |
62 | #define ASSERT(x) do { } while (0) | |
63 | #else | |
6aa8b732 AK |
64 | #define ASSERT(x) \ |
65 | if (!(x)) { \ | |
66 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
67 | __FILE__, __LINE__, #x); \ | |
68 | } | |
d6c69ee9 | 69 | #endif |
6aa8b732 | 70 | |
cea0f0e7 AK |
71 | #define PT64_PT_BITS 9 |
72 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
73 | #define PT32_PT_BITS 10 | |
74 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
75 | |
76 | #define PT_WRITABLE_SHIFT 1 | |
77 | ||
78 | #define PT_PRESENT_MASK (1ULL << 0) | |
79 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
80 | #define PT_USER_MASK (1ULL << 2) | |
81 | #define PT_PWT_MASK (1ULL << 3) | |
82 | #define PT_PCD_MASK (1ULL << 4) | |
83 | #define PT_ACCESSED_MASK (1ULL << 5) | |
84 | #define PT_DIRTY_MASK (1ULL << 6) | |
85 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
86 | #define PT_PAT_MASK (1ULL << 7) | |
87 | #define PT_GLOBAL_MASK (1ULL << 8) | |
fe135d2c AK |
88 | #define PT64_NX_SHIFT 63 |
89 | #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT) | |
6aa8b732 AK |
90 | |
91 | #define PT_PAT_SHIFT 7 | |
92 | #define PT_DIR_PAT_SHIFT 12 | |
93 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
94 | ||
95 | #define PT32_DIR_PSE36_SIZE 4 | |
96 | #define PT32_DIR_PSE36_SHIFT 13 | |
d77c26fc MD |
97 | #define PT32_DIR_PSE36_MASK \ |
98 | (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
6aa8b732 AK |
99 | |
100 | ||
6aa8b732 AK |
101 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
102 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
103 | ||
6aa8b732 AK |
104 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
105 | ||
6aa8b732 AK |
106 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
107 | ||
108 | #define PT64_LEVEL_BITS 9 | |
109 | ||
110 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 111 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
112 | |
113 | #define PT64_LEVEL_MASK(level) \ | |
114 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
115 | ||
116 | #define PT64_INDEX(address, level)\ | |
117 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
118 | ||
119 | ||
120 | #define PT32_LEVEL_BITS 10 | |
121 | ||
122 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 123 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
124 | |
125 | #define PT32_LEVEL_MASK(level) \ | |
126 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
127 | ||
128 | #define PT32_INDEX(address, level)\ | |
129 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
130 | ||
131 | ||
27aba766 | 132 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
133 | #define PT64_DIR_BASE_ADDR_MASK \ |
134 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
135 | ||
136 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
137 | #define PT32_DIR_BASE_ADDR_MASK \ | |
138 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
139 | ||
79539cec AK |
140 | #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \ |
141 | | PT64_NX_MASK) | |
6aa8b732 AK |
142 | |
143 | #define PFERR_PRESENT_MASK (1U << 0) | |
144 | #define PFERR_WRITE_MASK (1U << 1) | |
145 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 146 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
147 | |
148 | #define PT64_ROOT_LEVEL 4 | |
149 | #define PT32_ROOT_LEVEL 2 | |
150 | #define PT32E_ROOT_LEVEL 3 | |
151 | ||
152 | #define PT_DIRECTORY_LEVEL 2 | |
153 | #define PT_PAGE_TABLE_LEVEL 1 | |
154 | ||
cd4a4e53 AK |
155 | #define RMAP_EXT 4 |
156 | ||
fe135d2c AK |
157 | #define ACC_EXEC_MASK 1 |
158 | #define ACC_WRITE_MASK PT_WRITABLE_MASK | |
159 | #define ACC_USER_MASK PT_USER_MASK | |
160 | #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK) | |
161 | ||
cd4a4e53 AK |
162 | struct kvm_rmap_desc { |
163 | u64 *shadow_ptes[RMAP_EXT]; | |
164 | struct kvm_rmap_desc *more; | |
165 | }; | |
166 | ||
b5a33a75 AK |
167 | static struct kmem_cache *pte_chain_cache; |
168 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 169 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 170 | |
c7addb90 AK |
171 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
172 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
173 | ||
174 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
175 | { | |
176 | shadow_trap_nonpresent_pte = trap_pte; | |
177 | shadow_notrap_nonpresent_pte = notrap_pte; | |
178 | } | |
179 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
180 | ||
6aa8b732 AK |
181 | static int is_write_protection(struct kvm_vcpu *vcpu) |
182 | { | |
707d92fa | 183 | return vcpu->cr0 & X86_CR0_WP; |
6aa8b732 AK |
184 | } |
185 | ||
186 | static int is_cpuid_PSE36(void) | |
187 | { | |
188 | return 1; | |
189 | } | |
190 | ||
73b1087e AK |
191 | static int is_nx(struct kvm_vcpu *vcpu) |
192 | { | |
193 | return vcpu->shadow_efer & EFER_NX; | |
194 | } | |
195 | ||
6aa8b732 AK |
196 | static int is_present_pte(unsigned long pte) |
197 | { | |
198 | return pte & PT_PRESENT_MASK; | |
199 | } | |
200 | ||
c7addb90 AK |
201 | static int is_shadow_present_pte(u64 pte) |
202 | { | |
203 | pte &= ~PT_SHADOW_IO_MARK; | |
204 | return pte != shadow_trap_nonpresent_pte | |
205 | && pte != shadow_notrap_nonpresent_pte; | |
206 | } | |
207 | ||
6aa8b732 AK |
208 | static int is_writeble_pte(unsigned long pte) |
209 | { | |
210 | return pte & PT_WRITABLE_MASK; | |
211 | } | |
212 | ||
e3c5e7ec AK |
213 | static int is_dirty_pte(unsigned long pte) |
214 | { | |
215 | return pte & PT_DIRTY_MASK; | |
216 | } | |
217 | ||
6aa8b732 AK |
218 | static int is_io_pte(unsigned long pte) |
219 | { | |
220 | return pte & PT_SHADOW_IO_MARK; | |
221 | } | |
222 | ||
cd4a4e53 AK |
223 | static int is_rmap_pte(u64 pte) |
224 | { | |
9647c14c IE |
225 | return pte != shadow_trap_nonpresent_pte |
226 | && pte != shadow_notrap_nonpresent_pte; | |
cd4a4e53 AK |
227 | } |
228 | ||
da928521 AK |
229 | static gfn_t pse36_gfn_delta(u32 gpte) |
230 | { | |
231 | int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT; | |
232 | ||
233 | return (gpte & PT32_DIR_PSE36_MASK) << shift; | |
234 | } | |
235 | ||
e663ee64 AK |
236 | static void set_shadow_pte(u64 *sptep, u64 spte) |
237 | { | |
238 | #ifdef CONFIG_X86_64 | |
239 | set_64bit((unsigned long *)sptep, spte); | |
240 | #else | |
241 | set_64bit((unsigned long long *)sptep, spte); | |
242 | #endif | |
243 | } | |
244 | ||
e2dec939 | 245 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 246 | struct kmem_cache *base_cache, int min) |
714b93da AK |
247 | { |
248 | void *obj; | |
249 | ||
250 | if (cache->nobjs >= min) | |
e2dec939 | 251 | return 0; |
714b93da | 252 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 253 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 254 | if (!obj) |
e2dec939 | 255 | return -ENOMEM; |
714b93da AK |
256 | cache->objects[cache->nobjs++] = obj; |
257 | } | |
e2dec939 | 258 | return 0; |
714b93da AK |
259 | } |
260 | ||
261 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
262 | { | |
263 | while (mc->nobjs) | |
264 | kfree(mc->objects[--mc->nobjs]); | |
265 | } | |
266 | ||
c1158e63 | 267 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 268 | int min) |
c1158e63 AK |
269 | { |
270 | struct page *page; | |
271 | ||
272 | if (cache->nobjs >= min) | |
273 | return 0; | |
274 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 275 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
276 | if (!page) |
277 | return -ENOMEM; | |
278 | set_page_private(page, 0); | |
279 | cache->objects[cache->nobjs++] = page_address(page); | |
280 | } | |
281 | return 0; | |
282 | } | |
283 | ||
284 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
285 | { | |
286 | while (mc->nobjs) | |
c4d198d5 | 287 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
288 | } |
289 | ||
2e3e5882 | 290 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 291 | { |
e2dec939 AK |
292 | int r; |
293 | ||
2e3e5882 | 294 | kvm_mmu_free_some_pages(vcpu); |
e2dec939 | 295 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, |
2e3e5882 | 296 | pte_chain_cache, 4); |
e2dec939 AK |
297 | if (r) |
298 | goto out; | |
299 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
2e3e5882 | 300 | rmap_desc_cache, 1); |
d3d25b04 AK |
301 | if (r) |
302 | goto out; | |
290fc38d | 303 | r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8); |
d3d25b04 AK |
304 | if (r) |
305 | goto out; | |
306 | r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache, | |
2e3e5882 | 307 | mmu_page_header_cache, 4); |
e2dec939 AK |
308 | out: |
309 | return r; | |
714b93da AK |
310 | } |
311 | ||
312 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
313 | { | |
314 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
315 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
c1158e63 | 316 | mmu_free_memory_cache_page(&vcpu->mmu_page_cache); |
d3d25b04 | 317 | mmu_free_memory_cache(&vcpu->mmu_page_header_cache); |
714b93da AK |
318 | } |
319 | ||
320 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
321 | size_t size) | |
322 | { | |
323 | void *p; | |
324 | ||
325 | BUG_ON(!mc->nobjs); | |
326 | p = mc->objects[--mc->nobjs]; | |
327 | memset(p, 0, size); | |
328 | return p; | |
329 | } | |
330 | ||
714b93da AK |
331 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
332 | { | |
333 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
334 | sizeof(struct kvm_pte_chain)); | |
335 | } | |
336 | ||
90cb0529 | 337 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 338 | { |
90cb0529 | 339 | kfree(pc); |
714b93da AK |
340 | } |
341 | ||
342 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
343 | { | |
344 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
345 | sizeof(struct kvm_rmap_desc)); | |
346 | } | |
347 | ||
90cb0529 | 348 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 349 | { |
90cb0529 | 350 | kfree(rd); |
714b93da AK |
351 | } |
352 | ||
290fc38d IE |
353 | /* |
354 | * Take gfn and return the reverse mapping to it. | |
355 | * Note: gfn must be unaliased before this function get called | |
356 | */ | |
357 | ||
358 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn) | |
359 | { | |
360 | struct kvm_memory_slot *slot; | |
361 | ||
362 | slot = gfn_to_memslot(kvm, gfn); | |
363 | return &slot->rmap[gfn - slot->base_gfn]; | |
364 | } | |
365 | ||
cd4a4e53 AK |
366 | /* |
367 | * Reverse mapping data structures: | |
368 | * | |
290fc38d IE |
369 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
370 | * that points to page_address(page). | |
cd4a4e53 | 371 | * |
290fc38d IE |
372 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
373 | * containing more mappings. | |
cd4a4e53 | 374 | */ |
290fc38d | 375 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
cd4a4e53 | 376 | { |
4db35314 | 377 | struct kvm_mmu_page *sp; |
cd4a4e53 | 378 | struct kvm_rmap_desc *desc; |
290fc38d | 379 | unsigned long *rmapp; |
cd4a4e53 AK |
380 | int i; |
381 | ||
382 | if (!is_rmap_pte(*spte)) | |
383 | return; | |
290fc38d | 384 | gfn = unalias_gfn(vcpu->kvm, gfn); |
4db35314 AK |
385 | sp = page_header(__pa(spte)); |
386 | sp->gfns[spte - sp->spt] = gfn; | |
290fc38d IE |
387 | rmapp = gfn_to_rmap(vcpu->kvm, gfn); |
388 | if (!*rmapp) { | |
cd4a4e53 | 389 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
390 | *rmapp = (unsigned long)spte; |
391 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 392 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 393 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 394 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 395 | desc->shadow_ptes[1] = spte; |
290fc38d | 396 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
397 | } else { |
398 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 399 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
400 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
401 | desc = desc->more; | |
402 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 403 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
404 | desc = desc->more; |
405 | } | |
406 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
407 | ; | |
408 | desc->shadow_ptes[i] = spte; | |
409 | } | |
410 | } | |
411 | ||
290fc38d | 412 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
413 | struct kvm_rmap_desc *desc, |
414 | int i, | |
415 | struct kvm_rmap_desc *prev_desc) | |
416 | { | |
417 | int j; | |
418 | ||
419 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
420 | ; | |
421 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 422 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
423 | if (j != 0) |
424 | return; | |
425 | if (!prev_desc && !desc->more) | |
290fc38d | 426 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
427 | else |
428 | if (prev_desc) | |
429 | prev_desc->more = desc->more; | |
430 | else | |
290fc38d | 431 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 432 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
433 | } |
434 | ||
290fc38d | 435 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 436 | { |
cd4a4e53 AK |
437 | struct kvm_rmap_desc *desc; |
438 | struct kvm_rmap_desc *prev_desc; | |
4db35314 | 439 | struct kvm_mmu_page *sp; |
76c35c6e | 440 | struct page *page; |
290fc38d | 441 | unsigned long *rmapp; |
cd4a4e53 AK |
442 | int i; |
443 | ||
444 | if (!is_rmap_pte(*spte)) | |
445 | return; | |
4db35314 | 446 | sp = page_header(__pa(spte)); |
76c35c6e | 447 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); |
448353ca | 448 | mark_page_accessed(page); |
b4231d61 | 449 | if (is_writeble_pte(*spte)) |
76c35c6e | 450 | kvm_release_page_dirty(page); |
b4231d61 | 451 | else |
76c35c6e | 452 | kvm_release_page_clean(page); |
4db35314 | 453 | rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt]); |
290fc38d | 454 | if (!*rmapp) { |
cd4a4e53 AK |
455 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
456 | BUG(); | |
290fc38d | 457 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 458 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 459 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
460 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
461 | spte, *spte); | |
462 | BUG(); | |
463 | } | |
290fc38d | 464 | *rmapp = 0; |
cd4a4e53 AK |
465 | } else { |
466 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 467 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
468 | prev_desc = NULL; |
469 | while (desc) { | |
470 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
471 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 472 | rmap_desc_remove_entry(rmapp, |
714b93da | 473 | desc, i, |
cd4a4e53 AK |
474 | prev_desc); |
475 | return; | |
476 | } | |
477 | prev_desc = desc; | |
478 | desc = desc->more; | |
479 | } | |
480 | BUG(); | |
481 | } | |
482 | } | |
483 | ||
98348e95 | 484 | static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte) |
374cbac0 | 485 | { |
374cbac0 | 486 | struct kvm_rmap_desc *desc; |
98348e95 IE |
487 | struct kvm_rmap_desc *prev_desc; |
488 | u64 *prev_spte; | |
489 | int i; | |
490 | ||
491 | if (!*rmapp) | |
492 | return NULL; | |
493 | else if (!(*rmapp & 1)) { | |
494 | if (!spte) | |
495 | return (u64 *)*rmapp; | |
496 | return NULL; | |
497 | } | |
498 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); | |
499 | prev_desc = NULL; | |
500 | prev_spte = NULL; | |
501 | while (desc) { | |
502 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) { | |
503 | if (prev_spte == spte) | |
504 | return desc->shadow_ptes[i]; | |
505 | prev_spte = desc->shadow_ptes[i]; | |
506 | } | |
507 | desc = desc->more; | |
508 | } | |
509 | return NULL; | |
510 | } | |
511 | ||
512 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) | |
513 | { | |
290fc38d | 514 | unsigned long *rmapp; |
374cbac0 AK |
515 | u64 *spte; |
516 | ||
4a4c9924 AL |
517 | gfn = unalias_gfn(kvm, gfn); |
518 | rmapp = gfn_to_rmap(kvm, gfn); | |
374cbac0 | 519 | |
98348e95 IE |
520 | spte = rmap_next(kvm, rmapp, NULL); |
521 | while (spte) { | |
374cbac0 | 522 | BUG_ON(!spte); |
374cbac0 | 523 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
374cbac0 | 524 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); |
9647c14c IE |
525 | if (is_writeble_pte(*spte)) |
526 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); | |
4a4c9924 | 527 | kvm_flush_remote_tlbs(kvm); |
9647c14c | 528 | spte = rmap_next(kvm, rmapp, spte); |
374cbac0 AK |
529 | } |
530 | } | |
531 | ||
d6c69ee9 | 532 | #ifdef MMU_DEBUG |
47ad8e68 | 533 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 534 | { |
139bdb2d AK |
535 | u64 *pos; |
536 | u64 *end; | |
537 | ||
47ad8e68 | 538 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
c7addb90 | 539 | if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) { |
139bdb2d AK |
540 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, |
541 | pos, *pos); | |
6aa8b732 | 542 | return 0; |
139bdb2d | 543 | } |
6aa8b732 AK |
544 | return 1; |
545 | } | |
d6c69ee9 | 546 | #endif |
6aa8b732 | 547 | |
4db35314 | 548 | static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
260746c0 | 549 | { |
4db35314 AK |
550 | ASSERT(is_empty_shadow_page(sp->spt)); |
551 | list_del(&sp->link); | |
552 | __free_page(virt_to_page(sp->spt)); | |
553 | __free_page(virt_to_page(sp->gfns)); | |
554 | kfree(sp); | |
90cb0529 | 555 | ++kvm->n_free_mmu_pages; |
260746c0 AK |
556 | } |
557 | ||
cea0f0e7 AK |
558 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
559 | { | |
560 | return gfn; | |
561 | } | |
562 | ||
25c0de2c AK |
563 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
564 | u64 *parent_pte) | |
6aa8b732 | 565 | { |
4db35314 | 566 | struct kvm_mmu_page *sp; |
6aa8b732 | 567 | |
d3d25b04 | 568 | if (!vcpu->kvm->n_free_mmu_pages) |
25c0de2c | 569 | return NULL; |
6aa8b732 | 570 | |
4db35314 AK |
571 | sp = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, sizeof *sp); |
572 | sp->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
573 | sp->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
574 | set_page_private(virt_to_page(sp->spt), (unsigned long)sp); | |
575 | list_add(&sp->link, &vcpu->kvm->active_mmu_pages); | |
576 | ASSERT(is_empty_shadow_page(sp->spt)); | |
577 | sp->slot_bitmap = 0; | |
578 | sp->multimapped = 0; | |
579 | sp->parent_pte = parent_pte; | |
ebeace86 | 580 | --vcpu->kvm->n_free_mmu_pages; |
4db35314 | 581 | return sp; |
6aa8b732 AK |
582 | } |
583 | ||
714b93da | 584 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
4db35314 | 585 | struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 AK |
586 | { |
587 | struct kvm_pte_chain *pte_chain; | |
588 | struct hlist_node *node; | |
589 | int i; | |
590 | ||
591 | if (!parent_pte) | |
592 | return; | |
4db35314 AK |
593 | if (!sp->multimapped) { |
594 | u64 *old = sp->parent_pte; | |
cea0f0e7 AK |
595 | |
596 | if (!old) { | |
4db35314 | 597 | sp->parent_pte = parent_pte; |
cea0f0e7 AK |
598 | return; |
599 | } | |
4db35314 | 600 | sp->multimapped = 1; |
714b93da | 601 | pte_chain = mmu_alloc_pte_chain(vcpu); |
4db35314 AK |
602 | INIT_HLIST_HEAD(&sp->parent_ptes); |
603 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); | |
cea0f0e7 AK |
604 | pte_chain->parent_ptes[0] = old; |
605 | } | |
4db35314 | 606 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) { |
cea0f0e7 AK |
607 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) |
608 | continue; | |
609 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
610 | if (!pte_chain->parent_ptes[i]) { | |
611 | pte_chain->parent_ptes[i] = parent_pte; | |
612 | return; | |
613 | } | |
614 | } | |
714b93da | 615 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 | 616 | BUG_ON(!pte_chain); |
4db35314 | 617 | hlist_add_head(&pte_chain->link, &sp->parent_ptes); |
cea0f0e7 AK |
618 | pte_chain->parent_ptes[0] = parent_pte; |
619 | } | |
620 | ||
4db35314 | 621 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp, |
cea0f0e7 AK |
622 | u64 *parent_pte) |
623 | { | |
624 | struct kvm_pte_chain *pte_chain; | |
625 | struct hlist_node *node; | |
626 | int i; | |
627 | ||
4db35314 AK |
628 | if (!sp->multimapped) { |
629 | BUG_ON(sp->parent_pte != parent_pte); | |
630 | sp->parent_pte = NULL; | |
cea0f0e7 AK |
631 | return; |
632 | } | |
4db35314 | 633 | hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) |
cea0f0e7 AK |
634 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { |
635 | if (!pte_chain->parent_ptes[i]) | |
636 | break; | |
637 | if (pte_chain->parent_ptes[i] != parent_pte) | |
638 | continue; | |
697fe2e2 AK |
639 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
640 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
641 | pte_chain->parent_ptes[i] |
642 | = pte_chain->parent_ptes[i + 1]; | |
643 | ++i; | |
644 | } | |
645 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
646 | if (i == 0) { |
647 | hlist_del(&pte_chain->link); | |
90cb0529 | 648 | mmu_free_pte_chain(pte_chain); |
4db35314 AK |
649 | if (hlist_empty(&sp->parent_ptes)) { |
650 | sp->multimapped = 0; | |
651 | sp->parent_pte = NULL; | |
697fe2e2 AK |
652 | } |
653 | } | |
cea0f0e7 AK |
654 | return; |
655 | } | |
656 | BUG(); | |
657 | } | |
658 | ||
4db35314 | 659 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn) |
cea0f0e7 AK |
660 | { |
661 | unsigned index; | |
662 | struct hlist_head *bucket; | |
4db35314 | 663 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
664 | struct hlist_node *node; |
665 | ||
666 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
667 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 668 | bucket = &kvm->mmu_page_hash[index]; |
4db35314 AK |
669 | hlist_for_each_entry(sp, node, bucket, hash_link) |
670 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
cea0f0e7 | 671 | pgprintk("%s: found role %x\n", |
4db35314 AK |
672 | __FUNCTION__, sp->role.word); |
673 | return sp; | |
cea0f0e7 AK |
674 | } |
675 | return NULL; | |
676 | } | |
677 | ||
678 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
679 | gfn_t gfn, | |
680 | gva_t gaddr, | |
681 | unsigned level, | |
682 | int metaphysical, | |
d28c6cfb | 683 | unsigned hugepage_access, |
cea0f0e7 AK |
684 | u64 *parent_pte) |
685 | { | |
686 | union kvm_mmu_page_role role; | |
687 | unsigned index; | |
688 | unsigned quadrant; | |
689 | struct hlist_head *bucket; | |
4db35314 | 690 | struct kvm_mmu_page *sp; |
cea0f0e7 AK |
691 | struct hlist_node *node; |
692 | ||
693 | role.word = 0; | |
694 | role.glevels = vcpu->mmu.root_level; | |
695 | role.level = level; | |
696 | role.metaphysical = metaphysical; | |
d28c6cfb | 697 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
698 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
699 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
700 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
701 | role.quadrant = quadrant; | |
702 | } | |
703 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
704 | gfn, role.word); | |
705 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
706 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
4db35314 AK |
707 | hlist_for_each_entry(sp, node, bucket, hash_link) |
708 | if (sp->gfn == gfn && sp->role.word == role.word) { | |
709 | mmu_page_add_parent_pte(vcpu, sp, parent_pte); | |
cea0f0e7 | 710 | pgprintk("%s: found\n", __FUNCTION__); |
4db35314 | 711 | return sp; |
cea0f0e7 | 712 | } |
4db35314 AK |
713 | sp = kvm_mmu_alloc_page(vcpu, parent_pte); |
714 | if (!sp) | |
715 | return sp; | |
cea0f0e7 | 716 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); |
4db35314 AK |
717 | sp->gfn = gfn; |
718 | sp->role = role; | |
719 | hlist_add_head(&sp->hash_link, bucket); | |
720 | vcpu->mmu.prefetch_page(vcpu, sp); | |
374cbac0 | 721 | if (!metaphysical) |
4a4c9924 | 722 | rmap_write_protect(vcpu->kvm, gfn); |
4db35314 | 723 | return sp; |
cea0f0e7 AK |
724 | } |
725 | ||
90cb0529 | 726 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
4db35314 | 727 | struct kvm_mmu_page *sp) |
a436036b | 728 | { |
697fe2e2 AK |
729 | unsigned i; |
730 | u64 *pt; | |
731 | u64 ent; | |
732 | ||
4db35314 | 733 | pt = sp->spt; |
697fe2e2 | 734 | |
4db35314 | 735 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) { |
697fe2e2 | 736 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { |
c7addb90 | 737 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 738 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 739 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 740 | } |
90cb0529 | 741 | kvm_flush_remote_tlbs(kvm); |
697fe2e2 AK |
742 | return; |
743 | } | |
744 | ||
745 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
746 | ent = pt[i]; | |
747 | ||
c7addb90 AK |
748 | pt[i] = shadow_trap_nonpresent_pte; |
749 | if (!is_shadow_present_pte(ent)) | |
697fe2e2 AK |
750 | continue; |
751 | ent &= PT64_BASE_ADDR_MASK; | |
90cb0529 | 752 | mmu_page_remove_parent_pte(page_header(ent), &pt[i]); |
697fe2e2 | 753 | } |
90cb0529 | 754 | kvm_flush_remote_tlbs(kvm); |
a436036b AK |
755 | } |
756 | ||
4db35314 | 757 | static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte) |
cea0f0e7 | 758 | { |
4db35314 | 759 | mmu_page_remove_parent_pte(sp, parent_pte); |
a436036b AK |
760 | } |
761 | ||
12b7d28f AK |
762 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
763 | { | |
764 | int i; | |
765 | ||
766 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
767 | if (kvm->vcpus[i]) | |
768 | kvm->vcpus[i]->last_pte_updated = NULL; | |
769 | } | |
770 | ||
4db35314 | 771 | static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp) |
a436036b AK |
772 | { |
773 | u64 *parent_pte; | |
774 | ||
4cee5764 | 775 | ++kvm->stat.mmu_shadow_zapped; |
4db35314 AK |
776 | while (sp->multimapped || sp->parent_pte) { |
777 | if (!sp->multimapped) | |
778 | parent_pte = sp->parent_pte; | |
a436036b AK |
779 | else { |
780 | struct kvm_pte_chain *chain; | |
781 | ||
4db35314 | 782 | chain = container_of(sp->parent_ptes.first, |
a436036b AK |
783 | struct kvm_pte_chain, link); |
784 | parent_pte = chain->parent_ptes[0]; | |
785 | } | |
697fe2e2 | 786 | BUG_ON(!parent_pte); |
4db35314 | 787 | kvm_mmu_put_page(sp, parent_pte); |
c7addb90 | 788 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 789 | } |
4db35314 AK |
790 | kvm_mmu_page_unlink_children(kvm, sp); |
791 | if (!sp->root_count) { | |
792 | hlist_del(&sp->hash_link); | |
793 | kvm_mmu_free_page(kvm, sp); | |
36868f7b | 794 | } else |
4db35314 | 795 | list_move(&sp->link, &kvm->active_mmu_pages); |
12b7d28f | 796 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
797 | } |
798 | ||
82ce2c96 IE |
799 | /* |
800 | * Changing the number of mmu pages allocated to the vm | |
801 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
802 | */ | |
803 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
804 | { | |
805 | /* | |
806 | * If we set the number of mmu pages to be smaller be than the | |
807 | * number of actived pages , we must to free some mmu pages before we | |
808 | * change the value | |
809 | */ | |
810 | ||
811 | if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) > | |
812 | kvm_nr_mmu_pages) { | |
813 | int n_used_mmu_pages = kvm->n_alloc_mmu_pages | |
814 | - kvm->n_free_mmu_pages; | |
815 | ||
816 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
817 | struct kvm_mmu_page *page; | |
818 | ||
819 | page = container_of(kvm->active_mmu_pages.prev, | |
820 | struct kvm_mmu_page, link); | |
821 | kvm_mmu_zap_page(kvm, page); | |
822 | n_used_mmu_pages--; | |
823 | } | |
824 | kvm->n_free_mmu_pages = 0; | |
825 | } | |
826 | else | |
827 | kvm->n_free_mmu_pages += kvm_nr_mmu_pages | |
828 | - kvm->n_alloc_mmu_pages; | |
829 | ||
830 | kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages; | |
831 | } | |
832 | ||
f67a46f4 | 833 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
834 | { |
835 | unsigned index; | |
836 | struct hlist_head *bucket; | |
4db35314 | 837 | struct kvm_mmu_page *sp; |
a436036b AK |
838 | struct hlist_node *node, *n; |
839 | int r; | |
840 | ||
841 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
842 | r = 0; | |
843 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 844 | bucket = &kvm->mmu_page_hash[index]; |
4db35314 AK |
845 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) |
846 | if (sp->gfn == gfn && !sp->role.metaphysical) { | |
697fe2e2 | 847 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
4db35314 AK |
848 | sp->role.word); |
849 | kvm_mmu_zap_page(kvm, sp); | |
a436036b AK |
850 | r = 1; |
851 | } | |
852 | return r; | |
cea0f0e7 AK |
853 | } |
854 | ||
f67a46f4 | 855 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e | 856 | { |
4db35314 | 857 | struct kvm_mmu_page *sp; |
97a0a01e | 858 | |
4db35314 AK |
859 | while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
860 | pgprintk("%s: zap %lx %x\n", __FUNCTION__, gfn, sp->role.word); | |
861 | kvm_mmu_zap_page(kvm, sp); | |
97a0a01e AK |
862 | } |
863 | } | |
864 | ||
38c335f1 | 865 | static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn) |
6aa8b732 | 866 | { |
38c335f1 | 867 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn)); |
4db35314 | 868 | struct kvm_mmu_page *sp = page_header(__pa(pte)); |
6aa8b732 | 869 | |
4db35314 | 870 | __set_bit(slot, &sp->slot_bitmap); |
6aa8b732 AK |
871 | } |
872 | ||
039576c0 AK |
873 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
874 | { | |
875 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
876 | ||
877 | if (gpa == UNMAPPED_GVA) | |
878 | return NULL; | |
1d28f5f4 | 879 | return gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
039576c0 AK |
880 | } |
881 | ||
6aa8b732 AK |
882 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
883 | { | |
884 | } | |
885 | ||
3f3e7124 | 886 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, struct page *page) |
6aa8b732 AK |
887 | { |
888 | int level = PT32E_ROOT_LEVEL; | |
889 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
890 | ||
891 | for (; ; level--) { | |
892 | u32 index = PT64_INDEX(v, level); | |
893 | u64 *table; | |
cea0f0e7 | 894 | u64 pte; |
6aa8b732 AK |
895 | |
896 | ASSERT(VALID_PAGE(table_addr)); | |
897 | table = __va(table_addr); | |
898 | ||
899 | if (level == 1) { | |
9647c14c IE |
900 | int was_rmapped; |
901 | ||
cea0f0e7 | 902 | pte = table[index]; |
9647c14c | 903 | was_rmapped = is_rmap_pte(pte); |
2065b372 | 904 | if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) { |
b4231d61 | 905 | kvm_release_page_clean(page); |
cea0f0e7 | 906 | return 0; |
2065b372 | 907 | } |
6aa8b732 | 908 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
38c335f1 AK |
909 | page_header_update_slot(vcpu->kvm, table, |
910 | v >> PAGE_SHIFT); | |
3f3e7124 AK |
911 | table[index] = page_to_phys(page) |
912 | | PT_PRESENT_MASK | PT_WRITABLE_MASK | |
913 | | PT_USER_MASK; | |
9647c14c IE |
914 | if (!was_rmapped) |
915 | rmap_add(vcpu, &table[index], v >> PAGE_SHIFT); | |
8a7ae055 | 916 | else |
b4231d61 IE |
917 | kvm_release_page_clean(page); |
918 | ||
6aa8b732 AK |
919 | return 0; |
920 | } | |
921 | ||
c7addb90 | 922 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 923 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 924 | gfn_t pseudo_gfn; |
6aa8b732 | 925 | |
cea0f0e7 AK |
926 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
927 | >> PAGE_SHIFT; | |
928 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
929 | v, level - 1, | |
fe135d2c | 930 | 1, ACC_ALL, &table[index]); |
25c0de2c | 931 | if (!new_table) { |
6aa8b732 | 932 | pgprintk("nonpaging_map: ENOMEM\n"); |
b4231d61 | 933 | kvm_release_page_clean(page); |
6aa8b732 AK |
934 | return -ENOMEM; |
935 | } | |
936 | ||
47ad8e68 | 937 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 938 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
939 | } |
940 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
941 | } | |
942 | } | |
943 | ||
c7addb90 AK |
944 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
945 | struct kvm_mmu_page *sp) | |
946 | { | |
947 | int i; | |
948 | ||
949 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
950 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
951 | } | |
952 | ||
17ac10ad AK |
953 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
954 | { | |
955 | int i; | |
4db35314 | 956 | struct kvm_mmu_page *sp; |
17ac10ad | 957 | |
7b53aa56 AK |
958 | if (!VALID_PAGE(vcpu->mmu.root_hpa)) |
959 | return; | |
17ac10ad AK |
960 | #ifdef CONFIG_X86_64 |
961 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
962 | hpa_t root = vcpu->mmu.root_hpa; | |
963 | ||
4db35314 AK |
964 | sp = page_header(root); |
965 | --sp->root_count; | |
17ac10ad AK |
966 | vcpu->mmu.root_hpa = INVALID_PAGE; |
967 | return; | |
968 | } | |
969 | #endif | |
970 | for (i = 0; i < 4; ++i) { | |
971 | hpa_t root = vcpu->mmu.pae_root[i]; | |
972 | ||
417726a3 | 973 | if (root) { |
417726a3 | 974 | root &= PT64_BASE_ADDR_MASK; |
4db35314 AK |
975 | sp = page_header(root); |
976 | --sp->root_count; | |
417726a3 | 977 | } |
17ac10ad AK |
978 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
979 | } | |
980 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
981 | } | |
982 | ||
983 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
984 | { | |
985 | int i; | |
cea0f0e7 | 986 | gfn_t root_gfn; |
4db35314 | 987 | struct kvm_mmu_page *sp; |
3bb65a22 | 988 | |
cea0f0e7 | 989 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
990 | |
991 | #ifdef CONFIG_X86_64 | |
992 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
993 | hpa_t root = vcpu->mmu.root_hpa; | |
994 | ||
995 | ASSERT(!VALID_PAGE(root)); | |
4db35314 | 996 | sp = kvm_mmu_get_page(vcpu, root_gfn, 0, |
fe135d2c | 997 | PT64_ROOT_LEVEL, 0, ACC_ALL, NULL); |
4db35314 AK |
998 | root = __pa(sp->spt); |
999 | ++sp->root_count; | |
17ac10ad AK |
1000 | vcpu->mmu.root_hpa = root; |
1001 | return; | |
1002 | } | |
1003 | #endif | |
1004 | for (i = 0; i < 4; ++i) { | |
1005 | hpa_t root = vcpu->mmu.pae_root[i]; | |
1006 | ||
1007 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
1008 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
1009 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
1010 | vcpu->mmu.pae_root[i] = 0; | |
1011 | continue; | |
1012 | } | |
cea0f0e7 | 1013 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 1014 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 1015 | root_gfn = 0; |
4db35314 AK |
1016 | sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
1017 | PT32_ROOT_LEVEL, !is_paging(vcpu), | |
fe135d2c | 1018 | ACC_ALL, NULL); |
4db35314 AK |
1019 | root = __pa(sp->spt); |
1020 | ++sp->root_count; | |
17ac10ad AK |
1021 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
1022 | } | |
1023 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
1024 | } | |
1025 | ||
6aa8b732 AK |
1026 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1027 | { | |
1028 | return vaddr; | |
1029 | } | |
1030 | ||
1031 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
3f3e7124 | 1032 | u32 error_code) |
6aa8b732 | 1033 | { |
3f3e7124 | 1034 | struct page *page; |
e2dec939 | 1035 | int r; |
6aa8b732 | 1036 | |
e2dec939 AK |
1037 | r = mmu_topup_memory_caches(vcpu); |
1038 | if (r) | |
1039 | return r; | |
714b93da | 1040 | |
6aa8b732 AK |
1041 | ASSERT(vcpu); |
1042 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
1043 | ||
3f3e7124 | 1044 | page = gfn_to_page(vcpu->kvm, gva >> PAGE_SHIFT); |
6aa8b732 | 1045 | |
3f3e7124 AK |
1046 | if (is_error_page(page)) { |
1047 | kvm_release_page_clean(page); | |
ebeace86 | 1048 | return 1; |
8a7ae055 | 1049 | } |
6aa8b732 | 1050 | |
3f3e7124 | 1051 | return nonpaging_map(vcpu, gva & PAGE_MASK, page); |
6aa8b732 AK |
1052 | } |
1053 | ||
6aa8b732 AK |
1054 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1055 | { | |
17ac10ad | 1056 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1057 | } |
1058 | ||
1059 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1060 | { | |
1061 | struct kvm_mmu *context = &vcpu->mmu; | |
1062 | ||
1063 | context->new_cr3 = nonpaging_new_cr3; | |
1064 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1065 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1066 | context->free = nonpaging_free; | |
c7addb90 | 1067 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1068 | context->root_level = 0; |
6aa8b732 | 1069 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1070 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1071 | return 0; |
1072 | } | |
1073 | ||
d835dfec | 1074 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
6aa8b732 | 1075 | { |
1165f5fe | 1076 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1077 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1078 | } |
1079 | ||
1080 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1081 | { | |
374cbac0 | 1082 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 1083 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1084 | } |
1085 | ||
6aa8b732 AK |
1086 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1087 | u64 addr, | |
1088 | u32 err_code) | |
1089 | { | |
c3c91fee | 1090 | kvm_inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1091 | } |
1092 | ||
6aa8b732 AK |
1093 | static void paging_free(struct kvm_vcpu *vcpu) |
1094 | { | |
1095 | nonpaging_free(vcpu); | |
1096 | } | |
1097 | ||
1098 | #define PTTYPE 64 | |
1099 | #include "paging_tmpl.h" | |
1100 | #undef PTTYPE | |
1101 | ||
1102 | #define PTTYPE 32 | |
1103 | #include "paging_tmpl.h" | |
1104 | #undef PTTYPE | |
1105 | ||
17ac10ad | 1106 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1107 | { |
1108 | struct kvm_mmu *context = &vcpu->mmu; | |
1109 | ||
1110 | ASSERT(is_pae(vcpu)); | |
1111 | context->new_cr3 = paging_new_cr3; | |
1112 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1113 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1114 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1115 | context->free = paging_free; |
17ac10ad AK |
1116 | context->root_level = level; |
1117 | context->shadow_root_level = level; | |
17c3ba9d | 1118 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1119 | return 0; |
1120 | } | |
1121 | ||
17ac10ad AK |
1122 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1123 | { | |
1124 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1125 | } | |
1126 | ||
6aa8b732 AK |
1127 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1128 | { | |
1129 | struct kvm_mmu *context = &vcpu->mmu; | |
1130 | ||
1131 | context->new_cr3 = paging_new_cr3; | |
1132 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1133 | context->gva_to_gpa = paging32_gva_to_gpa; |
1134 | context->free = paging_free; | |
c7addb90 | 1135 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1136 | context->root_level = PT32_ROOT_LEVEL; |
1137 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1138 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1139 | return 0; |
1140 | } | |
1141 | ||
1142 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1143 | { | |
17ac10ad | 1144 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1145 | } |
1146 | ||
1147 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1148 | { | |
1149 | ASSERT(vcpu); | |
1150 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1151 | ||
1152 | if (!is_paging(vcpu)) | |
1153 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1154 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1155 | return paging64_init_context(vcpu); |
1156 | else if (is_pae(vcpu)) | |
1157 | return paging32E_init_context(vcpu); | |
1158 | else | |
1159 | return paging32_init_context(vcpu); | |
1160 | } | |
1161 | ||
1162 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1163 | { | |
1164 | ASSERT(vcpu); | |
1165 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1166 | vcpu->mmu.free(vcpu); | |
1167 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1168 | } | |
1169 | } | |
1170 | ||
1171 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1172 | { |
1173 | destroy_kvm_mmu(vcpu); | |
1174 | return init_kvm_mmu(vcpu); | |
1175 | } | |
8668a3c4 | 1176 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1177 | |
1178 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1179 | { |
714b93da AK |
1180 | int r; |
1181 | ||
11ec2804 | 1182 | mutex_lock(&vcpu->kvm->lock); |
e2dec939 | 1183 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1184 | if (r) |
1185 | goto out; | |
1186 | mmu_alloc_roots(vcpu); | |
cbdd1bea | 1187 | kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
17c3ba9d | 1188 | kvm_mmu_flush_tlb(vcpu); |
714b93da | 1189 | out: |
11ec2804 | 1190 | mutex_unlock(&vcpu->kvm->lock); |
714b93da | 1191 | return r; |
6aa8b732 | 1192 | } |
17c3ba9d AK |
1193 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1194 | ||
1195 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1196 | { | |
1197 | mmu_free_roots(vcpu); | |
1198 | } | |
6aa8b732 | 1199 | |
09072daf | 1200 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1201 | struct kvm_mmu_page *sp, |
ac1b714e AK |
1202 | u64 *spte) |
1203 | { | |
1204 | u64 pte; | |
1205 | struct kvm_mmu_page *child; | |
1206 | ||
1207 | pte = *spte; | |
c7addb90 | 1208 | if (is_shadow_present_pte(pte)) { |
4db35314 | 1209 | if (sp->role.level == PT_PAGE_TABLE_LEVEL) |
290fc38d | 1210 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1211 | else { |
1212 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1213 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1214 | } |
1215 | } | |
c7addb90 | 1216 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
ac1b714e AK |
1217 | } |
1218 | ||
0028425f | 1219 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
4db35314 | 1220 | struct kvm_mmu_page *sp, |
0028425f | 1221 | u64 *spte, |
c7addb90 AK |
1222 | const void *new, int bytes, |
1223 | int offset_in_pte) | |
0028425f | 1224 | { |
4db35314 | 1225 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) { |
4cee5764 | 1226 | ++vcpu->kvm->stat.mmu_pde_zapped; |
0028425f | 1227 | return; |
4cee5764 | 1228 | } |
0028425f | 1229 | |
4cee5764 | 1230 | ++vcpu->kvm->stat.mmu_pte_updated; |
4db35314 AK |
1231 | if (sp->role.glevels == PT32_ROOT_LEVEL) |
1232 | paging32_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte); | |
0028425f | 1233 | else |
4db35314 | 1234 | paging64_update_pte(vcpu, sp, spte, new, bytes, offset_in_pte); |
0028425f AK |
1235 | } |
1236 | ||
79539cec AK |
1237 | static bool need_remote_flush(u64 old, u64 new) |
1238 | { | |
1239 | if (!is_shadow_present_pte(old)) | |
1240 | return false; | |
1241 | if (!is_shadow_present_pte(new)) | |
1242 | return true; | |
1243 | if ((old ^ new) & PT64_BASE_ADDR_MASK) | |
1244 | return true; | |
1245 | old ^= PT64_NX_MASK; | |
1246 | new ^= PT64_NX_MASK; | |
1247 | return (old & ~new & PT64_PERM_MASK) != 0; | |
1248 | } | |
1249 | ||
1250 | static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new) | |
1251 | { | |
1252 | if (need_remote_flush(old, new)) | |
1253 | kvm_flush_remote_tlbs(vcpu->kvm); | |
1254 | else | |
1255 | kvm_mmu_flush_tlb(vcpu); | |
1256 | } | |
1257 | ||
12b7d28f AK |
1258 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1259 | { | |
1260 | u64 *spte = vcpu->last_pte_updated; | |
1261 | ||
1262 | return !!(spte && (*spte & PT_ACCESSED_MASK)); | |
1263 | } | |
1264 | ||
09072daf | 1265 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1266 | const u8 *new, int bytes) |
da4a00f0 | 1267 | { |
9b7a0325 | 1268 | gfn_t gfn = gpa >> PAGE_SHIFT; |
4db35314 | 1269 | struct kvm_mmu_page *sp; |
0e7bc4b9 | 1270 | struct hlist_node *node, *n; |
9b7a0325 AK |
1271 | struct hlist_head *bucket; |
1272 | unsigned index; | |
79539cec | 1273 | u64 entry; |
9b7a0325 | 1274 | u64 *spte; |
9b7a0325 | 1275 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1276 | unsigned pte_size; |
9b7a0325 | 1277 | unsigned page_offset; |
0e7bc4b9 | 1278 | unsigned misaligned; |
fce0657f | 1279 | unsigned quadrant; |
9b7a0325 | 1280 | int level; |
86a5ba02 | 1281 | int flooded = 0; |
ac1b714e | 1282 | int npte; |
9b7a0325 | 1283 | |
da4a00f0 | 1284 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
4cee5764 | 1285 | ++vcpu->kvm->stat.mmu_pte_write; |
c7addb90 | 1286 | kvm_mmu_audit(vcpu, "pre pte write"); |
12b7d28f AK |
1287 | if (gfn == vcpu->last_pt_write_gfn |
1288 | && !last_updated_pte_accessed(vcpu)) { | |
86a5ba02 AK |
1289 | ++vcpu->last_pt_write_count; |
1290 | if (vcpu->last_pt_write_count >= 3) | |
1291 | flooded = 1; | |
1292 | } else { | |
1293 | vcpu->last_pt_write_gfn = gfn; | |
1294 | vcpu->last_pt_write_count = 1; | |
12b7d28f | 1295 | vcpu->last_pte_updated = NULL; |
86a5ba02 | 1296 | } |
9b7a0325 AK |
1297 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1298 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
4db35314 AK |
1299 | hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) { |
1300 | if (sp->gfn != gfn || sp->role.metaphysical) | |
9b7a0325 | 1301 | continue; |
4db35314 | 1302 | pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
0e7bc4b9 | 1303 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); |
e925c5ba | 1304 | misaligned |= bytes < 4; |
86a5ba02 | 1305 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1306 | /* |
1307 | * Misaligned accesses are too much trouble to fix | |
1308 | * up; also, they usually indicate a page is not used | |
1309 | * as a page table. | |
86a5ba02 AK |
1310 | * |
1311 | * If we're seeing too many writes to a page, | |
1312 | * it may no longer be a page table, or we may be | |
1313 | * forking, in which case it is better to unmap the | |
1314 | * page. | |
0e7bc4b9 AK |
1315 | */ |
1316 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
4db35314 AK |
1317 | gpa, bytes, sp->role.word); |
1318 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1319 | ++vcpu->kvm->stat.mmu_flooded; |
0e7bc4b9 AK |
1320 | continue; |
1321 | } | |
9b7a0325 | 1322 | page_offset = offset; |
4db35314 | 1323 | level = sp->role.level; |
ac1b714e | 1324 | npte = 1; |
4db35314 | 1325 | if (sp->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1326 | page_offset <<= 1; /* 32->64 */ |
1327 | /* | |
1328 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1329 | * only 2MB. So we need to double the offset again | |
1330 | * and zap two pdes instead of one. | |
1331 | */ | |
1332 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1333 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1334 | page_offset <<= 1; |
1335 | npte = 2; | |
1336 | } | |
fce0657f | 1337 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1338 | page_offset &= ~PAGE_MASK; |
4db35314 | 1339 | if (quadrant != sp->role.quadrant) |
fce0657f | 1340 | continue; |
9b7a0325 | 1341 | } |
4db35314 | 1342 | spte = &sp->spt[page_offset / sizeof(*spte)]; |
ac1b714e | 1343 | while (npte--) { |
79539cec | 1344 | entry = *spte; |
4db35314 AK |
1345 | mmu_pte_write_zap_pte(vcpu, sp, spte); |
1346 | mmu_pte_write_new_pte(vcpu, sp, spte, new, bytes, | |
c7addb90 | 1347 | page_offset & (pte_size - 1)); |
79539cec | 1348 | mmu_pte_write_flush_tlb(vcpu, entry, *spte); |
ac1b714e | 1349 | ++spte; |
9b7a0325 | 1350 | } |
9b7a0325 | 1351 | } |
c7addb90 | 1352 | kvm_mmu_audit(vcpu, "post pte write"); |
da4a00f0 AK |
1353 | } |
1354 | ||
a436036b AK |
1355 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1356 | { | |
1357 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1358 | ||
f67a46f4 | 1359 | return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
a436036b AK |
1360 | } |
1361 | ||
22d95b12 | 1362 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 AK |
1363 | { |
1364 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
4db35314 | 1365 | struct kvm_mmu_page *sp; |
ebeace86 | 1366 | |
4db35314 AK |
1367 | sp = container_of(vcpu->kvm->active_mmu_pages.prev, |
1368 | struct kvm_mmu_page, link); | |
1369 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
4cee5764 | 1370 | ++vcpu->kvm->stat.mmu_recycled; |
ebeace86 AK |
1371 | } |
1372 | } | |
ebeace86 | 1373 | |
3067714c AK |
1374 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code) |
1375 | { | |
1376 | int r; | |
1377 | enum emulation_result er; | |
1378 | ||
1379 | mutex_lock(&vcpu->kvm->lock); | |
1380 | r = vcpu->mmu.page_fault(vcpu, cr2, error_code); | |
1381 | if (r < 0) | |
1382 | goto out; | |
1383 | ||
1384 | if (!r) { | |
1385 | r = 1; | |
1386 | goto out; | |
1387 | } | |
1388 | ||
b733bfb5 AK |
1389 | r = mmu_topup_memory_caches(vcpu); |
1390 | if (r) | |
1391 | goto out; | |
1392 | ||
3067714c AK |
1393 | er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0); |
1394 | mutex_unlock(&vcpu->kvm->lock); | |
1395 | ||
1396 | switch (er) { | |
1397 | case EMULATE_DONE: | |
1398 | return 1; | |
1399 | case EMULATE_DO_MMIO: | |
1400 | ++vcpu->stat.mmio_exits; | |
1401 | return 0; | |
1402 | case EMULATE_FAIL: | |
1403 | kvm_report_emulation_failure(vcpu, "pagetable"); | |
1404 | return 1; | |
1405 | default: | |
1406 | BUG(); | |
1407 | } | |
1408 | out: | |
1409 | mutex_unlock(&vcpu->kvm->lock); | |
1410 | return r; | |
1411 | } | |
1412 | EXPORT_SYMBOL_GPL(kvm_mmu_page_fault); | |
1413 | ||
6aa8b732 AK |
1414 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1415 | { | |
4db35314 | 1416 | struct kvm_mmu_page *sp; |
6aa8b732 | 1417 | |
f51234c2 | 1418 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
4db35314 AK |
1419 | sp = container_of(vcpu->kvm->active_mmu_pages.next, |
1420 | struct kvm_mmu_page, link); | |
1421 | kvm_mmu_zap_page(vcpu->kvm, sp); | |
f51234c2 | 1422 | } |
17ac10ad | 1423 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1424 | } |
1425 | ||
1426 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1427 | { | |
17ac10ad | 1428 | struct page *page; |
6aa8b732 AK |
1429 | int i; |
1430 | ||
1431 | ASSERT(vcpu); | |
1432 | ||
82ce2c96 IE |
1433 | if (vcpu->kvm->n_requested_mmu_pages) |
1434 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages; | |
1435 | else | |
1436 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages; | |
17ac10ad AK |
1437 | /* |
1438 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1439 | * Therefore we need to allocate shadow page tables in the first | |
1440 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1441 | */ | |
1442 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1443 | if (!page) | |
1444 | goto error_1; | |
1445 | vcpu->mmu.pae_root = page_address(page); | |
1446 | for (i = 0; i < 4; ++i) | |
1447 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1448 | ||
6aa8b732 AK |
1449 | return 0; |
1450 | ||
1451 | error_1: | |
1452 | free_mmu_pages(vcpu); | |
1453 | return -ENOMEM; | |
1454 | } | |
1455 | ||
8018c27b | 1456 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1457 | { |
6aa8b732 AK |
1458 | ASSERT(vcpu); |
1459 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
6aa8b732 | 1460 | |
8018c27b IM |
1461 | return alloc_mmu_pages(vcpu); |
1462 | } | |
6aa8b732 | 1463 | |
8018c27b IM |
1464 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1465 | { | |
1466 | ASSERT(vcpu); | |
1467 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
2c264957 | 1468 | |
8018c27b | 1469 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1470 | } |
1471 | ||
1472 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1473 | { | |
1474 | ASSERT(vcpu); | |
1475 | ||
1476 | destroy_kvm_mmu(vcpu); | |
1477 | free_mmu_pages(vcpu); | |
714b93da | 1478 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1479 | } |
1480 | ||
90cb0529 | 1481 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 | 1482 | { |
4db35314 | 1483 | struct kvm_mmu_page *sp; |
6aa8b732 | 1484 | |
4db35314 | 1485 | list_for_each_entry(sp, &kvm->active_mmu_pages, link) { |
6aa8b732 AK |
1486 | int i; |
1487 | u64 *pt; | |
1488 | ||
4db35314 | 1489 | if (!test_bit(slot, &sp->slot_bitmap)) |
6aa8b732 AK |
1490 | continue; |
1491 | ||
4db35314 | 1492 | pt = sp->spt; |
6aa8b732 AK |
1493 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1494 | /* avoid RMW */ | |
9647c14c | 1495 | if (pt[i] & PT_WRITABLE_MASK) |
6aa8b732 | 1496 | pt[i] &= ~PT_WRITABLE_MASK; |
6aa8b732 AK |
1497 | } |
1498 | } | |
37a7d8b0 | 1499 | |
90cb0529 | 1500 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 1501 | { |
4db35314 | 1502 | struct kvm_mmu_page *sp, *node; |
e0fa826f | 1503 | |
4db35314 AK |
1504 | list_for_each_entry_safe(sp, node, &kvm->active_mmu_pages, link) |
1505 | kvm_mmu_zap_page(kvm, sp); | |
e0fa826f | 1506 | |
90cb0529 | 1507 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
1508 | } |
1509 | ||
b5a33a75 AK |
1510 | void kvm_mmu_module_exit(void) |
1511 | { | |
1512 | if (pte_chain_cache) | |
1513 | kmem_cache_destroy(pte_chain_cache); | |
1514 | if (rmap_desc_cache) | |
1515 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1516 | if (mmu_page_header_cache) |
1517 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1518 | } |
1519 | ||
1520 | int kvm_mmu_module_init(void) | |
1521 | { | |
1522 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1523 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 1524 | 0, 0, NULL); |
b5a33a75 AK |
1525 | if (!pte_chain_cache) |
1526 | goto nomem; | |
1527 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1528 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 1529 | 0, 0, NULL); |
b5a33a75 AK |
1530 | if (!rmap_desc_cache) |
1531 | goto nomem; | |
1532 | ||
d3d25b04 AK |
1533 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
1534 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 1535 | 0, 0, NULL); |
d3d25b04 AK |
1536 | if (!mmu_page_header_cache) |
1537 | goto nomem; | |
1538 | ||
b5a33a75 AK |
1539 | return 0; |
1540 | ||
1541 | nomem: | |
1542 | kvm_mmu_module_exit(); | |
1543 | return -ENOMEM; | |
1544 | } | |
1545 | ||
3ad82a7e ZX |
1546 | /* |
1547 | * Caculate mmu pages needed for kvm. | |
1548 | */ | |
1549 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm) | |
1550 | { | |
1551 | int i; | |
1552 | unsigned int nr_mmu_pages; | |
1553 | unsigned int nr_pages = 0; | |
1554 | ||
1555 | for (i = 0; i < kvm->nmemslots; i++) | |
1556 | nr_pages += kvm->memslots[i].npages; | |
1557 | ||
1558 | nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000; | |
1559 | nr_mmu_pages = max(nr_mmu_pages, | |
1560 | (unsigned int) KVM_MIN_ALLOC_MMU_PAGES); | |
1561 | ||
1562 | return nr_mmu_pages; | |
1563 | } | |
1564 | ||
37a7d8b0 AK |
1565 | #ifdef AUDIT |
1566 | ||
1567 | static const char *audit_msg; | |
1568 | ||
1569 | static gva_t canonicalize(gva_t gva) | |
1570 | { | |
1571 | #ifdef CONFIG_X86_64 | |
1572 | gva = (long long)(gva << 16) >> 16; | |
1573 | #endif | |
1574 | return gva; | |
1575 | } | |
1576 | ||
1577 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1578 | gva_t va, int level) | |
1579 | { | |
1580 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1581 | int i; | |
1582 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1583 | ||
1584 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1585 | u64 ent = pt[i]; | |
1586 | ||
c7addb90 | 1587 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
1588 | continue; |
1589 | ||
1590 | va = canonicalize(va); | |
c7addb90 AK |
1591 | if (level > 1) { |
1592 | if (ent == shadow_notrap_nonpresent_pte) | |
1593 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
1594 | " in nonleaf level: levels %d gva %lx" | |
1595 | " level %d pte %llx\n", audit_msg, | |
1596 | vcpu->mmu.root_level, va, level, ent); | |
1597 | ||
37a7d8b0 | 1598 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 1599 | } else { |
37a7d8b0 | 1600 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); |
1d28f5f4 AK |
1601 | struct page *page = gpa_to_page(vcpu, gpa); |
1602 | hpa_t hpa = page_to_phys(page); | |
37a7d8b0 | 1603 | |
c7addb90 | 1604 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 1605 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
1606 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
1607 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
37a7d8b0 | 1608 | audit_msg, vcpu->mmu.root_level, |
d77c26fc MD |
1609 | va, gpa, hpa, ent, |
1610 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
1611 | else if (ent == shadow_notrap_nonpresent_pte |
1612 | && !is_error_hpa(hpa)) | |
1613 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
1614 | " valid guest gva %lx\n", audit_msg, va); | |
b4231d61 | 1615 | kvm_release_page_clean(page); |
c7addb90 | 1616 | |
37a7d8b0 AK |
1617 | } |
1618 | } | |
1619 | } | |
1620 | ||
1621 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1622 | { | |
1ea252af | 1623 | unsigned i; |
37a7d8b0 AK |
1624 | |
1625 | if (vcpu->mmu.root_level == 4) | |
1626 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1627 | else | |
1628 | for (i = 0; i < 4; ++i) | |
1629 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1630 | audit_mappings_page(vcpu, | |
1631 | vcpu->mmu.pae_root[i], | |
1632 | i << 30, | |
1633 | 2); | |
1634 | } | |
1635 | ||
1636 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1637 | { | |
1638 | int nmaps = 0; | |
1639 | int i, j, k; | |
1640 | ||
1641 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1642 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1643 | struct kvm_rmap_desc *d; | |
1644 | ||
1645 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 1646 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 1647 | |
290fc38d | 1648 | if (!*rmapp) |
37a7d8b0 | 1649 | continue; |
290fc38d | 1650 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
1651 | ++nmaps; |
1652 | continue; | |
1653 | } | |
290fc38d | 1654 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
1655 | while (d) { |
1656 | for (k = 0; k < RMAP_EXT; ++k) | |
1657 | if (d->shadow_ptes[k]) | |
1658 | ++nmaps; | |
1659 | else | |
1660 | break; | |
1661 | d = d->more; | |
1662 | } | |
1663 | } | |
1664 | } | |
1665 | return nmaps; | |
1666 | } | |
1667 | ||
1668 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1669 | { | |
1670 | int nmaps = 0; | |
4db35314 | 1671 | struct kvm_mmu_page *sp; |
37a7d8b0 AK |
1672 | int i; |
1673 | ||
4db35314 AK |
1674 | list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) { |
1675 | u64 *pt = sp->spt; | |
37a7d8b0 | 1676 | |
4db35314 | 1677 | if (sp->role.level != PT_PAGE_TABLE_LEVEL) |
37a7d8b0 AK |
1678 | continue; |
1679 | ||
1680 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1681 | u64 ent = pt[i]; | |
1682 | ||
1683 | if (!(ent & PT_PRESENT_MASK)) | |
1684 | continue; | |
1685 | if (!(ent & PT_WRITABLE_MASK)) | |
1686 | continue; | |
1687 | ++nmaps; | |
1688 | } | |
1689 | } | |
1690 | return nmaps; | |
1691 | } | |
1692 | ||
1693 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1694 | { | |
1695 | int n_rmap = count_rmaps(vcpu); | |
1696 | int n_actual = count_writable_mappings(vcpu); | |
1697 | ||
1698 | if (n_rmap != n_actual) | |
1699 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1700 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1701 | } | |
1702 | ||
1703 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1704 | { | |
4db35314 | 1705 | struct kvm_mmu_page *sp; |
290fc38d IE |
1706 | struct kvm_memory_slot *slot; |
1707 | unsigned long *rmapp; | |
1708 | gfn_t gfn; | |
37a7d8b0 | 1709 | |
4db35314 AK |
1710 | list_for_each_entry(sp, &vcpu->kvm->active_mmu_pages, link) { |
1711 | if (sp->role.metaphysical) | |
37a7d8b0 AK |
1712 | continue; |
1713 | ||
4db35314 AK |
1714 | slot = gfn_to_memslot(vcpu->kvm, sp->gfn); |
1715 | gfn = unalias_gfn(vcpu->kvm, sp->gfn); | |
290fc38d IE |
1716 | rmapp = &slot->rmap[gfn - slot->base_gfn]; |
1717 | if (*rmapp) | |
37a7d8b0 AK |
1718 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
1719 | " mappings: gfn %lx role %x\n", | |
4db35314 AK |
1720 | __FUNCTION__, audit_msg, sp->gfn, |
1721 | sp->role.word); | |
37a7d8b0 AK |
1722 | } |
1723 | } | |
1724 | ||
1725 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1726 | { | |
1727 | int olddbg = dbg; | |
1728 | ||
1729 | dbg = 0; | |
1730 | audit_msg = msg; | |
1731 | audit_rmap(vcpu); | |
1732 | audit_write_protection(vcpu); | |
1733 | audit_mappings(vcpu); | |
1734 | dbg = olddbg; | |
1735 | } | |
1736 | ||
1737 | #endif |