Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
e495606d AK |
19 | |
20 | #include "vmx.h" | |
21 | #include "kvm.h" | |
22 | ||
6aa8b732 AK |
23 | #include <linux/types.h> |
24 | #include <linux/string.h> | |
6aa8b732 AK |
25 | #include <linux/mm.h> |
26 | #include <linux/highmem.h> | |
27 | #include <linux/module.h> | |
28 | ||
e495606d AK |
29 | #include <asm/page.h> |
30 | #include <asm/cmpxchg.h> | |
6aa8b732 | 31 | |
37a7d8b0 AK |
32 | #undef MMU_DEBUG |
33 | ||
34 | #undef AUDIT | |
35 | ||
36 | #ifdef AUDIT | |
37 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
38 | #else | |
39 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
40 | #endif | |
41 | ||
42 | #ifdef MMU_DEBUG | |
43 | ||
44 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
45 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
46 | ||
47 | #else | |
48 | ||
49 | #define pgprintk(x...) do { } while (0) | |
50 | #define rmap_printk(x...) do { } while (0) | |
51 | ||
52 | #endif | |
53 | ||
54 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
55 | static int dbg = 1; | |
56 | #endif | |
6aa8b732 | 57 | |
d6c69ee9 YD |
58 | #ifndef MMU_DEBUG |
59 | #define ASSERT(x) do { } while (0) | |
60 | #else | |
6aa8b732 AK |
61 | #define ASSERT(x) \ |
62 | if (!(x)) { \ | |
63 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
64 | __FILE__, __LINE__, #x); \ | |
65 | } | |
d6c69ee9 | 66 | #endif |
6aa8b732 | 67 | |
cea0f0e7 AK |
68 | #define PT64_PT_BITS 9 |
69 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
70 | #define PT32_PT_BITS 10 | |
71 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
72 | |
73 | #define PT_WRITABLE_SHIFT 1 | |
74 | ||
75 | #define PT_PRESENT_MASK (1ULL << 0) | |
76 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
77 | #define PT_USER_MASK (1ULL << 2) | |
78 | #define PT_PWT_MASK (1ULL << 3) | |
79 | #define PT_PCD_MASK (1ULL << 4) | |
80 | #define PT_ACCESSED_MASK (1ULL << 5) | |
81 | #define PT_DIRTY_MASK (1ULL << 6) | |
82 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
83 | #define PT_PAT_MASK (1ULL << 7) | |
84 | #define PT_GLOBAL_MASK (1ULL << 8) | |
85 | #define PT64_NX_MASK (1ULL << 63) | |
86 | ||
87 | #define PT_PAT_SHIFT 7 | |
88 | #define PT_DIR_PAT_SHIFT 12 | |
89 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
90 | ||
91 | #define PT32_DIR_PSE36_SIZE 4 | |
92 | #define PT32_DIR_PSE36_SHIFT 13 | |
d77c26fc MD |
93 | #define PT32_DIR_PSE36_MASK \ |
94 | (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
6aa8b732 AK |
95 | |
96 | ||
6aa8b732 AK |
97 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
98 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
99 | ||
6aa8b732 AK |
100 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
101 | ||
6aa8b732 AK |
102 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
103 | ||
104 | #define PT64_LEVEL_BITS 9 | |
105 | ||
106 | #define PT64_LEVEL_SHIFT(level) \ | |
d77c26fc | 107 | (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS) |
6aa8b732 AK |
108 | |
109 | #define PT64_LEVEL_MASK(level) \ | |
110 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
111 | ||
112 | #define PT64_INDEX(address, level)\ | |
113 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
114 | ||
115 | ||
116 | #define PT32_LEVEL_BITS 10 | |
117 | ||
118 | #define PT32_LEVEL_SHIFT(level) \ | |
d77c26fc | 119 | (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS) |
6aa8b732 AK |
120 | |
121 | #define PT32_LEVEL_MASK(level) \ | |
122 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
123 | ||
124 | #define PT32_INDEX(address, level)\ | |
125 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
126 | ||
127 | ||
27aba766 | 128 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
129 | #define PT64_DIR_BASE_ADDR_MASK \ |
130 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
131 | ||
132 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
133 | #define PT32_DIR_BASE_ADDR_MASK \ | |
134 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
135 | ||
136 | ||
137 | #define PFERR_PRESENT_MASK (1U << 0) | |
138 | #define PFERR_WRITE_MASK (1U << 1) | |
139 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 140 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
141 | |
142 | #define PT64_ROOT_LEVEL 4 | |
143 | #define PT32_ROOT_LEVEL 2 | |
144 | #define PT32E_ROOT_LEVEL 3 | |
145 | ||
146 | #define PT_DIRECTORY_LEVEL 2 | |
147 | #define PT_PAGE_TABLE_LEVEL 1 | |
148 | ||
cd4a4e53 AK |
149 | #define RMAP_EXT 4 |
150 | ||
151 | struct kvm_rmap_desc { | |
152 | u64 *shadow_ptes[RMAP_EXT]; | |
153 | struct kvm_rmap_desc *more; | |
154 | }; | |
155 | ||
b5a33a75 AK |
156 | static struct kmem_cache *pte_chain_cache; |
157 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 | 158 | static struct kmem_cache *mmu_page_header_cache; |
b5a33a75 | 159 | |
c7addb90 AK |
160 | static u64 __read_mostly shadow_trap_nonpresent_pte; |
161 | static u64 __read_mostly shadow_notrap_nonpresent_pte; | |
162 | ||
163 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte) | |
164 | { | |
165 | shadow_trap_nonpresent_pte = trap_pte; | |
166 | shadow_notrap_nonpresent_pte = notrap_pte; | |
167 | } | |
168 | EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes); | |
169 | ||
6aa8b732 AK |
170 | static int is_write_protection(struct kvm_vcpu *vcpu) |
171 | { | |
707d92fa | 172 | return vcpu->cr0 & X86_CR0_WP; |
6aa8b732 AK |
173 | } |
174 | ||
175 | static int is_cpuid_PSE36(void) | |
176 | { | |
177 | return 1; | |
178 | } | |
179 | ||
73b1087e AK |
180 | static int is_nx(struct kvm_vcpu *vcpu) |
181 | { | |
182 | return vcpu->shadow_efer & EFER_NX; | |
183 | } | |
184 | ||
6aa8b732 AK |
185 | static int is_present_pte(unsigned long pte) |
186 | { | |
187 | return pte & PT_PRESENT_MASK; | |
188 | } | |
189 | ||
c7addb90 AK |
190 | static int is_shadow_present_pte(u64 pte) |
191 | { | |
192 | pte &= ~PT_SHADOW_IO_MARK; | |
193 | return pte != shadow_trap_nonpresent_pte | |
194 | && pte != shadow_notrap_nonpresent_pte; | |
195 | } | |
196 | ||
6aa8b732 AK |
197 | static int is_writeble_pte(unsigned long pte) |
198 | { | |
199 | return pte & PT_WRITABLE_MASK; | |
200 | } | |
201 | ||
e3c5e7ec AK |
202 | static int is_dirty_pte(unsigned long pte) |
203 | { | |
204 | return pte & PT_DIRTY_MASK; | |
205 | } | |
206 | ||
6aa8b732 AK |
207 | static int is_io_pte(unsigned long pte) |
208 | { | |
209 | return pte & PT_SHADOW_IO_MARK; | |
210 | } | |
211 | ||
cd4a4e53 AK |
212 | static int is_rmap_pte(u64 pte) |
213 | { | |
214 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
215 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
216 | } | |
217 | ||
e663ee64 AK |
218 | static void set_shadow_pte(u64 *sptep, u64 spte) |
219 | { | |
220 | #ifdef CONFIG_X86_64 | |
221 | set_64bit((unsigned long *)sptep, spte); | |
222 | #else | |
223 | set_64bit((unsigned long long *)sptep, spte); | |
224 | #endif | |
225 | } | |
226 | ||
e2dec939 | 227 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 228 | struct kmem_cache *base_cache, int min) |
714b93da AK |
229 | { |
230 | void *obj; | |
231 | ||
232 | if (cache->nobjs >= min) | |
e2dec939 | 233 | return 0; |
714b93da | 234 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
2e3e5882 | 235 | obj = kmem_cache_zalloc(base_cache, GFP_KERNEL); |
714b93da | 236 | if (!obj) |
e2dec939 | 237 | return -ENOMEM; |
714b93da AK |
238 | cache->objects[cache->nobjs++] = obj; |
239 | } | |
e2dec939 | 240 | return 0; |
714b93da AK |
241 | } |
242 | ||
243 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
244 | { | |
245 | while (mc->nobjs) | |
246 | kfree(mc->objects[--mc->nobjs]); | |
247 | } | |
248 | ||
c1158e63 | 249 | static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, |
2e3e5882 | 250 | int min) |
c1158e63 AK |
251 | { |
252 | struct page *page; | |
253 | ||
254 | if (cache->nobjs >= min) | |
255 | return 0; | |
256 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { | |
2e3e5882 | 257 | page = alloc_page(GFP_KERNEL); |
c1158e63 AK |
258 | if (!page) |
259 | return -ENOMEM; | |
260 | set_page_private(page, 0); | |
261 | cache->objects[cache->nobjs++] = page_address(page); | |
262 | } | |
263 | return 0; | |
264 | } | |
265 | ||
266 | static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc) | |
267 | { | |
268 | while (mc->nobjs) | |
c4d198d5 | 269 | free_page((unsigned long)mc->objects[--mc->nobjs]); |
c1158e63 AK |
270 | } |
271 | ||
2e3e5882 | 272 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
714b93da | 273 | { |
e2dec939 AK |
274 | int r; |
275 | ||
2e3e5882 | 276 | kvm_mmu_free_some_pages(vcpu); |
e2dec939 | 277 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, |
2e3e5882 | 278 | pte_chain_cache, 4); |
e2dec939 AK |
279 | if (r) |
280 | goto out; | |
281 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
2e3e5882 | 282 | rmap_desc_cache, 1); |
d3d25b04 AK |
283 | if (r) |
284 | goto out; | |
290fc38d | 285 | r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8); |
d3d25b04 AK |
286 | if (r) |
287 | goto out; | |
288 | r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache, | |
2e3e5882 | 289 | mmu_page_header_cache, 4); |
e2dec939 AK |
290 | out: |
291 | return r; | |
714b93da AK |
292 | } |
293 | ||
294 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) | |
295 | { | |
296 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
297 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
c1158e63 | 298 | mmu_free_memory_cache_page(&vcpu->mmu_page_cache); |
d3d25b04 | 299 | mmu_free_memory_cache(&vcpu->mmu_page_header_cache); |
714b93da AK |
300 | } |
301 | ||
302 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
303 | size_t size) | |
304 | { | |
305 | void *p; | |
306 | ||
307 | BUG_ON(!mc->nobjs); | |
308 | p = mc->objects[--mc->nobjs]; | |
309 | memset(p, 0, size); | |
310 | return p; | |
311 | } | |
312 | ||
714b93da AK |
313 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) |
314 | { | |
315 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
316 | sizeof(struct kvm_pte_chain)); | |
317 | } | |
318 | ||
90cb0529 | 319 | static void mmu_free_pte_chain(struct kvm_pte_chain *pc) |
714b93da | 320 | { |
90cb0529 | 321 | kfree(pc); |
714b93da AK |
322 | } |
323 | ||
324 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
325 | { | |
326 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
327 | sizeof(struct kvm_rmap_desc)); | |
328 | } | |
329 | ||
90cb0529 | 330 | static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd) |
714b93da | 331 | { |
90cb0529 | 332 | kfree(rd); |
714b93da AK |
333 | } |
334 | ||
290fc38d IE |
335 | /* |
336 | * Take gfn and return the reverse mapping to it. | |
337 | * Note: gfn must be unaliased before this function get called | |
338 | */ | |
339 | ||
340 | static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn) | |
341 | { | |
342 | struct kvm_memory_slot *slot; | |
343 | ||
344 | slot = gfn_to_memslot(kvm, gfn); | |
345 | return &slot->rmap[gfn - slot->base_gfn]; | |
346 | } | |
347 | ||
cd4a4e53 AK |
348 | /* |
349 | * Reverse mapping data structures: | |
350 | * | |
290fc38d IE |
351 | * If rmapp bit zero is zero, then rmapp point to the shadw page table entry |
352 | * that points to page_address(page). | |
cd4a4e53 | 353 | * |
290fc38d IE |
354 | * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc |
355 | * containing more mappings. | |
cd4a4e53 | 356 | */ |
290fc38d | 357 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn) |
cd4a4e53 | 358 | { |
290fc38d | 359 | struct kvm_mmu_page *page; |
cd4a4e53 | 360 | struct kvm_rmap_desc *desc; |
290fc38d | 361 | unsigned long *rmapp; |
cd4a4e53 AK |
362 | int i; |
363 | ||
364 | if (!is_rmap_pte(*spte)) | |
365 | return; | |
290fc38d IE |
366 | gfn = unalias_gfn(vcpu->kvm, gfn); |
367 | page = page_header(__pa(spte)); | |
368 | page->gfns[spte - page->spt] = gfn; | |
369 | rmapp = gfn_to_rmap(vcpu->kvm, gfn); | |
370 | if (!*rmapp) { | |
cd4a4e53 | 371 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
290fc38d IE |
372 | *rmapp = (unsigned long)spte; |
373 | } else if (!(*rmapp & 1)) { | |
cd4a4e53 | 374 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 375 | desc = mmu_alloc_rmap_desc(vcpu); |
290fc38d | 376 | desc->shadow_ptes[0] = (u64 *)*rmapp; |
cd4a4e53 | 377 | desc->shadow_ptes[1] = spte; |
290fc38d | 378 | *rmapp = (unsigned long)desc | 1; |
cd4a4e53 AK |
379 | } else { |
380 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
290fc38d | 381 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
382 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
383 | desc = desc->more; | |
384 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 385 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
386 | desc = desc->more; |
387 | } | |
388 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
389 | ; | |
390 | desc->shadow_ptes[i] = spte; | |
391 | } | |
392 | } | |
393 | ||
290fc38d | 394 | static void rmap_desc_remove_entry(unsigned long *rmapp, |
cd4a4e53 AK |
395 | struct kvm_rmap_desc *desc, |
396 | int i, | |
397 | struct kvm_rmap_desc *prev_desc) | |
398 | { | |
399 | int j; | |
400 | ||
401 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
402 | ; | |
403 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 404 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
405 | if (j != 0) |
406 | return; | |
407 | if (!prev_desc && !desc->more) | |
290fc38d | 408 | *rmapp = (unsigned long)desc->shadow_ptes[0]; |
cd4a4e53 AK |
409 | else |
410 | if (prev_desc) | |
411 | prev_desc->more = desc->more; | |
412 | else | |
290fc38d | 413 | *rmapp = (unsigned long)desc->more | 1; |
90cb0529 | 414 | mmu_free_rmap_desc(desc); |
cd4a4e53 AK |
415 | } |
416 | ||
290fc38d | 417 | static void rmap_remove(struct kvm *kvm, u64 *spte) |
cd4a4e53 | 418 | { |
cd4a4e53 AK |
419 | struct kvm_rmap_desc *desc; |
420 | struct kvm_rmap_desc *prev_desc; | |
290fc38d IE |
421 | struct kvm_mmu_page *page; |
422 | unsigned long *rmapp; | |
cd4a4e53 AK |
423 | int i; |
424 | ||
425 | if (!is_rmap_pte(*spte)) | |
426 | return; | |
290fc38d IE |
427 | page = page_header(__pa(spte)); |
428 | rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]); | |
429 | if (!*rmapp) { | |
cd4a4e53 AK |
430 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
431 | BUG(); | |
290fc38d | 432 | } else if (!(*rmapp & 1)) { |
cd4a4e53 | 433 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
290fc38d | 434 | if ((u64 *)*rmapp != spte) { |
cd4a4e53 AK |
435 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
436 | spte, *spte); | |
437 | BUG(); | |
438 | } | |
290fc38d | 439 | *rmapp = 0; |
cd4a4e53 AK |
440 | } else { |
441 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
290fc38d | 442 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
cd4a4e53 AK |
443 | prev_desc = NULL; |
444 | while (desc) { | |
445 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
446 | if (desc->shadow_ptes[i] == spte) { | |
290fc38d | 447 | rmap_desc_remove_entry(rmapp, |
714b93da | 448 | desc, i, |
cd4a4e53 AK |
449 | prev_desc); |
450 | return; | |
451 | } | |
452 | prev_desc = desc; | |
453 | desc = desc->more; | |
454 | } | |
455 | BUG(); | |
456 | } | |
457 | } | |
458 | ||
4a4c9924 | 459 | static void rmap_write_protect(struct kvm *kvm, u64 gfn) |
374cbac0 | 460 | { |
374cbac0 | 461 | struct kvm_rmap_desc *desc; |
290fc38d | 462 | unsigned long *rmapp; |
374cbac0 AK |
463 | u64 *spte; |
464 | ||
4a4c9924 AL |
465 | gfn = unalias_gfn(kvm, gfn); |
466 | rmapp = gfn_to_rmap(kvm, gfn); | |
374cbac0 | 467 | |
290fc38d IE |
468 | while (*rmapp) { |
469 | if (!(*rmapp & 1)) | |
470 | spte = (u64 *)*rmapp; | |
374cbac0 | 471 | else { |
290fc38d | 472 | desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
374cbac0 AK |
473 | spte = desc->shadow_ptes[0]; |
474 | } | |
475 | BUG_ON(!spte); | |
374cbac0 AK |
476 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
477 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
478 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
4a4c9924 | 479 | rmap_remove(kvm, spte); |
e663ee64 | 480 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
4a4c9924 | 481 | kvm_flush_remote_tlbs(kvm); |
374cbac0 AK |
482 | } |
483 | } | |
484 | ||
d6c69ee9 | 485 | #ifdef MMU_DEBUG |
47ad8e68 | 486 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 487 | { |
139bdb2d AK |
488 | u64 *pos; |
489 | u64 *end; | |
490 | ||
47ad8e68 | 491 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
c7addb90 | 492 | if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) { |
139bdb2d AK |
493 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, |
494 | pos, *pos); | |
6aa8b732 | 495 | return 0; |
139bdb2d | 496 | } |
6aa8b732 AK |
497 | return 1; |
498 | } | |
d6c69ee9 | 499 | #endif |
6aa8b732 | 500 | |
90cb0529 | 501 | static void kvm_mmu_free_page(struct kvm *kvm, |
4b02d6da | 502 | struct kvm_mmu_page *page_head) |
260746c0 | 503 | { |
47ad8e68 | 504 | ASSERT(is_empty_shadow_page(page_head->spt)); |
d3d25b04 | 505 | list_del(&page_head->link); |
c1158e63 | 506 | __free_page(virt_to_page(page_head->spt)); |
290fc38d | 507 | __free_page(virt_to_page(page_head->gfns)); |
90cb0529 AK |
508 | kfree(page_head); |
509 | ++kvm->n_free_mmu_pages; | |
260746c0 AK |
510 | } |
511 | ||
cea0f0e7 AK |
512 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
513 | { | |
514 | return gfn; | |
515 | } | |
516 | ||
25c0de2c AK |
517 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
518 | u64 *parent_pte) | |
6aa8b732 AK |
519 | { |
520 | struct kvm_mmu_page *page; | |
521 | ||
d3d25b04 | 522 | if (!vcpu->kvm->n_free_mmu_pages) |
25c0de2c | 523 | return NULL; |
6aa8b732 | 524 | |
d3d25b04 AK |
525 | page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, |
526 | sizeof *page); | |
527 | page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
290fc38d | 528 | page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); |
d3d25b04 AK |
529 | set_page_private(virt_to_page(page->spt), (unsigned long)page); |
530 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
47ad8e68 | 531 | ASSERT(is_empty_shadow_page(page->spt)); |
6aa8b732 | 532 | page->slot_bitmap = 0; |
cea0f0e7 | 533 | page->multimapped = 0; |
6aa8b732 | 534 | page->parent_pte = parent_pte; |
ebeace86 | 535 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 536 | return page; |
6aa8b732 AK |
537 | } |
538 | ||
714b93da AK |
539 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
540 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
541 | { |
542 | struct kvm_pte_chain *pte_chain; | |
543 | struct hlist_node *node; | |
544 | int i; | |
545 | ||
546 | if (!parent_pte) | |
547 | return; | |
548 | if (!page->multimapped) { | |
549 | u64 *old = page->parent_pte; | |
550 | ||
551 | if (!old) { | |
552 | page->parent_pte = parent_pte; | |
553 | return; | |
554 | } | |
555 | page->multimapped = 1; | |
714b93da | 556 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
557 | INIT_HLIST_HEAD(&page->parent_ptes); |
558 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
559 | pte_chain->parent_ptes[0] = old; | |
560 | } | |
561 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
562 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
563 | continue; | |
564 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
565 | if (!pte_chain->parent_ptes[i]) { | |
566 | pte_chain->parent_ptes[i] = parent_pte; | |
567 | return; | |
568 | } | |
569 | } | |
714b93da | 570 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
571 | BUG_ON(!pte_chain); |
572 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
573 | pte_chain->parent_ptes[0] = parent_pte; | |
574 | } | |
575 | ||
90cb0529 | 576 | static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page, |
cea0f0e7 AK |
577 | u64 *parent_pte) |
578 | { | |
579 | struct kvm_pte_chain *pte_chain; | |
580 | struct hlist_node *node; | |
581 | int i; | |
582 | ||
583 | if (!page->multimapped) { | |
584 | BUG_ON(page->parent_pte != parent_pte); | |
585 | page->parent_pte = NULL; | |
586 | return; | |
587 | } | |
588 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
589 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
590 | if (!pte_chain->parent_ptes[i]) | |
591 | break; | |
592 | if (pte_chain->parent_ptes[i] != parent_pte) | |
593 | continue; | |
697fe2e2 AK |
594 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
595 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
596 | pte_chain->parent_ptes[i] |
597 | = pte_chain->parent_ptes[i + 1]; | |
598 | ++i; | |
599 | } | |
600 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
601 | if (i == 0) { |
602 | hlist_del(&pte_chain->link); | |
90cb0529 | 603 | mmu_free_pte_chain(pte_chain); |
697fe2e2 AK |
604 | if (hlist_empty(&page->parent_ptes)) { |
605 | page->multimapped = 0; | |
606 | page->parent_pte = NULL; | |
607 | } | |
608 | } | |
cea0f0e7 AK |
609 | return; |
610 | } | |
611 | BUG(); | |
612 | } | |
613 | ||
f67a46f4 | 614 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, |
cea0f0e7 AK |
615 | gfn_t gfn) |
616 | { | |
617 | unsigned index; | |
618 | struct hlist_head *bucket; | |
619 | struct kvm_mmu_page *page; | |
620 | struct hlist_node *node; | |
621 | ||
622 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
623 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 624 | bucket = &kvm->mmu_page_hash[index]; |
cea0f0e7 AK |
625 | hlist_for_each_entry(page, node, bucket, hash_link) |
626 | if (page->gfn == gfn && !page->role.metaphysical) { | |
627 | pgprintk("%s: found role %x\n", | |
628 | __FUNCTION__, page->role.word); | |
629 | return page; | |
630 | } | |
631 | return NULL; | |
632 | } | |
633 | ||
634 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
635 | gfn_t gfn, | |
636 | gva_t gaddr, | |
637 | unsigned level, | |
638 | int metaphysical, | |
d28c6cfb | 639 | unsigned hugepage_access, |
cea0f0e7 AK |
640 | u64 *parent_pte) |
641 | { | |
642 | union kvm_mmu_page_role role; | |
643 | unsigned index; | |
644 | unsigned quadrant; | |
645 | struct hlist_head *bucket; | |
646 | struct kvm_mmu_page *page; | |
647 | struct hlist_node *node; | |
648 | ||
649 | role.word = 0; | |
650 | role.glevels = vcpu->mmu.root_level; | |
651 | role.level = level; | |
652 | role.metaphysical = metaphysical; | |
d28c6cfb | 653 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
654 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
655 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
656 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
657 | role.quadrant = quadrant; | |
658 | } | |
659 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
660 | gfn, role.word); | |
661 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
662 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
663 | hlist_for_each_entry(page, node, bucket, hash_link) | |
664 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 665 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
666 | pgprintk("%s: found\n", __FUNCTION__); |
667 | return page; | |
668 | } | |
669 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
670 | if (!page) | |
671 | return page; | |
672 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
673 | page->gfn = gfn; | |
674 | page->role = role; | |
675 | hlist_add_head(&page->hash_link, bucket); | |
c7addb90 | 676 | vcpu->mmu.prefetch_page(vcpu, page); |
374cbac0 | 677 | if (!metaphysical) |
4a4c9924 | 678 | rmap_write_protect(vcpu->kvm, gfn); |
cea0f0e7 AK |
679 | return page; |
680 | } | |
681 | ||
90cb0529 | 682 | static void kvm_mmu_page_unlink_children(struct kvm *kvm, |
a436036b AK |
683 | struct kvm_mmu_page *page) |
684 | { | |
697fe2e2 AK |
685 | unsigned i; |
686 | u64 *pt; | |
687 | u64 ent; | |
688 | ||
47ad8e68 | 689 | pt = page->spt; |
697fe2e2 AK |
690 | |
691 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
692 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
c7addb90 | 693 | if (is_shadow_present_pte(pt[i])) |
290fc38d | 694 | rmap_remove(kvm, &pt[i]); |
c7addb90 | 695 | pt[i] = shadow_trap_nonpresent_pte; |
697fe2e2 | 696 | } |
90cb0529 | 697 | kvm_flush_remote_tlbs(kvm); |
697fe2e2 AK |
698 | return; |
699 | } | |
700 | ||
701 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
702 | ent = pt[i]; | |
703 | ||
c7addb90 AK |
704 | pt[i] = shadow_trap_nonpresent_pte; |
705 | if (!is_shadow_present_pte(ent)) | |
697fe2e2 AK |
706 | continue; |
707 | ent &= PT64_BASE_ADDR_MASK; | |
90cb0529 | 708 | mmu_page_remove_parent_pte(page_header(ent), &pt[i]); |
697fe2e2 | 709 | } |
90cb0529 | 710 | kvm_flush_remote_tlbs(kvm); |
a436036b AK |
711 | } |
712 | ||
90cb0529 | 713 | static void kvm_mmu_put_page(struct kvm_mmu_page *page, |
cea0f0e7 AK |
714 | u64 *parent_pte) |
715 | { | |
90cb0529 | 716 | mmu_page_remove_parent_pte(page, parent_pte); |
a436036b AK |
717 | } |
718 | ||
12b7d28f AK |
719 | static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm) |
720 | { | |
721 | int i; | |
722 | ||
723 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
724 | if (kvm->vcpus[i]) | |
725 | kvm->vcpus[i]->last_pte_updated = NULL; | |
726 | } | |
727 | ||
90cb0529 | 728 | static void kvm_mmu_zap_page(struct kvm *kvm, |
a436036b AK |
729 | struct kvm_mmu_page *page) |
730 | { | |
731 | u64 *parent_pte; | |
732 | ||
733 | while (page->multimapped || page->parent_pte) { | |
734 | if (!page->multimapped) | |
735 | parent_pte = page->parent_pte; | |
736 | else { | |
737 | struct kvm_pte_chain *chain; | |
738 | ||
739 | chain = container_of(page->parent_ptes.first, | |
740 | struct kvm_pte_chain, link); | |
741 | parent_pte = chain->parent_ptes[0]; | |
742 | } | |
697fe2e2 | 743 | BUG_ON(!parent_pte); |
90cb0529 | 744 | kvm_mmu_put_page(page, parent_pte); |
c7addb90 | 745 | set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte); |
a436036b | 746 | } |
90cb0529 | 747 | kvm_mmu_page_unlink_children(kvm, page); |
3bb65a22 AK |
748 | if (!page->root_count) { |
749 | hlist_del(&page->hash_link); | |
90cb0529 | 750 | kvm_mmu_free_page(kvm, page); |
36868f7b | 751 | } else |
90cb0529 | 752 | list_move(&page->link, &kvm->active_mmu_pages); |
12b7d28f | 753 | kvm_mmu_reset_last_pte_updated(kvm); |
a436036b AK |
754 | } |
755 | ||
82ce2c96 IE |
756 | /* |
757 | * Changing the number of mmu pages allocated to the vm | |
758 | * Note: if kvm_nr_mmu_pages is too small, you will get dead lock | |
759 | */ | |
760 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages) | |
761 | { | |
762 | /* | |
763 | * If we set the number of mmu pages to be smaller be than the | |
764 | * number of actived pages , we must to free some mmu pages before we | |
765 | * change the value | |
766 | */ | |
767 | ||
768 | if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) > | |
769 | kvm_nr_mmu_pages) { | |
770 | int n_used_mmu_pages = kvm->n_alloc_mmu_pages | |
771 | - kvm->n_free_mmu_pages; | |
772 | ||
773 | while (n_used_mmu_pages > kvm_nr_mmu_pages) { | |
774 | struct kvm_mmu_page *page; | |
775 | ||
776 | page = container_of(kvm->active_mmu_pages.prev, | |
777 | struct kvm_mmu_page, link); | |
778 | kvm_mmu_zap_page(kvm, page); | |
779 | n_used_mmu_pages--; | |
780 | } | |
781 | kvm->n_free_mmu_pages = 0; | |
782 | } | |
783 | else | |
784 | kvm->n_free_mmu_pages += kvm_nr_mmu_pages | |
785 | - kvm->n_alloc_mmu_pages; | |
786 | ||
787 | kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages; | |
788 | } | |
789 | ||
f67a46f4 | 790 | static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn) |
a436036b AK |
791 | { |
792 | unsigned index; | |
793 | struct hlist_head *bucket; | |
794 | struct kvm_mmu_page *page; | |
795 | struct hlist_node *node, *n; | |
796 | int r; | |
797 | ||
798 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
799 | r = 0; | |
800 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
f67a46f4 | 801 | bucket = &kvm->mmu_page_hash[index]; |
a436036b AK |
802 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) |
803 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
804 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
805 | page->role.word); | |
f67a46f4 | 806 | kvm_mmu_zap_page(kvm, page); |
a436036b AK |
807 | r = 1; |
808 | } | |
809 | return r; | |
cea0f0e7 AK |
810 | } |
811 | ||
f67a46f4 | 812 | static void mmu_unshadow(struct kvm *kvm, gfn_t gfn) |
97a0a01e AK |
813 | { |
814 | struct kvm_mmu_page *page; | |
815 | ||
f67a46f4 | 816 | while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) { |
97a0a01e AK |
817 | pgprintk("%s: zap %lx %x\n", |
818 | __FUNCTION__, gfn, page->role.word); | |
f67a46f4 | 819 | kvm_mmu_zap_page(kvm, page); |
97a0a01e AK |
820 | } |
821 | } | |
822 | ||
6aa8b732 AK |
823 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
824 | { | |
825 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
826 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
827 | ||
828 | __set_bit(slot, &page_head->slot_bitmap); | |
829 | } | |
830 | ||
4a4c9924 | 831 | hpa_t safe_gpa_to_hpa(struct kvm *kvm, gpa_t gpa) |
6aa8b732 | 832 | { |
4a4c9924 | 833 | hpa_t hpa = gpa_to_hpa(kvm, gpa); |
6aa8b732 AK |
834 | |
835 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
836 | } | |
837 | ||
4a4c9924 | 838 | hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa) |
6aa8b732 | 839 | { |
6aa8b732 AK |
840 | struct page *page; |
841 | ||
842 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
4a4c9924 | 843 | page = gfn_to_page(kvm, gpa >> PAGE_SHIFT); |
954bbbc2 | 844 | if (!page) |
6aa8b732 | 845 | return gpa | HPA_ERR_MASK; |
6aa8b732 AK |
846 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) |
847 | | (gpa & (PAGE_SIZE-1)); | |
848 | } | |
849 | ||
850 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
851 | { | |
852 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
853 | ||
854 | if (gpa == UNMAPPED_GVA) | |
855 | return UNMAPPED_GVA; | |
4a4c9924 | 856 | return gpa_to_hpa(vcpu->kvm, gpa); |
6aa8b732 AK |
857 | } |
858 | ||
039576c0 AK |
859 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
860 | { | |
861 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
862 | ||
863 | if (gpa == UNMAPPED_GVA) | |
864 | return NULL; | |
4a4c9924 | 865 | return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT); |
039576c0 AK |
866 | } |
867 | ||
6aa8b732 AK |
868 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
869 | { | |
870 | } | |
871 | ||
872 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
873 | { | |
874 | int level = PT32E_ROOT_LEVEL; | |
875 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
876 | ||
877 | for (; ; level--) { | |
878 | u32 index = PT64_INDEX(v, level); | |
879 | u64 *table; | |
cea0f0e7 | 880 | u64 pte; |
6aa8b732 AK |
881 | |
882 | ASSERT(VALID_PAGE(table_addr)); | |
883 | table = __va(table_addr); | |
884 | ||
885 | if (level == 1) { | |
cea0f0e7 | 886 | pte = table[index]; |
c7addb90 | 887 | if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) |
cea0f0e7 | 888 | return 0; |
6aa8b732 AK |
889 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
890 | page_header_update_slot(vcpu->kvm, table, v); | |
891 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
892 | PT_USER_MASK; | |
290fc38d | 893 | rmap_add(vcpu, &table[index], v >> PAGE_SHIFT); |
6aa8b732 AK |
894 | return 0; |
895 | } | |
896 | ||
c7addb90 | 897 | if (table[index] == shadow_trap_nonpresent_pte) { |
25c0de2c | 898 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 899 | gfn_t pseudo_gfn; |
6aa8b732 | 900 | |
cea0f0e7 AK |
901 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
902 | >> PAGE_SHIFT; | |
903 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
904 | v, level - 1, | |
d28c6cfb | 905 | 1, 0, &table[index]); |
25c0de2c | 906 | if (!new_table) { |
6aa8b732 AK |
907 | pgprintk("nonpaging_map: ENOMEM\n"); |
908 | return -ENOMEM; | |
909 | } | |
910 | ||
47ad8e68 | 911 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 912 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
913 | } |
914 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
915 | } | |
916 | } | |
917 | ||
c7addb90 AK |
918 | static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu, |
919 | struct kvm_mmu_page *sp) | |
920 | { | |
921 | int i; | |
922 | ||
923 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) | |
924 | sp->spt[i] = shadow_trap_nonpresent_pte; | |
925 | } | |
926 | ||
17ac10ad AK |
927 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
928 | { | |
929 | int i; | |
3bb65a22 | 930 | struct kvm_mmu_page *page; |
17ac10ad | 931 | |
7b53aa56 AK |
932 | if (!VALID_PAGE(vcpu->mmu.root_hpa)) |
933 | return; | |
17ac10ad AK |
934 | #ifdef CONFIG_X86_64 |
935 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
936 | hpa_t root = vcpu->mmu.root_hpa; | |
937 | ||
3bb65a22 AK |
938 | page = page_header(root); |
939 | --page->root_count; | |
17ac10ad AK |
940 | vcpu->mmu.root_hpa = INVALID_PAGE; |
941 | return; | |
942 | } | |
943 | #endif | |
944 | for (i = 0; i < 4; ++i) { | |
945 | hpa_t root = vcpu->mmu.pae_root[i]; | |
946 | ||
417726a3 | 947 | if (root) { |
417726a3 AK |
948 | root &= PT64_BASE_ADDR_MASK; |
949 | page = page_header(root); | |
950 | --page->root_count; | |
951 | } | |
17ac10ad AK |
952 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
953 | } | |
954 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
955 | } | |
956 | ||
957 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
958 | { | |
959 | int i; | |
cea0f0e7 | 960 | gfn_t root_gfn; |
3bb65a22 AK |
961 | struct kvm_mmu_page *page; |
962 | ||
cea0f0e7 | 963 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
964 | |
965 | #ifdef CONFIG_X86_64 | |
966 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
967 | hpa_t root = vcpu->mmu.root_hpa; | |
968 | ||
969 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d | 970 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
d28c6cfb | 971 | PT64_ROOT_LEVEL, 0, 0, NULL); |
47ad8e68 | 972 | root = __pa(page->spt); |
3bb65a22 | 973 | ++page->root_count; |
17ac10ad AK |
974 | vcpu->mmu.root_hpa = root; |
975 | return; | |
976 | } | |
977 | #endif | |
978 | for (i = 0; i < 4; ++i) { | |
979 | hpa_t root = vcpu->mmu.pae_root[i]; | |
980 | ||
981 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
982 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
983 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
984 | vcpu->mmu.pae_root[i] = 0; | |
985 | continue; | |
986 | } | |
cea0f0e7 | 987 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 988 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 989 | root_gfn = 0; |
68a99f6d | 990 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 991 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
d28c6cfb | 992 | 0, NULL); |
47ad8e68 | 993 | root = __pa(page->spt); |
3bb65a22 | 994 | ++page->root_count; |
17ac10ad AK |
995 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
996 | } | |
997 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
998 | } | |
999 | ||
6aa8b732 AK |
1000 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
1001 | { | |
1002 | return vaddr; | |
1003 | } | |
1004 | ||
1005 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
1006 | u32 error_code) | |
1007 | { | |
6aa8b732 | 1008 | gpa_t addr = gva; |
ebeace86 | 1009 | hpa_t paddr; |
e2dec939 | 1010 | int r; |
6aa8b732 | 1011 | |
e2dec939 AK |
1012 | r = mmu_topup_memory_caches(vcpu); |
1013 | if (r) | |
1014 | return r; | |
714b93da | 1015 | |
6aa8b732 AK |
1016 | ASSERT(vcpu); |
1017 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
1018 | ||
6aa8b732 | 1019 | |
4a4c9924 | 1020 | paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 1021 | |
ebeace86 AK |
1022 | if (is_error_hpa(paddr)) |
1023 | return 1; | |
6aa8b732 | 1024 | |
ebeace86 | 1025 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
1026 | } |
1027 | ||
6aa8b732 AK |
1028 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
1029 | { | |
17ac10ad | 1030 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1031 | } |
1032 | ||
1033 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
1034 | { | |
1035 | struct kvm_mmu *context = &vcpu->mmu; | |
1036 | ||
1037 | context->new_cr3 = nonpaging_new_cr3; | |
1038 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
1039 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
1040 | context->free = nonpaging_free; | |
c7addb90 | 1041 | context->prefetch_page = nonpaging_prefetch_page; |
cea0f0e7 | 1042 | context->root_level = 0; |
6aa8b732 | 1043 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17c3ba9d | 1044 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1045 | return 0; |
1046 | } | |
1047 | ||
6aa8b732 AK |
1048 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
1049 | { | |
1165f5fe | 1050 | ++vcpu->stat.tlb_flush; |
cbdd1bea | 1051 | kvm_x86_ops->tlb_flush(vcpu); |
6aa8b732 AK |
1052 | } |
1053 | ||
1054 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
1055 | { | |
374cbac0 | 1056 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 1057 | mmu_free_roots(vcpu); |
6aa8b732 AK |
1058 | } |
1059 | ||
6aa8b732 AK |
1060 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
1061 | u64 addr, | |
1062 | u32 err_code) | |
1063 | { | |
cbdd1bea | 1064 | kvm_x86_ops->inject_page_fault(vcpu, addr, err_code); |
6aa8b732 AK |
1065 | } |
1066 | ||
6aa8b732 AK |
1067 | static void paging_free(struct kvm_vcpu *vcpu) |
1068 | { | |
1069 | nonpaging_free(vcpu); | |
1070 | } | |
1071 | ||
1072 | #define PTTYPE 64 | |
1073 | #include "paging_tmpl.h" | |
1074 | #undef PTTYPE | |
1075 | ||
1076 | #define PTTYPE 32 | |
1077 | #include "paging_tmpl.h" | |
1078 | #undef PTTYPE | |
1079 | ||
17ac10ad | 1080 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
1081 | { |
1082 | struct kvm_mmu *context = &vcpu->mmu; | |
1083 | ||
1084 | ASSERT(is_pae(vcpu)); | |
1085 | context->new_cr3 = paging_new_cr3; | |
1086 | context->page_fault = paging64_page_fault; | |
6aa8b732 | 1087 | context->gva_to_gpa = paging64_gva_to_gpa; |
c7addb90 | 1088 | context->prefetch_page = paging64_prefetch_page; |
6aa8b732 | 1089 | context->free = paging_free; |
17ac10ad AK |
1090 | context->root_level = level; |
1091 | context->shadow_root_level = level; | |
17c3ba9d | 1092 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1093 | return 0; |
1094 | } | |
1095 | ||
17ac10ad AK |
1096 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1097 | { | |
1098 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1099 | } | |
1100 | ||
6aa8b732 AK |
1101 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1102 | { | |
1103 | struct kvm_mmu *context = &vcpu->mmu; | |
1104 | ||
1105 | context->new_cr3 = paging_new_cr3; | |
1106 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1107 | context->gva_to_gpa = paging32_gva_to_gpa; |
1108 | context->free = paging_free; | |
c7addb90 | 1109 | context->prefetch_page = paging32_prefetch_page; |
6aa8b732 AK |
1110 | context->root_level = PT32_ROOT_LEVEL; |
1111 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17c3ba9d | 1112 | context->root_hpa = INVALID_PAGE; |
6aa8b732 AK |
1113 | return 0; |
1114 | } | |
1115 | ||
1116 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1117 | { | |
17ac10ad | 1118 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1119 | } |
1120 | ||
1121 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1122 | { | |
1123 | ASSERT(vcpu); | |
1124 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1125 | ||
1126 | if (!is_paging(vcpu)) | |
1127 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1128 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1129 | return paging64_init_context(vcpu); |
1130 | else if (is_pae(vcpu)) | |
1131 | return paging32E_init_context(vcpu); | |
1132 | else | |
1133 | return paging32_init_context(vcpu); | |
1134 | } | |
1135 | ||
1136 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1137 | { | |
1138 | ASSERT(vcpu); | |
1139 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1140 | vcpu->mmu.free(vcpu); | |
1141 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1142 | } | |
1143 | } | |
1144 | ||
1145 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
17c3ba9d AK |
1146 | { |
1147 | destroy_kvm_mmu(vcpu); | |
1148 | return init_kvm_mmu(vcpu); | |
1149 | } | |
8668a3c4 | 1150 | EXPORT_SYMBOL_GPL(kvm_mmu_reset_context); |
17c3ba9d AK |
1151 | |
1152 | int kvm_mmu_load(struct kvm_vcpu *vcpu) | |
6aa8b732 | 1153 | { |
714b93da AK |
1154 | int r; |
1155 | ||
11ec2804 | 1156 | mutex_lock(&vcpu->kvm->lock); |
e2dec939 | 1157 | r = mmu_topup_memory_caches(vcpu); |
17c3ba9d AK |
1158 | if (r) |
1159 | goto out; | |
1160 | mmu_alloc_roots(vcpu); | |
cbdd1bea | 1161 | kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
17c3ba9d | 1162 | kvm_mmu_flush_tlb(vcpu); |
714b93da | 1163 | out: |
11ec2804 | 1164 | mutex_unlock(&vcpu->kvm->lock); |
714b93da | 1165 | return r; |
6aa8b732 | 1166 | } |
17c3ba9d AK |
1167 | EXPORT_SYMBOL_GPL(kvm_mmu_load); |
1168 | ||
1169 | void kvm_mmu_unload(struct kvm_vcpu *vcpu) | |
1170 | { | |
1171 | mmu_free_roots(vcpu); | |
1172 | } | |
6aa8b732 | 1173 | |
09072daf | 1174 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
ac1b714e AK |
1175 | struct kvm_mmu_page *page, |
1176 | u64 *spte) | |
1177 | { | |
1178 | u64 pte; | |
1179 | struct kvm_mmu_page *child; | |
1180 | ||
1181 | pte = *spte; | |
c7addb90 | 1182 | if (is_shadow_present_pte(pte)) { |
ac1b714e | 1183 | if (page->role.level == PT_PAGE_TABLE_LEVEL) |
290fc38d | 1184 | rmap_remove(vcpu->kvm, spte); |
ac1b714e AK |
1185 | else { |
1186 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
90cb0529 | 1187 | mmu_page_remove_parent_pte(child, spte); |
ac1b714e AK |
1188 | } |
1189 | } | |
c7addb90 | 1190 | set_shadow_pte(spte, shadow_trap_nonpresent_pte); |
d9e368d6 | 1191 | kvm_flush_remote_tlbs(vcpu->kvm); |
ac1b714e AK |
1192 | } |
1193 | ||
0028425f AK |
1194 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
1195 | struct kvm_mmu_page *page, | |
1196 | u64 *spte, | |
c7addb90 AK |
1197 | const void *new, int bytes, |
1198 | int offset_in_pte) | |
0028425f AK |
1199 | { |
1200 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1201 | return; | |
1202 | ||
1203 | if (page->role.glevels == PT32_ROOT_LEVEL) | |
c7addb90 AK |
1204 | paging32_update_pte(vcpu, page, spte, new, bytes, |
1205 | offset_in_pte); | |
0028425f | 1206 | else |
c7addb90 AK |
1207 | paging64_update_pte(vcpu, page, spte, new, bytes, |
1208 | offset_in_pte); | |
0028425f AK |
1209 | } |
1210 | ||
12b7d28f AK |
1211 | static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu) |
1212 | { | |
1213 | u64 *spte = vcpu->last_pte_updated; | |
1214 | ||
1215 | return !!(spte && (*spte & PT_ACCESSED_MASK)); | |
1216 | } | |
1217 | ||
09072daf | 1218 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
fe551881 | 1219 | const u8 *new, int bytes) |
da4a00f0 | 1220 | { |
9b7a0325 AK |
1221 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1222 | struct kvm_mmu_page *page; | |
0e7bc4b9 | 1223 | struct hlist_node *node, *n; |
9b7a0325 AK |
1224 | struct hlist_head *bucket; |
1225 | unsigned index; | |
1226 | u64 *spte; | |
9b7a0325 | 1227 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1228 | unsigned pte_size; |
9b7a0325 | 1229 | unsigned page_offset; |
0e7bc4b9 | 1230 | unsigned misaligned; |
fce0657f | 1231 | unsigned quadrant; |
9b7a0325 | 1232 | int level; |
86a5ba02 | 1233 | int flooded = 0; |
ac1b714e | 1234 | int npte; |
9b7a0325 | 1235 | |
da4a00f0 | 1236 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
c7addb90 | 1237 | kvm_mmu_audit(vcpu, "pre pte write"); |
12b7d28f AK |
1238 | if (gfn == vcpu->last_pt_write_gfn |
1239 | && !last_updated_pte_accessed(vcpu)) { | |
86a5ba02 AK |
1240 | ++vcpu->last_pt_write_count; |
1241 | if (vcpu->last_pt_write_count >= 3) | |
1242 | flooded = 1; | |
1243 | } else { | |
1244 | vcpu->last_pt_write_gfn = gfn; | |
1245 | vcpu->last_pt_write_count = 1; | |
12b7d28f | 1246 | vcpu->last_pte_updated = NULL; |
86a5ba02 | 1247 | } |
9b7a0325 AK |
1248 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1249 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1250 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1251 | if (page->gfn != gfn || page->role.metaphysical) |
1252 | continue; | |
0e7bc4b9 AK |
1253 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1254 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
e925c5ba | 1255 | misaligned |= bytes < 4; |
86a5ba02 | 1256 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1257 | /* |
1258 | * Misaligned accesses are too much trouble to fix | |
1259 | * up; also, they usually indicate a page is not used | |
1260 | * as a page table. | |
86a5ba02 AK |
1261 | * |
1262 | * If we're seeing too many writes to a page, | |
1263 | * it may no longer be a page table, or we may be | |
1264 | * forking, in which case it is better to unmap the | |
1265 | * page. | |
0e7bc4b9 AK |
1266 | */ |
1267 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1268 | gpa, bytes, page->role.word); | |
90cb0529 | 1269 | kvm_mmu_zap_page(vcpu->kvm, page); |
0e7bc4b9 AK |
1270 | continue; |
1271 | } | |
9b7a0325 AK |
1272 | page_offset = offset; |
1273 | level = page->role.level; | |
ac1b714e | 1274 | npte = 1; |
9b7a0325 | 1275 | if (page->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1276 | page_offset <<= 1; /* 32->64 */ |
1277 | /* | |
1278 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1279 | * only 2MB. So we need to double the offset again | |
1280 | * and zap two pdes instead of one. | |
1281 | */ | |
1282 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1283 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1284 | page_offset <<= 1; |
1285 | npte = 2; | |
1286 | } | |
fce0657f | 1287 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1288 | page_offset &= ~PAGE_MASK; |
fce0657f AK |
1289 | if (quadrant != page->role.quadrant) |
1290 | continue; | |
9b7a0325 | 1291 | } |
47ad8e68 | 1292 | spte = &page->spt[page_offset / sizeof(*spte)]; |
ac1b714e | 1293 | while (npte--) { |
09072daf | 1294 | mmu_pte_write_zap_pte(vcpu, page, spte); |
c7addb90 AK |
1295 | mmu_pte_write_new_pte(vcpu, page, spte, new, bytes, |
1296 | page_offset & (pte_size - 1)); | |
ac1b714e | 1297 | ++spte; |
9b7a0325 | 1298 | } |
9b7a0325 | 1299 | } |
c7addb90 | 1300 | kvm_mmu_audit(vcpu, "post pte write"); |
da4a00f0 AK |
1301 | } |
1302 | ||
a436036b AK |
1303 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1304 | { | |
1305 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1306 | ||
f67a46f4 | 1307 | return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
a436036b AK |
1308 | } |
1309 | ||
22d95b12 | 1310 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
ebeace86 AK |
1311 | { |
1312 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1313 | struct kvm_mmu_page *page; | |
1314 | ||
1315 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1316 | struct kvm_mmu_page, link); | |
90cb0529 | 1317 | kvm_mmu_zap_page(vcpu->kvm, page); |
ebeace86 AK |
1318 | } |
1319 | } | |
ebeace86 | 1320 | |
6aa8b732 AK |
1321 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1322 | { | |
f51234c2 | 1323 | struct kvm_mmu_page *page; |
6aa8b732 | 1324 | |
f51234c2 AK |
1325 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1326 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1327 | struct kvm_mmu_page, link); | |
90cb0529 | 1328 | kvm_mmu_zap_page(vcpu->kvm, page); |
f51234c2 | 1329 | } |
17ac10ad | 1330 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1331 | } |
1332 | ||
1333 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1334 | { | |
17ac10ad | 1335 | struct page *page; |
6aa8b732 AK |
1336 | int i; |
1337 | ||
1338 | ASSERT(vcpu); | |
1339 | ||
82ce2c96 IE |
1340 | if (vcpu->kvm->n_requested_mmu_pages) |
1341 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages; | |
1342 | else | |
1343 | vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages; | |
17ac10ad AK |
1344 | /* |
1345 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1346 | * Therefore we need to allocate shadow page tables in the first | |
1347 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1348 | */ | |
1349 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1350 | if (!page) | |
1351 | goto error_1; | |
1352 | vcpu->mmu.pae_root = page_address(page); | |
1353 | for (i = 0; i < 4; ++i) | |
1354 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1355 | ||
6aa8b732 AK |
1356 | return 0; |
1357 | ||
1358 | error_1: | |
1359 | free_mmu_pages(vcpu); | |
1360 | return -ENOMEM; | |
1361 | } | |
1362 | ||
8018c27b | 1363 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1364 | { |
6aa8b732 AK |
1365 | ASSERT(vcpu); |
1366 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
6aa8b732 | 1367 | |
8018c27b IM |
1368 | return alloc_mmu_pages(vcpu); |
1369 | } | |
6aa8b732 | 1370 | |
8018c27b IM |
1371 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1372 | { | |
1373 | ASSERT(vcpu); | |
1374 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
2c264957 | 1375 | |
8018c27b | 1376 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1377 | } |
1378 | ||
1379 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1380 | { | |
1381 | ASSERT(vcpu); | |
1382 | ||
1383 | destroy_kvm_mmu(vcpu); | |
1384 | free_mmu_pages(vcpu); | |
714b93da | 1385 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1386 | } |
1387 | ||
90cb0529 | 1388 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot) |
6aa8b732 AK |
1389 | { |
1390 | struct kvm_mmu_page *page; | |
1391 | ||
1392 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1393 | int i; | |
1394 | u64 *pt; | |
1395 | ||
1396 | if (!test_bit(slot, &page->slot_bitmap)) | |
1397 | continue; | |
1398 | ||
47ad8e68 | 1399 | pt = page->spt; |
6aa8b732 AK |
1400 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1401 | /* avoid RMW */ | |
cd4a4e53 | 1402 | if (pt[i] & PT_WRITABLE_MASK) { |
290fc38d | 1403 | rmap_remove(kvm, &pt[i]); |
6aa8b732 | 1404 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1405 | } |
6aa8b732 AK |
1406 | } |
1407 | } | |
37a7d8b0 | 1408 | |
90cb0529 | 1409 | void kvm_mmu_zap_all(struct kvm *kvm) |
e0fa826f | 1410 | { |
90cb0529 | 1411 | struct kvm_mmu_page *page, *node; |
e0fa826f | 1412 | |
90cb0529 AK |
1413 | list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link) |
1414 | kvm_mmu_zap_page(kvm, page); | |
e0fa826f | 1415 | |
90cb0529 | 1416 | kvm_flush_remote_tlbs(kvm); |
e0fa826f DL |
1417 | } |
1418 | ||
b5a33a75 AK |
1419 | void kvm_mmu_module_exit(void) |
1420 | { | |
1421 | if (pte_chain_cache) | |
1422 | kmem_cache_destroy(pte_chain_cache); | |
1423 | if (rmap_desc_cache) | |
1424 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1425 | if (mmu_page_header_cache) |
1426 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1427 | } |
1428 | ||
1429 | int kvm_mmu_module_init(void) | |
1430 | { | |
1431 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1432 | sizeof(struct kvm_pte_chain), | |
20c2df83 | 1433 | 0, 0, NULL); |
b5a33a75 AK |
1434 | if (!pte_chain_cache) |
1435 | goto nomem; | |
1436 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1437 | sizeof(struct kvm_rmap_desc), | |
20c2df83 | 1438 | 0, 0, NULL); |
b5a33a75 AK |
1439 | if (!rmap_desc_cache) |
1440 | goto nomem; | |
1441 | ||
d3d25b04 AK |
1442 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", |
1443 | sizeof(struct kvm_mmu_page), | |
20c2df83 | 1444 | 0, 0, NULL); |
d3d25b04 AK |
1445 | if (!mmu_page_header_cache) |
1446 | goto nomem; | |
1447 | ||
b5a33a75 AK |
1448 | return 0; |
1449 | ||
1450 | nomem: | |
1451 | kvm_mmu_module_exit(); | |
1452 | return -ENOMEM; | |
1453 | } | |
1454 | ||
37a7d8b0 AK |
1455 | #ifdef AUDIT |
1456 | ||
1457 | static const char *audit_msg; | |
1458 | ||
1459 | static gva_t canonicalize(gva_t gva) | |
1460 | { | |
1461 | #ifdef CONFIG_X86_64 | |
1462 | gva = (long long)(gva << 16) >> 16; | |
1463 | #endif | |
1464 | return gva; | |
1465 | } | |
1466 | ||
1467 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1468 | gva_t va, int level) | |
1469 | { | |
1470 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1471 | int i; | |
1472 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1473 | ||
1474 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1475 | u64 ent = pt[i]; | |
1476 | ||
c7addb90 | 1477 | if (ent == shadow_trap_nonpresent_pte) |
37a7d8b0 AK |
1478 | continue; |
1479 | ||
1480 | va = canonicalize(va); | |
c7addb90 AK |
1481 | if (level > 1) { |
1482 | if (ent == shadow_notrap_nonpresent_pte) | |
1483 | printk(KERN_ERR "audit: (%s) nontrapping pte" | |
1484 | " in nonleaf level: levels %d gva %lx" | |
1485 | " level %d pte %llx\n", audit_msg, | |
1486 | vcpu->mmu.root_level, va, level, ent); | |
1487 | ||
37a7d8b0 | 1488 | audit_mappings_page(vcpu, ent, va, level - 1); |
c7addb90 | 1489 | } else { |
37a7d8b0 AK |
1490 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); |
1491 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1492 | ||
c7addb90 | 1493 | if (is_shadow_present_pte(ent) |
37a7d8b0 | 1494 | && (ent & PT64_BASE_ADDR_MASK) != hpa) |
c7addb90 AK |
1495 | printk(KERN_ERR "xx audit error: (%s) levels %d" |
1496 | " gva %lx gpa %llx hpa %llx ent %llx %d\n", | |
37a7d8b0 | 1497 | audit_msg, vcpu->mmu.root_level, |
d77c26fc MD |
1498 | va, gpa, hpa, ent, |
1499 | is_shadow_present_pte(ent)); | |
c7addb90 AK |
1500 | else if (ent == shadow_notrap_nonpresent_pte |
1501 | && !is_error_hpa(hpa)) | |
1502 | printk(KERN_ERR "audit: (%s) notrap shadow," | |
1503 | " valid guest gva %lx\n", audit_msg, va); | |
1504 | ||
37a7d8b0 AK |
1505 | } |
1506 | } | |
1507 | } | |
1508 | ||
1509 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1510 | { | |
1ea252af | 1511 | unsigned i; |
37a7d8b0 AK |
1512 | |
1513 | if (vcpu->mmu.root_level == 4) | |
1514 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1515 | else | |
1516 | for (i = 0; i < 4; ++i) | |
1517 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1518 | audit_mappings_page(vcpu, | |
1519 | vcpu->mmu.pae_root[i], | |
1520 | i << 30, | |
1521 | 2); | |
1522 | } | |
1523 | ||
1524 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1525 | { | |
1526 | int nmaps = 0; | |
1527 | int i, j, k; | |
1528 | ||
1529 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1530 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1531 | struct kvm_rmap_desc *d; | |
1532 | ||
1533 | for (j = 0; j < m->npages; ++j) { | |
290fc38d | 1534 | unsigned long *rmapp = &m->rmap[j]; |
37a7d8b0 | 1535 | |
290fc38d | 1536 | if (!*rmapp) |
37a7d8b0 | 1537 | continue; |
290fc38d | 1538 | if (!(*rmapp & 1)) { |
37a7d8b0 AK |
1539 | ++nmaps; |
1540 | continue; | |
1541 | } | |
290fc38d | 1542 | d = (struct kvm_rmap_desc *)(*rmapp & ~1ul); |
37a7d8b0 AK |
1543 | while (d) { |
1544 | for (k = 0; k < RMAP_EXT; ++k) | |
1545 | if (d->shadow_ptes[k]) | |
1546 | ++nmaps; | |
1547 | else | |
1548 | break; | |
1549 | d = d->more; | |
1550 | } | |
1551 | } | |
1552 | } | |
1553 | return nmaps; | |
1554 | } | |
1555 | ||
1556 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1557 | { | |
1558 | int nmaps = 0; | |
1559 | struct kvm_mmu_page *page; | |
1560 | int i; | |
1561 | ||
1562 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
47ad8e68 | 1563 | u64 *pt = page->spt; |
37a7d8b0 AK |
1564 | |
1565 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1566 | continue; | |
1567 | ||
1568 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1569 | u64 ent = pt[i]; | |
1570 | ||
1571 | if (!(ent & PT_PRESENT_MASK)) | |
1572 | continue; | |
1573 | if (!(ent & PT_WRITABLE_MASK)) | |
1574 | continue; | |
1575 | ++nmaps; | |
1576 | } | |
1577 | } | |
1578 | return nmaps; | |
1579 | } | |
1580 | ||
1581 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1582 | { | |
1583 | int n_rmap = count_rmaps(vcpu); | |
1584 | int n_actual = count_writable_mappings(vcpu); | |
1585 | ||
1586 | if (n_rmap != n_actual) | |
1587 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1588 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1589 | } | |
1590 | ||
1591 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1592 | { | |
1593 | struct kvm_mmu_page *page; | |
290fc38d IE |
1594 | struct kvm_memory_slot *slot; |
1595 | unsigned long *rmapp; | |
1596 | gfn_t gfn; | |
37a7d8b0 AK |
1597 | |
1598 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
37a7d8b0 AK |
1599 | if (page->role.metaphysical) |
1600 | continue; | |
1601 | ||
290fc38d IE |
1602 | slot = gfn_to_memslot(vcpu->kvm, page->gfn); |
1603 | gfn = unalias_gfn(vcpu->kvm, page->gfn); | |
1604 | rmapp = &slot->rmap[gfn - slot->base_gfn]; | |
1605 | if (*rmapp) | |
37a7d8b0 AK |
1606 | printk(KERN_ERR "%s: (%s) shadow page has writable" |
1607 | " mappings: gfn %lx role %x\n", | |
1608 | __FUNCTION__, audit_msg, page->gfn, | |
1609 | page->role.word); | |
1610 | } | |
1611 | } | |
1612 | ||
1613 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1614 | { | |
1615 | int olddbg = dbg; | |
1616 | ||
1617 | dbg = 0; | |
1618 | audit_msg = msg; | |
1619 | audit_rmap(vcpu); | |
1620 | audit_write_protection(vcpu); | |
1621 | audit_mappings(vcpu); | |
1622 | dbg = olddbg; | |
1623 | } | |
1624 | ||
1625 | #endif |