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KVM: Remove set_cr0_no_modeswitch() arch op
[deliverable/linux.git] / drivers / kvm / svm.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * AMD SVM support
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 *
8 * Authors:
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
11 *
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
14 *
15 */
16
17#include <linux/module.h>
9d8f549d 18#include <linux/kernel.h>
6aa8b732
AK		 19#include <linux/vmalloc.h>
20#include <linux/highmem.h>
07031e14 21#include <linux/profile.h>
6aa8b732
AK		 22#include <asm/desc.h>
23
24#include "kvm_svm.h"
25#include "x86_emulate.h"
26
27MODULE_AUTHOR("Qumranet");
28MODULE_LICENSE("GPL");
29
30#define IOPM_ALLOC_ORDER 2
31#define MSRPM_ALLOC_ORDER 1
32
33#define DB_VECTOR 1
34#define UD_VECTOR 6
35#define GP_VECTOR 13
36
37#define DR7_GD_MASK (1 << 13)
38#define DR6_BD_MASK (1 << 13)
39#define CR4_DE_MASK (1UL << 3)
40
41#define SEG_TYPE_LDT 2
42#define SEG_TYPE_BUSY_TSS16 3
43
44#define KVM_EFER_LMA (1 << 10)
45#define KVM_EFER_LME (1 << 8)
46
47unsigned long iopm_base;
48unsigned long msrpm_base;
49
50struct kvm_ldttss_desc {
51 u16 limit0;
52 u16 base0;
53 unsigned base1 : 8, type : 5, dpl : 2, p : 1;
54 unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
55 u32 base3;
56 u32 zero1;
57} __attribute__((packed));
58
59struct svm_cpu_data {
60 int cpu;
61
62 uint64_t asid_generation;
63 uint32_t max_asid;
64 uint32_t next_asid;
65 struct kvm_ldttss_desc *tss_desc;
66
67 struct page *save_area;
68};
69
70static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
71
72struct svm_init_data {
73 int cpu;
74 int r;
75};
76
77static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
78
9d8f549d 79#define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
6aa8b732
AK		 80#define MSRS_RANGE_SIZE 2048
81#define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
82
83#define MAX_INST_SIZE 15
84
85static unsigned get_addr_size(struct kvm_vcpu *vcpu)
86{
87 struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
88 u16 cs_attrib;
89
90 if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
91 return 2;
92
93 cs_attrib = sa->cs.attrib;
94
95 return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
96 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
97}
98
99static inline u8 pop_irq(struct kvm_vcpu *vcpu)
100{
101 int word_index = __ffs(vcpu->irq_summary);
102 int bit_index = __ffs(vcpu->irq_pending[word_index]);
103 int irq = word_index * BITS_PER_LONG + bit_index;
104
105 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
106 if (!vcpu->irq_pending[word_index])
107 clear_bit(word_index, &vcpu->irq_summary);
108 return irq;
109}
110
111static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
112{
113 set_bit(irq, vcpu->irq_pending);
114 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
115}
116
117static inline void clgi(void)
118{
119 asm volatile (SVM_CLGI);
120}
121
122static inline void stgi(void)
123{
124 asm volatile (SVM_STGI);
125}
126
127static inline void invlpga(unsigned long addr, u32 asid)
128{
129 asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
130}
131
132static inline unsigned long kvm_read_cr2(void)
133{
134 unsigned long cr2;
135
136 asm volatile ("mov %%cr2, %0" : "=r" (cr2));
137 return cr2;
138}
139
140static inline void kvm_write_cr2(unsigned long val)
141{
142 asm volatile ("mov %0, %%cr2" :: "r" (val));
143}
144
145static inline unsigned long read_dr6(void)
146{
147 unsigned long dr6;
148
149 asm volatile ("mov %%dr6, %0" : "=r" (dr6));
150 return dr6;
151}
152
153static inline void write_dr6(unsigned long val)
154{
155 asm volatile ("mov %0, %%dr6" :: "r" (val));
156}
157
158static inline unsigned long read_dr7(void)
159{
160 unsigned long dr7;
161
162 asm volatile ("mov %%dr7, %0" : "=r" (dr7));
163 return dr7;
164}
165
166static inline void write_dr7(unsigned long val)
167{
168 asm volatile ("mov %0, %%dr7" :: "r" (val));
169}
170
6aa8b732
AK		 171static inline void force_new_asid(struct kvm_vcpu *vcpu)
172{
173 vcpu->svm->asid_generation--;
174}
175
176static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
177{
178 force_new_asid(vcpu);
179}
180
181static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
182{
183 if (!(efer & KVM_EFER_LMA))
184 efer &= ~KVM_EFER_LME;
185
186 vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
187 vcpu->shadow_efer = efer;
188}
189
190static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
191{
192 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
193 SVM_EVTINJ_VALID_ERR |
194 SVM_EVTINJ_TYPE_EXEPT |
195 GP_VECTOR;
196 vcpu->svm->vmcb->control.event_inj_err = error_code;
197}
198
199static void inject_ud(struct kvm_vcpu *vcpu)
200{
201 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
202 SVM_EVTINJ_TYPE_EXEPT |
203 UD_VECTOR;
204}
205
206static void inject_db(struct kvm_vcpu *vcpu)
207{
208 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
209 SVM_EVTINJ_TYPE_EXEPT |
210 DB_VECTOR;
211}
212
213static int is_page_fault(uint32_t info)
214{
215 info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
216 return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
217}
218
219static int is_external_interrupt(u32 info)
220{
221 info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
222 return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
223}
224
225static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
226{
227 if (!vcpu->svm->next_rip) {
228 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
229 return;
230 }
231 if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
232 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
233 __FUNCTION__,
234 vcpu->svm->vmcb->save.rip,
235 vcpu->svm->next_rip);
236 }
237
238 vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
239 vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
c1150d8c
DL		 240
241 vcpu->interrupt_window_open = 1;
6aa8b732
AK		 242}
243
244static int has_svm(void)
245{
246 uint32_t eax, ebx, ecx, edx;
247
1e885461 248 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
6aa8b732
AK		 249 printk(KERN_INFO "has_svm: not amd\n");
250 return 0;
251 }
252
253 cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
254 if (eax < SVM_CPUID_FUNC) {
255 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
256 return 0;
257 }
258
259 cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
260 if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
261 printk(KERN_DEBUG "has_svm: svm not available\n");
262 return 0;
263 }
264 return 1;
265}
266
267static void svm_hardware_disable(void *garbage)
268{
269 struct svm_cpu_data *svm_data
270 = per_cpu(svm_data, raw_smp_processor_id());
271
272 if (svm_data) {
273 uint64_t efer;
274
275 wrmsrl(MSR_VM_HSAVE_PA, 0);
276 rdmsrl(MSR_EFER, efer);
277 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
8b6d44c7 278 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
6aa8b732
AK		 279 __free_page(svm_data->save_area);
280 kfree(svm_data);
281 }
282}
283
284static void svm_hardware_enable(void *garbage)
285{
286
287 struct svm_cpu_data *svm_data;
288 uint64_t efer;
05b3e0c2 289#ifdef CONFIG_X86_64
6aa8b732
AK		 290 struct desc_ptr gdt_descr;
291#else
292 struct Xgt_desc_struct gdt_descr;
293#endif
294 struct desc_struct *gdt;
295 int me = raw_smp_processor_id();
296
297 if (!has_svm()) {
298 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
299 return;
300 }
301 svm_data = per_cpu(svm_data, me);
302
303 if (!svm_data) {
304 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
305 me);
306 return;
307 }
308
309 svm_data->asid_generation = 1;
310 svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
311 svm_data->next_asid = svm_data->max_asid + 1;
312
313 asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
314 gdt = (struct desc_struct *)gdt_descr.address;
315 svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
316
317 rdmsrl(MSR_EFER, efer);
318 wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
319
320 wrmsrl(MSR_VM_HSAVE_PA,
321 page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
322}
323
324static int svm_cpu_init(int cpu)
325{
326 struct svm_cpu_data *svm_data;
327 int r;
328
329 svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
330 if (!svm_data)
331 return -ENOMEM;
332 svm_data->cpu = cpu;
333 svm_data->save_area = alloc_page(GFP_KERNEL);
334 r = -ENOMEM;
335 if (!svm_data->save_area)
336 goto err_1;
337
338 per_cpu(svm_data, cpu) = svm_data;
339
340 return 0;
341
342err_1:
343 kfree(svm_data);
344 return r;
345
346}
347
348static int set_msr_interception(u32 *msrpm, unsigned msr,
349 int read, int write)
350{
351 int i;
352
353 for (i = 0; i < NUM_MSR_MAPS; i++) {
354 if (msr >= msrpm_ranges[i] &&
355 msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
356 u32 msr_offset = (i * MSRS_IN_RANGE + msr -
357 msrpm_ranges[i]) * 2;
358
359 u32 *base = msrpm + (msr_offset / 32);
360 u32 msr_shift = msr_offset % 32;
361 u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
362 *base = (*base & ~(0x3 << msr_shift)) |
363 (mask << msr_shift);
364 return 1;
365 }
366 }
367 printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
368 return 0;
369}
370
371static __init int svm_hardware_setup(void)
372{
373 int cpu;
374 struct page *iopm_pages;
375 struct page *msrpm_pages;
376 void *msrpm_va;
377 int r;
378
873a7c42 379 kvm_emulator_want_group7_invlpg();
6aa8b732
AK		 380
381 iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
382
383 if (!iopm_pages)
384 return -ENOMEM;
385 memset(page_address(iopm_pages), 0xff,
386 PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
387 iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
388
389
390 msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
391
392 r = -ENOMEM;
393 if (!msrpm_pages)
394 goto err_1;
395
396 msrpm_va = page_address(msrpm_pages);
397 memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
398 msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
399
05b3e0c2 400#ifdef CONFIG_X86_64
6aa8b732
AK		 401 set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
402 set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
403 set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
6aa8b732
AK		 404 set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
405 set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
406 set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
407#endif
0e859cac 408 set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
6aa8b732
AK		 409 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
410 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
411 set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
412
413 for_each_online_cpu(cpu) {
414 r = svm_cpu_init(cpu);
415 if (r)
416 goto err_2;
417 }
418 return 0;
419
420err_2:
421 __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
422 msrpm_base = 0;
423err_1:
424 __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
425 iopm_base = 0;
426 return r;
427}
428
429static __exit void svm_hardware_unsetup(void)
430{
431 __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
432 __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
433 iopm_base = msrpm_base = 0;
434}
435
436static void init_seg(struct vmcb_seg *seg)
437{
438 seg->selector = 0;
439 seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
440 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
441 seg->limit = 0xffff;
442 seg->base = 0;
443}
444
445static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
446{
447 seg->selector = 0;
448 seg->attrib = SVM_SELECTOR_P_MASK | type;
449 seg->limit = 0xffff;
450 seg->base = 0;
451}
452
453static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
454{
455 return 0;
456}
457
458static void init_vmcb(struct vmcb *vmcb)
459{
460 struct vmcb_control_area *control = &vmcb->control;
461 struct vmcb_save_area *save = &vmcb->save;
462 u64 tsc;
463
464 control->intercept_cr_read = INTERCEPT_CR0_MASK |
465 INTERCEPT_CR3_MASK |
466 INTERCEPT_CR4_MASK;
467
468 control->intercept_cr_write = INTERCEPT_CR0_MASK |
469 INTERCEPT_CR3_MASK |
470 INTERCEPT_CR4_MASK;
471
472 control->intercept_dr_read = INTERCEPT_DR0_MASK |
473 INTERCEPT_DR1_MASK |
474 INTERCEPT_DR2_MASK |
475 INTERCEPT_DR3_MASK;
476
477 control->intercept_dr_write = INTERCEPT_DR0_MASK |
478 INTERCEPT_DR1_MASK |
479 INTERCEPT_DR2_MASK |
480 INTERCEPT_DR3_MASK |
481 INTERCEPT_DR5_MASK |
482 INTERCEPT_DR7_MASK;
483
484 control->intercept_exceptions = 1 << PF_VECTOR;
485
486
487 control->intercept = (1ULL << INTERCEPT_INTR) |
488 (1ULL << INTERCEPT_NMI) |
0152527b 489 (1ULL << INTERCEPT_SMI) |
6aa8b732
AK		 490 /*
491 * selective cr0 intercept bug?
492 * 0: 0f 22 d8 mov %eax,%cr3
493 * 3: 0f 20 c0 mov %cr0,%eax
494 * 6: 0d 00 00 00 80 or $0x80000000,%eax
495 * b: 0f 22 c0 mov %eax,%cr0
496 * set cr3 ->interception
497 * get cr0 ->interception
498 * set cr0 -> no interception
499 */
500 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
501 (1ULL << INTERCEPT_CPUID) |
502 (1ULL << INTERCEPT_HLT) |
6aa8b732
AK		 503 (1ULL << INTERCEPT_INVLPGA) |
504 (1ULL << INTERCEPT_IOIO_PROT) |
505 (1ULL << INTERCEPT_MSR_PROT) |
506 (1ULL << INTERCEPT_TASK_SWITCH) |
46fe4ddd 507 (1ULL << INTERCEPT_SHUTDOWN) |
6aa8b732
AK		 508 (1ULL << INTERCEPT_VMRUN) |
509 (1ULL << INTERCEPT_VMMCALL) |
510 (1ULL << INTERCEPT_VMLOAD) |
511 (1ULL << INTERCEPT_VMSAVE) |
512 (1ULL << INTERCEPT_STGI) |
513 (1ULL << INTERCEPT_CLGI) |
514 (1ULL << INTERCEPT_SKINIT);
515
516 control->iopm_base_pa = iopm_base;
517 control->msrpm_base_pa = msrpm_base;
518 rdtscll(tsc);
519 control->tsc_offset = -tsc;
520 control->int_ctl = V_INTR_MASKING_MASK;
521
522 init_seg(&save->es);
523 init_seg(&save->ss);
524 init_seg(&save->ds);
525 init_seg(&save->fs);
526 init_seg(&save->gs);
527
528 save->cs.selector = 0xf000;
529 /* Executable/Readable Code Segment */
530 save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
531 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
532 save->cs.limit = 0xffff;
d92899a0
AK		 533 /*
534 * cs.base should really be 0xffff0000, but vmx can't handle that, so
535 * be consistent with it.
536 *
537 * Replace when we have real mode working for vmx.
538 */
539 save->cs.base = 0xf0000;
6aa8b732
AK		 540
541 save->gdtr.limit = 0xffff;
542 save->idtr.limit = 0xffff;
543
544 init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
545 init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
546
547 save->efer = MSR_EFER_SVME_MASK;
548
549 save->dr6 = 0xffff0ff0;
550 save->dr7 = 0x400;
551 save->rflags = 2;
552 save->rip = 0x0000fff0;
553
554 /*
555 * cr0 val on cpu init should be 0x60000010, we enable cpu
556 * cache by default. the orderly way is to enable cache in bios.
557 */
cd205625 558 save->cr0 = 0x00000010 | CR0_PG_MASK | CR0_WP_MASK;
6aa8b732
AK		 559 save->cr4 = CR4_PAE_MASK;
560 /* rdx = ?? */
561}
562
563static int svm_create_vcpu(struct kvm_vcpu *vcpu)
564{
565 struct page *page;
566 int r;
567
568 r = -ENOMEM;
569 vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
570 if (!vcpu->svm)
571 goto out1;
572 page = alloc_page(GFP_KERNEL);
573 if (!page)
574 goto out2;
575
576 vcpu->svm->vmcb = page_address(page);
577 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
578 vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
579 vcpu->svm->cr0 = 0x00000010;
580 vcpu->svm->asid_generation = 0;
581 memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
582 init_vmcb(vcpu->svm->vmcb);
583
36241b8c 584 fx_init(vcpu);
6722c51c
AK		 585 vcpu->apic_base = 0xfee00000 |
586 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
587 MSR_IA32_APICBASE_ENABLE;
36241b8c 588
6aa8b732
AK		 589 return 0;
590
591out2:
592 kfree(vcpu->svm);
593out1:
594 return r;
595}
596
597static void svm_free_vcpu(struct kvm_vcpu *vcpu)
598{
599 if (!vcpu->svm)
600 return;
601 if (vcpu->svm->vmcb)
602 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
603 kfree(vcpu->svm);
604}
605
bccf2150 606static void svm_vcpu_load(struct kvm_vcpu *vcpu)
6aa8b732
AK		 607{
608 get_cpu();
6aa8b732
AK		 609}
610
611static void svm_vcpu_put(struct kvm_vcpu *vcpu)
612{
613 put_cpu();
614}
615
774c47f1
AK		 616static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
617{
618}
619
6aa8b732
AK		 620static void svm_cache_regs(struct kvm_vcpu *vcpu)
621{
622 vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
623 vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
624 vcpu->rip = vcpu->svm->vmcb->save.rip;
625}
626
627static void svm_decache_regs(struct kvm_vcpu *vcpu)
628{
629 vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
630 vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
631 vcpu->svm->vmcb->save.rip = vcpu->rip;
632}
633
634static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
635{
636 return vcpu->svm->vmcb->save.rflags;
637}
638
639static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
640{
641 vcpu->svm->vmcb->save.rflags = rflags;
642}
643
644static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
645{
646 struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
647
648 switch (seg) {
649 case VCPU_SREG_CS: return &save->cs;
650 case VCPU_SREG_DS: return &save->ds;
651 case VCPU_SREG_ES: return &save->es;
652 case VCPU_SREG_FS: return &save->fs;
653 case VCPU_SREG_GS: return &save->gs;
654 case VCPU_SREG_SS: return &save->ss;
655 case VCPU_SREG_TR: return &save->tr;
656 case VCPU_SREG_LDTR: return &save->ldtr;
657 }
658 BUG();
8b6d44c7 659 return NULL;
6aa8b732
AK		 660}
661
662static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
663{
664 struct vmcb_seg *s = svm_seg(vcpu, seg);
665
666 return s->base;
667}
668
669static void svm_get_segment(struct kvm_vcpu *vcpu,
670 struct kvm_segment *var, int seg)
671{
672 struct vmcb_seg *s = svm_seg(vcpu, seg);
673
674 var->base = s->base;
675 var->limit = s->limit;
676 var->selector = s->selector;
677 var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
678 var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
679 var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
680 var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
681 var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
682 var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
683 var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
684 var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
685 var->unusable = !var->present;
686}
687
688static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
689{
690 struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
691
692 *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
693 *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
694}
695
696static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
697{
bce66ca4
LN		 698 dt->limit = vcpu->svm->vmcb->save.idtr.limit;
699 dt->base = vcpu->svm->vmcb->save.idtr.base;
6aa8b732
AK		 700}
701
702static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
703{
bce66ca4
LN		 704 vcpu->svm->vmcb->save.idtr.limit = dt->limit;
705 vcpu->svm->vmcb->save.idtr.base = dt->base ;
6aa8b732
AK		 706}
707
708static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
709{
710 dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
711 dt->base = vcpu->svm->vmcb->save.gdtr.base;
712}
713
714static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
715{
716 vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
717 vcpu->svm->vmcb->save.gdtr.base = dt->base ;
718}
719
399badf3
AK		 720static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
721{
722}
723
6aa8b732
AK		 724static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
725{
05b3e0c2 726#ifdef CONFIG_X86_64
6aa8b732
AK		 727 if (vcpu->shadow_efer & KVM_EFER_LME) {
728 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
729 vcpu->shadow_efer |= KVM_EFER_LMA;
730 vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
731 }
732
733 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
734 vcpu->shadow_efer &= ~KVM_EFER_LMA;
735 vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
736 }
737 }
738#endif
739 vcpu->svm->cr0 = cr0;
ac6c2bc5 740 vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK | CR0_WP_MASK;
6aa8b732
AK		 741 vcpu->cr0 = cr0;
742}
743
744static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
745{
746 vcpu->cr4 = cr4;
747 vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
748}
749
750static void svm_set_segment(struct kvm_vcpu *vcpu,
751 struct kvm_segment *var, int seg)
752{
753 struct vmcb_seg *s = svm_seg(vcpu, seg);
754
755 s->base = var->base;
756 s->limit = var->limit;
757 s->selector = var->selector;
758 if (var->unusable)
759 s->attrib = 0;
760 else {
761 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
762 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
763 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
764 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
765 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
766 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
767 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
768 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
769 }
770 if (seg == VCPU_SREG_CS)
771 vcpu->svm->vmcb->save.cpl
772 = (vcpu->svm->vmcb->save.cs.attrib
773 >> SVM_SELECTOR_DPL_SHIFT) & 3;
774
775}
776
777/* FIXME:
778
779 vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
780 vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
781
782*/
783
784static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
785{
786 return -EOPNOTSUPP;
787}
788
789static void load_host_msrs(struct kvm_vcpu *vcpu)
790{
791 int i;
792
793 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
794 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
795}
796
797static void save_host_msrs(struct kvm_vcpu *vcpu)
798{
799 int i;
800
801 for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
802 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
803}
804
805static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
806{
807 if (svm_data->next_asid > svm_data->max_asid) {
808 ++svm_data->asid_generation;
809 svm_data->next_asid = 1;
810 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
811 }
812
813 vcpu->cpu = svm_data->cpu;
814 vcpu->svm->asid_generation = svm_data->asid_generation;
815 vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
816}
817
818static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
819{
820 invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
821}
822
823static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
824{
825 return vcpu->svm->db_regs[dr];
826}
827
828static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
829 int *exception)
830{
831 *exception = 0;
832
833 if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
834 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
835 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
836 *exception = DB_VECTOR;
837 return;
838 }
839
840 switch (dr) {
841 case 0 ... 3:
842 vcpu->svm->db_regs[dr] = value;
843 return;
844 case 4 ... 5:
845 if (vcpu->cr4 & CR4_DE_MASK) {
846 *exception = UD_VECTOR;
847 return;
848 }
849 case 7: {
850 if (value & ~((1ULL << 32) - 1)) {
851 *exception = GP_VECTOR;
852 return;
853 }
854 vcpu->svm->vmcb->save.dr7 = value;
855 return;
856 }
857 default:
858 printk(KERN_DEBUG "%s: unexpected dr %u\n",
859 __FUNCTION__, dr);
860 *exception = UD_VECTOR;
861 return;
862 }
863}
864
865static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
866{
867 u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
868 u64 fault_address;
869 u32 error_code;
870 enum emulation_result er;
e2dec939 871 int r;
6aa8b732
AK		 872
873 if (is_external_interrupt(exit_int_info))
874 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
875
876 spin_lock(&vcpu->kvm->lock);
877
878 fault_address = vcpu->svm->vmcb->control.exit_info_2;
879 error_code = vcpu->svm->vmcb->control.exit_info_1;
e2dec939
AK		 880 r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
881 if (r < 0) {
882 spin_unlock(&vcpu->kvm->lock);
883 return r;
884 }
885 if (!r) {
6aa8b732
AK		 886 spin_unlock(&vcpu->kvm->lock);
887 return 1;
888 }
889 er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
890 spin_unlock(&vcpu->kvm->lock);
891
892 switch (er) {
893 case EMULATE_DONE:
894 return 1;
895 case EMULATE_DO_MMIO:
896 ++kvm_stat.mmio_exits;
897 kvm_run->exit_reason = KVM_EXIT_MMIO;
898 return 0;
899 case EMULATE_FAIL:
900 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
901 break;
902 default:
903 BUG();
904 }
905
906 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
907 return 0;
908}
909
46fe4ddd
JR		 910static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
911{
912 /*
913 * VMCB is undefined after a SHUTDOWN intercept
914 * so reinitialize it.
915 */
916 memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
917 init_vmcb(vcpu->svm->vmcb);
918
919 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
920 return 0;
921}
922
6aa8b732
AK		 923static int io_get_override(struct kvm_vcpu *vcpu,
924 struct vmcb_seg **seg,
925 int *addr_override)
926{
927 u8 inst[MAX_INST_SIZE];
928 unsigned ins_length;
929 gva_t rip;
930 int i;
931
932 rip = vcpu->svm->vmcb->save.rip;
933 ins_length = vcpu->svm->next_rip - rip;
934 rip += vcpu->svm->vmcb->save.cs.base;
935
936 if (ins_length > MAX_INST_SIZE)
937 printk(KERN_DEBUG
938 "%s: inst length err, cs base 0x%llx rip 0x%llx "
939 "next rip 0x%llx ins_length %u\n",
940 __FUNCTION__,
941 vcpu->svm->vmcb->save.cs.base,
942 vcpu->svm->vmcb->save.rip,
943 vcpu->svm->vmcb->control.exit_info_2,
944 ins_length);
945
946 if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
947 /* #PF */
948 return 0;
949
950 *addr_override = 0;
8b6d44c7 951 *seg = NULL;
6aa8b732
AK		 952 for (i = 0; i < ins_length; i++)
953 switch (inst[i]) {
954 case 0xf0:
955 case 0xf2:
956 case 0xf3:
957 case 0x66:
958 continue;
959 case 0x67:
960 *addr_override = 1;
961 continue;
962 case 0x2e:
963 *seg = &vcpu->svm->vmcb->save.cs;
964 continue;
965 case 0x36:
966 *seg = &vcpu->svm->vmcb->save.ss;
967 continue;
968 case 0x3e:
969 *seg = &vcpu->svm->vmcb->save.ds;
970 continue;
971 case 0x26:
972 *seg = &vcpu->svm->vmcb->save.es;
973 continue;
974 case 0x64:
975 *seg = &vcpu->svm->vmcb->save.fs;
976 continue;
977 case 0x65:
978 *seg = &vcpu->svm->vmcb->save.gs;
979 continue;
980 default:
981 return 1;
982 }
983 printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
984 return 0;
985}
986
039576c0 987static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, gva_t *address)
6aa8b732
AK		 988{
989 unsigned long addr_mask;
990 unsigned long *reg;
991 struct vmcb_seg *seg;
992 int addr_override;
993 struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
994 u16 cs_attrib = save_area->cs.attrib;
995 unsigned addr_size = get_addr_size(vcpu);
996
997 if (!io_get_override(vcpu, &seg, &addr_override))
998 return 0;
999
1000 if (addr_override)
1001 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
1002
1003 if (ins) {
1004 reg = &vcpu->regs[VCPU_REGS_RDI];
1005 seg = &vcpu->svm->vmcb->save.es;
1006 } else {
1007 reg = &vcpu->regs[VCPU_REGS_RSI];
1008 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
1009 }
1010
1011 addr_mask = ~0ULL >> (64 - (addr_size * 8));
1012
1013 if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1014 !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1015 *address = (*reg & addr_mask);
1016 return addr_mask;
1017 }
1018
1019 if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1020 svm_inject_gp(vcpu, 0);
1021 return 0;
1022 }
1023
1024 *address = (*reg & addr_mask) + seg->base;
1025 return addr_mask;
1026}
1027
1028static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1029{
1030 u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
039576c0
AK		 1031 int size, down, in, string, rep;
1032 unsigned port;
1033 unsigned long count;
1034 gva_t address = 0;
6aa8b732
AK		 1035
1036 ++kvm_stat.io_exits;
1037
1038 vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1039
039576c0
AK		 1040 in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1041 port = io_info >> 16;
1042 size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1043 string = (io_info & SVM_IOIO_STR_MASK) != 0;
1044 rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1045 count = 1;
1046 down = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
6aa8b732 1047
039576c0 1048 if (string) {
6aa8b732
AK		 1049 unsigned addr_mask;
1050
039576c0 1051 addr_mask = io_adress(vcpu, in, &address);
6aa8b732 1052 if (!addr_mask) {
d27d4aca
AK		 1053 printk(KERN_DEBUG "%s: get io address failed\n",
1054 __FUNCTION__);
6aa8b732
AK		 1055 return 1;
1056 }
1057
039576c0
AK		 1058 if (rep)
1059 count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1060 }
1061 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1062 address, rep, port);
6aa8b732
AK		 1063}
1064
6aa8b732
AK		 1065static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1066{
1067 return 1;
1068}
1069
1070static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1071{
1072 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1073 skip_emulated_instruction(vcpu);
c1150d8c 1074 if (vcpu->irq_summary)
6aa8b732
AK		 1075 return 1;
1076
1077 kvm_run->exit_reason = KVM_EXIT_HLT;
c1150d8c 1078 ++kvm_stat.halt_exits;
6aa8b732
AK		 1079 return 0;
1080}
1081
02e235bc
AK		 1082static int vmmcall_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1083{
510043da
DL		 1084 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 3;
1085 skip_emulated_instruction(vcpu);
270fd9b9 1086 return kvm_hypercall(vcpu, kvm_run);
02e235bc
AK		 1087}
1088
6aa8b732
AK		 1089static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1090{
1091 inject_ud(vcpu);
1092 return 1;
1093}
1094
1095static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1096{
1097 printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1098 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1099 return 0;
1100}
1101
1102static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1103{
1104 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
06465c5a
AK		 1105 kvm_emulate_cpuid(vcpu);
1106 return 1;
6aa8b732
AK		 1107}
1108
1109static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1110{
8b6d44c7 1111 if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
6aa8b732
AK		 1112 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1113 return 1;
1114}
1115
1116static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1117{
1118 switch (ecx) {
6aa8b732
AK		 1119 case MSR_IA32_TIME_STAMP_COUNTER: {
1120 u64 tsc;
1121
1122 rdtscll(tsc);
1123 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1124 break;
1125 }
0e859cac 1126 case MSR_K6_STAR:
6aa8b732
AK		 1127 *data = vcpu->svm->vmcb->save.star;
1128 break;
0e859cac 1129#ifdef CONFIG_X86_64
6aa8b732
AK		 1130 case MSR_LSTAR:
1131 *data = vcpu->svm->vmcb->save.lstar;
1132 break;
1133 case MSR_CSTAR:
1134 *data = vcpu->svm->vmcb->save.cstar;
1135 break;
1136 case MSR_KERNEL_GS_BASE:
1137 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1138 break;
1139 case MSR_SYSCALL_MASK:
1140 *data = vcpu->svm->vmcb->save.sfmask;
1141 break;
1142#endif
1143 case MSR_IA32_SYSENTER_CS:
1144 *data = vcpu->svm->vmcb->save.sysenter_cs;
1145 break;
1146 case MSR_IA32_SYSENTER_EIP:
1147 *data = vcpu->svm->vmcb->save.sysenter_eip;
1148 break;
1149 case MSR_IA32_SYSENTER_ESP:
1150 *data = vcpu->svm->vmcb->save.sysenter_esp;
1151 break;
1152 default:
3bab1f5d 1153 return kvm_get_msr_common(vcpu, ecx, data);
6aa8b732
AK		 1154 }
1155 return 0;
1156}
1157
1158static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1159{
1160 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1161 u64 data;
1162
1163 if (svm_get_msr(vcpu, ecx, &data))
1164 svm_inject_gp(vcpu, 0);
1165 else {
1166 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1167 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1168 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1169 skip_emulated_instruction(vcpu);
1170 }
1171 return 1;
1172}
1173
1174static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1175{
1176 switch (ecx) {
6aa8b732
AK		 1177 case MSR_IA32_TIME_STAMP_COUNTER: {
1178 u64 tsc;
1179
1180 rdtscll(tsc);
1181 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1182 break;
1183 }
0e859cac 1184 case MSR_K6_STAR:
6aa8b732
AK		 1185 vcpu->svm->vmcb->save.star = data;
1186 break;
49b14f24 1187#ifdef CONFIG_X86_64
6aa8b732
AK		 1188 case MSR_LSTAR:
1189 vcpu->svm->vmcb->save.lstar = data;
1190 break;
1191 case MSR_CSTAR:
1192 vcpu->svm->vmcb->save.cstar = data;
1193 break;
1194 case MSR_KERNEL_GS_BASE:
1195 vcpu->svm->vmcb->save.kernel_gs_base = data;
1196 break;
1197 case MSR_SYSCALL_MASK:
1198 vcpu->svm->vmcb->save.sfmask = data;
1199 break;
1200#endif
1201 case MSR_IA32_SYSENTER_CS:
1202 vcpu->svm->vmcb->save.sysenter_cs = data;
1203 break;
1204 case MSR_IA32_SYSENTER_EIP:
1205 vcpu->svm->vmcb->save.sysenter_eip = data;
1206 break;
1207 case MSR_IA32_SYSENTER_ESP:
1208 vcpu->svm->vmcb->save.sysenter_esp = data;
1209 break;
1210 default:
3bab1f5d 1211 return kvm_set_msr_common(vcpu, ecx, data);
6aa8b732
AK		 1212 }
1213 return 0;
1214}
1215
1216static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1217{
1218 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1219 u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1220 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1221 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1222 if (svm_set_msr(vcpu, ecx, data))
1223 svm_inject_gp(vcpu, 0);
1224 else
1225 skip_emulated_instruction(vcpu);
1226 return 1;
1227}
1228
1229static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1230{
1231 if (vcpu->svm->vmcb->control.exit_info_1)
1232 return wrmsr_interception(vcpu, kvm_run);
1233 else
1234 return rdmsr_interception(vcpu, kvm_run);
1235}
1236
c1150d8c
DL		 1237static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1238 struct kvm_run *kvm_run)
1239{
1240 /*
1241 * If the user space waits to inject interrupts, exit as soon as
1242 * possible
1243 */
1244 if (kvm_run->request_interrupt_window &&
022a9308 1245 !vcpu->irq_summary) {
c1150d8c
DL		 1246 ++kvm_stat.irq_window_exits;
1247 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1248 return 0;
1249 }
1250
1251 return 1;
1252}
1253
6aa8b732
AK		 1254static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1255 struct kvm_run *kvm_run) = {
1256 [SVM_EXIT_READ_CR0] = emulate_on_interception,
1257 [SVM_EXIT_READ_CR3] = emulate_on_interception,
1258 [SVM_EXIT_READ_CR4] = emulate_on_interception,
1259 /* for now: */
1260 [SVM_EXIT_WRITE_CR0] = emulate_on_interception,
1261 [SVM_EXIT_WRITE_CR3] = emulate_on_interception,
1262 [SVM_EXIT_WRITE_CR4] = emulate_on_interception,
1263 [SVM_EXIT_READ_DR0] = emulate_on_interception,
1264 [SVM_EXIT_READ_DR1] = emulate_on_interception,
1265 [SVM_EXIT_READ_DR2] = emulate_on_interception,
1266 [SVM_EXIT_READ_DR3] = emulate_on_interception,
1267 [SVM_EXIT_WRITE_DR0] = emulate_on_interception,
1268 [SVM_EXIT_WRITE_DR1] = emulate_on_interception,
1269 [SVM_EXIT_WRITE_DR2] = emulate_on_interception,
1270 [SVM_EXIT_WRITE_DR3] = emulate_on_interception,
1271 [SVM_EXIT_WRITE_DR5] = emulate_on_interception,
1272 [SVM_EXIT_WRITE_DR7] = emulate_on_interception,
1273 [SVM_EXIT_EXCP_BASE + PF_VECTOR] = pf_interception,
1274 [SVM_EXIT_INTR] = nop_on_interception,
1275 [SVM_EXIT_NMI] = nop_on_interception,
1276 [SVM_EXIT_SMI] = nop_on_interception,
1277 [SVM_EXIT_INIT] = nop_on_interception,
c1150d8c 1278 [SVM_EXIT_VINTR] = interrupt_window_interception,
6aa8b732
AK		 1279 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1280 [SVM_EXIT_CPUID] = cpuid_interception,
1281 [SVM_EXIT_HLT] = halt_interception,
1282 [SVM_EXIT_INVLPG] = emulate_on_interception,
1283 [SVM_EXIT_INVLPGA] = invalid_op_interception,
1284 [SVM_EXIT_IOIO] = io_interception,
1285 [SVM_EXIT_MSR] = msr_interception,
1286 [SVM_EXIT_TASK_SWITCH] = task_switch_interception,
46fe4ddd 1287 [SVM_EXIT_SHUTDOWN] = shutdown_interception,
6aa8b732 1288 [SVM_EXIT_VMRUN] = invalid_op_interception,
02e235bc 1289 [SVM_EXIT_VMMCALL] = vmmcall_interception,
6aa8b732
AK		 1290 [SVM_EXIT_VMLOAD] = invalid_op_interception,
1291 [SVM_EXIT_VMSAVE] = invalid_op_interception,
1292 [SVM_EXIT_STGI] = invalid_op_interception,
1293 [SVM_EXIT_CLGI] = invalid_op_interception,
1294 [SVM_EXIT_SKINIT] = invalid_op_interception,
1295};
1296
1297
1298static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1299{
1300 u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1301
6aa8b732
AK		 1302 if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1303 exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1304 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1305 "exit_code 0x%x\n",
1306 __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1307 exit_code);
1308
9d8f549d 1309 if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
6aa8b732
AK		 1310 || svm_exit_handlers[exit_code] == 0) {
1311 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1312 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1313 __FUNCTION__,
1314 exit_code,
1315 vcpu->svm->vmcb->save.rip,
1316 vcpu->cr0,
1317 vcpu->svm->vmcb->save.rflags);
1318 return 0;
1319 }
1320
1321 return svm_exit_handlers[exit_code](vcpu, kvm_run);
1322}
1323
1324static void reload_tss(struct kvm_vcpu *vcpu)
1325{
1326 int cpu = raw_smp_processor_id();
1327
1328 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1329 svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1330 load_TR_desc();
1331}
1332
1333static void pre_svm_run(struct kvm_vcpu *vcpu)
1334{
1335 int cpu = raw_smp_processor_id();
1336
1337 struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1338
1339 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1340 if (vcpu->cpu != cpu ||
1341 vcpu->svm->asid_generation != svm_data->asid_generation)
1342 new_asid(vcpu, svm_data);
1343}
1344
1345
c1150d8c 1346static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
6aa8b732
AK		 1347{
1348 struct vmcb_control_area *control;
1349
6aa8b732 1350 control = &vcpu->svm->vmcb->control;
6aa8b732
AK		 1351 control->int_vector = pop_irq(vcpu);
1352 control->int_ctl &= ~V_INTR_PRIO_MASK;
1353 control->int_ctl |= V_IRQ_MASK |
1354 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1355}
1356
1357static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1358{
1359 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1360
1361 if (control->int_ctl & V_IRQ_MASK) {
1362 control->int_ctl &= ~V_IRQ_MASK;
1363 push_irq(vcpu, control->int_vector);
1364 }
c1150d8c
DL		 1365
1366 vcpu->interrupt_window_open =
1367 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1368}
1369
1370static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1371 struct kvm_run *kvm_run)
1372{
1373 struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1374
1375 vcpu->interrupt_window_open =
1376 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1377 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1378
1379 if (vcpu->interrupt_window_open && vcpu->irq_summary)
1380 /*
1381 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1382 */
1383 kvm_do_inject_irq(vcpu);
1384
1385 /*
1386 * Interrupts blocked. Wait for unblock.
1387 */
1388 if (!vcpu->interrupt_window_open &&
1389 (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1390 control->intercept |= 1ULL << INTERCEPT_VINTR;
1391 } else
1392 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1393}
1394
1395static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1396 struct kvm_run *kvm_run)
1397{
1398 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1399 vcpu->irq_summary == 0);
1400 kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1401 kvm_run->cr8 = vcpu->cr8;
1402 kvm_run->apic_base = vcpu->apic_base;
1403}
1404
1405/*
1406 * Check if userspace requested an interrupt window, and that the
1407 * interrupt window is open.
1408 *
1409 * No need to exit to userspace if we already have an interrupt queued.
1410 */
1411static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1412 struct kvm_run *kvm_run)
1413{
1414 return (!vcpu->irq_summary &&
1415 kvm_run->request_interrupt_window &&
1416 vcpu->interrupt_window_open &&
1417 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
6aa8b732
AK		 1418}
1419
1420static void save_db_regs(unsigned long *db_regs)
1421{
5aff458e
AK		 1422 asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1423 asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1424 asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1425 asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
6aa8b732
AK		 1426}
1427
1428static void load_db_regs(unsigned long *db_regs)
1429{
5aff458e
AK		 1430 asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1431 asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1432 asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1433 asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
6aa8b732
AK		 1434}
1435
1436static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1437{
1438 u16 fs_selector;
1439 u16 gs_selector;
1440 u16 ldt_selector;
e2dec939 1441 int r;
6aa8b732
AK		 1442
1443again:
cccf748b
AK		 1444 if (!vcpu->mmio_read_completed)
1445 do_interrupt_requests(vcpu, kvm_run);
6aa8b732
AK		 1446
1447 clgi();
1448
1449 pre_svm_run(vcpu);
1450
1451 save_host_msrs(vcpu);
1452 fs_selector = read_fs();
1453 gs_selector = read_gs();
1454 ldt_selector = read_ldt();
1455 vcpu->svm->host_cr2 = kvm_read_cr2();
1456 vcpu->svm->host_dr6 = read_dr6();
1457 vcpu->svm->host_dr7 = read_dr7();
1458 vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1459
1460 if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1461 write_dr7(0);
1462 save_db_regs(vcpu->svm->host_db_regs);
1463 load_db_regs(vcpu->svm->db_regs);
1464 }
36241b8c
AK		 1465
1466 fx_save(vcpu->host_fx_image);
1467 fx_restore(vcpu->guest_fx_image);
1468
6aa8b732 1469 asm volatile (
05b3e0c2 1470#ifdef CONFIG_X86_64
6aa8b732
AK		 1471 "push %%rbx; push %%rcx; push %%rdx;"
1472 "push %%rsi; push %%rdi; push %%rbp;"
1473 "push %%r8; push %%r9; push %%r10; push %%r11;"
1474 "push %%r12; push %%r13; push %%r14; push %%r15;"
1475#else
1476 "push %%ebx; push %%ecx; push %%edx;"
1477 "push %%esi; push %%edi; push %%ebp;"
1478#endif
1479
05b3e0c2 1480#ifdef CONFIG_X86_64
6aa8b732
AK		 1481 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1482 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1483 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1484 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1485 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1486 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1487 "mov %c[r8](%[vcpu]), %%r8 \n\t"
1488 "mov %c[r9](%[vcpu]), %%r9 \n\t"
1489 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1490 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1491 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1492 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1493 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1494 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1495#else
1496 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1497 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1498 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1499 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1500 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1501 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1502#endif
1503
05b3e0c2 1504#ifdef CONFIG_X86_64
6aa8b732
AK		 1505 /* Enter guest mode */
1506 "push %%rax \n\t"
1507 "mov %c[svm](%[vcpu]), %%rax \n\t"
1508 "mov %c[vmcb](%%rax), %%rax \n\t"
1509 SVM_VMLOAD "\n\t"
1510 SVM_VMRUN "\n\t"
1511 SVM_VMSAVE "\n\t"
1512 "pop %%rax \n\t"
1513#else
1514 /* Enter guest mode */
1515 "push %%eax \n\t"
1516 "mov %c[svm](%[vcpu]), %%eax \n\t"
1517 "mov %c[vmcb](%%eax), %%eax \n\t"
1518 SVM_VMLOAD "\n\t"
1519 SVM_VMRUN "\n\t"
1520 SVM_VMSAVE "\n\t"
1521 "pop %%eax \n\t"
1522#endif
1523
1524 /* Save guest registers, load host registers */
05b3e0c2 1525#ifdef CONFIG_X86_64
6aa8b732
AK		 1526 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1527 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1528 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1529 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1530 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1531 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1532 "mov %%r8, %c[r8](%[vcpu]) \n\t"
1533 "mov %%r9, %c[r9](%[vcpu]) \n\t"
1534 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1535 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1536 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1537 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1538 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1539 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1540
1541 "pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1542 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1543 "pop %%rbp; pop %%rdi; pop %%rsi;"
1544 "pop %%rdx; pop %%rcx; pop %%rbx; \n\t"
1545#else
1546 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1547 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1548 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1549 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1550 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1551 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1552
1553 "pop %%ebp; pop %%edi; pop %%esi;"
1554 "pop %%edx; pop %%ecx; pop %%ebx; \n\t"
1555#endif
1556 :
1557 : [vcpu]"a"(vcpu),
1558 [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1559 [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1560 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1561 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1562 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1563 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1564 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1565 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
05b3e0c2 1566#ifdef CONFIG_X86_64
6aa8b732
AK		 1567 ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1568 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1569 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1570 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1571 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1572 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1573 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1574 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1575#endif
1576 : "cc", "memory" );
1577
36241b8c
AK		 1578 fx_save(vcpu->guest_fx_image);
1579 fx_restore(vcpu->host_fx_image);
1580
6aa8b732
AK		 1581 if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1582 load_db_regs(vcpu->svm->host_db_regs);
1583
1584 vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1585
1586 write_dr6(vcpu->svm->host_dr6);
1587 write_dr7(vcpu->svm->host_dr7);
1588 kvm_write_cr2(vcpu->svm->host_cr2);
1589
1590 load_fs(fs_selector);
1591 load_gs(gs_selector);
1592 load_ldt(ldt_selector);
1593 load_host_msrs(vcpu);
1594
1595 reload_tss(vcpu);
1596
07031e14
IM		 1597 /*
1598 * Profile KVM exit RIPs:
1599 */
1600 if (unlikely(prof_on == KVM_PROFILING))
1601 profile_hit(KVM_PROFILING,
1602 (void *)(unsigned long)vcpu->svm->vmcb->save.rip);
1603
6aa8b732
AK		 1604 stgi();
1605
1606 kvm_reput_irq(vcpu);
1607
1608 vcpu->svm->next_rip = 0;
1609
1610 if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
8eb7d334
AK		 1611 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1612 kvm_run->fail_entry.hardware_entry_failure_reason
1613 = vcpu->svm->vmcb->control.exit_code;
c1150d8c 1614 post_kvm_run_save(vcpu, kvm_run);
6aa8b732
AK		 1615 return 0;
1616 }
1617
e2dec939
AK		 1618 r = handle_exit(vcpu, kvm_run);
1619 if (r > 0) {
6aa8b732
AK		 1620 if (signal_pending(current)) {
1621 ++kvm_stat.signal_exits;
c1150d8c 1622 post_kvm_run_save(vcpu, kvm_run);
1b19f3e6 1623 kvm_run->exit_reason = KVM_EXIT_INTR;
c1150d8c
DL		 1624 return -EINTR;
1625 }
1626
1627 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1628 ++kvm_stat.request_irq_exits;
1629 post_kvm_run_save(vcpu, kvm_run);
1b19f3e6 1630 kvm_run->exit_reason = KVM_EXIT_INTR;
6aa8b732
AK		 1631 return -EINTR;
1632 }
1633 kvm_resched(vcpu);
1634 goto again;
1635 }
c1150d8c 1636 post_kvm_run_save(vcpu, kvm_run);
e2dec939 1637 return r;
6aa8b732
AK		 1638}
1639
1640static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1641{
1642 force_new_asid(vcpu);
1643}
1644
1645static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1646{
1647 vcpu->svm->vmcb->save.cr3 = root;
1648 force_new_asid(vcpu);
1649}
1650
1651static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1652 unsigned long addr,
1653 uint32_t err_code)
1654{
1655 uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1656
1657 ++kvm_stat.pf_guest;
1658
1659 if (is_page_fault(exit_int_info)) {
1660
1661 vcpu->svm->vmcb->control.event_inj_err = 0;
1662 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1663 SVM_EVTINJ_VALID_ERR |
1664 SVM_EVTINJ_TYPE_EXEPT |
1665 DF_VECTOR;
1666 return;
1667 }
1668 vcpu->cr2 = addr;
1669 vcpu->svm->vmcb->save.cr2 = addr;
1670 vcpu->svm->vmcb->control.event_inj = SVM_EVTINJ_VALID |
1671 SVM_EVTINJ_VALID_ERR |
1672 SVM_EVTINJ_TYPE_EXEPT |
1673 PF_VECTOR;
1674 vcpu->svm->vmcb->control.event_inj_err = err_code;
1675}
1676
1677
1678static int is_disabled(void)
1679{
1680 return 0;
1681}
1682
102d8325
IM		 1683static void
1684svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1685{
1686 /*
1687 * Patch in the VMMCALL instruction:
1688 */
1689 hypercall[0] = 0x0f;
1690 hypercall[1] = 0x01;
1691 hypercall[2] = 0xd9;
1692 hypercall[3] = 0xc3;
1693}
1694
6aa8b732
AK		 1695static struct kvm_arch_ops svm_arch_ops = {
1696 .cpu_has_kvm_support = has_svm,
1697 .disabled_by_bios = is_disabled,
1698 .hardware_setup = svm_hardware_setup,
1699 .hardware_unsetup = svm_hardware_unsetup,
1700 .hardware_enable = svm_hardware_enable,
1701 .hardware_disable = svm_hardware_disable,
1702
1703 .vcpu_create = svm_create_vcpu,
1704 .vcpu_free = svm_free_vcpu,
1705
1706 .vcpu_load = svm_vcpu_load,
1707 .vcpu_put = svm_vcpu_put,
774c47f1 1708 .vcpu_decache = svm_vcpu_decache,
6aa8b732
AK		 1709
1710 .set_guest_debug = svm_guest_debug,
1711 .get_msr = svm_get_msr,
1712 .set_msr = svm_set_msr,
1713 .get_segment_base = svm_get_segment_base,
1714 .get_segment = svm_get_segment,
1715 .set_segment = svm_set_segment,
6aa8b732 1716 .get_cs_db_l_bits = svm_get_cs_db_l_bits,
399badf3 1717 .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
6aa8b732 1718 .set_cr0 = svm_set_cr0,
6aa8b732
AK		 1719 .set_cr3 = svm_set_cr3,
1720 .set_cr4 = svm_set_cr4,
1721 .set_efer = svm_set_efer,
1722 .get_idt = svm_get_idt,
1723 .set_idt = svm_set_idt,
1724 .get_gdt = svm_get_gdt,
1725 .set_gdt = svm_set_gdt,
1726 .get_dr = svm_get_dr,
1727 .set_dr = svm_set_dr,
1728 .cache_regs = svm_cache_regs,
1729 .decache_regs = svm_decache_regs,
1730 .get_rflags = svm_get_rflags,
1731 .set_rflags = svm_set_rflags,
1732
1733 .invlpg = svm_invlpg,
1734 .tlb_flush = svm_flush_tlb,
1735 .inject_page_fault = svm_inject_page_fault,
1736
1737 .inject_gp = svm_inject_gp,
1738
1739 .run = svm_vcpu_run,
1740 .skip_emulated_instruction = skip_emulated_instruction,
1741 .vcpu_setup = svm_vcpu_setup,
102d8325 1742 .patch_hypercall = svm_patch_hypercall,
6aa8b732
AK		 1743};
1744
1745static int __init svm_init(void)
1746{
873a7c42 1747 return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
6aa8b732
AK		 1748}
1749
1750static void __exit svm_exit(void)
1751{
1752 kvm_exit_arch();
1753}
1754
1755module_init(svm_init)
1756module_exit(svm_exit)
Linux kernel - Deliverables
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