Commit | Line | Data |
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043405e1 CO |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * derived from drivers/kvm/kvm_main.c | |
5 | * | |
6 | * Copyright (C) 2006 Qumranet, Inc. | |
7 | * | |
8 | * Authors: | |
9 | * Avi Kivity <avi@qumranet.com> | |
10 | * Yaniv Kamay <yaniv@qumranet.com> | |
11 | * | |
12 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
13 | * the COPYING file in the top-level directory. | |
14 | * | |
15 | */ | |
16 | ||
313a3dc7 | 17 | #include "kvm.h" |
043405e1 | 18 | #include "x86.h" |
d825ed0a | 19 | #include "x86_emulate.h" |
5fb76f9b | 20 | #include "segment_descriptor.h" |
313a3dc7 CO |
21 | #include "irq.h" |
22 | ||
23 | #include <linux/kvm.h> | |
24 | #include <linux/fs.h> | |
25 | #include <linux/vmalloc.h> | |
5fb76f9b | 26 | #include <linux/module.h> |
043405e1 CO |
27 | |
28 | #include <asm/uaccess.h> | |
d825ed0a | 29 | #include <asm/msr.h> |
043405e1 | 30 | |
313a3dc7 | 31 | #define MAX_IO_MSRS 256 |
a03490ed CO |
32 | #define CR0_RESERVED_BITS \ |
33 | (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ | |
34 | | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ | |
35 | | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) | |
36 | #define CR4_RESERVED_BITS \ | |
37 | (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ | |
38 | | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ | |
39 | | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \ | |
40 | | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) | |
41 | ||
42 | #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) | |
15c4a640 | 43 | #define EFER_RESERVED_BITS 0xfffffffffffff2fe |
313a3dc7 | 44 | |
417bc304 HB |
45 | #define STAT_OFFSET(x) offsetof(struct kvm_vcpu, stat.x) |
46 | ||
97896d04 ZX |
47 | struct kvm_x86_ops *kvm_x86_ops; |
48 | ||
417bc304 HB |
49 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
50 | { "pf_fixed", STAT_OFFSET(pf_fixed) }, | |
51 | { "pf_guest", STAT_OFFSET(pf_guest) }, | |
52 | { "tlb_flush", STAT_OFFSET(tlb_flush) }, | |
53 | { "invlpg", STAT_OFFSET(invlpg) }, | |
54 | { "exits", STAT_OFFSET(exits) }, | |
55 | { "io_exits", STAT_OFFSET(io_exits) }, | |
56 | { "mmio_exits", STAT_OFFSET(mmio_exits) }, | |
57 | { "signal_exits", STAT_OFFSET(signal_exits) }, | |
58 | { "irq_window", STAT_OFFSET(irq_window_exits) }, | |
59 | { "halt_exits", STAT_OFFSET(halt_exits) }, | |
60 | { "halt_wakeup", STAT_OFFSET(halt_wakeup) }, | |
61 | { "request_irq", STAT_OFFSET(request_irq_exits) }, | |
62 | { "irq_exits", STAT_OFFSET(irq_exits) }, | |
63 | { "light_exits", STAT_OFFSET(light_exits) }, | |
64 | { "efer_reload", STAT_OFFSET(efer_reload) }, | |
65 | { NULL } | |
66 | }; | |
67 | ||
68 | ||
5fb76f9b CO |
69 | unsigned long segment_base(u16 selector) |
70 | { | |
71 | struct descriptor_table gdt; | |
72 | struct segment_descriptor *d; | |
73 | unsigned long table_base; | |
74 | unsigned long v; | |
75 | ||
76 | if (selector == 0) | |
77 | return 0; | |
78 | ||
79 | asm("sgdt %0" : "=m"(gdt)); | |
80 | table_base = gdt.base; | |
81 | ||
82 | if (selector & 4) { /* from ldt */ | |
83 | u16 ldt_selector; | |
84 | ||
85 | asm("sldt %0" : "=g"(ldt_selector)); | |
86 | table_base = segment_base(ldt_selector); | |
87 | } | |
88 | d = (struct segment_descriptor *)(table_base + (selector & ~7)); | |
89 | v = d->base_low | ((unsigned long)d->base_mid << 16) | | |
90 | ((unsigned long)d->base_high << 24); | |
91 | #ifdef CONFIG_X86_64 | |
92 | if (d->system == 0 && (d->type == 2 || d->type == 9 || d->type == 11)) | |
93 | v |= ((unsigned long) \ | |
94 | ((struct segment_descriptor_64 *)d)->base_higher) << 32; | |
95 | #endif | |
96 | return v; | |
97 | } | |
98 | EXPORT_SYMBOL_GPL(segment_base); | |
99 | ||
6866b83e CO |
100 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) |
101 | { | |
102 | if (irqchip_in_kernel(vcpu->kvm)) | |
103 | return vcpu->apic_base; | |
104 | else | |
105 | return vcpu->apic_base; | |
106 | } | |
107 | EXPORT_SYMBOL_GPL(kvm_get_apic_base); | |
108 | ||
109 | void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data) | |
110 | { | |
111 | /* TODO: reserve bits check */ | |
112 | if (irqchip_in_kernel(vcpu->kvm)) | |
113 | kvm_lapic_set_base(vcpu, data); | |
114 | else | |
115 | vcpu->apic_base = data; | |
116 | } | |
117 | EXPORT_SYMBOL_GPL(kvm_set_apic_base); | |
118 | ||
a03490ed CO |
119 | static void inject_gp(struct kvm_vcpu *vcpu) |
120 | { | |
121 | kvm_x86_ops->inject_gp(vcpu, 0); | |
122 | } | |
123 | ||
124 | /* | |
125 | * Load the pae pdptrs. Return true is they are all valid. | |
126 | */ | |
127 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3) | |
128 | { | |
129 | gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT; | |
130 | unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2; | |
131 | int i; | |
132 | int ret; | |
133 | u64 pdpte[ARRAY_SIZE(vcpu->pdptrs)]; | |
134 | ||
135 | mutex_lock(&vcpu->kvm->lock); | |
136 | ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte, | |
137 | offset * sizeof(u64), sizeof(pdpte)); | |
138 | if (ret < 0) { | |
139 | ret = 0; | |
140 | goto out; | |
141 | } | |
142 | for (i = 0; i < ARRAY_SIZE(pdpte); ++i) { | |
143 | if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) { | |
144 | ret = 0; | |
145 | goto out; | |
146 | } | |
147 | } | |
148 | ret = 1; | |
149 | ||
150 | memcpy(vcpu->pdptrs, pdpte, sizeof(vcpu->pdptrs)); | |
151 | out: | |
152 | mutex_unlock(&vcpu->kvm->lock); | |
153 | ||
154 | return ret; | |
155 | } | |
156 | ||
157 | void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) | |
158 | { | |
159 | if (cr0 & CR0_RESERVED_BITS) { | |
160 | printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n", | |
161 | cr0, vcpu->cr0); | |
162 | inject_gp(vcpu); | |
163 | return; | |
164 | } | |
165 | ||
166 | if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) { | |
167 | printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n"); | |
168 | inject_gp(vcpu); | |
169 | return; | |
170 | } | |
171 | ||
172 | if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) { | |
173 | printk(KERN_DEBUG "set_cr0: #GP, set PG flag " | |
174 | "and a clear PE flag\n"); | |
175 | inject_gp(vcpu); | |
176 | return; | |
177 | } | |
178 | ||
179 | if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { | |
180 | #ifdef CONFIG_X86_64 | |
181 | if ((vcpu->shadow_efer & EFER_LME)) { | |
182 | int cs_db, cs_l; | |
183 | ||
184 | if (!is_pae(vcpu)) { | |
185 | printk(KERN_DEBUG "set_cr0: #GP, start paging " | |
186 | "in long mode while PAE is disabled\n"); | |
187 | inject_gp(vcpu); | |
188 | return; | |
189 | } | |
190 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | |
191 | if (cs_l) { | |
192 | printk(KERN_DEBUG "set_cr0: #GP, start paging " | |
193 | "in long mode while CS.L == 1\n"); | |
194 | inject_gp(vcpu); | |
195 | return; | |
196 | ||
197 | } | |
198 | } else | |
199 | #endif | |
200 | if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->cr3)) { | |
201 | printk(KERN_DEBUG "set_cr0: #GP, pdptrs " | |
202 | "reserved bits\n"); | |
203 | inject_gp(vcpu); | |
204 | return; | |
205 | } | |
206 | ||
207 | } | |
208 | ||
209 | kvm_x86_ops->set_cr0(vcpu, cr0); | |
210 | vcpu->cr0 = cr0; | |
211 | ||
212 | mutex_lock(&vcpu->kvm->lock); | |
213 | kvm_mmu_reset_context(vcpu); | |
214 | mutex_unlock(&vcpu->kvm->lock); | |
215 | return; | |
216 | } | |
217 | EXPORT_SYMBOL_GPL(set_cr0); | |
218 | ||
219 | void lmsw(struct kvm_vcpu *vcpu, unsigned long msw) | |
220 | { | |
221 | set_cr0(vcpu, (vcpu->cr0 & ~0x0ful) | (msw & 0x0f)); | |
222 | } | |
223 | EXPORT_SYMBOL_GPL(lmsw); | |
224 | ||
225 | void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | |
226 | { | |
227 | if (cr4 & CR4_RESERVED_BITS) { | |
228 | printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n"); | |
229 | inject_gp(vcpu); | |
230 | return; | |
231 | } | |
232 | ||
233 | if (is_long_mode(vcpu)) { | |
234 | if (!(cr4 & X86_CR4_PAE)) { | |
235 | printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while " | |
236 | "in long mode\n"); | |
237 | inject_gp(vcpu); | |
238 | return; | |
239 | } | |
240 | } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE) | |
241 | && !load_pdptrs(vcpu, vcpu->cr3)) { | |
242 | printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n"); | |
243 | inject_gp(vcpu); | |
244 | return; | |
245 | } | |
246 | ||
247 | if (cr4 & X86_CR4_VMXE) { | |
248 | printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n"); | |
249 | inject_gp(vcpu); | |
250 | return; | |
251 | } | |
252 | kvm_x86_ops->set_cr4(vcpu, cr4); | |
253 | vcpu->cr4 = cr4; | |
254 | mutex_lock(&vcpu->kvm->lock); | |
255 | kvm_mmu_reset_context(vcpu); | |
256 | mutex_unlock(&vcpu->kvm->lock); | |
257 | } | |
258 | EXPORT_SYMBOL_GPL(set_cr4); | |
259 | ||
260 | void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) | |
261 | { | |
262 | if (is_long_mode(vcpu)) { | |
263 | if (cr3 & CR3_L_MODE_RESERVED_BITS) { | |
264 | printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n"); | |
265 | inject_gp(vcpu); | |
266 | return; | |
267 | } | |
268 | } else { | |
269 | if (is_pae(vcpu)) { | |
270 | if (cr3 & CR3_PAE_RESERVED_BITS) { | |
271 | printk(KERN_DEBUG | |
272 | "set_cr3: #GP, reserved bits\n"); | |
273 | inject_gp(vcpu); | |
274 | return; | |
275 | } | |
276 | if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) { | |
277 | printk(KERN_DEBUG "set_cr3: #GP, pdptrs " | |
278 | "reserved bits\n"); | |
279 | inject_gp(vcpu); | |
280 | return; | |
281 | } | |
282 | } | |
283 | /* | |
284 | * We don't check reserved bits in nonpae mode, because | |
285 | * this isn't enforced, and VMware depends on this. | |
286 | */ | |
287 | } | |
288 | ||
289 | mutex_lock(&vcpu->kvm->lock); | |
290 | /* | |
291 | * Does the new cr3 value map to physical memory? (Note, we | |
292 | * catch an invalid cr3 even in real-mode, because it would | |
293 | * cause trouble later on when we turn on paging anyway.) | |
294 | * | |
295 | * A real CPU would silently accept an invalid cr3 and would | |
296 | * attempt to use it - with largely undefined (and often hard | |
297 | * to debug) behavior on the guest side. | |
298 | */ | |
299 | if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT))) | |
300 | inject_gp(vcpu); | |
301 | else { | |
302 | vcpu->cr3 = cr3; | |
303 | vcpu->mmu.new_cr3(vcpu); | |
304 | } | |
305 | mutex_unlock(&vcpu->kvm->lock); | |
306 | } | |
307 | EXPORT_SYMBOL_GPL(set_cr3); | |
308 | ||
309 | void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8) | |
310 | { | |
311 | if (cr8 & CR8_RESERVED_BITS) { | |
312 | printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8); | |
313 | inject_gp(vcpu); | |
314 | return; | |
315 | } | |
316 | if (irqchip_in_kernel(vcpu->kvm)) | |
317 | kvm_lapic_set_tpr(vcpu, cr8); | |
318 | else | |
319 | vcpu->cr8 = cr8; | |
320 | } | |
321 | EXPORT_SYMBOL_GPL(set_cr8); | |
322 | ||
323 | unsigned long get_cr8(struct kvm_vcpu *vcpu) | |
324 | { | |
325 | if (irqchip_in_kernel(vcpu->kvm)) | |
326 | return kvm_lapic_get_cr8(vcpu); | |
327 | else | |
328 | return vcpu->cr8; | |
329 | } | |
330 | EXPORT_SYMBOL_GPL(get_cr8); | |
331 | ||
043405e1 CO |
332 | /* |
333 | * List of msr numbers which we expose to userspace through KVM_GET_MSRS | |
334 | * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. | |
335 | * | |
336 | * This list is modified at module load time to reflect the | |
337 | * capabilities of the host cpu. | |
338 | */ | |
339 | static u32 msrs_to_save[] = { | |
340 | MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, | |
341 | MSR_K6_STAR, | |
342 | #ifdef CONFIG_X86_64 | |
343 | MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR, | |
344 | #endif | |
345 | MSR_IA32_TIME_STAMP_COUNTER, | |
346 | }; | |
347 | ||
348 | static unsigned num_msrs_to_save; | |
349 | ||
350 | static u32 emulated_msrs[] = { | |
351 | MSR_IA32_MISC_ENABLE, | |
352 | }; | |
353 | ||
15c4a640 CO |
354 | #ifdef CONFIG_X86_64 |
355 | ||
356 | static void set_efer(struct kvm_vcpu *vcpu, u64 efer) | |
357 | { | |
358 | if (efer & EFER_RESERVED_BITS) { | |
359 | printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n", | |
360 | efer); | |
361 | inject_gp(vcpu); | |
362 | return; | |
363 | } | |
364 | ||
365 | if (is_paging(vcpu) | |
366 | && (vcpu->shadow_efer & EFER_LME) != (efer & EFER_LME)) { | |
367 | printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n"); | |
368 | inject_gp(vcpu); | |
369 | return; | |
370 | } | |
371 | ||
372 | kvm_x86_ops->set_efer(vcpu, efer); | |
373 | ||
374 | efer &= ~EFER_LMA; | |
375 | efer |= vcpu->shadow_efer & EFER_LMA; | |
376 | ||
377 | vcpu->shadow_efer = efer; | |
378 | } | |
379 | ||
380 | #endif | |
381 | ||
382 | /* | |
383 | * Writes msr value into into the appropriate "register". | |
384 | * Returns 0 on success, non-0 otherwise. | |
385 | * Assumes vcpu_load() was already called. | |
386 | */ | |
387 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) | |
388 | { | |
389 | return kvm_x86_ops->set_msr(vcpu, msr_index, data); | |
390 | } | |
391 | ||
313a3dc7 CO |
392 | /* |
393 | * Adapt set_msr() to msr_io()'s calling convention | |
394 | */ | |
395 | static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) | |
396 | { | |
397 | return kvm_set_msr(vcpu, index, *data); | |
398 | } | |
399 | ||
15c4a640 CO |
400 | |
401 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |
402 | { | |
403 | switch (msr) { | |
404 | #ifdef CONFIG_X86_64 | |
405 | case MSR_EFER: | |
406 | set_efer(vcpu, data); | |
407 | break; | |
408 | #endif | |
409 | case MSR_IA32_MC0_STATUS: | |
410 | pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n", | |
411 | __FUNCTION__, data); | |
412 | break; | |
413 | case MSR_IA32_MCG_STATUS: | |
414 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n", | |
415 | __FUNCTION__, data); | |
416 | break; | |
417 | case MSR_IA32_UCODE_REV: | |
418 | case MSR_IA32_UCODE_WRITE: | |
419 | case 0x200 ... 0x2ff: /* MTRRs */ | |
420 | break; | |
421 | case MSR_IA32_APICBASE: | |
422 | kvm_set_apic_base(vcpu, data); | |
423 | break; | |
424 | case MSR_IA32_MISC_ENABLE: | |
425 | vcpu->ia32_misc_enable_msr = data; | |
426 | break; | |
427 | default: | |
428 | pr_unimpl(vcpu, "unhandled wrmsr: 0x%x\n", msr); | |
429 | return 1; | |
430 | } | |
431 | return 0; | |
432 | } | |
433 | EXPORT_SYMBOL_GPL(kvm_set_msr_common); | |
434 | ||
435 | ||
436 | /* | |
437 | * Reads an msr value (of 'msr_index') into 'pdata'. | |
438 | * Returns 0 on success, non-0 otherwise. | |
439 | * Assumes vcpu_load() was already called. | |
440 | */ | |
441 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) | |
442 | { | |
443 | return kvm_x86_ops->get_msr(vcpu, msr_index, pdata); | |
444 | } | |
445 | ||
446 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
447 | { | |
448 | u64 data; | |
449 | ||
450 | switch (msr) { | |
451 | case 0xc0010010: /* SYSCFG */ | |
452 | case 0xc0010015: /* HWCR */ | |
453 | case MSR_IA32_PLATFORM_ID: | |
454 | case MSR_IA32_P5_MC_ADDR: | |
455 | case MSR_IA32_P5_MC_TYPE: | |
456 | case MSR_IA32_MC0_CTL: | |
457 | case MSR_IA32_MCG_STATUS: | |
458 | case MSR_IA32_MCG_CAP: | |
459 | case MSR_IA32_MC0_MISC: | |
460 | case MSR_IA32_MC0_MISC+4: | |
461 | case MSR_IA32_MC0_MISC+8: | |
462 | case MSR_IA32_MC0_MISC+12: | |
463 | case MSR_IA32_MC0_MISC+16: | |
464 | case MSR_IA32_UCODE_REV: | |
465 | case MSR_IA32_PERF_STATUS: | |
466 | case MSR_IA32_EBL_CR_POWERON: | |
467 | /* MTRR registers */ | |
468 | case 0xfe: | |
469 | case 0x200 ... 0x2ff: | |
470 | data = 0; | |
471 | break; | |
472 | case 0xcd: /* fsb frequency */ | |
473 | data = 3; | |
474 | break; | |
475 | case MSR_IA32_APICBASE: | |
476 | data = kvm_get_apic_base(vcpu); | |
477 | break; | |
478 | case MSR_IA32_MISC_ENABLE: | |
479 | data = vcpu->ia32_misc_enable_msr; | |
480 | break; | |
481 | #ifdef CONFIG_X86_64 | |
482 | case MSR_EFER: | |
483 | data = vcpu->shadow_efer; | |
484 | break; | |
485 | #endif | |
486 | default: | |
487 | pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); | |
488 | return 1; | |
489 | } | |
490 | *pdata = data; | |
491 | return 0; | |
492 | } | |
493 | EXPORT_SYMBOL_GPL(kvm_get_msr_common); | |
494 | ||
313a3dc7 CO |
495 | /* |
496 | * Read or write a bunch of msrs. All parameters are kernel addresses. | |
497 | * | |
498 | * @return number of msrs set successfully. | |
499 | */ | |
500 | static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, | |
501 | struct kvm_msr_entry *entries, | |
502 | int (*do_msr)(struct kvm_vcpu *vcpu, | |
503 | unsigned index, u64 *data)) | |
504 | { | |
505 | int i; | |
506 | ||
507 | vcpu_load(vcpu); | |
508 | ||
509 | for (i = 0; i < msrs->nmsrs; ++i) | |
510 | if (do_msr(vcpu, entries[i].index, &entries[i].data)) | |
511 | break; | |
512 | ||
513 | vcpu_put(vcpu); | |
514 | ||
515 | return i; | |
516 | } | |
517 | ||
518 | /* | |
519 | * Read or write a bunch of msrs. Parameters are user addresses. | |
520 | * | |
521 | * @return number of msrs set successfully. | |
522 | */ | |
523 | static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs, | |
524 | int (*do_msr)(struct kvm_vcpu *vcpu, | |
525 | unsigned index, u64 *data), | |
526 | int writeback) | |
527 | { | |
528 | struct kvm_msrs msrs; | |
529 | struct kvm_msr_entry *entries; | |
530 | int r, n; | |
531 | unsigned size; | |
532 | ||
533 | r = -EFAULT; | |
534 | if (copy_from_user(&msrs, user_msrs, sizeof msrs)) | |
535 | goto out; | |
536 | ||
537 | r = -E2BIG; | |
538 | if (msrs.nmsrs >= MAX_IO_MSRS) | |
539 | goto out; | |
540 | ||
541 | r = -ENOMEM; | |
542 | size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; | |
543 | entries = vmalloc(size); | |
544 | if (!entries) | |
545 | goto out; | |
546 | ||
547 | r = -EFAULT; | |
548 | if (copy_from_user(entries, user_msrs->entries, size)) | |
549 | goto out_free; | |
550 | ||
551 | r = n = __msr_io(vcpu, &msrs, entries, do_msr); | |
552 | if (r < 0) | |
553 | goto out_free; | |
554 | ||
555 | r = -EFAULT; | |
556 | if (writeback && copy_to_user(user_msrs->entries, entries, size)) | |
557 | goto out_free; | |
558 | ||
559 | r = n; | |
560 | ||
561 | out_free: | |
562 | vfree(entries); | |
563 | out: | |
564 | return r; | |
565 | } | |
566 | ||
e9b11c17 ZX |
567 | /* |
568 | * Make sure that a cpu that is being hot-unplugged does not have any vcpus | |
569 | * cached on it. | |
570 | */ | |
571 | void decache_vcpus_on_cpu(int cpu) | |
572 | { | |
573 | struct kvm *vm; | |
574 | struct kvm_vcpu *vcpu; | |
575 | int i; | |
576 | ||
577 | spin_lock(&kvm_lock); | |
578 | list_for_each_entry(vm, &vm_list, vm_list) | |
579 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | |
580 | vcpu = vm->vcpus[i]; | |
581 | if (!vcpu) | |
582 | continue; | |
583 | /* | |
584 | * If the vcpu is locked, then it is running on some | |
585 | * other cpu and therefore it is not cached on the | |
586 | * cpu in question. | |
587 | * | |
588 | * If it's not locked, check the last cpu it executed | |
589 | * on. | |
590 | */ | |
591 | if (mutex_trylock(&vcpu->mutex)) { | |
592 | if (vcpu->cpu == cpu) { | |
593 | kvm_x86_ops->vcpu_decache(vcpu); | |
594 | vcpu->cpu = -1; | |
595 | } | |
596 | mutex_unlock(&vcpu->mutex); | |
597 | } | |
598 | } | |
599 | spin_unlock(&kvm_lock); | |
600 | } | |
601 | ||
018d00d2 ZX |
602 | int kvm_dev_ioctl_check_extension(long ext) |
603 | { | |
604 | int r; | |
605 | ||
606 | switch (ext) { | |
607 | case KVM_CAP_IRQCHIP: | |
608 | case KVM_CAP_HLT: | |
609 | case KVM_CAP_MMU_SHADOW_CACHE_CONTROL: | |
610 | case KVM_CAP_USER_MEMORY: | |
611 | case KVM_CAP_SET_TSS_ADDR: | |
612 | r = 1; | |
613 | break; | |
614 | default: | |
615 | r = 0; | |
616 | break; | |
617 | } | |
618 | return r; | |
619 | ||
620 | } | |
621 | ||
043405e1 CO |
622 | long kvm_arch_dev_ioctl(struct file *filp, |
623 | unsigned int ioctl, unsigned long arg) | |
624 | { | |
625 | void __user *argp = (void __user *)arg; | |
626 | long r; | |
627 | ||
628 | switch (ioctl) { | |
629 | case KVM_GET_MSR_INDEX_LIST: { | |
630 | struct kvm_msr_list __user *user_msr_list = argp; | |
631 | struct kvm_msr_list msr_list; | |
632 | unsigned n; | |
633 | ||
634 | r = -EFAULT; | |
635 | if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list)) | |
636 | goto out; | |
637 | n = msr_list.nmsrs; | |
638 | msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs); | |
639 | if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list)) | |
640 | goto out; | |
641 | r = -E2BIG; | |
642 | if (n < num_msrs_to_save) | |
643 | goto out; | |
644 | r = -EFAULT; | |
645 | if (copy_to_user(user_msr_list->indices, &msrs_to_save, | |
646 | num_msrs_to_save * sizeof(u32))) | |
647 | goto out; | |
648 | if (copy_to_user(user_msr_list->indices | |
649 | + num_msrs_to_save * sizeof(u32), | |
650 | &emulated_msrs, | |
651 | ARRAY_SIZE(emulated_msrs) * sizeof(u32))) | |
652 | goto out; | |
653 | r = 0; | |
654 | break; | |
655 | } | |
656 | default: | |
657 | r = -EINVAL; | |
658 | } | |
659 | out: | |
660 | return r; | |
661 | } | |
662 | ||
313a3dc7 CO |
663 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
664 | { | |
665 | kvm_x86_ops->vcpu_load(vcpu, cpu); | |
666 | } | |
667 | ||
668 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) | |
669 | { | |
670 | kvm_x86_ops->vcpu_put(vcpu); | |
671 | } | |
672 | ||
673 | static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu) | |
674 | { | |
675 | u64 efer; | |
676 | int i; | |
677 | struct kvm_cpuid_entry *e, *entry; | |
678 | ||
679 | rdmsrl(MSR_EFER, efer); | |
680 | entry = NULL; | |
681 | for (i = 0; i < vcpu->cpuid_nent; ++i) { | |
682 | e = &vcpu->cpuid_entries[i]; | |
683 | if (e->function == 0x80000001) { | |
684 | entry = e; | |
685 | break; | |
686 | } | |
687 | } | |
688 | if (entry && (entry->edx & (1 << 20)) && !(efer & EFER_NX)) { | |
689 | entry->edx &= ~(1 << 20); | |
690 | printk(KERN_INFO "kvm: guest NX capability removed\n"); | |
691 | } | |
692 | } | |
693 | ||
694 | static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, | |
695 | struct kvm_cpuid *cpuid, | |
696 | struct kvm_cpuid_entry __user *entries) | |
697 | { | |
698 | int r; | |
699 | ||
700 | r = -E2BIG; | |
701 | if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) | |
702 | goto out; | |
703 | r = -EFAULT; | |
704 | if (copy_from_user(&vcpu->cpuid_entries, entries, | |
705 | cpuid->nent * sizeof(struct kvm_cpuid_entry))) | |
706 | goto out; | |
707 | vcpu->cpuid_nent = cpuid->nent; | |
708 | cpuid_fix_nx_cap(vcpu); | |
709 | return 0; | |
710 | ||
711 | out: | |
712 | return r; | |
713 | } | |
714 | ||
715 | static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu, | |
716 | struct kvm_lapic_state *s) | |
717 | { | |
718 | vcpu_load(vcpu); | |
719 | memcpy(s->regs, vcpu->apic->regs, sizeof *s); | |
720 | vcpu_put(vcpu); | |
721 | ||
722 | return 0; | |
723 | } | |
724 | ||
725 | static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu, | |
726 | struct kvm_lapic_state *s) | |
727 | { | |
728 | vcpu_load(vcpu); | |
729 | memcpy(vcpu->apic->regs, s->regs, sizeof *s); | |
730 | kvm_apic_post_state_restore(vcpu); | |
731 | vcpu_put(vcpu); | |
732 | ||
733 | return 0; | |
734 | } | |
735 | ||
736 | long kvm_arch_vcpu_ioctl(struct file *filp, | |
737 | unsigned int ioctl, unsigned long arg) | |
738 | { | |
739 | struct kvm_vcpu *vcpu = filp->private_data; | |
740 | void __user *argp = (void __user *)arg; | |
741 | int r; | |
742 | ||
743 | switch (ioctl) { | |
744 | case KVM_GET_LAPIC: { | |
745 | struct kvm_lapic_state lapic; | |
746 | ||
747 | memset(&lapic, 0, sizeof lapic); | |
748 | r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic); | |
749 | if (r) | |
750 | goto out; | |
751 | r = -EFAULT; | |
752 | if (copy_to_user(argp, &lapic, sizeof lapic)) | |
753 | goto out; | |
754 | r = 0; | |
755 | break; | |
756 | } | |
757 | case KVM_SET_LAPIC: { | |
758 | struct kvm_lapic_state lapic; | |
759 | ||
760 | r = -EFAULT; | |
761 | if (copy_from_user(&lapic, argp, sizeof lapic)) | |
762 | goto out; | |
763 | r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);; | |
764 | if (r) | |
765 | goto out; | |
766 | r = 0; | |
767 | break; | |
768 | } | |
769 | case KVM_SET_CPUID: { | |
770 | struct kvm_cpuid __user *cpuid_arg = argp; | |
771 | struct kvm_cpuid cpuid; | |
772 | ||
773 | r = -EFAULT; | |
774 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
775 | goto out; | |
776 | r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries); | |
777 | if (r) | |
778 | goto out; | |
779 | break; | |
780 | } | |
781 | case KVM_GET_MSRS: | |
782 | r = msr_io(vcpu, argp, kvm_get_msr, 1); | |
783 | break; | |
784 | case KVM_SET_MSRS: | |
785 | r = msr_io(vcpu, argp, do_set_msr, 0); | |
786 | break; | |
787 | default: | |
788 | r = -EINVAL; | |
789 | } | |
790 | out: | |
791 | return r; | |
792 | } | |
793 | ||
1fe779f8 CO |
794 | static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr) |
795 | { | |
796 | int ret; | |
797 | ||
798 | if (addr > (unsigned int)(-3 * PAGE_SIZE)) | |
799 | return -1; | |
800 | ret = kvm_x86_ops->set_tss_addr(kvm, addr); | |
801 | return ret; | |
802 | } | |
803 | ||
804 | static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm, | |
805 | u32 kvm_nr_mmu_pages) | |
806 | { | |
807 | if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES) | |
808 | return -EINVAL; | |
809 | ||
810 | mutex_lock(&kvm->lock); | |
811 | ||
812 | kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages); | |
813 | kvm->n_requested_mmu_pages = kvm_nr_mmu_pages; | |
814 | ||
815 | mutex_unlock(&kvm->lock); | |
816 | return 0; | |
817 | } | |
818 | ||
819 | static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm) | |
820 | { | |
821 | return kvm->n_alloc_mmu_pages; | |
822 | } | |
823 | ||
824 | /* | |
825 | * Set a new alias region. Aliases map a portion of physical memory into | |
826 | * another portion. This is useful for memory windows, for example the PC | |
827 | * VGA region. | |
828 | */ | |
829 | static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm, | |
830 | struct kvm_memory_alias *alias) | |
831 | { | |
832 | int r, n; | |
833 | struct kvm_mem_alias *p; | |
834 | ||
835 | r = -EINVAL; | |
836 | /* General sanity checks */ | |
837 | if (alias->memory_size & (PAGE_SIZE - 1)) | |
838 | goto out; | |
839 | if (alias->guest_phys_addr & (PAGE_SIZE - 1)) | |
840 | goto out; | |
841 | if (alias->slot >= KVM_ALIAS_SLOTS) | |
842 | goto out; | |
843 | if (alias->guest_phys_addr + alias->memory_size | |
844 | < alias->guest_phys_addr) | |
845 | goto out; | |
846 | if (alias->target_phys_addr + alias->memory_size | |
847 | < alias->target_phys_addr) | |
848 | goto out; | |
849 | ||
850 | mutex_lock(&kvm->lock); | |
851 | ||
852 | p = &kvm->aliases[alias->slot]; | |
853 | p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT; | |
854 | p->npages = alias->memory_size >> PAGE_SHIFT; | |
855 | p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT; | |
856 | ||
857 | for (n = KVM_ALIAS_SLOTS; n > 0; --n) | |
858 | if (kvm->aliases[n - 1].npages) | |
859 | break; | |
860 | kvm->naliases = n; | |
861 | ||
862 | kvm_mmu_zap_all(kvm); | |
863 | ||
864 | mutex_unlock(&kvm->lock); | |
865 | ||
866 | return 0; | |
867 | ||
868 | out: | |
869 | return r; | |
870 | } | |
871 | ||
872 | static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) | |
873 | { | |
874 | int r; | |
875 | ||
876 | r = 0; | |
877 | switch (chip->chip_id) { | |
878 | case KVM_IRQCHIP_PIC_MASTER: | |
879 | memcpy(&chip->chip.pic, | |
880 | &pic_irqchip(kvm)->pics[0], | |
881 | sizeof(struct kvm_pic_state)); | |
882 | break; | |
883 | case KVM_IRQCHIP_PIC_SLAVE: | |
884 | memcpy(&chip->chip.pic, | |
885 | &pic_irqchip(kvm)->pics[1], | |
886 | sizeof(struct kvm_pic_state)); | |
887 | break; | |
888 | case KVM_IRQCHIP_IOAPIC: | |
889 | memcpy(&chip->chip.ioapic, | |
890 | ioapic_irqchip(kvm), | |
891 | sizeof(struct kvm_ioapic_state)); | |
892 | break; | |
893 | default: | |
894 | r = -EINVAL; | |
895 | break; | |
896 | } | |
897 | return r; | |
898 | } | |
899 | ||
900 | static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) | |
901 | { | |
902 | int r; | |
903 | ||
904 | r = 0; | |
905 | switch (chip->chip_id) { | |
906 | case KVM_IRQCHIP_PIC_MASTER: | |
907 | memcpy(&pic_irqchip(kvm)->pics[0], | |
908 | &chip->chip.pic, | |
909 | sizeof(struct kvm_pic_state)); | |
910 | break; | |
911 | case KVM_IRQCHIP_PIC_SLAVE: | |
912 | memcpy(&pic_irqchip(kvm)->pics[1], | |
913 | &chip->chip.pic, | |
914 | sizeof(struct kvm_pic_state)); | |
915 | break; | |
916 | case KVM_IRQCHIP_IOAPIC: | |
917 | memcpy(ioapic_irqchip(kvm), | |
918 | &chip->chip.ioapic, | |
919 | sizeof(struct kvm_ioapic_state)); | |
920 | break; | |
921 | default: | |
922 | r = -EINVAL; | |
923 | break; | |
924 | } | |
925 | kvm_pic_update_irq(pic_irqchip(kvm)); | |
926 | return r; | |
927 | } | |
928 | ||
929 | long kvm_arch_vm_ioctl(struct file *filp, | |
930 | unsigned int ioctl, unsigned long arg) | |
931 | { | |
932 | struct kvm *kvm = filp->private_data; | |
933 | void __user *argp = (void __user *)arg; | |
934 | int r = -EINVAL; | |
935 | ||
936 | switch (ioctl) { | |
937 | case KVM_SET_TSS_ADDR: | |
938 | r = kvm_vm_ioctl_set_tss_addr(kvm, arg); | |
939 | if (r < 0) | |
940 | goto out; | |
941 | break; | |
942 | case KVM_SET_MEMORY_REGION: { | |
943 | struct kvm_memory_region kvm_mem; | |
944 | struct kvm_userspace_memory_region kvm_userspace_mem; | |
945 | ||
946 | r = -EFAULT; | |
947 | if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem)) | |
948 | goto out; | |
949 | kvm_userspace_mem.slot = kvm_mem.slot; | |
950 | kvm_userspace_mem.flags = kvm_mem.flags; | |
951 | kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr; | |
952 | kvm_userspace_mem.memory_size = kvm_mem.memory_size; | |
953 | r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0); | |
954 | if (r) | |
955 | goto out; | |
956 | break; | |
957 | } | |
958 | case KVM_SET_NR_MMU_PAGES: | |
959 | r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg); | |
960 | if (r) | |
961 | goto out; | |
962 | break; | |
963 | case KVM_GET_NR_MMU_PAGES: | |
964 | r = kvm_vm_ioctl_get_nr_mmu_pages(kvm); | |
965 | break; | |
966 | case KVM_SET_MEMORY_ALIAS: { | |
967 | struct kvm_memory_alias alias; | |
968 | ||
969 | r = -EFAULT; | |
970 | if (copy_from_user(&alias, argp, sizeof alias)) | |
971 | goto out; | |
972 | r = kvm_vm_ioctl_set_memory_alias(kvm, &alias); | |
973 | if (r) | |
974 | goto out; | |
975 | break; | |
976 | } | |
977 | case KVM_CREATE_IRQCHIP: | |
978 | r = -ENOMEM; | |
979 | kvm->vpic = kvm_create_pic(kvm); | |
980 | if (kvm->vpic) { | |
981 | r = kvm_ioapic_init(kvm); | |
982 | if (r) { | |
983 | kfree(kvm->vpic); | |
984 | kvm->vpic = NULL; | |
985 | goto out; | |
986 | } | |
987 | } else | |
988 | goto out; | |
989 | break; | |
990 | case KVM_IRQ_LINE: { | |
991 | struct kvm_irq_level irq_event; | |
992 | ||
993 | r = -EFAULT; | |
994 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) | |
995 | goto out; | |
996 | if (irqchip_in_kernel(kvm)) { | |
997 | mutex_lock(&kvm->lock); | |
998 | if (irq_event.irq < 16) | |
999 | kvm_pic_set_irq(pic_irqchip(kvm), | |
1000 | irq_event.irq, | |
1001 | irq_event.level); | |
1002 | kvm_ioapic_set_irq(kvm->vioapic, | |
1003 | irq_event.irq, | |
1004 | irq_event.level); | |
1005 | mutex_unlock(&kvm->lock); | |
1006 | r = 0; | |
1007 | } | |
1008 | break; | |
1009 | } | |
1010 | case KVM_GET_IRQCHIP: { | |
1011 | /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ | |
1012 | struct kvm_irqchip chip; | |
1013 | ||
1014 | r = -EFAULT; | |
1015 | if (copy_from_user(&chip, argp, sizeof chip)) | |
1016 | goto out; | |
1017 | r = -ENXIO; | |
1018 | if (!irqchip_in_kernel(kvm)) | |
1019 | goto out; | |
1020 | r = kvm_vm_ioctl_get_irqchip(kvm, &chip); | |
1021 | if (r) | |
1022 | goto out; | |
1023 | r = -EFAULT; | |
1024 | if (copy_to_user(argp, &chip, sizeof chip)) | |
1025 | goto out; | |
1026 | r = 0; | |
1027 | break; | |
1028 | } | |
1029 | case KVM_SET_IRQCHIP: { | |
1030 | /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ | |
1031 | struct kvm_irqchip chip; | |
1032 | ||
1033 | r = -EFAULT; | |
1034 | if (copy_from_user(&chip, argp, sizeof chip)) | |
1035 | goto out; | |
1036 | r = -ENXIO; | |
1037 | if (!irqchip_in_kernel(kvm)) | |
1038 | goto out; | |
1039 | r = kvm_vm_ioctl_set_irqchip(kvm, &chip); | |
1040 | if (r) | |
1041 | goto out; | |
1042 | r = 0; | |
1043 | break; | |
1044 | } | |
1045 | default: | |
1046 | ; | |
1047 | } | |
1048 | out: | |
1049 | return r; | |
1050 | } | |
1051 | ||
a16b043c | 1052 | static void kvm_init_msr_list(void) |
043405e1 CO |
1053 | { |
1054 | u32 dummy[2]; | |
1055 | unsigned i, j; | |
1056 | ||
1057 | for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) { | |
1058 | if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0) | |
1059 | continue; | |
1060 | if (j < i) | |
1061 | msrs_to_save[j] = msrs_to_save[i]; | |
1062 | j++; | |
1063 | } | |
1064 | num_msrs_to_save = j; | |
1065 | } | |
1066 | ||
bbd9b64e CO |
1067 | /* |
1068 | * Only apic need an MMIO device hook, so shortcut now.. | |
1069 | */ | |
1070 | static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu, | |
1071 | gpa_t addr) | |
1072 | { | |
1073 | struct kvm_io_device *dev; | |
1074 | ||
1075 | if (vcpu->apic) { | |
1076 | dev = &vcpu->apic->dev; | |
1077 | if (dev->in_range(dev, addr)) | |
1078 | return dev; | |
1079 | } | |
1080 | return NULL; | |
1081 | } | |
1082 | ||
1083 | ||
1084 | static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu, | |
1085 | gpa_t addr) | |
1086 | { | |
1087 | struct kvm_io_device *dev; | |
1088 | ||
1089 | dev = vcpu_find_pervcpu_dev(vcpu, addr); | |
1090 | if (dev == NULL) | |
1091 | dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr); | |
1092 | return dev; | |
1093 | } | |
1094 | ||
1095 | int emulator_read_std(unsigned long addr, | |
1096 | void *val, | |
1097 | unsigned int bytes, | |
1098 | struct kvm_vcpu *vcpu) | |
1099 | { | |
1100 | void *data = val; | |
1101 | ||
1102 | while (bytes) { | |
1103 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr); | |
1104 | unsigned offset = addr & (PAGE_SIZE-1); | |
1105 | unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset); | |
1106 | int ret; | |
1107 | ||
1108 | if (gpa == UNMAPPED_GVA) | |
1109 | return X86EMUL_PROPAGATE_FAULT; | |
1110 | ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy); | |
1111 | if (ret < 0) | |
1112 | return X86EMUL_UNHANDLEABLE; | |
1113 | ||
1114 | bytes -= tocopy; | |
1115 | data += tocopy; | |
1116 | addr += tocopy; | |
1117 | } | |
1118 | ||
1119 | return X86EMUL_CONTINUE; | |
1120 | } | |
1121 | EXPORT_SYMBOL_GPL(emulator_read_std); | |
1122 | ||
1123 | static int emulator_write_std(unsigned long addr, | |
1124 | const void *val, | |
1125 | unsigned int bytes, | |
1126 | struct kvm_vcpu *vcpu) | |
1127 | { | |
1128 | pr_unimpl(vcpu, "emulator_write_std: addr %lx n %d\n", addr, bytes); | |
1129 | return X86EMUL_UNHANDLEABLE; | |
1130 | } | |
1131 | ||
1132 | static int emulator_read_emulated(unsigned long addr, | |
1133 | void *val, | |
1134 | unsigned int bytes, | |
1135 | struct kvm_vcpu *vcpu) | |
1136 | { | |
1137 | struct kvm_io_device *mmio_dev; | |
1138 | gpa_t gpa; | |
1139 | ||
1140 | if (vcpu->mmio_read_completed) { | |
1141 | memcpy(val, vcpu->mmio_data, bytes); | |
1142 | vcpu->mmio_read_completed = 0; | |
1143 | return X86EMUL_CONTINUE; | |
1144 | } | |
1145 | ||
1146 | gpa = vcpu->mmu.gva_to_gpa(vcpu, addr); | |
1147 | ||
1148 | /* For APIC access vmexit */ | |
1149 | if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1150 | goto mmio; | |
1151 | ||
1152 | if (emulator_read_std(addr, val, bytes, vcpu) | |
1153 | == X86EMUL_CONTINUE) | |
1154 | return X86EMUL_CONTINUE; | |
1155 | if (gpa == UNMAPPED_GVA) | |
1156 | return X86EMUL_PROPAGATE_FAULT; | |
1157 | ||
1158 | mmio: | |
1159 | /* | |
1160 | * Is this MMIO handled locally? | |
1161 | */ | |
1162 | mmio_dev = vcpu_find_mmio_dev(vcpu, gpa); | |
1163 | if (mmio_dev) { | |
1164 | kvm_iodevice_read(mmio_dev, gpa, bytes, val); | |
1165 | return X86EMUL_CONTINUE; | |
1166 | } | |
1167 | ||
1168 | vcpu->mmio_needed = 1; | |
1169 | vcpu->mmio_phys_addr = gpa; | |
1170 | vcpu->mmio_size = bytes; | |
1171 | vcpu->mmio_is_write = 0; | |
1172 | ||
1173 | return X86EMUL_UNHANDLEABLE; | |
1174 | } | |
1175 | ||
1176 | static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, | |
1177 | const void *val, int bytes) | |
1178 | { | |
1179 | int ret; | |
1180 | ||
1181 | ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes); | |
1182 | if (ret < 0) | |
1183 | return 0; | |
1184 | kvm_mmu_pte_write(vcpu, gpa, val, bytes); | |
1185 | return 1; | |
1186 | } | |
1187 | ||
1188 | static int emulator_write_emulated_onepage(unsigned long addr, | |
1189 | const void *val, | |
1190 | unsigned int bytes, | |
1191 | struct kvm_vcpu *vcpu) | |
1192 | { | |
1193 | struct kvm_io_device *mmio_dev; | |
1194 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, addr); | |
1195 | ||
1196 | if (gpa == UNMAPPED_GVA) { | |
1197 | kvm_x86_ops->inject_page_fault(vcpu, addr, 2); | |
1198 | return X86EMUL_PROPAGATE_FAULT; | |
1199 | } | |
1200 | ||
1201 | /* For APIC access vmexit */ | |
1202 | if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1203 | goto mmio; | |
1204 | ||
1205 | if (emulator_write_phys(vcpu, gpa, val, bytes)) | |
1206 | return X86EMUL_CONTINUE; | |
1207 | ||
1208 | mmio: | |
1209 | /* | |
1210 | * Is this MMIO handled locally? | |
1211 | */ | |
1212 | mmio_dev = vcpu_find_mmio_dev(vcpu, gpa); | |
1213 | if (mmio_dev) { | |
1214 | kvm_iodevice_write(mmio_dev, gpa, bytes, val); | |
1215 | return X86EMUL_CONTINUE; | |
1216 | } | |
1217 | ||
1218 | vcpu->mmio_needed = 1; | |
1219 | vcpu->mmio_phys_addr = gpa; | |
1220 | vcpu->mmio_size = bytes; | |
1221 | vcpu->mmio_is_write = 1; | |
1222 | memcpy(vcpu->mmio_data, val, bytes); | |
1223 | ||
1224 | return X86EMUL_CONTINUE; | |
1225 | } | |
1226 | ||
1227 | int emulator_write_emulated(unsigned long addr, | |
1228 | const void *val, | |
1229 | unsigned int bytes, | |
1230 | struct kvm_vcpu *vcpu) | |
1231 | { | |
1232 | /* Crossing a page boundary? */ | |
1233 | if (((addr + bytes - 1) ^ addr) & PAGE_MASK) { | |
1234 | int rc, now; | |
1235 | ||
1236 | now = -addr & ~PAGE_MASK; | |
1237 | rc = emulator_write_emulated_onepage(addr, val, now, vcpu); | |
1238 | if (rc != X86EMUL_CONTINUE) | |
1239 | return rc; | |
1240 | addr += now; | |
1241 | val += now; | |
1242 | bytes -= now; | |
1243 | } | |
1244 | return emulator_write_emulated_onepage(addr, val, bytes, vcpu); | |
1245 | } | |
1246 | EXPORT_SYMBOL_GPL(emulator_write_emulated); | |
1247 | ||
1248 | static int emulator_cmpxchg_emulated(unsigned long addr, | |
1249 | const void *old, | |
1250 | const void *new, | |
1251 | unsigned int bytes, | |
1252 | struct kvm_vcpu *vcpu) | |
1253 | { | |
1254 | static int reported; | |
1255 | ||
1256 | if (!reported) { | |
1257 | reported = 1; | |
1258 | printk(KERN_WARNING "kvm: emulating exchange as write\n"); | |
1259 | } | |
1260 | return emulator_write_emulated(addr, new, bytes, vcpu); | |
1261 | } | |
1262 | ||
1263 | static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg) | |
1264 | { | |
1265 | return kvm_x86_ops->get_segment_base(vcpu, seg); | |
1266 | } | |
1267 | ||
1268 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address) | |
1269 | { | |
1270 | return X86EMUL_CONTINUE; | |
1271 | } | |
1272 | ||
1273 | int emulate_clts(struct kvm_vcpu *vcpu) | |
1274 | { | |
1275 | kvm_x86_ops->set_cr0(vcpu, vcpu->cr0 & ~X86_CR0_TS); | |
1276 | return X86EMUL_CONTINUE; | |
1277 | } | |
1278 | ||
1279 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest) | |
1280 | { | |
1281 | struct kvm_vcpu *vcpu = ctxt->vcpu; | |
1282 | ||
1283 | switch (dr) { | |
1284 | case 0 ... 3: | |
1285 | *dest = kvm_x86_ops->get_dr(vcpu, dr); | |
1286 | return X86EMUL_CONTINUE; | |
1287 | default: | |
1288 | pr_unimpl(vcpu, "%s: unexpected dr %u\n", __FUNCTION__, dr); | |
1289 | return X86EMUL_UNHANDLEABLE; | |
1290 | } | |
1291 | } | |
1292 | ||
1293 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value) | |
1294 | { | |
1295 | unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U; | |
1296 | int exception; | |
1297 | ||
1298 | kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception); | |
1299 | if (exception) { | |
1300 | /* FIXME: better handling */ | |
1301 | return X86EMUL_UNHANDLEABLE; | |
1302 | } | |
1303 | return X86EMUL_CONTINUE; | |
1304 | } | |
1305 | ||
1306 | void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) | |
1307 | { | |
1308 | static int reported; | |
1309 | u8 opcodes[4]; | |
1310 | unsigned long rip = vcpu->rip; | |
1311 | unsigned long rip_linear; | |
1312 | ||
1313 | rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS); | |
1314 | ||
1315 | if (reported) | |
1316 | return; | |
1317 | ||
1318 | emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu); | |
1319 | ||
1320 | printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n", | |
1321 | context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]); | |
1322 | reported = 1; | |
1323 | } | |
1324 | EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); | |
1325 | ||
1326 | struct x86_emulate_ops emulate_ops = { | |
1327 | .read_std = emulator_read_std, | |
1328 | .write_std = emulator_write_std, | |
1329 | .read_emulated = emulator_read_emulated, | |
1330 | .write_emulated = emulator_write_emulated, | |
1331 | .cmpxchg_emulated = emulator_cmpxchg_emulated, | |
1332 | }; | |
1333 | ||
1334 | int emulate_instruction(struct kvm_vcpu *vcpu, | |
1335 | struct kvm_run *run, | |
1336 | unsigned long cr2, | |
1337 | u16 error_code, | |
1338 | int no_decode) | |
1339 | { | |
1340 | int r; | |
1341 | ||
1342 | vcpu->mmio_fault_cr2 = cr2; | |
1343 | kvm_x86_ops->cache_regs(vcpu); | |
1344 | ||
1345 | vcpu->mmio_is_write = 0; | |
1346 | vcpu->pio.string = 0; | |
1347 | ||
1348 | if (!no_decode) { | |
1349 | int cs_db, cs_l; | |
1350 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | |
1351 | ||
1352 | vcpu->emulate_ctxt.vcpu = vcpu; | |
1353 | vcpu->emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); | |
1354 | vcpu->emulate_ctxt.cr2 = cr2; | |
1355 | vcpu->emulate_ctxt.mode = | |
1356 | (vcpu->emulate_ctxt.eflags & X86_EFLAGS_VM) | |
1357 | ? X86EMUL_MODE_REAL : cs_l | |
1358 | ? X86EMUL_MODE_PROT64 : cs_db | |
1359 | ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; | |
1360 | ||
1361 | if (vcpu->emulate_ctxt.mode == X86EMUL_MODE_PROT64) { | |
1362 | vcpu->emulate_ctxt.cs_base = 0; | |
1363 | vcpu->emulate_ctxt.ds_base = 0; | |
1364 | vcpu->emulate_ctxt.es_base = 0; | |
1365 | vcpu->emulate_ctxt.ss_base = 0; | |
1366 | } else { | |
1367 | vcpu->emulate_ctxt.cs_base = | |
1368 | get_segment_base(vcpu, VCPU_SREG_CS); | |
1369 | vcpu->emulate_ctxt.ds_base = | |
1370 | get_segment_base(vcpu, VCPU_SREG_DS); | |
1371 | vcpu->emulate_ctxt.es_base = | |
1372 | get_segment_base(vcpu, VCPU_SREG_ES); | |
1373 | vcpu->emulate_ctxt.ss_base = | |
1374 | get_segment_base(vcpu, VCPU_SREG_SS); | |
1375 | } | |
1376 | ||
1377 | vcpu->emulate_ctxt.gs_base = | |
1378 | get_segment_base(vcpu, VCPU_SREG_GS); | |
1379 | vcpu->emulate_ctxt.fs_base = | |
1380 | get_segment_base(vcpu, VCPU_SREG_FS); | |
1381 | ||
1382 | r = x86_decode_insn(&vcpu->emulate_ctxt, &emulate_ops); | |
1383 | if (r) { | |
1384 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | |
1385 | return EMULATE_DONE; | |
1386 | return EMULATE_FAIL; | |
1387 | } | |
1388 | } | |
1389 | ||
1390 | r = x86_emulate_insn(&vcpu->emulate_ctxt, &emulate_ops); | |
1391 | ||
1392 | if (vcpu->pio.string) | |
1393 | return EMULATE_DO_MMIO; | |
1394 | ||
1395 | if ((r || vcpu->mmio_is_write) && run) { | |
1396 | run->exit_reason = KVM_EXIT_MMIO; | |
1397 | run->mmio.phys_addr = vcpu->mmio_phys_addr; | |
1398 | memcpy(run->mmio.data, vcpu->mmio_data, 8); | |
1399 | run->mmio.len = vcpu->mmio_size; | |
1400 | run->mmio.is_write = vcpu->mmio_is_write; | |
1401 | } | |
1402 | ||
1403 | if (r) { | |
1404 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | |
1405 | return EMULATE_DONE; | |
1406 | if (!vcpu->mmio_needed) { | |
1407 | kvm_report_emulation_failure(vcpu, "mmio"); | |
1408 | return EMULATE_FAIL; | |
1409 | } | |
1410 | return EMULATE_DO_MMIO; | |
1411 | } | |
1412 | ||
1413 | kvm_x86_ops->decache_regs(vcpu); | |
1414 | kvm_x86_ops->set_rflags(vcpu, vcpu->emulate_ctxt.eflags); | |
1415 | ||
1416 | if (vcpu->mmio_is_write) { | |
1417 | vcpu->mmio_needed = 0; | |
1418 | return EMULATE_DO_MMIO; | |
1419 | } | |
1420 | ||
1421 | return EMULATE_DONE; | |
1422 | } | |
1423 | EXPORT_SYMBOL_GPL(emulate_instruction); | |
1424 | ||
de7d789a CO |
1425 | static void free_pio_guest_pages(struct kvm_vcpu *vcpu) |
1426 | { | |
1427 | int i; | |
1428 | ||
1429 | for (i = 0; i < ARRAY_SIZE(vcpu->pio.guest_pages); ++i) | |
1430 | if (vcpu->pio.guest_pages[i]) { | |
1431 | kvm_release_page(vcpu->pio.guest_pages[i]); | |
1432 | vcpu->pio.guest_pages[i] = NULL; | |
1433 | } | |
1434 | } | |
1435 | ||
1436 | static int pio_copy_data(struct kvm_vcpu *vcpu) | |
1437 | { | |
1438 | void *p = vcpu->pio_data; | |
1439 | void *q; | |
1440 | unsigned bytes; | |
1441 | int nr_pages = vcpu->pio.guest_pages[1] ? 2 : 1; | |
1442 | ||
1443 | q = vmap(vcpu->pio.guest_pages, nr_pages, VM_READ|VM_WRITE, | |
1444 | PAGE_KERNEL); | |
1445 | if (!q) { | |
1446 | free_pio_guest_pages(vcpu); | |
1447 | return -ENOMEM; | |
1448 | } | |
1449 | q += vcpu->pio.guest_page_offset; | |
1450 | bytes = vcpu->pio.size * vcpu->pio.cur_count; | |
1451 | if (vcpu->pio.in) | |
1452 | memcpy(q, p, bytes); | |
1453 | else | |
1454 | memcpy(p, q, bytes); | |
1455 | q -= vcpu->pio.guest_page_offset; | |
1456 | vunmap(q); | |
1457 | free_pio_guest_pages(vcpu); | |
1458 | return 0; | |
1459 | } | |
1460 | ||
1461 | int complete_pio(struct kvm_vcpu *vcpu) | |
1462 | { | |
1463 | struct kvm_pio_request *io = &vcpu->pio; | |
1464 | long delta; | |
1465 | int r; | |
1466 | ||
1467 | kvm_x86_ops->cache_regs(vcpu); | |
1468 | ||
1469 | if (!io->string) { | |
1470 | if (io->in) | |
1471 | memcpy(&vcpu->regs[VCPU_REGS_RAX], vcpu->pio_data, | |
1472 | io->size); | |
1473 | } else { | |
1474 | if (io->in) { | |
1475 | r = pio_copy_data(vcpu); | |
1476 | if (r) { | |
1477 | kvm_x86_ops->cache_regs(vcpu); | |
1478 | return r; | |
1479 | } | |
1480 | } | |
1481 | ||
1482 | delta = 1; | |
1483 | if (io->rep) { | |
1484 | delta *= io->cur_count; | |
1485 | /* | |
1486 | * The size of the register should really depend on | |
1487 | * current address size. | |
1488 | */ | |
1489 | vcpu->regs[VCPU_REGS_RCX] -= delta; | |
1490 | } | |
1491 | if (io->down) | |
1492 | delta = -delta; | |
1493 | delta *= io->size; | |
1494 | if (io->in) | |
1495 | vcpu->regs[VCPU_REGS_RDI] += delta; | |
1496 | else | |
1497 | vcpu->regs[VCPU_REGS_RSI] += delta; | |
1498 | } | |
1499 | ||
1500 | kvm_x86_ops->decache_regs(vcpu); | |
1501 | ||
1502 | io->count -= io->cur_count; | |
1503 | io->cur_count = 0; | |
1504 | ||
1505 | return 0; | |
1506 | } | |
1507 | ||
1508 | static void kernel_pio(struct kvm_io_device *pio_dev, | |
1509 | struct kvm_vcpu *vcpu, | |
1510 | void *pd) | |
1511 | { | |
1512 | /* TODO: String I/O for in kernel device */ | |
1513 | ||
1514 | mutex_lock(&vcpu->kvm->lock); | |
1515 | if (vcpu->pio.in) | |
1516 | kvm_iodevice_read(pio_dev, vcpu->pio.port, | |
1517 | vcpu->pio.size, | |
1518 | pd); | |
1519 | else | |
1520 | kvm_iodevice_write(pio_dev, vcpu->pio.port, | |
1521 | vcpu->pio.size, | |
1522 | pd); | |
1523 | mutex_unlock(&vcpu->kvm->lock); | |
1524 | } | |
1525 | ||
1526 | static void pio_string_write(struct kvm_io_device *pio_dev, | |
1527 | struct kvm_vcpu *vcpu) | |
1528 | { | |
1529 | struct kvm_pio_request *io = &vcpu->pio; | |
1530 | void *pd = vcpu->pio_data; | |
1531 | int i; | |
1532 | ||
1533 | mutex_lock(&vcpu->kvm->lock); | |
1534 | for (i = 0; i < io->cur_count; i++) { | |
1535 | kvm_iodevice_write(pio_dev, io->port, | |
1536 | io->size, | |
1537 | pd); | |
1538 | pd += io->size; | |
1539 | } | |
1540 | mutex_unlock(&vcpu->kvm->lock); | |
1541 | } | |
1542 | ||
1543 | static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu, | |
1544 | gpa_t addr) | |
1545 | { | |
1546 | return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr); | |
1547 | } | |
1548 | ||
1549 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
1550 | int size, unsigned port) | |
1551 | { | |
1552 | struct kvm_io_device *pio_dev; | |
1553 | ||
1554 | vcpu->run->exit_reason = KVM_EXIT_IO; | |
1555 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | |
1556 | vcpu->run->io.size = vcpu->pio.size = size; | |
1557 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | |
1558 | vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = 1; | |
1559 | vcpu->run->io.port = vcpu->pio.port = port; | |
1560 | vcpu->pio.in = in; | |
1561 | vcpu->pio.string = 0; | |
1562 | vcpu->pio.down = 0; | |
1563 | vcpu->pio.guest_page_offset = 0; | |
1564 | vcpu->pio.rep = 0; | |
1565 | ||
1566 | kvm_x86_ops->cache_regs(vcpu); | |
1567 | memcpy(vcpu->pio_data, &vcpu->regs[VCPU_REGS_RAX], 4); | |
1568 | kvm_x86_ops->decache_regs(vcpu); | |
1569 | ||
1570 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
1571 | ||
1572 | pio_dev = vcpu_find_pio_dev(vcpu, port); | |
1573 | if (pio_dev) { | |
1574 | kernel_pio(pio_dev, vcpu, vcpu->pio_data); | |
1575 | complete_pio(vcpu); | |
1576 | return 1; | |
1577 | } | |
1578 | return 0; | |
1579 | } | |
1580 | EXPORT_SYMBOL_GPL(kvm_emulate_pio); | |
1581 | ||
1582 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
1583 | int size, unsigned long count, int down, | |
1584 | gva_t address, int rep, unsigned port) | |
1585 | { | |
1586 | unsigned now, in_page; | |
1587 | int i, ret = 0; | |
1588 | int nr_pages = 1; | |
1589 | struct page *page; | |
1590 | struct kvm_io_device *pio_dev; | |
1591 | ||
1592 | vcpu->run->exit_reason = KVM_EXIT_IO; | |
1593 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | |
1594 | vcpu->run->io.size = vcpu->pio.size = size; | |
1595 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | |
1596 | vcpu->run->io.count = vcpu->pio.count = vcpu->pio.cur_count = count; | |
1597 | vcpu->run->io.port = vcpu->pio.port = port; | |
1598 | vcpu->pio.in = in; | |
1599 | vcpu->pio.string = 1; | |
1600 | vcpu->pio.down = down; | |
1601 | vcpu->pio.guest_page_offset = offset_in_page(address); | |
1602 | vcpu->pio.rep = rep; | |
1603 | ||
1604 | if (!count) { | |
1605 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
1606 | return 1; | |
1607 | } | |
1608 | ||
1609 | if (!down) | |
1610 | in_page = PAGE_SIZE - offset_in_page(address); | |
1611 | else | |
1612 | in_page = offset_in_page(address) + size; | |
1613 | now = min(count, (unsigned long)in_page / size); | |
1614 | if (!now) { | |
1615 | /* | |
1616 | * String I/O straddles page boundary. Pin two guest pages | |
1617 | * so that we satisfy atomicity constraints. Do just one | |
1618 | * transaction to avoid complexity. | |
1619 | */ | |
1620 | nr_pages = 2; | |
1621 | now = 1; | |
1622 | } | |
1623 | if (down) { | |
1624 | /* | |
1625 | * String I/O in reverse. Yuck. Kill the guest, fix later. | |
1626 | */ | |
1627 | pr_unimpl(vcpu, "guest string pio down\n"); | |
1628 | inject_gp(vcpu); | |
1629 | return 1; | |
1630 | } | |
1631 | vcpu->run->io.count = now; | |
1632 | vcpu->pio.cur_count = now; | |
1633 | ||
1634 | if (vcpu->pio.cur_count == vcpu->pio.count) | |
1635 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
1636 | ||
1637 | for (i = 0; i < nr_pages; ++i) { | |
1638 | mutex_lock(&vcpu->kvm->lock); | |
1639 | page = gva_to_page(vcpu, address + i * PAGE_SIZE); | |
1640 | vcpu->pio.guest_pages[i] = page; | |
1641 | mutex_unlock(&vcpu->kvm->lock); | |
1642 | if (!page) { | |
1643 | inject_gp(vcpu); | |
1644 | free_pio_guest_pages(vcpu); | |
1645 | return 1; | |
1646 | } | |
1647 | } | |
1648 | ||
1649 | pio_dev = vcpu_find_pio_dev(vcpu, port); | |
1650 | if (!vcpu->pio.in) { | |
1651 | /* string PIO write */ | |
1652 | ret = pio_copy_data(vcpu); | |
1653 | if (ret >= 0 && pio_dev) { | |
1654 | pio_string_write(pio_dev, vcpu); | |
1655 | complete_pio(vcpu); | |
1656 | if (vcpu->pio.count == 0) | |
1657 | ret = 1; | |
1658 | } | |
1659 | } else if (pio_dev) | |
1660 | pr_unimpl(vcpu, "no string pio read support yet, " | |
1661 | "port %x size %d count %ld\n", | |
1662 | port, size, count); | |
1663 | ||
1664 | return ret; | |
1665 | } | |
1666 | EXPORT_SYMBOL_GPL(kvm_emulate_pio_string); | |
1667 | ||
f8c16bba | 1668 | int kvm_arch_init(void *opaque) |
043405e1 | 1669 | { |
f8c16bba ZX |
1670 | struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque; |
1671 | ||
043405e1 | 1672 | kvm_init_msr_list(); |
f8c16bba ZX |
1673 | |
1674 | if (kvm_x86_ops) { | |
1675 | printk(KERN_ERR "kvm: already loaded the other module\n"); | |
1676 | return -EEXIST; | |
1677 | } | |
1678 | ||
1679 | if (!ops->cpu_has_kvm_support()) { | |
1680 | printk(KERN_ERR "kvm: no hardware support\n"); | |
1681 | return -EOPNOTSUPP; | |
1682 | } | |
1683 | if (ops->disabled_by_bios()) { | |
1684 | printk(KERN_ERR "kvm: disabled by bios\n"); | |
1685 | return -EOPNOTSUPP; | |
1686 | } | |
1687 | ||
1688 | kvm_x86_ops = ops; | |
1689 | ||
1690 | return 0; | |
043405e1 | 1691 | } |
8776e519 | 1692 | |
f8c16bba ZX |
1693 | void kvm_arch_exit(void) |
1694 | { | |
1695 | kvm_x86_ops = NULL; | |
1696 | } | |
1697 | ||
8776e519 HB |
1698 | int kvm_emulate_halt(struct kvm_vcpu *vcpu) |
1699 | { | |
1700 | ++vcpu->stat.halt_exits; | |
1701 | if (irqchip_in_kernel(vcpu->kvm)) { | |
1702 | vcpu->mp_state = VCPU_MP_STATE_HALTED; | |
1703 | kvm_vcpu_block(vcpu); | |
1704 | if (vcpu->mp_state != VCPU_MP_STATE_RUNNABLE) | |
1705 | return -EINTR; | |
1706 | return 1; | |
1707 | } else { | |
1708 | vcpu->run->exit_reason = KVM_EXIT_HLT; | |
1709 | return 0; | |
1710 | } | |
1711 | } | |
1712 | EXPORT_SYMBOL_GPL(kvm_emulate_halt); | |
1713 | ||
1714 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) | |
1715 | { | |
1716 | unsigned long nr, a0, a1, a2, a3, ret; | |
1717 | ||
1718 | kvm_x86_ops->cache_regs(vcpu); | |
1719 | ||
1720 | nr = vcpu->regs[VCPU_REGS_RAX]; | |
1721 | a0 = vcpu->regs[VCPU_REGS_RBX]; | |
1722 | a1 = vcpu->regs[VCPU_REGS_RCX]; | |
1723 | a2 = vcpu->regs[VCPU_REGS_RDX]; | |
1724 | a3 = vcpu->regs[VCPU_REGS_RSI]; | |
1725 | ||
1726 | if (!is_long_mode(vcpu)) { | |
1727 | nr &= 0xFFFFFFFF; | |
1728 | a0 &= 0xFFFFFFFF; | |
1729 | a1 &= 0xFFFFFFFF; | |
1730 | a2 &= 0xFFFFFFFF; | |
1731 | a3 &= 0xFFFFFFFF; | |
1732 | } | |
1733 | ||
1734 | switch (nr) { | |
1735 | default: | |
1736 | ret = -KVM_ENOSYS; | |
1737 | break; | |
1738 | } | |
1739 | vcpu->regs[VCPU_REGS_RAX] = ret; | |
1740 | kvm_x86_ops->decache_regs(vcpu); | |
1741 | return 0; | |
1742 | } | |
1743 | EXPORT_SYMBOL_GPL(kvm_emulate_hypercall); | |
1744 | ||
1745 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu) | |
1746 | { | |
1747 | char instruction[3]; | |
1748 | int ret = 0; | |
1749 | ||
1750 | mutex_lock(&vcpu->kvm->lock); | |
1751 | ||
1752 | /* | |
1753 | * Blow out the MMU to ensure that no other VCPU has an active mapping | |
1754 | * to ensure that the updated hypercall appears atomically across all | |
1755 | * VCPUs. | |
1756 | */ | |
1757 | kvm_mmu_zap_all(vcpu->kvm); | |
1758 | ||
1759 | kvm_x86_ops->cache_regs(vcpu); | |
1760 | kvm_x86_ops->patch_hypercall(vcpu, instruction); | |
1761 | if (emulator_write_emulated(vcpu->rip, instruction, 3, vcpu) | |
1762 | != X86EMUL_CONTINUE) | |
1763 | ret = -EFAULT; | |
1764 | ||
1765 | mutex_unlock(&vcpu->kvm->lock); | |
1766 | ||
1767 | return ret; | |
1768 | } | |
1769 | ||
1770 | static u64 mk_cr_64(u64 curr_cr, u32 new_val) | |
1771 | { | |
1772 | return (curr_cr & ~((1ULL << 32) - 1)) | new_val; | |
1773 | } | |
1774 | ||
1775 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | |
1776 | { | |
1777 | struct descriptor_table dt = { limit, base }; | |
1778 | ||
1779 | kvm_x86_ops->set_gdt(vcpu, &dt); | |
1780 | } | |
1781 | ||
1782 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | |
1783 | { | |
1784 | struct descriptor_table dt = { limit, base }; | |
1785 | ||
1786 | kvm_x86_ops->set_idt(vcpu, &dt); | |
1787 | } | |
1788 | ||
1789 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
1790 | unsigned long *rflags) | |
1791 | { | |
1792 | lmsw(vcpu, msw); | |
1793 | *rflags = kvm_x86_ops->get_rflags(vcpu); | |
1794 | } | |
1795 | ||
1796 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr) | |
1797 | { | |
1798 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
1799 | switch (cr) { | |
1800 | case 0: | |
1801 | return vcpu->cr0; | |
1802 | case 2: | |
1803 | return vcpu->cr2; | |
1804 | case 3: | |
1805 | return vcpu->cr3; | |
1806 | case 4: | |
1807 | return vcpu->cr4; | |
1808 | default: | |
1809 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr); | |
1810 | return 0; | |
1811 | } | |
1812 | } | |
1813 | ||
1814 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val, | |
1815 | unsigned long *rflags) | |
1816 | { | |
1817 | switch (cr) { | |
1818 | case 0: | |
1819 | set_cr0(vcpu, mk_cr_64(vcpu->cr0, val)); | |
1820 | *rflags = kvm_x86_ops->get_rflags(vcpu); | |
1821 | break; | |
1822 | case 2: | |
1823 | vcpu->cr2 = val; | |
1824 | break; | |
1825 | case 3: | |
1826 | set_cr3(vcpu, val); | |
1827 | break; | |
1828 | case 4: | |
1829 | set_cr4(vcpu, mk_cr_64(vcpu->cr4, val)); | |
1830 | break; | |
1831 | default: | |
1832 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __FUNCTION__, cr); | |
1833 | } | |
1834 | } | |
1835 | ||
1836 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu) | |
1837 | { | |
1838 | int i; | |
1839 | u32 function; | |
1840 | struct kvm_cpuid_entry *e, *best; | |
1841 | ||
1842 | kvm_x86_ops->cache_regs(vcpu); | |
1843 | function = vcpu->regs[VCPU_REGS_RAX]; | |
1844 | vcpu->regs[VCPU_REGS_RAX] = 0; | |
1845 | vcpu->regs[VCPU_REGS_RBX] = 0; | |
1846 | vcpu->regs[VCPU_REGS_RCX] = 0; | |
1847 | vcpu->regs[VCPU_REGS_RDX] = 0; | |
1848 | best = NULL; | |
1849 | for (i = 0; i < vcpu->cpuid_nent; ++i) { | |
1850 | e = &vcpu->cpuid_entries[i]; | |
1851 | if (e->function == function) { | |
1852 | best = e; | |
1853 | break; | |
1854 | } | |
1855 | /* | |
1856 | * Both basic or both extended? | |
1857 | */ | |
1858 | if (((e->function ^ function) & 0x80000000) == 0) | |
1859 | if (!best || e->function > best->function) | |
1860 | best = e; | |
1861 | } | |
1862 | if (best) { | |
1863 | vcpu->regs[VCPU_REGS_RAX] = best->eax; | |
1864 | vcpu->regs[VCPU_REGS_RBX] = best->ebx; | |
1865 | vcpu->regs[VCPU_REGS_RCX] = best->ecx; | |
1866 | vcpu->regs[VCPU_REGS_RDX] = best->edx; | |
1867 | } | |
1868 | kvm_x86_ops->decache_regs(vcpu); | |
1869 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
1870 | } | |
1871 | EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); | |
d0752060 | 1872 | |
b6c7a5dc HB |
1873 | /* |
1874 | * Check if userspace requested an interrupt window, and that the | |
1875 | * interrupt window is open. | |
1876 | * | |
1877 | * No need to exit to userspace if we already have an interrupt queued. | |
1878 | */ | |
1879 | static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu, | |
1880 | struct kvm_run *kvm_run) | |
1881 | { | |
1882 | return (!vcpu->irq_summary && | |
1883 | kvm_run->request_interrupt_window && | |
1884 | vcpu->interrupt_window_open && | |
1885 | (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF)); | |
1886 | } | |
1887 | ||
1888 | static void post_kvm_run_save(struct kvm_vcpu *vcpu, | |
1889 | struct kvm_run *kvm_run) | |
1890 | { | |
1891 | kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0; | |
1892 | kvm_run->cr8 = get_cr8(vcpu); | |
1893 | kvm_run->apic_base = kvm_get_apic_base(vcpu); | |
1894 | if (irqchip_in_kernel(vcpu->kvm)) | |
1895 | kvm_run->ready_for_interrupt_injection = 1; | |
1896 | else | |
1897 | kvm_run->ready_for_interrupt_injection = | |
1898 | (vcpu->interrupt_window_open && | |
1899 | vcpu->irq_summary == 0); | |
1900 | } | |
1901 | ||
1902 | static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |
1903 | { | |
1904 | int r; | |
1905 | ||
1906 | if (unlikely(vcpu->mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) { | |
1907 | pr_debug("vcpu %d received sipi with vector # %x\n", | |
1908 | vcpu->vcpu_id, vcpu->sipi_vector); | |
1909 | kvm_lapic_reset(vcpu); | |
1910 | r = kvm_x86_ops->vcpu_reset(vcpu); | |
1911 | if (r) | |
1912 | return r; | |
1913 | vcpu->mp_state = VCPU_MP_STATE_RUNNABLE; | |
1914 | } | |
1915 | ||
1916 | preempted: | |
1917 | if (vcpu->guest_debug.enabled) | |
1918 | kvm_x86_ops->guest_debug_pre(vcpu); | |
1919 | ||
1920 | again: | |
1921 | r = kvm_mmu_reload(vcpu); | |
1922 | if (unlikely(r)) | |
1923 | goto out; | |
1924 | ||
1925 | kvm_inject_pending_timer_irqs(vcpu); | |
1926 | ||
1927 | preempt_disable(); | |
1928 | ||
1929 | kvm_x86_ops->prepare_guest_switch(vcpu); | |
1930 | kvm_load_guest_fpu(vcpu); | |
1931 | ||
1932 | local_irq_disable(); | |
1933 | ||
1934 | if (signal_pending(current)) { | |
1935 | local_irq_enable(); | |
1936 | preempt_enable(); | |
1937 | r = -EINTR; | |
1938 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
1939 | ++vcpu->stat.signal_exits; | |
1940 | goto out; | |
1941 | } | |
1942 | ||
1943 | if (irqchip_in_kernel(vcpu->kvm)) | |
1944 | kvm_x86_ops->inject_pending_irq(vcpu); | |
1945 | else if (!vcpu->mmio_read_completed) | |
1946 | kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run); | |
1947 | ||
1948 | vcpu->guest_mode = 1; | |
1949 | kvm_guest_enter(); | |
1950 | ||
1951 | if (vcpu->requests) | |
1952 | if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests)) | |
1953 | kvm_x86_ops->tlb_flush(vcpu); | |
1954 | ||
1955 | kvm_x86_ops->run(vcpu, kvm_run); | |
1956 | ||
1957 | vcpu->guest_mode = 0; | |
1958 | local_irq_enable(); | |
1959 | ||
1960 | ++vcpu->stat.exits; | |
1961 | ||
1962 | /* | |
1963 | * We must have an instruction between local_irq_enable() and | |
1964 | * kvm_guest_exit(), so the timer interrupt isn't delayed by | |
1965 | * the interrupt shadow. The stat.exits increment will do nicely. | |
1966 | * But we need to prevent reordering, hence this barrier(): | |
1967 | */ | |
1968 | barrier(); | |
1969 | ||
1970 | kvm_guest_exit(); | |
1971 | ||
1972 | preempt_enable(); | |
1973 | ||
1974 | /* | |
1975 | * Profile KVM exit RIPs: | |
1976 | */ | |
1977 | if (unlikely(prof_on == KVM_PROFILING)) { | |
1978 | kvm_x86_ops->cache_regs(vcpu); | |
1979 | profile_hit(KVM_PROFILING, (void *)vcpu->rip); | |
1980 | } | |
1981 | ||
1982 | r = kvm_x86_ops->handle_exit(kvm_run, vcpu); | |
1983 | ||
1984 | if (r > 0) { | |
1985 | if (dm_request_for_irq_injection(vcpu, kvm_run)) { | |
1986 | r = -EINTR; | |
1987 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
1988 | ++vcpu->stat.request_irq_exits; | |
1989 | goto out; | |
1990 | } | |
1991 | if (!need_resched()) { | |
1992 | ++vcpu->stat.light_exits; | |
1993 | goto again; | |
1994 | } | |
1995 | } | |
1996 | ||
1997 | out: | |
1998 | if (r > 0) { | |
1999 | kvm_resched(vcpu); | |
2000 | goto preempted; | |
2001 | } | |
2002 | ||
2003 | post_kvm_run_save(vcpu, kvm_run); | |
2004 | ||
2005 | return r; | |
2006 | } | |
2007 | ||
2008 | int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |
2009 | { | |
2010 | int r; | |
2011 | sigset_t sigsaved; | |
2012 | ||
2013 | vcpu_load(vcpu); | |
2014 | ||
2015 | if (unlikely(vcpu->mp_state == VCPU_MP_STATE_UNINITIALIZED)) { | |
2016 | kvm_vcpu_block(vcpu); | |
2017 | vcpu_put(vcpu); | |
2018 | return -EAGAIN; | |
2019 | } | |
2020 | ||
2021 | if (vcpu->sigset_active) | |
2022 | sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved); | |
2023 | ||
2024 | /* re-sync apic's tpr */ | |
2025 | if (!irqchip_in_kernel(vcpu->kvm)) | |
2026 | set_cr8(vcpu, kvm_run->cr8); | |
2027 | ||
2028 | if (vcpu->pio.cur_count) { | |
2029 | r = complete_pio(vcpu); | |
2030 | if (r) | |
2031 | goto out; | |
2032 | } | |
2033 | #if CONFIG_HAS_IOMEM | |
2034 | if (vcpu->mmio_needed) { | |
2035 | memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8); | |
2036 | vcpu->mmio_read_completed = 1; | |
2037 | vcpu->mmio_needed = 0; | |
2038 | r = emulate_instruction(vcpu, kvm_run, | |
2039 | vcpu->mmio_fault_cr2, 0, 1); | |
2040 | if (r == EMULATE_DO_MMIO) { | |
2041 | /* | |
2042 | * Read-modify-write. Back to userspace. | |
2043 | */ | |
2044 | r = 0; | |
2045 | goto out; | |
2046 | } | |
2047 | } | |
2048 | #endif | |
2049 | if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) { | |
2050 | kvm_x86_ops->cache_regs(vcpu); | |
2051 | vcpu->regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret; | |
2052 | kvm_x86_ops->decache_regs(vcpu); | |
2053 | } | |
2054 | ||
2055 | r = __vcpu_run(vcpu, kvm_run); | |
2056 | ||
2057 | out: | |
2058 | if (vcpu->sigset_active) | |
2059 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); | |
2060 | ||
2061 | vcpu_put(vcpu); | |
2062 | return r; | |
2063 | } | |
2064 | ||
2065 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
2066 | { | |
2067 | vcpu_load(vcpu); | |
2068 | ||
2069 | kvm_x86_ops->cache_regs(vcpu); | |
2070 | ||
2071 | regs->rax = vcpu->regs[VCPU_REGS_RAX]; | |
2072 | regs->rbx = vcpu->regs[VCPU_REGS_RBX]; | |
2073 | regs->rcx = vcpu->regs[VCPU_REGS_RCX]; | |
2074 | regs->rdx = vcpu->regs[VCPU_REGS_RDX]; | |
2075 | regs->rsi = vcpu->regs[VCPU_REGS_RSI]; | |
2076 | regs->rdi = vcpu->regs[VCPU_REGS_RDI]; | |
2077 | regs->rsp = vcpu->regs[VCPU_REGS_RSP]; | |
2078 | regs->rbp = vcpu->regs[VCPU_REGS_RBP]; | |
2079 | #ifdef CONFIG_X86_64 | |
2080 | regs->r8 = vcpu->regs[VCPU_REGS_R8]; | |
2081 | regs->r9 = vcpu->regs[VCPU_REGS_R9]; | |
2082 | regs->r10 = vcpu->regs[VCPU_REGS_R10]; | |
2083 | regs->r11 = vcpu->regs[VCPU_REGS_R11]; | |
2084 | regs->r12 = vcpu->regs[VCPU_REGS_R12]; | |
2085 | regs->r13 = vcpu->regs[VCPU_REGS_R13]; | |
2086 | regs->r14 = vcpu->regs[VCPU_REGS_R14]; | |
2087 | regs->r15 = vcpu->regs[VCPU_REGS_R15]; | |
2088 | #endif | |
2089 | ||
2090 | regs->rip = vcpu->rip; | |
2091 | regs->rflags = kvm_x86_ops->get_rflags(vcpu); | |
2092 | ||
2093 | /* | |
2094 | * Don't leak debug flags in case they were set for guest debugging | |
2095 | */ | |
2096 | if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep) | |
2097 | regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF); | |
2098 | ||
2099 | vcpu_put(vcpu); | |
2100 | ||
2101 | return 0; | |
2102 | } | |
2103 | ||
2104 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
2105 | { | |
2106 | vcpu_load(vcpu); | |
2107 | ||
2108 | vcpu->regs[VCPU_REGS_RAX] = regs->rax; | |
2109 | vcpu->regs[VCPU_REGS_RBX] = regs->rbx; | |
2110 | vcpu->regs[VCPU_REGS_RCX] = regs->rcx; | |
2111 | vcpu->regs[VCPU_REGS_RDX] = regs->rdx; | |
2112 | vcpu->regs[VCPU_REGS_RSI] = regs->rsi; | |
2113 | vcpu->regs[VCPU_REGS_RDI] = regs->rdi; | |
2114 | vcpu->regs[VCPU_REGS_RSP] = regs->rsp; | |
2115 | vcpu->regs[VCPU_REGS_RBP] = regs->rbp; | |
2116 | #ifdef CONFIG_X86_64 | |
2117 | vcpu->regs[VCPU_REGS_R8] = regs->r8; | |
2118 | vcpu->regs[VCPU_REGS_R9] = regs->r9; | |
2119 | vcpu->regs[VCPU_REGS_R10] = regs->r10; | |
2120 | vcpu->regs[VCPU_REGS_R11] = regs->r11; | |
2121 | vcpu->regs[VCPU_REGS_R12] = regs->r12; | |
2122 | vcpu->regs[VCPU_REGS_R13] = regs->r13; | |
2123 | vcpu->regs[VCPU_REGS_R14] = regs->r14; | |
2124 | vcpu->regs[VCPU_REGS_R15] = regs->r15; | |
2125 | #endif | |
2126 | ||
2127 | vcpu->rip = regs->rip; | |
2128 | kvm_x86_ops->set_rflags(vcpu, regs->rflags); | |
2129 | ||
2130 | kvm_x86_ops->decache_regs(vcpu); | |
2131 | ||
2132 | vcpu_put(vcpu); | |
2133 | ||
2134 | return 0; | |
2135 | } | |
2136 | ||
2137 | static void get_segment(struct kvm_vcpu *vcpu, | |
2138 | struct kvm_segment *var, int seg) | |
2139 | { | |
2140 | return kvm_x86_ops->get_segment(vcpu, var, seg); | |
2141 | } | |
2142 | ||
2143 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) | |
2144 | { | |
2145 | struct kvm_segment cs; | |
2146 | ||
2147 | get_segment(vcpu, &cs, VCPU_SREG_CS); | |
2148 | *db = cs.db; | |
2149 | *l = cs.l; | |
2150 | } | |
2151 | EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits); | |
2152 | ||
2153 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |
2154 | struct kvm_sregs *sregs) | |
2155 | { | |
2156 | struct descriptor_table dt; | |
2157 | int pending_vec; | |
2158 | ||
2159 | vcpu_load(vcpu); | |
2160 | ||
2161 | get_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | |
2162 | get_segment(vcpu, &sregs->ds, VCPU_SREG_DS); | |
2163 | get_segment(vcpu, &sregs->es, VCPU_SREG_ES); | |
2164 | get_segment(vcpu, &sregs->fs, VCPU_SREG_FS); | |
2165 | get_segment(vcpu, &sregs->gs, VCPU_SREG_GS); | |
2166 | get_segment(vcpu, &sregs->ss, VCPU_SREG_SS); | |
2167 | ||
2168 | get_segment(vcpu, &sregs->tr, VCPU_SREG_TR); | |
2169 | get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | |
2170 | ||
2171 | kvm_x86_ops->get_idt(vcpu, &dt); | |
2172 | sregs->idt.limit = dt.limit; | |
2173 | sregs->idt.base = dt.base; | |
2174 | kvm_x86_ops->get_gdt(vcpu, &dt); | |
2175 | sregs->gdt.limit = dt.limit; | |
2176 | sregs->gdt.base = dt.base; | |
2177 | ||
2178 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
2179 | sregs->cr0 = vcpu->cr0; | |
2180 | sregs->cr2 = vcpu->cr2; | |
2181 | sregs->cr3 = vcpu->cr3; | |
2182 | sregs->cr4 = vcpu->cr4; | |
2183 | sregs->cr8 = get_cr8(vcpu); | |
2184 | sregs->efer = vcpu->shadow_efer; | |
2185 | sregs->apic_base = kvm_get_apic_base(vcpu); | |
2186 | ||
2187 | if (irqchip_in_kernel(vcpu->kvm)) { | |
2188 | memset(sregs->interrupt_bitmap, 0, | |
2189 | sizeof sregs->interrupt_bitmap); | |
2190 | pending_vec = kvm_x86_ops->get_irq(vcpu); | |
2191 | if (pending_vec >= 0) | |
2192 | set_bit(pending_vec, | |
2193 | (unsigned long *)sregs->interrupt_bitmap); | |
2194 | } else | |
2195 | memcpy(sregs->interrupt_bitmap, vcpu->irq_pending, | |
2196 | sizeof sregs->interrupt_bitmap); | |
2197 | ||
2198 | vcpu_put(vcpu); | |
2199 | ||
2200 | return 0; | |
2201 | } | |
2202 | ||
2203 | static void set_segment(struct kvm_vcpu *vcpu, | |
2204 | struct kvm_segment *var, int seg) | |
2205 | { | |
2206 | return kvm_x86_ops->set_segment(vcpu, var, seg); | |
2207 | } | |
2208 | ||
2209 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
2210 | struct kvm_sregs *sregs) | |
2211 | { | |
2212 | int mmu_reset_needed = 0; | |
2213 | int i, pending_vec, max_bits; | |
2214 | struct descriptor_table dt; | |
2215 | ||
2216 | vcpu_load(vcpu); | |
2217 | ||
2218 | dt.limit = sregs->idt.limit; | |
2219 | dt.base = sregs->idt.base; | |
2220 | kvm_x86_ops->set_idt(vcpu, &dt); | |
2221 | dt.limit = sregs->gdt.limit; | |
2222 | dt.base = sregs->gdt.base; | |
2223 | kvm_x86_ops->set_gdt(vcpu, &dt); | |
2224 | ||
2225 | vcpu->cr2 = sregs->cr2; | |
2226 | mmu_reset_needed |= vcpu->cr3 != sregs->cr3; | |
2227 | vcpu->cr3 = sregs->cr3; | |
2228 | ||
2229 | set_cr8(vcpu, sregs->cr8); | |
2230 | ||
2231 | mmu_reset_needed |= vcpu->shadow_efer != sregs->efer; | |
2232 | #ifdef CONFIG_X86_64 | |
2233 | kvm_x86_ops->set_efer(vcpu, sregs->efer); | |
2234 | #endif | |
2235 | kvm_set_apic_base(vcpu, sregs->apic_base); | |
2236 | ||
2237 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
2238 | ||
2239 | mmu_reset_needed |= vcpu->cr0 != sregs->cr0; | |
2240 | vcpu->cr0 = sregs->cr0; | |
2241 | kvm_x86_ops->set_cr0(vcpu, sregs->cr0); | |
2242 | ||
2243 | mmu_reset_needed |= vcpu->cr4 != sregs->cr4; | |
2244 | kvm_x86_ops->set_cr4(vcpu, sregs->cr4); | |
2245 | if (!is_long_mode(vcpu) && is_pae(vcpu)) | |
2246 | load_pdptrs(vcpu, vcpu->cr3); | |
2247 | ||
2248 | if (mmu_reset_needed) | |
2249 | kvm_mmu_reset_context(vcpu); | |
2250 | ||
2251 | if (!irqchip_in_kernel(vcpu->kvm)) { | |
2252 | memcpy(vcpu->irq_pending, sregs->interrupt_bitmap, | |
2253 | sizeof vcpu->irq_pending); | |
2254 | vcpu->irq_summary = 0; | |
2255 | for (i = 0; i < ARRAY_SIZE(vcpu->irq_pending); ++i) | |
2256 | if (vcpu->irq_pending[i]) | |
2257 | __set_bit(i, &vcpu->irq_summary); | |
2258 | } else { | |
2259 | max_bits = (sizeof sregs->interrupt_bitmap) << 3; | |
2260 | pending_vec = find_first_bit( | |
2261 | (const unsigned long *)sregs->interrupt_bitmap, | |
2262 | max_bits); | |
2263 | /* Only pending external irq is handled here */ | |
2264 | if (pending_vec < max_bits) { | |
2265 | kvm_x86_ops->set_irq(vcpu, pending_vec); | |
2266 | pr_debug("Set back pending irq %d\n", | |
2267 | pending_vec); | |
2268 | } | |
2269 | } | |
2270 | ||
2271 | set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | |
2272 | set_segment(vcpu, &sregs->ds, VCPU_SREG_DS); | |
2273 | set_segment(vcpu, &sregs->es, VCPU_SREG_ES); | |
2274 | set_segment(vcpu, &sregs->fs, VCPU_SREG_FS); | |
2275 | set_segment(vcpu, &sregs->gs, VCPU_SREG_GS); | |
2276 | set_segment(vcpu, &sregs->ss, VCPU_SREG_SS); | |
2277 | ||
2278 | set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); | |
2279 | set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | |
2280 | ||
2281 | vcpu_put(vcpu); | |
2282 | ||
2283 | return 0; | |
2284 | } | |
2285 | ||
2286 | int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, | |
2287 | struct kvm_debug_guest *dbg) | |
2288 | { | |
2289 | int r; | |
2290 | ||
2291 | vcpu_load(vcpu); | |
2292 | ||
2293 | r = kvm_x86_ops->set_guest_debug(vcpu, dbg); | |
2294 | ||
2295 | vcpu_put(vcpu); | |
2296 | ||
2297 | return r; | |
2298 | } | |
2299 | ||
d0752060 HB |
2300 | /* |
2301 | * fxsave fpu state. Taken from x86_64/processor.h. To be killed when | |
2302 | * we have asm/x86/processor.h | |
2303 | */ | |
2304 | struct fxsave { | |
2305 | u16 cwd; | |
2306 | u16 swd; | |
2307 | u16 twd; | |
2308 | u16 fop; | |
2309 | u64 rip; | |
2310 | u64 rdp; | |
2311 | u32 mxcsr; | |
2312 | u32 mxcsr_mask; | |
2313 | u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ | |
2314 | #ifdef CONFIG_X86_64 | |
2315 | u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */ | |
2316 | #else | |
2317 | u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ | |
2318 | #endif | |
2319 | }; | |
2320 | ||
8b006791 ZX |
2321 | /* |
2322 | * Translate a guest virtual address to a guest physical address. | |
2323 | */ | |
2324 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, | |
2325 | struct kvm_translation *tr) | |
2326 | { | |
2327 | unsigned long vaddr = tr->linear_address; | |
2328 | gpa_t gpa; | |
2329 | ||
2330 | vcpu_load(vcpu); | |
2331 | mutex_lock(&vcpu->kvm->lock); | |
2332 | gpa = vcpu->mmu.gva_to_gpa(vcpu, vaddr); | |
2333 | tr->physical_address = gpa; | |
2334 | tr->valid = gpa != UNMAPPED_GVA; | |
2335 | tr->writeable = 1; | |
2336 | tr->usermode = 0; | |
2337 | mutex_unlock(&vcpu->kvm->lock); | |
2338 | vcpu_put(vcpu); | |
2339 | ||
2340 | return 0; | |
2341 | } | |
2342 | ||
d0752060 HB |
2343 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) |
2344 | { | |
2345 | struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image; | |
2346 | ||
2347 | vcpu_load(vcpu); | |
2348 | ||
2349 | memcpy(fpu->fpr, fxsave->st_space, 128); | |
2350 | fpu->fcw = fxsave->cwd; | |
2351 | fpu->fsw = fxsave->swd; | |
2352 | fpu->ftwx = fxsave->twd; | |
2353 | fpu->last_opcode = fxsave->fop; | |
2354 | fpu->last_ip = fxsave->rip; | |
2355 | fpu->last_dp = fxsave->rdp; | |
2356 | memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space); | |
2357 | ||
2358 | vcpu_put(vcpu); | |
2359 | ||
2360 | return 0; | |
2361 | } | |
2362 | ||
2363 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
2364 | { | |
2365 | struct fxsave *fxsave = (struct fxsave *)&vcpu->guest_fx_image; | |
2366 | ||
2367 | vcpu_load(vcpu); | |
2368 | ||
2369 | memcpy(fxsave->st_space, fpu->fpr, 128); | |
2370 | fxsave->cwd = fpu->fcw; | |
2371 | fxsave->swd = fpu->fsw; | |
2372 | fxsave->twd = fpu->ftwx; | |
2373 | fxsave->fop = fpu->last_opcode; | |
2374 | fxsave->rip = fpu->last_ip; | |
2375 | fxsave->rdp = fpu->last_dp; | |
2376 | memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space); | |
2377 | ||
2378 | vcpu_put(vcpu); | |
2379 | ||
2380 | return 0; | |
2381 | } | |
2382 | ||
2383 | void fx_init(struct kvm_vcpu *vcpu) | |
2384 | { | |
2385 | unsigned after_mxcsr_mask; | |
2386 | ||
2387 | /* Initialize guest FPU by resetting ours and saving into guest's */ | |
2388 | preempt_disable(); | |
2389 | fx_save(&vcpu->host_fx_image); | |
2390 | fpu_init(); | |
2391 | fx_save(&vcpu->guest_fx_image); | |
2392 | fx_restore(&vcpu->host_fx_image); | |
2393 | preempt_enable(); | |
2394 | ||
2395 | vcpu->cr0 |= X86_CR0_ET; | |
2396 | after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space); | |
2397 | vcpu->guest_fx_image.mxcsr = 0x1f80; | |
2398 | memset((void *)&vcpu->guest_fx_image + after_mxcsr_mask, | |
2399 | 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask); | |
2400 | } | |
2401 | EXPORT_SYMBOL_GPL(fx_init); | |
2402 | ||
2403 | void kvm_load_guest_fpu(struct kvm_vcpu *vcpu) | |
2404 | { | |
2405 | if (!vcpu->fpu_active || vcpu->guest_fpu_loaded) | |
2406 | return; | |
2407 | ||
2408 | vcpu->guest_fpu_loaded = 1; | |
2409 | fx_save(&vcpu->host_fx_image); | |
2410 | fx_restore(&vcpu->guest_fx_image); | |
2411 | } | |
2412 | EXPORT_SYMBOL_GPL(kvm_load_guest_fpu); | |
2413 | ||
2414 | void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) | |
2415 | { | |
2416 | if (!vcpu->guest_fpu_loaded) | |
2417 | return; | |
2418 | ||
2419 | vcpu->guest_fpu_loaded = 0; | |
2420 | fx_save(&vcpu->guest_fx_image); | |
2421 | fx_restore(&vcpu->host_fx_image); | |
2422 | } | |
2423 | EXPORT_SYMBOL_GPL(kvm_put_guest_fpu); | |
e9b11c17 ZX |
2424 | |
2425 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) | |
2426 | { | |
2427 | kvm_x86_ops->vcpu_free(vcpu); | |
2428 | } | |
2429 | ||
2430 | struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, | |
2431 | unsigned int id) | |
2432 | { | |
2433 | int r; | |
2434 | struct kvm_vcpu *vcpu = kvm_x86_ops->vcpu_create(kvm, id); | |
2435 | ||
2436 | if (IS_ERR(vcpu)) { | |
2437 | r = -ENOMEM; | |
2438 | goto fail; | |
2439 | } | |
2440 | ||
2441 | /* We do fxsave: this must be aligned. */ | |
2442 | BUG_ON((unsigned long)&vcpu->host_fx_image & 0xF); | |
2443 | ||
2444 | vcpu_load(vcpu); | |
2445 | r = kvm_arch_vcpu_reset(vcpu); | |
2446 | if (r == 0) | |
2447 | r = kvm_mmu_setup(vcpu); | |
2448 | vcpu_put(vcpu); | |
2449 | if (r < 0) | |
2450 | goto free_vcpu; | |
2451 | ||
2452 | return vcpu; | |
2453 | free_vcpu: | |
2454 | kvm_x86_ops->vcpu_free(vcpu); | |
2455 | fail: | |
2456 | return ERR_PTR(r); | |
2457 | } | |
2458 | ||
2459 | void kvm_arch_vcpu_destory(struct kvm_vcpu *vcpu) | |
2460 | { | |
2461 | vcpu_load(vcpu); | |
2462 | kvm_mmu_unload(vcpu); | |
2463 | vcpu_put(vcpu); | |
2464 | ||
2465 | kvm_x86_ops->vcpu_free(vcpu); | |
2466 | } | |
2467 | ||
2468 | int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu) | |
2469 | { | |
2470 | return kvm_x86_ops->vcpu_reset(vcpu); | |
2471 | } | |
2472 | ||
2473 | void kvm_arch_hardware_enable(void *garbage) | |
2474 | { | |
2475 | kvm_x86_ops->hardware_enable(garbage); | |
2476 | } | |
2477 | ||
2478 | void kvm_arch_hardware_disable(void *garbage) | |
2479 | { | |
2480 | kvm_x86_ops->hardware_disable(garbage); | |
2481 | } | |
2482 | ||
2483 | int kvm_arch_hardware_setup(void) | |
2484 | { | |
2485 | return kvm_x86_ops->hardware_setup(); | |
2486 | } | |
2487 | ||
2488 | void kvm_arch_hardware_unsetup(void) | |
2489 | { | |
2490 | kvm_x86_ops->hardware_unsetup(); | |
2491 | } | |
2492 | ||
2493 | void kvm_arch_check_processor_compat(void *rtn) | |
2494 | { | |
2495 | kvm_x86_ops->check_processor_compatibility(rtn); | |
2496 | } | |
2497 | ||
2498 | int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) | |
2499 | { | |
2500 | struct page *page; | |
2501 | struct kvm *kvm; | |
2502 | int r; | |
2503 | ||
2504 | BUG_ON(vcpu->kvm == NULL); | |
2505 | kvm = vcpu->kvm; | |
2506 | ||
2507 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
2508 | if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0) | |
2509 | vcpu->mp_state = VCPU_MP_STATE_RUNNABLE; | |
2510 | else | |
2511 | vcpu->mp_state = VCPU_MP_STATE_UNINITIALIZED; | |
2512 | ||
2513 | page = alloc_page(GFP_KERNEL | __GFP_ZERO); | |
2514 | if (!page) { | |
2515 | r = -ENOMEM; | |
2516 | goto fail; | |
2517 | } | |
2518 | vcpu->pio_data = page_address(page); | |
2519 | ||
2520 | r = kvm_mmu_create(vcpu); | |
2521 | if (r < 0) | |
2522 | goto fail_free_pio_data; | |
2523 | ||
2524 | if (irqchip_in_kernel(kvm)) { | |
2525 | r = kvm_create_lapic(vcpu); | |
2526 | if (r < 0) | |
2527 | goto fail_mmu_destroy; | |
2528 | } | |
2529 | ||
2530 | return 0; | |
2531 | ||
2532 | fail_mmu_destroy: | |
2533 | kvm_mmu_destroy(vcpu); | |
2534 | fail_free_pio_data: | |
2535 | free_page((unsigned long)vcpu->pio_data); | |
2536 | fail: | |
2537 | return r; | |
2538 | } | |
2539 | ||
2540 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) | |
2541 | { | |
2542 | kvm_free_lapic(vcpu); | |
2543 | kvm_mmu_destroy(vcpu); | |
2544 | free_page((unsigned long)vcpu->pio_data); | |
2545 | } |