Commit | Line | Data |
---|---|---|
500fe141 SO |
1 | /* |
2 | * LP5521 LED chip driver. | |
3 | * | |
4 | * Copyright (C) 2010 Nokia Corporation | |
a2387cb9 | 5 | * Copyright (C) 2012 Texas Instruments |
500fe141 SO |
6 | * |
7 | * Contact: Samu Onkalo <samu.p.onkalo@nokia.com> | |
a2387cb9 | 8 | * Milo(Woogyom) Kim <milo.kim@ti.com> |
500fe141 SO |
9 | * |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * version 2 as published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
22 | * 02110-1301 USA | |
23 | */ | |
24 | ||
500fe141 | 25 | #include <linux/delay.h> |
79bcc10b MWK |
26 | #include <linux/firmware.h> |
27 | #include <linux/i2c.h> | |
28 | #include <linux/init.h> | |
500fe141 | 29 | #include <linux/leds.h> |
79bcc10b MWK |
30 | #include <linux/module.h> |
31 | #include <linux/mutex.h> | |
6a0c9a47 | 32 | #include <linux/platform_data/leds-lp55xx.h> |
79bcc10b | 33 | #include <linux/slab.h> |
6a0c9a47 MWK |
34 | |
35 | #include "leds-lp55xx-common.h" | |
500fe141 | 36 | |
12f022d2 MWK |
37 | #define LP5521_PROGRAM_LENGTH 32 |
38 | #define LP5521_MAX_LEDS 3 | |
39 | #define LP5521_CMD_DIRECT 0x3F | |
500fe141 SO |
40 | |
41 | /* Registers */ | |
42 | #define LP5521_REG_ENABLE 0x00 | |
43 | #define LP5521_REG_OP_MODE 0x01 | |
44 | #define LP5521_REG_R_PWM 0x02 | |
45 | #define LP5521_REG_G_PWM 0x03 | |
46 | #define LP5521_REG_B_PWM 0x04 | |
47 | #define LP5521_REG_R_CURRENT 0x05 | |
48 | #define LP5521_REG_G_CURRENT 0x06 | |
49 | #define LP5521_REG_B_CURRENT 0x07 | |
50 | #define LP5521_REG_CONFIG 0x08 | |
500fe141 SO |
51 | #define LP5521_REG_STATUS 0x0C |
52 | #define LP5521_REG_RESET 0x0D | |
500fe141 SO |
53 | #define LP5521_REG_R_PROG_MEM 0x10 |
54 | #define LP5521_REG_G_PROG_MEM 0x30 | |
55 | #define LP5521_REG_B_PROG_MEM 0x50 | |
56 | ||
500fe141 SO |
57 | /* Base register to set LED current */ |
58 | #define LP5521_REG_LED_CURRENT_BASE LP5521_REG_R_CURRENT | |
500fe141 SO |
59 | /* Base register to set the brightness */ |
60 | #define LP5521_REG_LED_PWM_BASE LP5521_REG_R_PWM | |
61 | ||
62 | /* Bits in ENABLE register */ | |
63 | #define LP5521_MASTER_ENABLE 0x40 /* Chip master enable */ | |
64 | #define LP5521_LOGARITHMIC_PWM 0x80 /* Logarithmic PWM adjustment */ | |
65 | #define LP5521_EXEC_RUN 0x2A | |
32a2f747 KM |
66 | #define LP5521_ENABLE_DEFAULT \ |
67 | (LP5521_MASTER_ENABLE | LP5521_LOGARITHMIC_PWM) | |
68 | #define LP5521_ENABLE_RUN_PROGRAM \ | |
69 | (LP5521_ENABLE_DEFAULT | LP5521_EXEC_RUN) | |
500fe141 | 70 | |
500fe141 SO |
71 | /* Status */ |
72 | #define LP5521_EXT_CLK_USED 0x08 | |
73 | ||
b3c49c05 SK |
74 | /* default R channel current register value */ |
75 | #define LP5521_REG_R_CURR_DEFAULT 0xAF | |
76 | ||
48068d5d MWK |
77 | /* Reset register value */ |
78 | #define LP5521_RESET 0xFF | |
79 | ||
9ce7cb17 MWK |
80 | /* Program Memory Operations */ |
81 | #define LP5521_MODE_R_M 0x30 /* Operation Mode Register */ | |
82 | #define LP5521_MODE_G_M 0x0C | |
83 | #define LP5521_MODE_B_M 0x03 | |
84 | #define LP5521_LOAD_R 0x10 | |
85 | #define LP5521_LOAD_G 0x04 | |
86 | #define LP5521_LOAD_B 0x01 | |
87 | ||
88 | #define LP5521_R_IS_LOADING(mode) \ | |
89 | ((mode & LP5521_MODE_R_M) == LP5521_LOAD_R) | |
90 | #define LP5521_G_IS_LOADING(mode) \ | |
91 | ((mode & LP5521_MODE_G_M) == LP5521_LOAD_G) | |
92 | #define LP5521_B_IS_LOADING(mode) \ | |
93 | ((mode & LP5521_MODE_B_M) == LP5521_LOAD_B) | |
94 | ||
95 | #define LP5521_EXEC_R_M 0x30 /* Enable Register */ | |
96 | #define LP5521_EXEC_G_M 0x0C | |
97 | #define LP5521_EXEC_B_M 0x03 | |
98 | #define LP5521_EXEC_M 0x3F | |
99 | #define LP5521_RUN_R 0x20 | |
100 | #define LP5521_RUN_G 0x08 | |
101 | #define LP5521_RUN_B 0x02 | |
500fe141 | 102 | |
9ce7cb17 MWK |
103 | static inline void lp5521_wait_opmode_done(void) |
104 | { | |
105 | /* operation mode change needs to be longer than 153 us */ | |
106 | usleep_range(200, 300); | |
107 | } | |
108 | ||
94482174 MWK |
109 | static inline void lp5521_wait_enable_done(void) |
110 | { | |
111 | /* it takes more 488 us to update ENABLE register */ | |
112 | usleep_range(500, 600); | |
113 | } | |
114 | ||
a96bfa13 MWK |
115 | static void lp5521_set_led_current(struct lp55xx_led *led, u8 led_current) |
116 | { | |
117 | led->led_current = led_current; | |
118 | lp55xx_write(led->chip, LP5521_REG_LED_CURRENT_BASE + led->chan_nr, | |
119 | led_current); | |
120 | } | |
121 | ||
9ce7cb17 | 122 | static void lp5521_load_engine(struct lp55xx_chip *chip) |
500fe141 | 123 | { |
9ce7cb17 MWK |
124 | enum lp55xx_engine_index idx = chip->engine_idx; |
125 | u8 mask[] = { | |
126 | [LP55XX_ENGINE_1] = LP5521_MODE_R_M, | |
127 | [LP55XX_ENGINE_2] = LP5521_MODE_G_M, | |
128 | [LP55XX_ENGINE_3] = LP5521_MODE_B_M, | |
129 | }; | |
500fe141 | 130 | |
9ce7cb17 MWK |
131 | u8 val[] = { |
132 | [LP55XX_ENGINE_1] = LP5521_LOAD_R, | |
133 | [LP55XX_ENGINE_2] = LP5521_LOAD_G, | |
134 | [LP55XX_ENGINE_3] = LP5521_LOAD_B, | |
135 | }; | |
500fe141 | 136 | |
9ce7cb17 | 137 | lp55xx_update_bits(chip, LP5521_REG_OP_MODE, mask[idx], val[idx]); |
500fe141 | 138 | |
9ce7cb17 MWK |
139 | lp5521_wait_opmode_done(); |
140 | } | |
500fe141 | 141 | |
9ce7cb17 MWK |
142 | static void lp5521_stop_engine(struct lp55xx_chip *chip) |
143 | { | |
144 | lp55xx_write(chip, LP5521_REG_OP_MODE, 0); | |
145 | lp5521_wait_opmode_done(); | |
500fe141 SO |
146 | } |
147 | ||
9ce7cb17 | 148 | static void lp5521_run_engine(struct lp55xx_chip *chip, bool start) |
500fe141 | 149 | { |
500fe141 | 150 | int ret; |
500fe141 | 151 | u8 mode; |
9ce7cb17 | 152 | u8 exec; |
500fe141 | 153 | |
9ce7cb17 MWK |
154 | /* stop engine */ |
155 | if (!start) { | |
156 | lp5521_stop_engine(chip); | |
157 | lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); | |
158 | lp5521_wait_opmode_done(); | |
159 | return; | |
160 | } | |
161 | ||
162 | /* | |
163 | * To run the engine, | |
164 | * operation mode and enable register should updated at the same time | |
165 | */ | |
166 | ||
167 | ret = lp55xx_read(chip, LP5521_REG_OP_MODE, &mode); | |
5bc9ad77 | 168 | if (ret) |
9ce7cb17 | 169 | return; |
5bc9ad77 | 170 | |
9ce7cb17 | 171 | ret = lp55xx_read(chip, LP5521_REG_ENABLE, &exec); |
5bc9ad77 | 172 | if (ret) |
9ce7cb17 MWK |
173 | return; |
174 | ||
175 | /* change operation mode to RUN only when each engine is loading */ | |
176 | if (LP5521_R_IS_LOADING(mode)) { | |
177 | mode = (mode & ~LP5521_MODE_R_M) | LP5521_RUN_R; | |
178 | exec = (exec & ~LP5521_EXEC_R_M) | LP5521_RUN_R; | |
179 | } | |
180 | ||
181 | if (LP5521_G_IS_LOADING(mode)) { | |
182 | mode = (mode & ~LP5521_MODE_G_M) | LP5521_RUN_G; | |
183 | exec = (exec & ~LP5521_EXEC_G_M) | LP5521_RUN_G; | |
184 | } | |
185 | ||
186 | if (LP5521_B_IS_LOADING(mode)) { | |
187 | mode = (mode & ~LP5521_MODE_B_M) | LP5521_RUN_B; | |
188 | exec = (exec & ~LP5521_EXEC_B_M) | LP5521_RUN_B; | |
189 | } | |
190 | ||
191 | lp55xx_write(chip, LP5521_REG_OP_MODE, mode); | |
192 | lp5521_wait_opmode_done(); | |
193 | ||
194 | lp55xx_update_bits(chip, LP5521_REG_ENABLE, LP5521_EXEC_M, exec); | |
195 | lp5521_wait_enable_done(); | |
196 | } | |
197 | ||
198 | static int lp5521_update_program_memory(struct lp55xx_chip *chip, | |
199 | const u8 *data, size_t size) | |
200 | { | |
201 | enum lp55xx_engine_index idx = chip->engine_idx; | |
202 | u8 pattern[LP5521_PROGRAM_LENGTH] = {0}; | |
203 | u8 addr[] = { | |
204 | [LP55XX_ENGINE_1] = LP5521_REG_R_PROG_MEM, | |
205 | [LP55XX_ENGINE_2] = LP5521_REG_G_PROG_MEM, | |
206 | [LP55XX_ENGINE_3] = LP5521_REG_B_PROG_MEM, | |
207 | }; | |
208 | unsigned cmd; | |
209 | char c[3]; | |
210 | int program_size; | |
211 | int nrchars; | |
212 | int offset = 0; | |
213 | int ret; | |
214 | int i; | |
215 | ||
216 | /* clear program memory before updating */ | |
217 | for (i = 0; i < LP5521_PROGRAM_LENGTH; i++) | |
218 | lp55xx_write(chip, addr[idx] + i, 0); | |
219 | ||
220 | i = 0; | |
221 | while ((offset < size - 1) && (i < LP5521_PROGRAM_LENGTH)) { | |
222 | /* separate sscanfs because length is working only for %s */ | |
223 | ret = sscanf(data + offset, "%2s%n ", c, &nrchars); | |
224 | if (ret != 1) | |
225 | goto err; | |
226 | ||
227 | ret = sscanf(c, "%2x", &cmd); | |
228 | if (ret != 1) | |
229 | goto err; | |
230 | ||
231 | pattern[i] = (u8)cmd; | |
232 | offset += nrchars; | |
233 | i++; | |
234 | } | |
235 | ||
236 | /* Each instruction is 16bit long. Check that length is even */ | |
237 | if (i % 2) | |
238 | goto err; | |
239 | ||
240 | program_size = i; | |
241 | for (i = 0; i < program_size; i++) | |
242 | lp55xx_write(chip, addr[idx] + i, pattern[i]); | |
243 | ||
244 | return 0; | |
245 | ||
246 | err: | |
247 | dev_err(&chip->cl->dev, "wrong pattern format\n"); | |
248 | return -EINVAL; | |
249 | } | |
250 | ||
251 | static void lp5521_firmware_loaded(struct lp55xx_chip *chip) | |
252 | { | |
253 | const struct firmware *fw = chip->fw; | |
254 | ||
255 | if (fw->size > LP5521_PROGRAM_LENGTH) { | |
256 | dev_err(&chip->cl->dev, "firmware data size overflow: %zu\n", | |
257 | fw->size); | |
258 | return; | |
259 | } | |
500fe141 | 260 | |
9ce7cb17 MWK |
261 | /* |
262 | * Program momery sequence | |
263 | * 1) set engine mode to "LOAD" | |
264 | * 2) write firmware data into program memory | |
265 | */ | |
266 | ||
267 | lp5521_load_engine(chip); | |
268 | lp5521_update_program_memory(chip, fw->data, fw->size); | |
500fe141 SO |
269 | } |
270 | ||
ffbdccdb | 271 | static int lp5521_post_init_device(struct lp55xx_chip *chip) |
500fe141 | 272 | { |
500fe141 | 273 | int ret; |
94482174 | 274 | u8 val; |
500fe141 | 275 | |
94482174 MWK |
276 | /* |
277 | * Make sure that the chip is reset by reading back the r channel | |
278 | * current reg. This is dummy read is required on some platforms - | |
279 | * otherwise further access to the R G B channels in the | |
280 | * LP5521_REG_ENABLE register will not have any effect - strange! | |
281 | */ | |
ffbdccdb | 282 | ret = lp55xx_read(chip, LP5521_REG_R_CURRENT, &val); |
94482174 | 283 | if (ret) { |
ffbdccdb | 284 | dev_err(&chip->cl->dev, "error in resetting chip\n"); |
94482174 MWK |
285 | return ret; |
286 | } | |
287 | if (val != LP5521_REG_R_CURR_DEFAULT) { | |
ffbdccdb | 288 | dev_err(&chip->cl->dev, |
94482174 MWK |
289 | "unexpected data in register (expected 0x%x got 0x%x)\n", |
290 | LP5521_REG_R_CURR_DEFAULT, val); | |
291 | ret = -EINVAL; | |
292 | return ret; | |
293 | } | |
294 | usleep_range(10000, 20000); | |
500fe141 | 295 | |
500fe141 | 296 | /* Set all PWMs to direct control mode */ |
ffbdccdb | 297 | ret = lp55xx_write(chip, LP5521_REG_OP_MODE, LP5521_CMD_DIRECT); |
500fe141 | 298 | |
ffbdccdb | 299 | val = chip->pdata->update_config ? |
3b49aacd | 300 | : (LP5521_PWRSAVE_EN | LP5521_CP_MODE_AUTO | LP5521_R_TO_BATT); |
ffbdccdb | 301 | ret = lp55xx_write(chip, LP5521_REG_CONFIG, val); |
94482174 MWK |
302 | if (ret) |
303 | return ret; | |
500fe141 SO |
304 | |
305 | /* Initialize all channels PWM to zero -> leds off */ | |
ffbdccdb MWK |
306 | lp55xx_write(chip, LP5521_REG_R_PWM, 0); |
307 | lp55xx_write(chip, LP5521_REG_G_PWM, 0); | |
308 | lp55xx_write(chip, LP5521_REG_B_PWM, 0); | |
500fe141 SO |
309 | |
310 | /* Set engines are set to run state when OP_MODE enables engines */ | |
ffbdccdb | 311 | ret = lp55xx_write(chip, LP5521_REG_ENABLE, LP5521_ENABLE_RUN_PROGRAM); |
94482174 MWK |
312 | if (ret) |
313 | return ret; | |
500fe141 | 314 | |
94482174 MWK |
315 | lp5521_wait_enable_done(); |
316 | ||
317 | return 0; | |
500fe141 SO |
318 | } |
319 | ||
9ca3bd80 | 320 | static int lp5521_run_selftest(struct lp55xx_chip *chip, char *buf) |
500fe141 | 321 | { |
9ca3bd80 | 322 | struct lp55xx_platform_data *pdata = chip->pdata; |
500fe141 SO |
323 | int ret; |
324 | u8 status; | |
325 | ||
9ca3bd80 | 326 | ret = lp55xx_read(chip, LP5521_REG_STATUS, &status); |
500fe141 SO |
327 | if (ret < 0) |
328 | return ret; | |
329 | ||
9ca3bd80 MWK |
330 | if (pdata->clock_mode != LP55XX_CLOCK_EXT) |
331 | return 0; | |
332 | ||
500fe141 | 333 | /* Check that ext clock is really in use if requested */ |
9ca3bd80 MWK |
334 | if ((status & LP5521_EXT_CLK_USED) == 0) |
335 | return -EIO; | |
336 | ||
500fe141 SO |
337 | return 0; |
338 | } | |
339 | ||
500fe141 SO |
340 | static void lp5521_led_brightness_work(struct work_struct *work) |
341 | { | |
a6e4679a | 342 | struct lp55xx_led *led = container_of(work, struct lp55xx_led, |
500fe141 | 343 | brightness_work); |
a6e4679a | 344 | struct lp55xx_chip *chip = led->chip; |
500fe141 SO |
345 | |
346 | mutex_lock(&chip->lock); | |
a6e4679a | 347 | lp55xx_write(chip, LP5521_REG_LED_PWM_BASE + led->chan_nr, |
500fe141 SO |
348 | led->brightness); |
349 | mutex_unlock(&chip->lock); | |
350 | } | |
351 | ||
500fe141 SO |
352 | static ssize_t lp5521_selftest(struct device *dev, |
353 | struct device_attribute *attr, | |
354 | char *buf) | |
355 | { | |
9ca3bd80 MWK |
356 | struct lp55xx_led *led = i2c_get_clientdata(to_i2c_client(dev)); |
357 | struct lp55xx_chip *chip = led->chip; | |
500fe141 SO |
358 | int ret; |
359 | ||
360 | mutex_lock(&chip->lock); | |
361 | ret = lp5521_run_selftest(chip, buf); | |
362 | mutex_unlock(&chip->lock); | |
363 | return sprintf(buf, "%s\n", ret ? "FAIL" : "OK"); | |
364 | } | |
365 | ||
500fe141 | 366 | /* device attributes */ |
500fe141 SO |
367 | static DEVICE_ATTR(selftest, S_IRUGO, lp5521_selftest, NULL); |
368 | ||
369 | static struct attribute *lp5521_attributes[] = { | |
500fe141 | 370 | &dev_attr_selftest.attr, |
500fe141 SO |
371 | NULL |
372 | }; | |
373 | ||
374 | static const struct attribute_group lp5521_group = { | |
375 | .attrs = lp5521_attributes, | |
376 | }; | |
377 | ||
48068d5d MWK |
378 | /* Chip specific configurations */ |
379 | static struct lp55xx_device_config lp5521_cfg = { | |
380 | .reset = { | |
381 | .addr = LP5521_REG_RESET, | |
382 | .val = LP5521_RESET, | |
383 | }, | |
e3a700d8 MWK |
384 | .enable = { |
385 | .addr = LP5521_REG_ENABLE, | |
386 | .val = LP5521_ENABLE_DEFAULT, | |
387 | }, | |
0e202346 | 388 | .max_channel = LP5521_MAX_LEDS, |
ffbdccdb | 389 | .post_init_device = lp5521_post_init_device, |
a6e4679a | 390 | .brightness_work_fn = lp5521_led_brightness_work, |
a96bfa13 | 391 | .set_led_current = lp5521_set_led_current, |
9ce7cb17 MWK |
392 | .firmware_cb = lp5521_firmware_loaded, |
393 | .run_engine = lp5521_run_engine, | |
e73c0ce6 | 394 | .dev_attr_group = &lp5521_group, |
48068d5d MWK |
395 | }; |
396 | ||
98ea1ea2 | 397 | static int lp5521_probe(struct i2c_client *client, |
500fe141 SO |
398 | const struct i2c_device_id *id) |
399 | { | |
1904f83d | 400 | int ret; |
6a0c9a47 MWK |
401 | struct lp55xx_chip *chip; |
402 | struct lp55xx_led *led; | |
403 | struct lp55xx_platform_data *pdata = client->dev.platform_data; | |
500fe141 | 404 | |
6a0c9a47 | 405 | if (!pdata) { |
500fe141 | 406 | dev_err(&client->dev, "no platform data\n"); |
e430dc00 | 407 | return -EINVAL; |
500fe141 SO |
408 | } |
409 | ||
6a0c9a47 MWK |
410 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
411 | if (!chip) | |
412 | return -ENOMEM; | |
413 | ||
414 | led = devm_kzalloc(&client->dev, | |
415 | sizeof(*led) * pdata->num_channels, GFP_KERNEL); | |
416 | if (!led) | |
417 | return -ENOMEM; | |
418 | ||
419 | chip->cl = client; | |
420 | chip->pdata = pdata; | |
48068d5d | 421 | chip->cfg = &lp5521_cfg; |
6a0c9a47 MWK |
422 | |
423 | mutex_init(&chip->lock); | |
500fe141 | 424 | |
6a0c9a47 | 425 | i2c_set_clientdata(client, led); |
500fe141 | 426 | |
22ebeb48 | 427 | ret = lp55xx_init_device(chip); |
944f7b1d | 428 | if (ret) |
f6c64c6f | 429 | goto err_init; |
500fe141 SO |
430 | |
431 | dev_info(&client->dev, "%s programmable led chip found\n", id->name); | |
432 | ||
9e9b3db1 | 433 | ret = lp55xx_register_leds(led, chip); |
f6524808 | 434 | if (ret) |
9e9b3db1 | 435 | goto err_register_leds; |
500fe141 | 436 | |
e73c0ce6 | 437 | ret = lp55xx_register_sysfs(chip); |
500fe141 SO |
438 | if (ret) { |
439 | dev_err(&client->dev, "registering sysfs failed\n"); | |
e73c0ce6 | 440 | goto err_register_sysfs; |
500fe141 | 441 | } |
e73c0ce6 MWK |
442 | |
443 | return 0; | |
444 | ||
445 | err_register_sysfs: | |
c3a68ebf | 446 | lp55xx_unregister_leds(led, chip); |
9e9b3db1 | 447 | err_register_leds: |
6ce61762 | 448 | lp55xx_deinit_device(chip); |
f6c64c6f | 449 | err_init: |
500fe141 SO |
450 | return ret; |
451 | } | |
452 | ||
678e8a6b | 453 | static int lp5521_remove(struct i2c_client *client) |
500fe141 | 454 | { |
6ce61762 MWK |
455 | struct lp55xx_led *led = i2c_get_clientdata(client); |
456 | struct lp55xx_chip *chip = led->chip; | |
500fe141 | 457 | |
87cc4bde MWK |
458 | lp5521_stop_engine(chip); |
459 | lp55xx_unregister_sysfs(chip); | |
c3a68ebf | 460 | lp55xx_unregister_leds(led, chip); |
6ce61762 | 461 | lp55xx_deinit_device(chip); |
500fe141 | 462 | |
500fe141 SO |
463 | return 0; |
464 | } | |
465 | ||
466 | static const struct i2c_device_id lp5521_id[] = { | |
467 | { "lp5521", 0 }, /* Three channel chip */ | |
468 | { } | |
469 | }; | |
470 | MODULE_DEVICE_TABLE(i2c, lp5521_id); | |
471 | ||
472 | static struct i2c_driver lp5521_driver = { | |
473 | .driver = { | |
474 | .name = "lp5521", | |
475 | }, | |
476 | .probe = lp5521_probe, | |
df07cf81 | 477 | .remove = lp5521_remove, |
500fe141 SO |
478 | .id_table = lp5521_id, |
479 | }; | |
480 | ||
09a0d183 | 481 | module_i2c_driver(lp5521_driver); |
500fe141 SO |
482 | |
483 | MODULE_AUTHOR("Mathias Nyman, Yuri Zaporozhets, Samu Onkalo"); | |
a2387cb9 | 484 | MODULE_AUTHOR("Milo Kim <milo.kim@ti.com>"); |
500fe141 SO |
485 | MODULE_DESCRIPTION("LP5521 LED engine"); |
486 | MODULE_LICENSE("GPL v2"); |