Revert "genirq: temporary fix for level-triggered IRQ resend"
[deliverable/linux.git] / drivers / lguest / lguest.c
CommitLineData
f938d2c8
RR
1/*P:010
2 * A hypervisor allows multiple Operating Systems to run on a single machine.
3 * To quote David Wheeler: "Any problem in computer science can be solved with
4 * another layer of indirection."
5 *
6 * We keep things simple in two ways. First, we start with a normal Linux
7 * kernel and insert a module (lg.ko) which allows us to run other Linux
8 * kernels the same way we'd run processes. We call the first kernel the Host,
9 * and the others the Guests. The program which sets up and configures Guests
10 * (such as the example in Documentation/lguest/lguest.c) is called the
11 * Launcher.
12 *
13 * Secondly, we only run specially modified Guests, not normal kernels. When
14 * you set CONFIG_LGUEST to 'y' or 'm', this automatically sets
15 * CONFIG_LGUEST_GUEST=y, which compiles this file into the kernel so it knows
16 * how to be a Guest. This means that you can use the same kernel you boot
17 * normally (ie. as a Host) as a Guest.
07ad157f 18 *
f938d2c8
RR
19 * These Guests know that they cannot do privileged operations, such as disable
20 * interrupts, and that they have to ask the Host to do such things explicitly.
21 * This file consists of all the replacements for such low-level native
22 * hardware operations: these special Guest versions call the Host.
23 *
24 * So how does the kernel know it's a Guest? The Guest starts at a special
25 * entry point marked with a magic string, which sets up a few things then
26 * calls here. We replace the native functions in "struct paravirt_ops"
27 * with our Guest versions, then boot like normal. :*/
28
29/*
07ad157f
RR
30 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
31 *
32 * This program is free software; you can redistribute it and/or modify
33 * it under the terms of the GNU General Public License as published by
34 * the Free Software Foundation; either version 2 of the License, or
35 * (at your option) any later version.
36 *
37 * This program is distributed in the hope that it will be useful, but
38 * WITHOUT ANY WARRANTY; without even the implied warranty of
39 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
40 * NON INFRINGEMENT. See the GNU General Public License for more
41 * details.
42 *
43 * You should have received a copy of the GNU General Public License
44 * along with this program; if not, write to the Free Software
45 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
46 */
47#include <linux/kernel.h>
48#include <linux/start_kernel.h>
49#include <linux/string.h>
50#include <linux/console.h>
51#include <linux/screen_info.h>
52#include <linux/irq.h>
53#include <linux/interrupt.h>
d7e28ffe
RR
54#include <linux/clocksource.h>
55#include <linux/clockchips.h>
07ad157f
RR
56#include <linux/lguest.h>
57#include <linux/lguest_launcher.h>
58#include <linux/lguest_bus.h>
59#include <asm/paravirt.h>
60#include <asm/param.h>
61#include <asm/page.h>
62#include <asm/pgtable.h>
63#include <asm/desc.h>
64#include <asm/setup.h>
65#include <asm/e820.h>
66#include <asm/mce.h>
67#include <asm/io.h>
68
b2b47c21
RR
69/*G:010 Welcome to the Guest!
70 *
71 * The Guest in our tale is a simple creature: identical to the Host but
72 * behaving in simplified but equivalent ways. In particular, the Guest is the
73 * same kernel as the Host (or at least, built from the same source code). :*/
74
07ad157f
RR
75/* Declarations for definitions in lguest_guest.S */
76extern char lguest_noirq_start[], lguest_noirq_end[];
77extern const char lgstart_cli[], lgend_cli[];
78extern const char lgstart_sti[], lgend_sti[];
79extern const char lgstart_popf[], lgend_popf[];
80extern const char lgstart_pushf[], lgend_pushf[];
81extern const char lgstart_iret[], lgend_iret[];
82extern void lguest_iret(void);
83
84struct lguest_data lguest_data = {
85 .hcall_status = { [0 ... LHCALL_RING_SIZE-1] = 0xFF },
86 .noirq_start = (u32)lguest_noirq_start,
87 .noirq_end = (u32)lguest_noirq_end,
88 .blocked_interrupts = { 1 }, /* Block timer interrupts */
89};
90struct lguest_device_desc *lguest_devices;
9d1ca6f1 91static cycle_t clock_base;
07ad157f 92
b2b47c21
RR
93/*G:035 Notice the lazy_hcall() above, rather than hcall(). This is our first
94 * real optimization trick!
95 *
96 * When lazy_mode is set, it means we're allowed to defer all hypercalls and do
97 * them as a batch when lazy_mode is eventually turned off. Because hypercalls
98 * are reasonably expensive, batching them up makes sense. For example, a
99 * large mmap might update dozens of page table entries: that code calls
100 * lguest_lazy_mode(PARAVIRT_LAZY_MMU), does the dozen updates, then calls
101 * lguest_lazy_mode(PARAVIRT_LAZY_NONE).
102 *
103 * So, when we're in lazy mode, we call async_hypercall() to store the call for
104 * future processing. When lazy mode is turned off we issue a hypercall to
105 * flush the stored calls.
106 *
107 * There's also a hack where "mode" is set to "PARAVIRT_LAZY_FLUSH" which
108 * indicates we're to flush any outstanding calls immediately. This is used
109 * when an interrupt handler does a kmap_atomic(): the page table changes must
110 * happen immediately even if we're in the middle of a batch. Usually we're
111 * not, though, so there's nothing to do. */
112static enum paravirt_lazy_mode lazy_mode; /* Note: not SMP-safe! */
07ad157f
RR
113static void lguest_lazy_mode(enum paravirt_lazy_mode mode)
114{
115 if (mode == PARAVIRT_LAZY_FLUSH) {
116 if (unlikely(lazy_mode != PARAVIRT_LAZY_NONE))
117 hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0);
118 } else {
119 lazy_mode = mode;
120 if (mode == PARAVIRT_LAZY_NONE)
121 hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0);
122 }
123}
124
125static void lazy_hcall(unsigned long call,
126 unsigned long arg1,
127 unsigned long arg2,
128 unsigned long arg3)
129{
130 if (lazy_mode == PARAVIRT_LAZY_NONE)
131 hcall(call, arg1, arg2, arg3);
132 else
133 async_hcall(call, arg1, arg2, arg3);
134}
135
b2b47c21
RR
136/* async_hcall() is pretty simple: I'm quite proud of it really. We have a
137 * ring buffer of stored hypercalls which the Host will run though next time we
138 * do a normal hypercall. Each entry in the ring has 4 slots for the hypercall
139 * arguments, and a "hcall_status" word which is 0 if the call is ready to go,
140 * and 255 once the Host has finished with it.
141 *
142 * If we come around to a slot which hasn't been finished, then the table is
143 * full and we just make the hypercall directly. This has the nice side
144 * effect of causing the Host to run all the stored calls in the ring buffer
145 * which empties it for next time! */
07ad157f
RR
146void async_hcall(unsigned long call,
147 unsigned long arg1, unsigned long arg2, unsigned long arg3)
148{
149 /* Note: This code assumes we're uniprocessor. */
150 static unsigned int next_call;
151 unsigned long flags;
152
b2b47c21
RR
153 /* Disable interrupts if not already disabled: we don't want an
154 * interrupt handler making a hypercall while we're already doing
155 * one! */
07ad157f
RR
156 local_irq_save(flags);
157 if (lguest_data.hcall_status[next_call] != 0xFF) {
158 /* Table full, so do normal hcall which will flush table. */
159 hcall(call, arg1, arg2, arg3);
160 } else {
161 lguest_data.hcalls[next_call].eax = call;
162 lguest_data.hcalls[next_call].edx = arg1;
163 lguest_data.hcalls[next_call].ebx = arg2;
164 lguest_data.hcalls[next_call].ecx = arg3;
b2b47c21 165 /* Arguments must all be written before we mark it to go */
07ad157f
RR
166 wmb();
167 lguest_data.hcall_status[next_call] = 0;
168 if (++next_call == LHCALL_RING_SIZE)
169 next_call = 0;
170 }
171 local_irq_restore(flags);
172}
b2b47c21 173/*:*/
07ad157f 174
b2b47c21
RR
175/* Wrappers for the SEND_DMA and BIND_DMA hypercalls. This is mainly because
176 * Jeff Garzik complained that __pa() should never appear in drivers, and this
177 * helps remove most of them. But also, it wraps some ugliness. */
07ad157f
RR
178void lguest_send_dma(unsigned long key, struct lguest_dma *dma)
179{
b2b47c21 180 /* The hcall might not write this if something goes wrong */
07ad157f
RR
181 dma->used_len = 0;
182 hcall(LHCALL_SEND_DMA, key, __pa(dma), 0);
183}
184
185int lguest_bind_dma(unsigned long key, struct lguest_dma *dmas,
186 unsigned int num, u8 irq)
187{
b2b47c21
RR
188 /* This is the only hypercall which actually wants 5 arguments, and we
189 * only support 4. Fortunately the interrupt number is always less
190 * than 256, so we can pack it with the number of dmas in the final
191 * argument. */
07ad157f
RR
192 if (!hcall(LHCALL_BIND_DMA, key, __pa(dmas), (num << 8) | irq))
193 return -ENOMEM;
194 return 0;
195}
196
b2b47c21 197/* Unbinding is the same hypercall as binding, but with 0 num & irq. */
07ad157f
RR
198void lguest_unbind_dma(unsigned long key, struct lguest_dma *dmas)
199{
200 hcall(LHCALL_BIND_DMA, key, __pa(dmas), 0);
201}
202
203/* For guests, device memory can be used as normal memory, so we cast away the
204 * __iomem to quieten sparse. */
205void *lguest_map(unsigned long phys_addr, unsigned long pages)
206{
207 return (__force void *)ioremap(phys_addr, PAGE_SIZE*pages);
208}
209
210void lguest_unmap(void *addr)
211{
212 iounmap((__force void __iomem *)addr);
213}
214
b2b47c21
RR
215/*G:033
216 * Here are our first native-instruction replacements: four functions for
217 * interrupt control.
218 *
219 * The simplest way of implementing these would be to have "turn interrupts
220 * off" and "turn interrupts on" hypercalls. Unfortunately, this is too slow:
221 * these are by far the most commonly called functions of those we override.
222 *
223 * So instead we keep an "irq_enabled" field inside our "struct lguest_data",
224 * which the Guest can update with a single instruction. The Host knows to
225 * check there when it wants to deliver an interrupt.
226 */
227
228/* save_flags() is expected to return the processor state (ie. "eflags"). The
229 * eflags word contains all kind of stuff, but in practice Linux only cares
230 * about the interrupt flag. Our "save_flags()" just returns that. */
07ad157f
RR
231static unsigned long save_fl(void)
232{
233 return lguest_data.irq_enabled;
234}
235
b2b47c21 236/* "restore_flags" just sets the flags back to the value given. */
07ad157f
RR
237static void restore_fl(unsigned long flags)
238{
07ad157f
RR
239 lguest_data.irq_enabled = flags;
240}
241
b2b47c21 242/* Interrupts go off... */
07ad157f
RR
243static void irq_disable(void)
244{
245 lguest_data.irq_enabled = 0;
246}
247
b2b47c21 248/* Interrupts go on... */
07ad157f
RR
249static void irq_enable(void)
250{
07ad157f
RR
251 lguest_data.irq_enabled = X86_EFLAGS_IF;
252}
f56a384e
RR
253/*:*/
254/*M:003 Note that we don't check for outstanding interrupts when we re-enable
255 * them (or when we unmask an interrupt). This seems to work for the moment,
256 * since interrupts are rare and we'll just get the interrupt on the next timer
257 * tick, but when we turn on CONFIG_NO_HZ, we should revisit this. One way
258 * would be to put the "irq_enabled" field in a page by itself, and have the
259 * Host write-protect it when an interrupt comes in when irqs are disabled.
260 * There will then be a page fault as soon as interrupts are re-enabled. :*/
07ad157f 261
b2b47c21
RR
262/*G:034
263 * The Interrupt Descriptor Table (IDT).
264 *
265 * The IDT tells the processor what to do when an interrupt comes in. Each
266 * entry in the table is a 64-bit descriptor: this holds the privilege level,
267 * address of the handler, and... well, who cares? The Guest just asks the
268 * Host to make the change anyway, because the Host controls the real IDT.
269 */
07ad157f
RR
270static void lguest_write_idt_entry(struct desc_struct *dt,
271 int entrynum, u32 low, u32 high)
272{
b2b47c21 273 /* Keep the local copy up to date. */
07ad157f 274 write_dt_entry(dt, entrynum, low, high);
b2b47c21 275 /* Tell Host about this new entry. */
07ad157f
RR
276 hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, low, high);
277}
278
b2b47c21
RR
279/* Changing to a different IDT is very rare: we keep the IDT up-to-date every
280 * time it is written, so we can simply loop through all entries and tell the
281 * Host about them. */
07ad157f
RR
282static void lguest_load_idt(const struct Xgt_desc_struct *desc)
283{
284 unsigned int i;
285 struct desc_struct *idt = (void *)desc->address;
286
287 for (i = 0; i < (desc->size+1)/8; i++)
288 hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
289}
290
b2b47c21
RR
291/*
292 * The Global Descriptor Table.
293 *
294 * The Intel architecture defines another table, called the Global Descriptor
295 * Table (GDT). You tell the CPU where it is (and its size) using the "lgdt"
296 * instruction, and then several other instructions refer to entries in the
297 * table. There are three entries which the Switcher needs, so the Host simply
298 * controls the entire thing and the Guest asks it to make changes using the
299 * LOAD_GDT hypercall.
300 *
301 * This is the opposite of the IDT code where we have a LOAD_IDT_ENTRY
302 * hypercall and use that repeatedly to load a new IDT. I don't think it
303 * really matters, but wouldn't it be nice if they were the same?
304 */
07ad157f
RR
305static void lguest_load_gdt(const struct Xgt_desc_struct *desc)
306{
307 BUG_ON((desc->size+1)/8 != GDT_ENTRIES);
308 hcall(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES, 0);
309}
310
b2b47c21
RR
311/* For a single GDT entry which changes, we do the lazy thing: alter our GDT,
312 * then tell the Host to reload the entire thing. This operation is so rare
313 * that this naive implementation is reasonable. */
07ad157f
RR
314static void lguest_write_gdt_entry(struct desc_struct *dt,
315 int entrynum, u32 low, u32 high)
316{
317 write_dt_entry(dt, entrynum, low, high);
318 hcall(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES, 0);
319}
320
b2b47c21
RR
321/* OK, I lied. There are three "thread local storage" GDT entries which change
322 * on every context switch (these three entries are how glibc implements
323 * __thread variables). So we have a hypercall specifically for this case. */
07ad157f
RR
324static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
325{
326 lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0);
327}
b2b47c21 328/*:*/
07ad157f 329
b2b47c21
RR
330/*G:038 That's enough excitement for now, back to ploughing through each of
331 * the paravirt_ops (we're about 1/3 of the way through).
332 *
333 * This is the Local Descriptor Table, another weird Intel thingy. Linux only
334 * uses this for some strange applications like Wine. We don't do anything
335 * here, so they'll get an informative and friendly Segmentation Fault. */
07ad157f
RR
336static void lguest_set_ldt(const void *addr, unsigned entries)
337{
338}
339
b2b47c21
RR
340/* This loads a GDT entry into the "Task Register": that entry points to a
341 * structure called the Task State Segment. Some comments scattered though the
342 * kernel code indicate that this used for task switching in ages past, along
343 * with blood sacrifice and astrology.
344 *
345 * Now there's nothing interesting in here that we don't get told elsewhere.
346 * But the native version uses the "ltr" instruction, which makes the Host
347 * complain to the Guest about a Segmentation Fault and it'll oops. So we
348 * override the native version with a do-nothing version. */
07ad157f
RR
349static void lguest_load_tr_desc(void)
350{
351}
352
b2b47c21
RR
353/* The "cpuid" instruction is a way of querying both the CPU identity
354 * (manufacturer, model, etc) and its features. It was introduced before the
355 * Pentium in 1993 and keeps getting extended by both Intel and AMD. As you
356 * might imagine, after a decade and a half this treatment, it is now a giant
357 * ball of hair. Its entry in the current Intel manual runs to 28 pages.
358 *
359 * This instruction even it has its own Wikipedia entry. The Wikipedia entry
360 * has been translated into 4 languages. I am not making this up!
361 *
362 * We could get funky here and identify ourselves as "GenuineLguest", but
363 * instead we just use the real "cpuid" instruction. Then I pretty much turned
364 * off feature bits until the Guest booted. (Don't say that: you'll damage
365 * lguest sales!) Shut up, inner voice! (Hey, just pointing out that this is
366 * hardly future proof.) Noone's listening! They don't like you anyway,
367 * parenthetic weirdo!
368 *
369 * Replacing the cpuid so we can turn features off is great for the kernel, but
370 * anyone (including userspace) can just use the raw "cpuid" instruction and
371 * the Host won't even notice since it isn't privileged. So we try not to get
372 * too worked up about it. */
07ad157f
RR
373static void lguest_cpuid(unsigned int *eax, unsigned int *ebx,
374 unsigned int *ecx, unsigned int *edx)
375{
376 int function = *eax;
377
378 native_cpuid(eax, ebx, ecx, edx);
379 switch (function) {
380 case 1: /* Basic feature request. */
381 /* We only allow kernel to see SSE3, CMPXCHG16B and SSSE3 */
382 *ecx &= 0x00002201;
d7e28ffe 383 /* SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, FPU. */
07ad157f 384 *edx &= 0x07808101;
b2b47c21
RR
385 /* The Host can do a nice optimization if it knows that the
386 * kernel mappings (addresses above 0xC0000000 or whatever
387 * PAGE_OFFSET is set to) haven't changed. But Linux calls
388 * flush_tlb_user() for both user and kernel mappings unless
389 * the Page Global Enable (PGE) feature bit is set. */
07ad157f
RR
390 *edx |= 0x00002000;
391 break;
392 case 0x80000000:
393 /* Futureproof this a little: if they ask how much extended
b2b47c21 394 * processor information there is, limit it to known fields. */
07ad157f
RR
395 if (*eax > 0x80000008)
396 *eax = 0x80000008;
397 break;
398 }
399}
400
b2b47c21
RR
401/* Intel has four control registers, imaginatively named cr0, cr2, cr3 and cr4.
402 * I assume there's a cr1, but it hasn't bothered us yet, so we'll not bother
403 * it. The Host needs to know when the Guest wants to change them, so we have
404 * a whole series of functions like read_cr0() and write_cr0().
405 *
406 * We start with CR0. CR0 allows you to turn on and off all kinds of basic
407 * features, but Linux only really cares about one: the horrifically-named Task
408 * Switched (TS) bit at bit 3 (ie. 8)
409 *
410 * What does the TS bit do? Well, it causes the CPU to trap (interrupt 7) if
411 * the floating point unit is used. Which allows us to restore FPU state
412 * lazily after a task switch, and Linux uses that gratefully, but wouldn't a
413 * name like "FPUTRAP bit" be a little less cryptic?
414 *
415 * We store cr0 (and cr3) locally, because the Host never changes it. The
416 * Guest sometimes wants to read it and we'd prefer not to bother the Host
417 * unnecessarily. */
07ad157f
RR
418static unsigned long current_cr0, current_cr3;
419static void lguest_write_cr0(unsigned long val)
420{
b2b47c21 421 /* 8 == TS bit. */
07ad157f
RR
422 lazy_hcall(LHCALL_TS, val & 8, 0, 0);
423 current_cr0 = val;
424}
425
426static unsigned long lguest_read_cr0(void)
427{
428 return current_cr0;
429}
430
b2b47c21
RR
431/* Intel provided a special instruction to clear the TS bit for people too cool
432 * to use write_cr0() to do it. This "clts" instruction is faster, because all
433 * the vowels have been optimized out. */
07ad157f
RR
434static void lguest_clts(void)
435{
436 lazy_hcall(LHCALL_TS, 0, 0, 0);
437 current_cr0 &= ~8U;
438}
439
b2b47c21
RR
440/* CR2 is the virtual address of the last page fault, which the Guest only ever
441 * reads. The Host kindly writes this into our "struct lguest_data", so we
442 * just read it out of there. */
07ad157f
RR
443static unsigned long lguest_read_cr2(void)
444{
445 return lguest_data.cr2;
446}
447
b2b47c21
RR
448/* CR3 is the current toplevel pagetable page: the principle is the same as
449 * cr0. Keep a local copy, and tell the Host when it changes. */
07ad157f
RR
450static void lguest_write_cr3(unsigned long cr3)
451{
452 lazy_hcall(LHCALL_NEW_PGTABLE, cr3, 0, 0);
453 current_cr3 = cr3;
454}
455
456static unsigned long lguest_read_cr3(void)
457{
458 return current_cr3;
459}
460
b2b47c21 461/* CR4 is used to enable and disable PGE, but we don't care. */
07ad157f
RR
462static unsigned long lguest_read_cr4(void)
463{
464 return 0;
465}
466
467static void lguest_write_cr4(unsigned long val)
468{
469}
470
b2b47c21
RR
471/*
472 * Page Table Handling.
473 *
474 * Now would be a good time to take a rest and grab a coffee or similarly
475 * relaxing stimulant. The easy parts are behind us, and the trek gradually
476 * winds uphill from here.
477 *
478 * Quick refresher: memory is divided into "pages" of 4096 bytes each. The CPU
479 * maps virtual addresses to physical addresses using "page tables". We could
480 * use one huge index of 1 million entries: each address is 4 bytes, so that's
481 * 1024 pages just to hold the page tables. But since most virtual addresses
482 * are unused, we use a two level index which saves space. The CR3 register
483 * contains the physical address of the top level "page directory" page, which
484 * contains physical addresses of up to 1024 second-level pages. Each of these
485 * second level pages contains up to 1024 physical addresses of actual pages,
486 * or Page Table Entries (PTEs).
487 *
488 * Here's a diagram, where arrows indicate physical addresses:
489 *
490 * CR3 ---> +---------+
491 * | --------->+---------+
492 * | | | PADDR1 |
493 * Top-level | | PADDR2 |
494 * (PMD) page | | |
495 * | | Lower-level |
496 * | | (PTE) page |
497 * | | | |
498 * .... ....
499 *
500 * So to convert a virtual address to a physical address, we look up the top
501 * level, which points us to the second level, which gives us the physical
502 * address of that page. If the top level entry was not present, or the second
503 * level entry was not present, then the virtual address is invalid (we
504 * say "the page was not mapped").
505 *
506 * Put another way, a 32-bit virtual address is divided up like so:
507 *
508 * 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
509 * |<---- 10 bits ---->|<---- 10 bits ---->|<------ 12 bits ------>|
510 * Index into top Index into second Offset within page
511 * page directory page pagetable page
512 *
513 * The kernel spends a lot of time changing both the top-level page directory
514 * and lower-level pagetable pages. The Guest doesn't know physical addresses,
515 * so while it maintains these page tables exactly like normal, it also needs
516 * to keep the Host informed whenever it makes a change: the Host will create
517 * the real page tables based on the Guests'.
518 */
519
520/* The Guest calls this to set a second-level entry (pte), ie. to map a page
521 * into a process' address space. We set the entry then tell the Host the
522 * toplevel and address this corresponds to. The Guest uses one pagetable per
523 * process, so we need to tell the Host which one we're changing (mm->pgd). */
07ad157f
RR
524static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
525 pte_t *ptep, pte_t pteval)
526{
527 *ptep = pteval;
528 lazy_hcall(LHCALL_SET_PTE, __pa(mm->pgd), addr, pteval.pte_low);
529}
530
b2b47c21
RR
531/* The Guest calls this to set a top-level entry. Again, we set the entry then
532 * tell the Host which top-level page we changed, and the index of the entry we
533 * changed. */
07ad157f
RR
534static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
535{
536 *pmdp = pmdval;
537 lazy_hcall(LHCALL_SET_PMD, __pa(pmdp)&PAGE_MASK,
538 (__pa(pmdp)&(PAGE_SIZE-1))/4, 0);
539}
540
b2b47c21
RR
541/* There are a couple of legacy places where the kernel sets a PTE, but we
542 * don't know the top level any more. This is useless for us, since we don't
543 * know which pagetable is changing or what address, so we just tell the Host
544 * to forget all of them. Fortunately, this is very rare.
545 *
546 * ... except in early boot when the kernel sets up the initial pagetables,
547 * which makes booting astonishingly slow. So we don't even tell the Host
548 * anything changed until we've done the first page table switch.
549 */
07ad157f
RR
550static void lguest_set_pte(pte_t *ptep, pte_t pteval)
551{
552 *ptep = pteval;
553 /* Don't bother with hypercall before initial setup. */
554 if (current_cr3)
555 lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
556}
557
b2b47c21
RR
558/* Unfortunately for Lguest, the paravirt_ops for page tables were based on
559 * native page table operations. On native hardware you can set a new page
560 * table entry whenever you want, but if you want to remove one you have to do
561 * a TLB flush (a TLB is a little cache of page table entries kept by the CPU).
562 *
563 * So the lguest_set_pte_at() and lguest_set_pmd() functions above are only
564 * called when a valid entry is written, not when it's removed (ie. marked not
565 * present). Instead, this is where we come when the Guest wants to remove a
566 * page table entry: we tell the Host to set that entry to 0 (ie. the present
567 * bit is zero). */
07ad157f
RR
568static void lguest_flush_tlb_single(unsigned long addr)
569{
b2b47c21 570 /* Simply set it to zero: if it was not, it will fault back in. */
07ad157f
RR
571 lazy_hcall(LHCALL_SET_PTE, current_cr3, addr, 0);
572}
573
b2b47c21
RR
574/* This is what happens after the Guest has removed a large number of entries.
575 * This tells the Host that any of the page table entries for userspace might
576 * have changed, ie. virtual addresses below PAGE_OFFSET. */
07ad157f
RR
577static void lguest_flush_tlb_user(void)
578{
579 lazy_hcall(LHCALL_FLUSH_TLB, 0, 0, 0);
580}
581
b2b47c21
RR
582/* This is called when the kernel page tables have changed. That's not very
583 * common (unless the Guest is using highmem, which makes the Guest extremely
584 * slow), so it's worth separating this from the user flushing above. */
07ad157f
RR
585static void lguest_flush_tlb_kernel(void)
586{
587 lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
588}
589
b2b47c21
RR
590/*
591 * The Unadvanced Programmable Interrupt Controller.
592 *
593 * This is an attempt to implement the simplest possible interrupt controller.
594 * I spent some time looking though routines like set_irq_chip_and_handler,
595 * set_irq_chip_and_handler_name, set_irq_chip_data and set_phasers_to_stun and
596 * I *think* this is as simple as it gets.
597 *
598 * We can tell the Host what interrupts we want blocked ready for using the
599 * lguest_data.interrupts bitmap, so disabling (aka "masking") them is as
600 * simple as setting a bit. We don't actually "ack" interrupts as such, we
601 * just mask and unmask them. I wonder if we should be cleverer?
602 */
07ad157f
RR
603static void disable_lguest_irq(unsigned int irq)
604{
605 set_bit(irq, lguest_data.blocked_interrupts);
606}
607
608static void enable_lguest_irq(unsigned int irq)
609{
610 clear_bit(irq, lguest_data.blocked_interrupts);
07ad157f
RR
611}
612
b2b47c21 613/* This structure describes the lguest IRQ controller. */
07ad157f
RR
614static struct irq_chip lguest_irq_controller = {
615 .name = "lguest",
616 .mask = disable_lguest_irq,
617 .mask_ack = disable_lguest_irq,
618 .unmask = enable_lguest_irq,
619};
620
b2b47c21
RR
621/* This sets up the Interrupt Descriptor Table (IDT) entry for each hardware
622 * interrupt (except 128, which is used for system calls), and then tells the
623 * Linux infrastructure that each interrupt is controlled by our level-based
624 * lguest interrupt controller. */
07ad157f
RR
625static void __init lguest_init_IRQ(void)
626{
627 unsigned int i;
628
629 for (i = 0; i < LGUEST_IRQS; i++) {
630 int vector = FIRST_EXTERNAL_VECTOR + i;
631 if (vector != SYSCALL_VECTOR) {
632 set_intr_gate(vector, interrupt[i]);
633 set_irq_chip_and_handler(i, &lguest_irq_controller,
634 handle_level_irq);
635 }
636 }
b2b47c21
RR
637 /* This call is required to set up for 4k stacks, where we have
638 * separate stacks for hard and soft interrupts. */
07ad157f
RR
639 irq_ctx_init(smp_processor_id());
640}
641
b2b47c21
RR
642/*
643 * Time.
644 *
645 * It would be far better for everyone if the Guest had its own clock, but
6c8dca5d 646 * until then the Host gives us the time on every interrupt.
b2b47c21 647 */
07ad157f
RR
648static unsigned long lguest_get_wallclock(void)
649{
6c8dca5d 650 return lguest_data.time.tv_sec;
07ad157f
RR
651}
652
d7e28ffe
RR
653static cycle_t lguest_clock_read(void)
654{
6c8dca5d
RR
655 unsigned long sec, nsec;
656
657 /* If the Host tells the TSC speed, we can trust that. */
d7e28ffe
RR
658 if (lguest_data.tsc_khz)
659 return native_read_tsc();
6c8dca5d
RR
660
661 /* If we can't use the TSC, we read the time value written by the Host.
662 * Since it's in two parts (seconds and nanoseconds), we risk reading
663 * it just as it's changing from 99 & 0.999999999 to 100 and 0, and
664 * getting 99 and 0. As Linux tends to come apart under the stress of
665 * time travel, we must be careful: */
666 do {
667 /* First we read the seconds part. */
668 sec = lguest_data.time.tv_sec;
669 /* This read memory barrier tells the compiler and the CPU that
670 * this can't be reordered: we have to complete the above
671 * before going on. */
672 rmb();
673 /* Now we read the nanoseconds part. */
674 nsec = lguest_data.time.tv_nsec;
675 /* Make sure we've done that. */
676 rmb();
677 /* Now if the seconds part has changed, try again. */
678 } while (unlikely(lguest_data.time.tv_sec != sec));
679
680 /* Our non-TSC clock is in real nanoseconds. */
681 return sec*1000000000ULL + nsec;
d7e28ffe
RR
682}
683
684/* This is what we tell the kernel is our clocksource. */
685static struct clocksource lguest_clock = {
686 .name = "lguest",
687 .rating = 400,
688 .read = lguest_clock_read,
6c8dca5d
RR
689 .mask = CLOCKSOURCE_MASK(64),
690 .mult = 1,
d7e28ffe
RR
691};
692
6c8dca5d 693/* The "scheduler clock" is just our real clock, adjusted to start at zero */
9d1ca6f1
RR
694static unsigned long long lguest_sched_clock(void)
695{
696 return cyc2ns(&lguest_clock, lguest_clock_read() - clock_base);
697}
698
d7e28ffe
RR
699/* We also need a "struct clock_event_device": Linux asks us to set it to go
700 * off some time in the future. Actually, James Morris figured all this out, I
701 * just applied the patch. */
702static int lguest_clockevent_set_next_event(unsigned long delta,
703 struct clock_event_device *evt)
704{
705 if (delta < LG_CLOCK_MIN_DELTA) {
706 if (printk_ratelimit())
707 printk(KERN_DEBUG "%s: small delta %lu ns\n",
708 __FUNCTION__, delta);
709 return -ETIME;
710 }
711 hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0);
712 return 0;
713}
714
715static void lguest_clockevent_set_mode(enum clock_event_mode mode,
716 struct clock_event_device *evt)
717{
718 switch (mode) {
719 case CLOCK_EVT_MODE_UNUSED:
720 case CLOCK_EVT_MODE_SHUTDOWN:
721 /* A 0 argument shuts the clock down. */
722 hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0);
723 break;
724 case CLOCK_EVT_MODE_ONESHOT:
725 /* This is what we expect. */
726 break;
727 case CLOCK_EVT_MODE_PERIODIC:
728 BUG();
18de5bc4
TG
729 case CLOCK_EVT_MODE_RESUME:
730 break;
d7e28ffe
RR
731 }
732}
733
734/* This describes our primitive timer chip. */
735static struct clock_event_device lguest_clockevent = {
736 .name = "lguest",
737 .features = CLOCK_EVT_FEAT_ONESHOT,
738 .set_next_event = lguest_clockevent_set_next_event,
739 .set_mode = lguest_clockevent_set_mode,
740 .rating = INT_MAX,
741 .mult = 1,
742 .shift = 0,
743 .min_delta_ns = LG_CLOCK_MIN_DELTA,
744 .max_delta_ns = LG_CLOCK_MAX_DELTA,
745};
746
747/* This is the Guest timer interrupt handler (hardware interrupt 0). We just
748 * call the clockevent infrastructure and it does whatever needs doing. */
07ad157f
RR
749static void lguest_time_irq(unsigned int irq, struct irq_desc *desc)
750{
d7e28ffe
RR
751 unsigned long flags;
752
753 /* Don't interrupt us while this is running. */
754 local_irq_save(flags);
755 lguest_clockevent.event_handler(&lguest_clockevent);
756 local_irq_restore(flags);
07ad157f
RR
757}
758
b2b47c21
RR
759/* At some point in the boot process, we get asked to set up our timing
760 * infrastructure. The kernel doesn't expect timer interrupts before this, but
761 * we cleverly initialized the "blocked_interrupts" field of "struct
762 * lguest_data" so that timer interrupts were blocked until now. */
07ad157f
RR
763static void lguest_time_init(void)
764{
b2b47c21 765 /* Set up the timer interrupt (0) to go to our simple timer routine */
07ad157f 766 set_irq_handler(0, lguest_time_irq);
07ad157f 767
b2b47c21 768 /* Our clock structure look like arch/i386/kernel/tsc.c if we can use
6c8dca5d
RR
769 * the TSC, otherwise it's a dumb nanosecond-resolution clock. Either
770 * way, the "rating" is initialized so high that it's always chosen
771 * over any other clocksource. */
d7e28ffe
RR
772 if (lguest_data.tsc_khz) {
773 lguest_clock.shift = 22;
774 lguest_clock.mult = clocksource_khz2mult(lguest_data.tsc_khz,
775 lguest_clock.shift);
d7e28ffe 776 lguest_clock.flags = CLOCK_SOURCE_IS_CONTINUOUS;
d7e28ffe 777 }
9d1ca6f1 778 clock_base = lguest_clock_read();
d7e28ffe
RR
779 clocksource_register(&lguest_clock);
780
6c8dca5d
RR
781 /* Now we've set up our clock, we can use it as the scheduler clock */
782 paravirt_ops.sched_clock = lguest_sched_clock;
783
b2b47c21
RR
784 /* We can't set cpumask in the initializer: damn C limitations! Set it
785 * here and register our timer device. */
d7e28ffe
RR
786 lguest_clockevent.cpumask = cpumask_of_cpu(0);
787 clockevents_register_device(&lguest_clockevent);
788
b2b47c21 789 /* Finally, we unblock the timer interrupt. */
d7e28ffe 790 enable_lguest_irq(0);
07ad157f
RR
791}
792
b2b47c21
RR
793/*
794 * Miscellaneous bits and pieces.
795 *
796 * Here is an oddball collection of functions which the Guest needs for things
797 * to work. They're pretty simple.
798 */
799
800/* The Guest needs to tell the host what stack it expects traps to use. For
801 * native hardware, this is part of the Task State Segment mentioned above in
802 * lguest_load_tr_desc(), but to help hypervisors there's this special call.
803 *
804 * We tell the Host the segment we want to use (__KERNEL_DS is the kernel data
805 * segment), the privilege level (we're privilege level 1, the Host is 0 and
806 * will not tolerate us trying to use that), the stack pointer, and the number
807 * of pages in the stack. */
07ad157f
RR
808static void lguest_load_esp0(struct tss_struct *tss,
809 struct thread_struct *thread)
810{
811 lazy_hcall(LHCALL_SET_STACK, __KERNEL_DS|0x1, thread->esp0,
812 THREAD_SIZE/PAGE_SIZE);
813}
814
b2b47c21 815/* Let's just say, I wouldn't do debugging under a Guest. */
07ad157f
RR
816static void lguest_set_debugreg(int regno, unsigned long value)
817{
818 /* FIXME: Implement */
819}
820
b2b47c21
RR
821/* There are times when the kernel wants to make sure that no memory writes are
822 * caught in the cache (that they've all reached real hardware devices). This
823 * doesn't matter for the Guest which has virtual hardware.
824 *
825 * On the Pentium 4 and above, cpuid() indicates that the Cache Line Flush
826 * (clflush) instruction is available and the kernel uses that. Otherwise, it
827 * uses the older "Write Back and Invalidate Cache" (wbinvd) instruction.
828 * Unlike clflush, wbinvd can only be run at privilege level 0. So we can
829 * ignore clflush, but replace wbinvd.
830 */
07ad157f
RR
831static void lguest_wbinvd(void)
832{
833}
834
b2b47c21
RR
835/* If the Guest expects to have an Advanced Programmable Interrupt Controller,
836 * we play dumb by ignoring writes and returning 0 for reads. So it's no
837 * longer Programmable nor Controlling anything, and I don't think 8 lines of
838 * code qualifies for Advanced. It will also never interrupt anything. It
839 * does, however, allow us to get through the Linux boot code. */
07ad157f
RR
840#ifdef CONFIG_X86_LOCAL_APIC
841static void lguest_apic_write(unsigned long reg, unsigned long v)
842{
843}
844
845static unsigned long lguest_apic_read(unsigned long reg)
846{
847 return 0;
848}
849#endif
850
b2b47c21 851/* STOP! Until an interrupt comes in. */
07ad157f
RR
852static void lguest_safe_halt(void)
853{
854 hcall(LHCALL_HALT, 0, 0, 0);
855}
856
b2b47c21
RR
857/* Perhaps CRASH isn't the best name for this hypercall, but we use it to get a
858 * message out when we're crashing as well as elegant termination like powering
859 * off.
860 *
861 * Note that the Host always prefers that the Guest speak in physical addresses
862 * rather than virtual addresses, so we use __pa() here. */
07ad157f
RR
863static void lguest_power_off(void)
864{
865 hcall(LHCALL_CRASH, __pa("Power down"), 0, 0);
866}
867
b2b47c21
RR
868/*
869 * Panicing.
870 *
871 * Don't. But if you did, this is what happens.
872 */
07ad157f
RR
873static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
874{
875 hcall(LHCALL_CRASH, __pa(p), 0, 0);
b2b47c21 876 /* The hcall won't return, but to keep gcc happy, we're "done". */
07ad157f
RR
877 return NOTIFY_DONE;
878}
879
880static struct notifier_block paniced = {
881 .notifier_call = lguest_panic
882};
883
b2b47c21 884/* Setting up memory is fairly easy. */
07ad157f
RR
885static __init char *lguest_memory_setup(void)
886{
b2b47c21
RR
887 /* We do this here and not earlier because lockcheck barfs if we do it
888 * before start_kernel() */
07ad157f
RR
889 atomic_notifier_chain_register(&panic_notifier_list, &paniced);
890
b2b47c21
RR
891 /* The Linux bootloader header contains an "e820" memory map: the
892 * Launcher populated the first entry with our memory limit. */
d7e28ffe 893 add_memory_region(E820_MAP->addr, E820_MAP->size, E820_MAP->type);
b2b47c21
RR
894
895 /* This string is for the boot messages. */
07ad157f
RR
896 return "LGUEST";
897}
898
b2b47c21
RR
899/*G:050
900 * Patching (Powerfully Placating Performance Pedants)
901 *
902 * We have already seen that "struct paravirt_ops" lets us replace simple
903 * native instructions with calls to the appropriate back end all throughout
904 * the kernel. This allows the same kernel to run as a Guest and as a native
905 * kernel, but it's slow because of all the indirect branches.
906 *
907 * Remember that David Wheeler quote about "Any problem in computer science can
908 * be solved with another layer of indirection"? The rest of that quote is
909 * "... But that usually will create another problem." This is the first of
910 * those problems.
911 *
912 * Our current solution is to allow the paravirt back end to optionally patch
913 * over the indirect calls to replace them with something more efficient. We
914 * patch the four most commonly called functions: disable interrupts, enable
915 * interrupts, restore interrupts and save interrupts. We usually have 10
916 * bytes to patch into: the Guest versions of these operations are small enough
917 * that we can fit comfortably.
918 *
919 * First we need assembly templates of each of the patchable Guest operations,
920 * and these are in lguest_asm.S. */
921
922/*G:060 We construct a table from the assembler templates: */
07ad157f
RR
923static const struct lguest_insns
924{
925 const char *start, *end;
926} lguest_insns[] = {
927 [PARAVIRT_PATCH(irq_disable)] = { lgstart_cli, lgend_cli },
928 [PARAVIRT_PATCH(irq_enable)] = { lgstart_sti, lgend_sti },
929 [PARAVIRT_PATCH(restore_fl)] = { lgstart_popf, lgend_popf },
930 [PARAVIRT_PATCH(save_fl)] = { lgstart_pushf, lgend_pushf },
931};
b2b47c21
RR
932
933/* Now our patch routine is fairly simple (based on the native one in
934 * paravirt.c). If we have a replacement, we copy it in and return how much of
935 * the available space we used. */
07ad157f
RR
936static unsigned lguest_patch(u8 type, u16 clobber, void *insns, unsigned len)
937{
938 unsigned int insn_len;
939
b2b47c21 940 /* Don't do anything special if we don't have a replacement */
07ad157f
RR
941 if (type >= ARRAY_SIZE(lguest_insns) || !lguest_insns[type].start)
942 return paravirt_patch_default(type, clobber, insns, len);
943
944 insn_len = lguest_insns[type].end - lguest_insns[type].start;
945
b2b47c21
RR
946 /* Similarly if we can't fit replacement (shouldn't happen, but let's
947 * be thorough). */
07ad157f
RR
948 if (len < insn_len)
949 return paravirt_patch_default(type, clobber, insns, len);
950
b2b47c21 951 /* Copy in our instructions. */
07ad157f
RR
952 memcpy(insns, lguest_insns[type].start, insn_len);
953 return insn_len;
954}
955
b2b47c21
RR
956/*G:030 Once we get to lguest_init(), we know we're a Guest. The paravirt_ops
957 * structure in the kernel provides a single point for (almost) every routine
958 * we have to override to avoid privileged instructions. */
d7e28ffe 959__init void lguest_init(void *boot)
07ad157f 960{
b2b47c21
RR
961 /* Copy boot parameters first: the Launcher put the physical location
962 * in %esi, and head.S converted that to a virtual address and handed
963 * it to us. */
d7e28ffe 964 memcpy(&boot_params, boot, PARAM_SIZE);
b2b47c21
RR
965 /* The boot parameters also tell us where the command-line is: save
966 * that, too. */
d7e28ffe
RR
967 memcpy(boot_command_line, __va(boot_params.hdr.cmd_line_ptr),
968 COMMAND_LINE_SIZE);
969
b2b47c21
RR
970 /* We're under lguest, paravirt is enabled, and we're running at
971 * privilege level 1, not 0 as normal. */
07ad157f
RR
972 paravirt_ops.name = "lguest";
973 paravirt_ops.paravirt_enabled = 1;
974 paravirt_ops.kernel_rpl = 1;
975
b2b47c21
RR
976 /* We set up all the lguest overrides for sensitive operations. These
977 * are detailed with the operations themselves. */
07ad157f
RR
978 paravirt_ops.save_fl = save_fl;
979 paravirt_ops.restore_fl = restore_fl;
980 paravirt_ops.irq_disable = irq_disable;
981 paravirt_ops.irq_enable = irq_enable;
982 paravirt_ops.load_gdt = lguest_load_gdt;
983 paravirt_ops.memory_setup = lguest_memory_setup;
984 paravirt_ops.cpuid = lguest_cpuid;
985 paravirt_ops.write_cr3 = lguest_write_cr3;
986 paravirt_ops.flush_tlb_user = lguest_flush_tlb_user;
987 paravirt_ops.flush_tlb_single = lguest_flush_tlb_single;
988 paravirt_ops.flush_tlb_kernel = lguest_flush_tlb_kernel;
989 paravirt_ops.set_pte = lguest_set_pte;
990 paravirt_ops.set_pte_at = lguest_set_pte_at;
991 paravirt_ops.set_pmd = lguest_set_pmd;
992#ifdef CONFIG_X86_LOCAL_APIC
993 paravirt_ops.apic_write = lguest_apic_write;
994 paravirt_ops.apic_write_atomic = lguest_apic_write;
995 paravirt_ops.apic_read = lguest_apic_read;
996#endif
997 paravirt_ops.load_idt = lguest_load_idt;
998 paravirt_ops.iret = lguest_iret;
999 paravirt_ops.load_esp0 = lguest_load_esp0;
1000 paravirt_ops.load_tr_desc = lguest_load_tr_desc;
1001 paravirt_ops.set_ldt = lguest_set_ldt;
1002 paravirt_ops.load_tls = lguest_load_tls;
1003 paravirt_ops.set_debugreg = lguest_set_debugreg;
1004 paravirt_ops.clts = lguest_clts;
1005 paravirt_ops.read_cr0 = lguest_read_cr0;
1006 paravirt_ops.write_cr0 = lguest_write_cr0;
1007 paravirt_ops.init_IRQ = lguest_init_IRQ;
1008 paravirt_ops.read_cr2 = lguest_read_cr2;
1009 paravirt_ops.read_cr3 = lguest_read_cr3;
1010 paravirt_ops.read_cr4 = lguest_read_cr4;
1011 paravirt_ops.write_cr4 = lguest_write_cr4;
1012 paravirt_ops.write_gdt_entry = lguest_write_gdt_entry;
1013 paravirt_ops.write_idt_entry = lguest_write_idt_entry;
1014 paravirt_ops.patch = lguest_patch;
1015 paravirt_ops.safe_halt = lguest_safe_halt;
1016 paravirt_ops.get_wallclock = lguest_get_wallclock;
1017 paravirt_ops.time_init = lguest_time_init;
1018 paravirt_ops.set_lazy_mode = lguest_lazy_mode;
1019 paravirt_ops.wbinvd = lguest_wbinvd;
b2b47c21
RR
1020 /* Now is a good time to look at the implementations of these functions
1021 * before returning to the rest of lguest_init(). */
1022
1023 /*G:070 Now we've seen all the paravirt_ops, we return to
1024 * lguest_init() where the rest of the fairly chaotic boot setup
1025 * occurs.
1026 *
1027 * The Host expects our first hypercall to tell it where our "struct
1028 * lguest_data" is, so we do that first. */
07ad157f 1029 hcall(LHCALL_LGUEST_INIT, __pa(&lguest_data), 0, 0);
07ad157f 1030
b2b47c21
RR
1031 /* The native boot code sets up initial page tables immediately after
1032 * the kernel itself, and sets init_pg_tables_end so they're not
1033 * clobbered. The Launcher places our initial pagetables somewhere at
1034 * the top of our physical memory, so we don't need extra space: set
1035 * init_pg_tables_end to the end of the kernel. */
07ad157f
RR
1036 init_pg_tables_end = __pa(pg0);
1037
b2b47c21
RR
1038 /* Load the %fs segment register (the per-cpu segment register) with
1039 * the normal data segment to get through booting. */
07ad157f
RR
1040 asm volatile ("mov %0, %%fs" : : "r" (__KERNEL_DS) : "memory");
1041
a8a11f06
RR
1042 /* Clear the part of the kernel data which is expected to be zero.
1043 * Normally it will be anyway, but if we're loading from a bzImage with
1044 * CONFIG_RELOCATALE=y, the relocations will be sitting here. */
1045 memset(__bss_start, 0, __bss_stop - __bss_start);
1046
b2b47c21
RR
1047 /* The Host uses the top of the Guest's virtual address space for the
1048 * Host<->Guest Switcher, and it tells us how much it needs in
1049 * lguest_data.reserve_mem, set up on the LGUEST_INIT hypercall. */
07ad157f
RR
1050 reserve_top_address(lguest_data.reserve_mem);
1051
b2b47c21
RR
1052 /* If we don't initialize the lock dependency checker now, it crashes
1053 * paravirt_disable_iospace. */
07ad157f
RR
1054 lockdep_init();
1055
b2b47c21
RR
1056 /* The IDE code spends about 3 seconds probing for disks: if we reserve
1057 * all the I/O ports up front it can't get them and so doesn't probe.
1058 * Other device drivers are similar (but less severe). This cuts the
1059 * kernel boot time on my machine from 4.1 seconds to 0.45 seconds. */
07ad157f
RR
1060 paravirt_disable_iospace();
1061
b2b47c21
RR
1062 /* This is messy CPU setup stuff which the native boot code does before
1063 * start_kernel, so we have to do, too: */
07ad157f
RR
1064 cpu_detect(&new_cpu_data);
1065 /* head.S usually sets up the first capability word, so do it here. */
1066 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1067
1068 /* Math is always hard! */
1069 new_cpu_data.hard_math = 1;
1070
1071#ifdef CONFIG_X86_MCE
1072 mce_disabled = 1;
1073#endif
07ad157f
RR
1074#ifdef CONFIG_ACPI
1075 acpi_disabled = 1;
1076 acpi_ht = 0;
1077#endif
1078
b2b47c21
RR
1079 /* We set the perferred console to "hvc". This is the "hypervisor
1080 * virtual console" driver written by the PowerPC people, which we also
1081 * adapted for lguest's use. */
07ad157f
RR
1082 add_preferred_console("hvc", 0, NULL);
1083
b2b47c21
RR
1084 /* Last of all, we set the power management poweroff hook to point to
1085 * the Guest routine to power off. */
07ad157f 1086 pm_power_off = lguest_power_off;
b2b47c21
RR
1087
1088 /* Now we're set up, call start_kernel() in init/main.c and we proceed
1089 * to boot as normal. It never returns. */
07ad157f
RR
1090 start_kernel();
1091}
b2b47c21
RR
1092/*
1093 * This marks the end of stage II of our journey, The Guest.
1094 *
1095 * It is now time for us to explore the nooks and crannies of the three Guest
1096 * devices and complete our understanding of the Guest in "make Drivers".
1097 */
This page took 0.08187 seconds and 5 git commands to generate.