lguest: per-vcpu lguest task management
[deliverable/linux.git] / drivers / lguest / x86 / core.c
CommitLineData
625efab1
JS
1/*
2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include <linux/kernel.h>
21#include <linux/start_kernel.h>
22#include <linux/string.h>
23#include <linux/console.h>
24#include <linux/screen_info.h>
25#include <linux/irq.h>
26#include <linux/interrupt.h>
27#include <linux/clocksource.h>
28#include <linux/clockchips.h>
29#include <linux/cpu.h>
30#include <linux/lguest.h>
31#include <linux/lguest_launcher.h>
625efab1
JS
32#include <asm/paravirt.h>
33#include <asm/param.h>
34#include <asm/page.h>
35#include <asm/pgtable.h>
36#include <asm/desc.h>
37#include <asm/setup.h>
38#include <asm/lguest.h>
39#include <asm/uaccess.h>
40#include <asm/i387.h>
41#include "../lg.h"
42
43static int cpu_had_pge;
44
45static struct {
46 unsigned long offset;
47 unsigned short segment;
48} lguest_entry;
49
50/* Offset from where switcher.S was compiled to where we've copied it */
51static unsigned long switcher_offset(void)
52{
53 return SWITCHER_ADDR - (unsigned long)start_switcher_text;
54}
55
56/* This cpu's struct lguest_pages. */
57static struct lguest_pages *lguest_pages(unsigned int cpu)
58{
59 return &(((struct lguest_pages *)
60 (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
61}
62
63static DEFINE_PER_CPU(struct lguest *, last_guest);
64
65/*S:010
e1e72965 66 * We approach the Switcher.
625efab1
JS
67 *
68 * Remember that each CPU has two pages which are visible to the Guest when it
69 * runs on that CPU. This has to contain the state for that Guest: we copy the
70 * state in just before we run the Guest.
71 *
72 * Each Guest has "changed" flags which indicate what has changed in the Guest
73 * since it last ran. We saw this set in interrupts_and_traps.c and
74 * segments.c.
75 */
d0953d42 76static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
625efab1 77{
d0953d42 78 struct lguest *lg = cpu->lg;
625efab1
JS
79 /* Copying all this data can be quite expensive. We usually run the
80 * same Guest we ran last time (and that Guest hasn't run anywhere else
81 * meanwhile). If that's not the case, we pretend everything in the
82 * Guest has changed. */
83 if (__get_cpu_var(last_guest) != lg || lg->last_pages != pages) {
84 __get_cpu_var(last_guest) = lg;
85 lg->last_pages = pages;
86 lg->changed = CHANGED_ALL;
87 }
88
89 /* These copies are pretty cheap, so we do them unconditionally: */
90 /* Save the current Host top-level page directory. */
91 pages->state.host_cr3 = __pa(current->mm->pgd);
92 /* Set up the Guest's page tables to see this CPU's pages (and no
93 * other CPU's pages). */
0c78441c 94 map_switcher_in_guest(cpu, pages);
625efab1
JS
95 /* Set up the two "TSS" members which tell the CPU what stack to use
96 * for traps which do directly into the Guest (ie. traps at privilege
97 * level 1). */
98 pages->state.guest_tss.esp1 = lg->esp1;
99 pages->state.guest_tss.ss1 = lg->ss1;
100
101 /* Copy direct-to-Guest trap entries. */
102 if (lg->changed & CHANGED_IDT)
fc708b3e 103 copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
625efab1
JS
104
105 /* Copy all GDT entries which the Guest can change. */
106 if (lg->changed & CHANGED_GDT)
fc708b3e 107 copy_gdt(cpu, pages->state.guest_gdt);
625efab1
JS
108 /* If only the TLS entries have changed, copy them. */
109 else if (lg->changed & CHANGED_GDT_TLS)
fc708b3e 110 copy_gdt_tls(cpu, pages->state.guest_gdt);
625efab1
JS
111
112 /* Mark the Guest as unchanged for next time. */
113 lg->changed = 0;
114}
115
116/* Finally: the code to actually call into the Switcher to run the Guest. */
d0953d42 117static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
625efab1
JS
118{
119 /* This is a dummy value we need for GCC's sake. */
120 unsigned int clobber;
d0953d42 121 struct lguest *lg = cpu->lg;
625efab1
JS
122
123 /* Copy the guest-specific information into this CPU's "struct
124 * lguest_pages". */
d0953d42 125 copy_in_guest_info(cpu, pages);
625efab1
JS
126
127 /* Set the trap number to 256 (impossible value). If we fault while
128 * switching to the Guest (bad segment registers or bug), this will
129 * cause us to abort the Guest. */
a53a35a8 130 cpu->regs->trapnum = 256;
625efab1
JS
131
132 /* Now: we push the "eflags" register on the stack, then do an "lcall".
133 * This is how we change from using the kernel code segment to using
134 * the dedicated lguest code segment, as well as jumping into the
135 * Switcher.
136 *
137 * The lcall also pushes the old code segment (KERNEL_CS) onto the
138 * stack, then the address of this call. This stack layout happens to
e1e72965 139 * exactly match the stack layout created by an interrupt... */
625efab1
JS
140 asm volatile("pushf; lcall *lguest_entry"
141 /* This is how we tell GCC that %eax ("a") and %ebx ("b")
142 * are changed by this routine. The "=" means output. */
143 : "=a"(clobber), "=b"(clobber)
144 /* %eax contains the pages pointer. ("0" refers to the
145 * 0-th argument above, ie "a"). %ebx contains the
146 * physical address of the Guest's top-level page
147 * directory. */
148 : "0"(pages), "1"(__pa(lg->pgdirs[lg->pgdidx].pgdir))
149 /* We tell gcc that all these registers could change,
150 * which means we don't have to save and restore them in
151 * the Switcher. */
152 : "memory", "%edx", "%ecx", "%edi", "%esi");
153}
154/*:*/
155
e1e72965
RR
156/*M:002 There are hooks in the scheduler which we can register to tell when we
157 * get kicked off the CPU (preempt_notifier_register()). This would allow us
158 * to lazily disable SYSENTER which would regain some performance, and should
159 * also simplify copy_in_guest_info(). Note that we'd still need to restore
160 * things when we exit to Launcher userspace, but that's fairly easy.
161 *
162 * The hooks were designed for KVM, but we can also put them to good use. :*/
163
625efab1
JS
164/*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
165 * are disabled: we own the CPU. */
d0953d42 166void lguest_arch_run_guest(struct lg_cpu *cpu)
625efab1 167{
d0953d42
GOC
168 struct lguest *lg = cpu->lg;
169
e1e72965
RR
170 /* Remember the awfully-named TS bit? If the Guest has asked to set it
171 * we set it now, so we can trap and pass that trap to the Guest if it
172 * uses the FPU. */
625efab1
JS
173 if (lg->ts)
174 lguest_set_ts();
175
e1e72965
RR
176 /* SYSENTER is an optimized way of doing system calls. We can't allow
177 * it because it always jumps to privilege level 0. A normal Guest
178 * won't try it because we don't advertise it in CPUID, but a malicious
179 * Guest (or malicious Guest userspace program) could, so we tell the
180 * CPU to disable it before running the Guest. */
625efab1
JS
181 if (boot_cpu_has(X86_FEATURE_SEP))
182 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
183
e1e72965
RR
184 /* Now we actually run the Guest. It will return when something
185 * interesting happens, and we can examine its registers to see what it
186 * was doing. */
d0953d42 187 run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
625efab1 188
e1e72965
RR
189 /* Note that the "regs" pointer contains two extra entries which are
190 * not really registers: a trap number which says what interrupt or
191 * trap made the switcher code come back, and an error code which some
192 * traps set. */
625efab1 193
e1e72965
RR
194 /* If the Guest page faulted, then the cr2 register will tell us the
195 * bad virtual address. We have to grab this now, because once we
196 * re-enable interrupts an interrupt could fault and thus overwrite
197 * cr2, or we could even move off to a different CPU. */
a53a35a8 198 if (cpu->regs->trapnum == 14)
fc708b3e 199 cpu->arch.last_pagefault = read_cr2();
625efab1
JS
200 /* Similarly, if we took a trap because the Guest used the FPU,
201 * we have to restore the FPU it expects to see. */
a53a35a8 202 else if (cpu->regs->trapnum == 7)
625efab1
JS
203 math_state_restore();
204
205 /* Restore SYSENTER if it's supposed to be on. */
206 if (boot_cpu_has(X86_FEATURE_SEP))
207 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
208}
209
e1e72965
RR
210/*H:130 Now we've examined the hypercall code; our Guest can make requests.
211 * Our Guest is usually so well behaved; it never tries to do things it isn't
212 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
213 * infrastructure isn't quite complete, because it doesn't contain replacements
214 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
215 * across one during the boot process as it probes for various things which are
216 * usually attached to a PC.
625efab1 217 *
e1e72965 218 * When the Guest uses one of these instructions, we get a trap (General
625efab1
JS
219 * Protection Fault) and come here. We see if it's one of those troublesome
220 * instructions and skip over it. We return true if we did. */
a3863f68 221static int emulate_insn(struct lg_cpu *cpu)
625efab1 222{
a3863f68 223 struct lguest *lg = cpu->lg;
625efab1
JS
224 u8 insn;
225 unsigned int insnlen = 0, in = 0, shift = 0;
226 /* The eip contains the *virtual* address of the Guest's instruction:
227 * guest_pa just subtracts the Guest's page_offset. */
a53a35a8 228 unsigned long physaddr = guest_pa(lg, cpu->regs->eip);
625efab1 229
47436aa4
RR
230 /* This must be the Guest kernel trying to do something, not userspace!
231 * The bottom two bits of the CS segment register are the privilege
232 * level. */
a53a35a8 233 if ((cpu->regs->cs & 3) != GUEST_PL)
625efab1
JS
234 return 0;
235
236 /* Decoding x86 instructions is icky. */
2d37f94a 237 insn = lgread(lg, physaddr, u8);
625efab1
JS
238
239 /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
240 of the eax register. */
241 if (insn == 0x66) {
242 shift = 16;
243 /* The instruction is 1 byte so far, read the next byte. */
244 insnlen = 1;
2d37f94a 245 insn = lgread(lg, physaddr + insnlen, u8);
625efab1
JS
246 }
247
248 /* We can ignore the lower bit for the moment and decode the 4 opcodes
249 * we need to emulate. */
250 switch (insn & 0xFE) {
251 case 0xE4: /* in <next byte>,%al */
252 insnlen += 2;
253 in = 1;
254 break;
255 case 0xEC: /* in (%dx),%al */
256 insnlen += 1;
257 in = 1;
258 break;
259 case 0xE6: /* out %al,<next byte> */
260 insnlen += 2;
261 break;
262 case 0xEE: /* out %al,(%dx) */
263 insnlen += 1;
264 break;
265 default:
266 /* OK, we don't know what this is, can't emulate. */
267 return 0;
268 }
269
270 /* If it was an "IN" instruction, they expect the result to be read
271 * into %eax, so we change %eax. We always return all-ones, which
272 * traditionally means "there's nothing there". */
273 if (in) {
274 /* Lower bit tells is whether it's a 16 or 32 bit access */
275 if (insn & 0x1)
a53a35a8 276 cpu->regs->eax = 0xFFFFFFFF;
625efab1 277 else
a53a35a8 278 cpu->regs->eax |= (0xFFFF << shift);
625efab1
JS
279 }
280 /* Finally, we've "done" the instruction, so move past it. */
a53a35a8 281 cpu->regs->eip += insnlen;
625efab1
JS
282 /* Success! */
283 return 1;
284}
285
286/*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
73044f05 287void lguest_arch_handle_trap(struct lg_cpu *cpu)
625efab1 288{
73044f05 289 struct lguest *lg = cpu->lg;
a53a35a8 290 switch (cpu->regs->trapnum) {
e1e72965
RR
291 case 13: /* We've intercepted a General Protection Fault. */
292 /* Check if this was one of those annoying IN or OUT
293 * instructions which we need to emulate. If so, we just go
294 * back into the Guest after we've done it. */
a53a35a8 295 if (cpu->regs->errcode == 0) {
a3863f68 296 if (emulate_insn(cpu))
625efab1
JS
297 return;
298 }
299 break;
e1e72965
RR
300 case 14: /* We've intercepted a Page Fault. */
301 /* The Guest accessed a virtual address that wasn't mapped.
302 * This happens a lot: we don't actually set up most of the
303 * page tables for the Guest at all when we start: as it runs
304 * it asks for more and more, and we set them up as
305 * required. In this case, we don't even tell the Guest that
306 * the fault happened.
307 *
308 * The errcode tells whether this was a read or a write, and
309 * whether kernel or userspace code. */
fc708b3e 310 if (demand_page(lg,cpu->arch.last_pagefault,cpu->regs->errcode))
625efab1
JS
311 return;
312
e1e72965
RR
313 /* OK, it's really not there (or not OK): the Guest needs to
314 * know. We write out the cr2 value so it knows where the
315 * fault occurred.
316 *
317 * Note that if the Guest were really messed up, this could
318 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
319 * lg->lguest_data could be NULL */
625efab1 320 if (lg->lguest_data &&
fc708b3e 321 put_user(cpu->arch.last_pagefault, &lg->lguest_data->cr2))
625efab1
JS
322 kill_guest(lg, "Writing cr2");
323 break;
324 case 7: /* We've intercepted a Device Not Available fault. */
e1e72965
RR
325 /* If the Guest doesn't want to know, we already restored the
326 * Floating Point Unit, so we just continue without telling
327 * it. */
625efab1
JS
328 if (!lg->ts)
329 return;
330 break;
331 case 32 ... 255:
cc6d4fbc
RR
332 /* These values mean a real interrupt occurred, in which case
333 * the Host handler has already been run. We just do a
334 * friendly check if another process should now be run, then
335 * return to run the Guest again */
625efab1 336 cond_resched();
cc6d4fbc
RR
337 return;
338 case LGUEST_TRAP_ENTRY:
b410e7b1
JS
339 /* Our 'struct hcall_args' maps directly over our regs: we set
340 * up the pointer now to indicate a hypercall is pending. */
a53a35a8 341 cpu->hcall = (struct hcall_args *)cpu->regs;
625efab1
JS
342 return;
343 }
344
345 /* We didn't handle the trap, so it needs to go to the Guest. */
a53a35a8 346 if (!deliver_trap(cpu, cpu->regs->trapnum))
625efab1
JS
347 /* If the Guest doesn't have a handler (either it hasn't
348 * registered any yet, or it's one of the faults we don't let
349 * it handle), it dies with a cryptic error message. */
350 kill_guest(lg, "unhandled trap %li at %#lx (%#lx)",
a53a35a8 351 cpu->regs->trapnum, cpu->regs->eip,
fc708b3e 352 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
a53a35a8 353 : cpu->regs->errcode);
625efab1
JS
354}
355
356/* Now we can look at each of the routines this calls, in increasing order of
357 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
358 * deliver_trap() and demand_page(). After all those, we'll be ready to
359 * examine the Switcher, and our philosophical understanding of the Host/Guest
360 * duality will be complete. :*/
361static void adjust_pge(void *on)
362{
363 if (on)
364 write_cr4(read_cr4() | X86_CR4_PGE);
365 else
366 write_cr4(read_cr4() & ~X86_CR4_PGE);
367}
368
369/*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
370 * some more i386-specific initialization. */
371void __init lguest_arch_host_init(void)
372{
373 int i;
374
375 /* Most of the i386/switcher.S doesn't care that it's been moved; on
376 * Intel, jumps are relative, and it doesn't access any references to
377 * external code or data.
378 *
379 * The only exception is the interrupt handlers in switcher.S: their
380 * addresses are placed in a table (default_idt_entries), so we need to
381 * update the table with the new addresses. switcher_offset() is a
382 * convenience function which returns the distance between the builtin
383 * switcher code and the high-mapped copy we just made. */
384 for (i = 0; i < IDT_ENTRIES; i++)
385 default_idt_entries[i] += switcher_offset();
386
387 /*
388 * Set up the Switcher's per-cpu areas.
389 *
390 * Each CPU gets two pages of its own within the high-mapped region
391 * (aka. "struct lguest_pages"). Much of this can be initialized now,
392 * but some depends on what Guest we are running (which is set up in
393 * copy_in_guest_info()).
394 */
395 for_each_possible_cpu(i) {
396 /* lguest_pages() returns this CPU's two pages. */
397 struct lguest_pages *pages = lguest_pages(i);
398 /* This is a convenience pointer to make the code fit one
399 * statement to a line. */
400 struct lguest_ro_state *state = &pages->state;
401
402 /* The Global Descriptor Table: the Host has a different one
403 * for each CPU. We keep a descriptor for the GDT which says
404 * where it is and how big it is (the size is actually the last
405 * byte, not the size, hence the "-1"). */
406 state->host_gdt_desc.size = GDT_SIZE-1;
407 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
408
409 /* All CPUs on the Host use the same Interrupt Descriptor
410 * Table, so we just use store_idt(), which gets this CPU's IDT
411 * descriptor. */
412 store_idt(&state->host_idt_desc);
413
414 /* The descriptors for the Guest's GDT and IDT can be filled
415 * out now, too. We copy the GDT & IDT into ->guest_gdt and
416 * ->guest_idt before actually running the Guest. */
417 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
418 state->guest_idt_desc.address = (long)&state->guest_idt;
419 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
420 state->guest_gdt_desc.address = (long)&state->guest_gdt;
421
422 /* We know where we want the stack to be when the Guest enters
423 * the switcher: in pages->regs. The stack grows upwards, so
424 * we start it at the end of that structure. */
425 state->guest_tss.esp0 = (long)(&pages->regs + 1);
426 /* And this is the GDT entry to use for the stack: we keep a
427 * couple of special LGUEST entries. */
428 state->guest_tss.ss0 = LGUEST_DS;
429
430 /* x86 can have a finegrained bitmap which indicates what I/O
431 * ports the process can use. We set it to the end of our
432 * structure, meaning "none". */
433 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
434
435 /* Some GDT entries are the same across all Guests, so we can
436 * set them up now. */
437 setup_default_gdt_entries(state);
438 /* Most IDT entries are the same for all Guests, too.*/
439 setup_default_idt_entries(state, default_idt_entries);
440
441 /* The Host needs to be able to use the LGUEST segments on this
442 * CPU, too, so put them in the Host GDT. */
443 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
444 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
445 }
446
447 /* In the Switcher, we want the %cs segment register to use the
448 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
449 * it will be undisturbed when we switch. To change %cs and jump we
450 * need this structure to feed to Intel's "lcall" instruction. */
451 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
452 lguest_entry.segment = LGUEST_CS;
453
454 /* Finally, we need to turn off "Page Global Enable". PGE is an
455 * optimization where page table entries are specially marked to show
456 * they never change. The Host kernel marks all the kernel pages this
457 * way because it's always present, even when userspace is running.
458 *
459 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
460 * switch to the Guest kernel. If you don't disable this on all CPUs,
461 * you'll get really weird bugs that you'll chase for two days.
462 *
463 * I used to turn PGE off every time we switched to the Guest and back
464 * on when we return, but that slowed the Switcher down noticibly. */
465
466 /* We don't need the complexity of CPUs coming and going while we're
467 * doing this. */
86ef5c9a 468 get_online_cpus();
625efab1
JS
469 if (cpu_has_pge) { /* We have a broader idea of "global". */
470 /* Remember that this was originally set (for cleanup). */
471 cpu_had_pge = 1;
472 /* adjust_pge is a helper function which sets or unsets the PGE
473 * bit on its CPU, depending on the argument (0 == unset). */
474 on_each_cpu(adjust_pge, (void *)0, 0, 1);
475 /* Turn off the feature in the global feature set. */
476 clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
477 }
86ef5c9a 478 put_online_cpus();
625efab1
JS
479};
480/*:*/
481
482void __exit lguest_arch_host_fini(void)
483{
484 /* If we had PGE before we started, turn it back on now. */
86ef5c9a 485 get_online_cpus();
625efab1
JS
486 if (cpu_had_pge) {
487 set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
488 /* adjust_pge's argument "1" means set PGE. */
489 on_each_cpu(adjust_pge, (void *)1, 0, 1);
490 }
86ef5c9a 491 put_online_cpus();
625efab1 492}
b410e7b1
JS
493
494
495/*H:122 The i386-specific hypercalls simply farm out to the right functions. */
73044f05 496int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
b410e7b1
JS
497{
498 switch (args->arg0) {
499 case LHCALL_LOAD_GDT:
fc708b3e 500 load_guest_gdt(cpu, args->arg1, args->arg2);
b410e7b1
JS
501 break;
502 case LHCALL_LOAD_IDT_ENTRY:
fc708b3e 503 load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
b410e7b1
JS
504 break;
505 case LHCALL_LOAD_TLS:
fc708b3e 506 guest_load_tls(cpu, args->arg1);
b410e7b1
JS
507 break;
508 default:
509 /* Bad Guest. Bad! */
510 return -EIO;
511 }
512 return 0;
513}
514
515/*H:126 i386-specific hypercall initialization: */
73044f05 516int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
b410e7b1
JS
517{
518 u32 tsc_speed;
73044f05 519 struct lguest *lg = cpu->lg;
b410e7b1
JS
520
521 /* The pointer to the Guest's "struct lguest_data" is the only
522 * argument. We check that address now. */
73044f05 523 if (!lguest_address_ok(lg, cpu->hcall->arg1, sizeof(*lg->lguest_data)))
b410e7b1
JS
524 return -EFAULT;
525
526 /* Having checked it, we simply set lg->lguest_data to point straight
527 * into the Launcher's memory at the right place and then use
528 * copy_to_user/from_user from now on, instead of lgread/write. I put
529 * this in to show that I'm not immune to writing stupid
530 * optimizations. */
73044f05 531 lg->lguest_data = lg->mem_base + cpu->hcall->arg1;
b410e7b1
JS
532
533 /* We insist that the Time Stamp Counter exist and doesn't change with
534 * cpu frequency. Some devious chip manufacturers decided that TSC
535 * changes could be handled in software. I decided that time going
536 * backwards might be good for benchmarks, but it's bad for users.
537 *
538 * We also insist that the TSC be stable: the kernel detects unreliable
539 * TSCs for its own purposes, and we use that here. */
540 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
541 tsc_speed = tsc_khz;
542 else
543 tsc_speed = 0;
544 if (put_user(tsc_speed, &lg->lguest_data->tsc_khz))
545 return -EFAULT;
546
c18acd73
RR
547 /* The interrupt code might not like the system call vector. */
548 if (!check_syscall_vector(lg))
549 kill_guest(lg, "bad syscall vector");
550
b410e7b1
JS
551 return 0;
552}
d612cde0
JS
553
554/*L:030 lguest_arch_setup_regs()
555 *
556 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
557 * allocate the structure, so they will be 0. */
a53a35a8 558void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
d612cde0 559{
a53a35a8 560 struct lguest_regs *regs = cpu->regs;
d612cde0
JS
561
562 /* There are four "segment" registers which the Guest needs to boot:
563 * The "code segment" register (cs) refers to the kernel code segment
564 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
565 * refer to the kernel data segment __KERNEL_DS.
566 *
567 * The privilege level is packed into the lower bits. The Guest runs
568 * at privilege level 1 (GUEST_PL).*/
569 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
570 regs->cs = __KERNEL_CS|GUEST_PL;
571
572 /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
573 * is supposed to always be "1". Bit 9 (0x200) controls whether
574 * interrupts are enabled. We always leave interrupts enabled while
575 * running the Guest. */
25c47bb3 576 regs->eflags = X86_EFLAGS_IF | 0x2;
d612cde0
JS
577
578 /* The "Extended Instruction Pointer" register says where the Guest is
579 * running. */
580 regs->eip = start;
581
582 /* %esi points to our boot information, at physical address 0, so don't
583 * touch it. */
e1e72965 584
d612cde0
JS
585 /* There are a couple of GDT entries the Guest expects when first
586 * booting. */
fc708b3e 587 setup_guest_gdt(cpu);
d612cde0 588}
This page took 0.073505 seconds and 5 git commands to generate.