Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * PowerMac G5 SMU driver | |
3 | * | |
4 | * Copyright 2004 J. Mayer <l_indien@magic.fr> | |
5 | * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. | |
6 | * | |
7 | * Released under the term of the GNU GPL v2. | |
8 | */ | |
9 | ||
10 | /* | |
1da177e4 | 11 | * TODO: |
0365ba7f BH |
12 | * - maybe add timeout to commands ? |
13 | * - blocking version of time functions | |
14 | * - polling version of i2c commands (including timer that works with | |
15 | * interrutps off) | |
16 | * - maybe avoid some data copies with i2c by directly using the smu cmd | |
17 | * buffer and a lower level internal interface | |
18 | * - understand SMU -> CPU events and implement reception of them via | |
19 | * the userland interface | |
1da177e4 LT |
20 | */ |
21 | ||
22 | #include <linux/config.h> | |
23 | #include <linux/types.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/device.h> | |
26 | #include <linux/dmapool.h> | |
27 | #include <linux/bootmem.h> | |
28 | #include <linux/vmalloc.h> | |
29 | #include <linux/highmem.h> | |
30 | #include <linux/jiffies.h> | |
31 | #include <linux/interrupt.h> | |
32 | #include <linux/rtc.h> | |
0365ba7f BH |
33 | #include <linux/completion.h> |
34 | #include <linux/miscdevice.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/sysdev.h> | |
37 | #include <linux/poll.h> | |
1da177e4 LT |
38 | |
39 | #include <asm/byteorder.h> | |
40 | #include <asm/io.h> | |
41 | #include <asm/prom.h> | |
42 | #include <asm/machdep.h> | |
43 | #include <asm/pmac_feature.h> | |
44 | #include <asm/smu.h> | |
45 | #include <asm/sections.h> | |
46 | #include <asm/abs_addr.h> | |
0365ba7f BH |
47 | #include <asm/uaccess.h> |
48 | #include <asm/of_device.h> | |
49 | ||
183d0202 | 50 | #define VERSION "0.7" |
0365ba7f | 51 | #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." |
1da177e4 | 52 | |
0365ba7f | 53 | #undef DEBUG_SMU |
1da177e4 LT |
54 | |
55 | #ifdef DEBUG_SMU | |
1beb6a7d | 56 | #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) |
1da177e4 LT |
57 | #else |
58 | #define DPRINTK(fmt, args...) do { } while (0) | |
59 | #endif | |
60 | ||
61 | /* | |
62 | * This is the command buffer passed to the SMU hardware | |
63 | */ | |
0365ba7f BH |
64 | #define SMU_MAX_DATA 254 |
65 | ||
1da177e4 LT |
66 | struct smu_cmd_buf { |
67 | u8 cmd; | |
68 | u8 length; | |
0365ba7f | 69 | u8 data[SMU_MAX_DATA]; |
1da177e4 LT |
70 | }; |
71 | ||
72 | struct smu_device { | |
73 | spinlock_t lock; | |
74 | struct device_node *of_node; | |
0365ba7f BH |
75 | struct of_device *of_dev; |
76 | int doorbell; /* doorbell gpio */ | |
1da177e4 | 77 | u32 __iomem *db_buf; /* doorbell buffer */ |
0365ba7f BH |
78 | int db_irq; |
79 | int msg; | |
80 | int msg_irq; | |
1da177e4 LT |
81 | struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ |
82 | u32 cmd_buf_abs; /* command buffer absolute */ | |
0365ba7f BH |
83 | struct list_head cmd_list; |
84 | struct smu_cmd *cmd_cur; /* pending command */ | |
85 | struct list_head cmd_i2c_list; | |
86 | struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ | |
87 | struct timer_list i2c_timer; | |
1da177e4 LT |
88 | }; |
89 | ||
90 | /* | |
91 | * I don't think there will ever be more than one SMU, so | |
92 | * for now, just hard code that | |
93 | */ | |
94 | static struct smu_device *smu; | |
183d0202 | 95 | static DECLARE_MUTEX(smu_part_access); |
0365ba7f | 96 | |
1da177e4 | 97 | /* |
0365ba7f | 98 | * SMU driver low level stuff |
1da177e4 | 99 | */ |
1da177e4 | 100 | |
0365ba7f | 101 | static void smu_start_cmd(void) |
1da177e4 | 102 | { |
0365ba7f BH |
103 | unsigned long faddr, fend; |
104 | struct smu_cmd *cmd; | |
1da177e4 | 105 | |
0365ba7f BH |
106 | if (list_empty(&smu->cmd_list)) |
107 | return; | |
108 | ||
109 | /* Fetch first command in queue */ | |
110 | cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); | |
111 | smu->cmd_cur = cmd; | |
112 | list_del(&cmd->link); | |
113 | ||
114 | DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, | |
115 | cmd->data_len); | |
183d0202 | 116 | DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n", |
0365ba7f | 117 | ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1], |
183d0202 BH |
118 | ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3], |
119 | ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5], | |
120 | ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]); | |
0365ba7f BH |
121 | |
122 | /* Fill the SMU command buffer */ | |
123 | smu->cmd_buf->cmd = cmd->cmd; | |
124 | smu->cmd_buf->length = cmd->data_len; | |
125 | memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); | |
126 | ||
127 | /* Flush command and data to RAM */ | |
128 | faddr = (unsigned long)smu->cmd_buf; | |
129 | fend = faddr + smu->cmd_buf->length + 2; | |
130 | flush_inval_dcache_range(faddr, fend); | |
131 | ||
132 | /* This isn't exactly a DMA mapping here, I suspect | |
1da177e4 LT |
133 | * the SMU is actually communicating with us via i2c to the |
134 | * northbridge or the CPU to access RAM. | |
135 | */ | |
0365ba7f | 136 | writel(smu->cmd_buf_abs, smu->db_buf); |
1da177e4 LT |
137 | |
138 | /* Ring the SMU doorbell */ | |
0365ba7f | 139 | pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); |
1da177e4 LT |
140 | } |
141 | ||
0365ba7f BH |
142 | |
143 | static irqreturn_t smu_db_intr(int irq, void *arg, struct pt_regs *regs) | |
1da177e4 | 144 | { |
0365ba7f BH |
145 | unsigned long flags; |
146 | struct smu_cmd *cmd; | |
147 | void (*done)(struct smu_cmd *cmd, void *misc) = NULL; | |
148 | void *misc = NULL; | |
149 | u8 gpio; | |
150 | int rc = 0; | |
1da177e4 | 151 | |
0365ba7f BH |
152 | /* SMU completed the command, well, we hope, let's make sure |
153 | * of it | |
154 | */ | |
155 | spin_lock_irqsave(&smu->lock, flags); | |
1da177e4 | 156 | |
0365ba7f | 157 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); |
a44fe13e BH |
158 | if ((gpio & 7) != 7) { |
159 | spin_unlock_irqrestore(&smu->lock, flags); | |
0365ba7f | 160 | return IRQ_HANDLED; |
a44fe13e | 161 | } |
0365ba7f BH |
162 | |
163 | cmd = smu->cmd_cur; | |
164 | smu->cmd_cur = NULL; | |
165 | if (cmd == NULL) | |
166 | goto bail; | |
167 | ||
168 | if (rc == 0) { | |
169 | unsigned long faddr; | |
170 | int reply_len; | |
171 | u8 ack; | |
172 | ||
173 | /* CPU might have brought back the cache line, so we need | |
174 | * to flush again before peeking at the SMU response. We | |
175 | * flush the entire buffer for now as we haven't read the | |
176 | * reply lenght (it's only 2 cache lines anyway) | |
177 | */ | |
178 | faddr = (unsigned long)smu->cmd_buf; | |
179 | flush_inval_dcache_range(faddr, faddr + 256); | |
180 | ||
181 | /* Now check ack */ | |
182 | ack = (~cmd->cmd) & 0xff; | |
183 | if (ack != smu->cmd_buf->cmd) { | |
184 | DPRINTK("SMU: incorrect ack, want %x got %x\n", | |
185 | ack, smu->cmd_buf->cmd); | |
186 | rc = -EIO; | |
187 | } | |
188 | reply_len = rc == 0 ? smu->cmd_buf->length : 0; | |
189 | DPRINTK("SMU: reply len: %d\n", reply_len); | |
190 | if (reply_len > cmd->reply_len) { | |
191 | printk(KERN_WARNING "SMU: reply buffer too small," | |
192 | "got %d bytes for a %d bytes buffer\n", | |
193 | reply_len, cmd->reply_len); | |
194 | reply_len = cmd->reply_len; | |
195 | } | |
196 | cmd->reply_len = reply_len; | |
197 | if (cmd->reply_buf && reply_len) | |
198 | memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); | |
199 | } | |
200 | ||
201 | /* Now complete the command. Write status last in order as we lost | |
202 | * ownership of the command structure as soon as it's no longer -1 | |
203 | */ | |
204 | done = cmd->done; | |
205 | misc = cmd->misc; | |
206 | mb(); | |
207 | cmd->status = rc; | |
208 | bail: | |
209 | /* Start next command if any */ | |
210 | smu_start_cmd(); | |
211 | spin_unlock_irqrestore(&smu->lock, flags); | |
212 | ||
213 | /* Call command completion handler if any */ | |
214 | if (done) | |
215 | done(cmd, misc); | |
216 | ||
217 | /* It's an edge interrupt, nothing to do */ | |
218 | return IRQ_HANDLED; | |
1da177e4 LT |
219 | } |
220 | ||
0365ba7f BH |
221 | |
222 | static irqreturn_t smu_msg_intr(int irq, void *arg, struct pt_regs *regs) | |
1da177e4 | 223 | { |
0365ba7f BH |
224 | /* I don't quite know what to do with this one, we seem to never |
225 | * receive it, so I suspect we have to arm it someway in the SMU | |
226 | * to start getting events that way. | |
227 | */ | |
228 | ||
229 | printk(KERN_INFO "SMU: message interrupt !\n"); | |
1da177e4 | 230 | |
0365ba7f BH |
231 | /* It's an edge interrupt, nothing to do */ |
232 | return IRQ_HANDLED; | |
233 | } | |
1da177e4 | 234 | |
1da177e4 | 235 | |
0365ba7f BH |
236 | /* |
237 | * Queued command management. | |
238 | * | |
239 | */ | |
1da177e4 | 240 | |
0365ba7f BH |
241 | int smu_queue_cmd(struct smu_cmd *cmd) |
242 | { | |
243 | unsigned long flags; | |
1da177e4 | 244 | |
0365ba7f BH |
245 | if (smu == NULL) |
246 | return -ENODEV; | |
247 | if (cmd->data_len > SMU_MAX_DATA || | |
248 | cmd->reply_len > SMU_MAX_DATA) | |
249 | return -EINVAL; | |
250 | ||
251 | cmd->status = 1; | |
252 | spin_lock_irqsave(&smu->lock, flags); | |
253 | list_add_tail(&cmd->link, &smu->cmd_list); | |
254 | if (smu->cmd_cur == NULL) | |
255 | smu_start_cmd(); | |
256 | spin_unlock_irqrestore(&smu->lock, flags); | |
257 | ||
258 | return 0; | |
1da177e4 | 259 | } |
0365ba7f | 260 | EXPORT_SYMBOL(smu_queue_cmd); |
1da177e4 | 261 | |
0365ba7f BH |
262 | |
263 | int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, | |
264 | unsigned int data_len, | |
265 | void (*done)(struct smu_cmd *cmd, void *misc), | |
266 | void *misc, ...) | |
1da177e4 | 267 | { |
0365ba7f BH |
268 | struct smu_cmd *cmd = &scmd->cmd; |
269 | va_list list; | |
270 | int i; | |
271 | ||
272 | if (data_len > sizeof(scmd->buffer)) | |
273 | return -EINVAL; | |
274 | ||
275 | memset(scmd, 0, sizeof(*scmd)); | |
276 | cmd->cmd = command; | |
277 | cmd->data_len = data_len; | |
278 | cmd->data_buf = scmd->buffer; | |
279 | cmd->reply_len = sizeof(scmd->buffer); | |
280 | cmd->reply_buf = scmd->buffer; | |
281 | cmd->done = done; | |
282 | cmd->misc = misc; | |
283 | ||
284 | va_start(list, misc); | |
285 | for (i = 0; i < data_len; ++i) | |
286 | scmd->buffer[i] = (u8)va_arg(list, int); | |
287 | va_end(list); | |
288 | ||
289 | return smu_queue_cmd(cmd); | |
1da177e4 | 290 | } |
0365ba7f | 291 | EXPORT_SYMBOL(smu_queue_simple); |
1da177e4 | 292 | |
0365ba7f BH |
293 | |
294 | void smu_poll(void) | |
1da177e4 | 295 | { |
0365ba7f BH |
296 | u8 gpio; |
297 | ||
298 | if (smu == NULL) | |
299 | return; | |
300 | ||
301 | gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); | |
302 | if ((gpio & 7) == 7) | |
303 | smu_db_intr(smu->db_irq, smu, NULL); | |
1da177e4 | 304 | } |
0365ba7f BH |
305 | EXPORT_SYMBOL(smu_poll); |
306 | ||
1da177e4 | 307 | |
0365ba7f | 308 | void smu_done_complete(struct smu_cmd *cmd, void *misc) |
1da177e4 | 309 | { |
0365ba7f BH |
310 | struct completion *comp = misc; |
311 | ||
312 | complete(comp); | |
1da177e4 | 313 | } |
0365ba7f BH |
314 | EXPORT_SYMBOL(smu_done_complete); |
315 | ||
1da177e4 | 316 | |
0365ba7f | 317 | void smu_spinwait_cmd(struct smu_cmd *cmd) |
1da177e4 | 318 | { |
0365ba7f BH |
319 | while(cmd->status == 1) |
320 | smu_poll(); | |
321 | } | |
322 | EXPORT_SYMBOL(smu_spinwait_cmd); | |
323 | ||
324 | ||
325 | /* RTC low level commands */ | |
326 | static inline int bcd2hex (int n) | |
327 | { | |
328 | return (((n & 0xf0) >> 4) * 10) + (n & 0xf); | |
1da177e4 LT |
329 | } |
330 | ||
0365ba7f BH |
331 | |
332 | static inline int hex2bcd (int n) | |
1da177e4 | 333 | { |
0365ba7f | 334 | return ((n / 10) << 4) + (n % 10); |
1da177e4 | 335 | } |
0365ba7f | 336 | |
1da177e4 LT |
337 | |
338 | static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, | |
339 | struct rtc_time *time) | |
340 | { | |
341 | cmd_buf->cmd = 0x8e; | |
342 | cmd_buf->length = 8; | |
343 | cmd_buf->data[0] = 0x80; | |
344 | cmd_buf->data[1] = hex2bcd(time->tm_sec); | |
345 | cmd_buf->data[2] = hex2bcd(time->tm_min); | |
346 | cmd_buf->data[3] = hex2bcd(time->tm_hour); | |
347 | cmd_buf->data[4] = time->tm_wday; | |
348 | cmd_buf->data[5] = hex2bcd(time->tm_mday); | |
349 | cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; | |
350 | cmd_buf->data[7] = hex2bcd(time->tm_year - 100); | |
351 | } | |
352 | ||
1da177e4 | 353 | |
0365ba7f | 354 | int smu_get_rtc_time(struct rtc_time *time, int spinwait) |
1da177e4 | 355 | { |
0365ba7f | 356 | struct smu_simple_cmd cmd; |
1da177e4 LT |
357 | int rc; |
358 | ||
359 | if (smu == NULL) | |
360 | return -ENODEV; | |
361 | ||
362 | memset(time, 0, sizeof(struct rtc_time)); | |
0365ba7f BH |
363 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, |
364 | SMU_CMD_RTC_GET_DATETIME); | |
365 | if (rc) | |
366 | return rc; | |
367 | smu_spinwait_simple(&cmd); | |
1da177e4 | 368 | |
0365ba7f BH |
369 | time->tm_sec = bcd2hex(cmd.buffer[0]); |
370 | time->tm_min = bcd2hex(cmd.buffer[1]); | |
371 | time->tm_hour = bcd2hex(cmd.buffer[2]); | |
372 | time->tm_wday = bcd2hex(cmd.buffer[3]); | |
373 | time->tm_mday = bcd2hex(cmd.buffer[4]); | |
374 | time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; | |
375 | time->tm_year = bcd2hex(cmd.buffer[6]) + 100; | |
376 | ||
377 | return 0; | |
1da177e4 LT |
378 | } |
379 | ||
0365ba7f BH |
380 | |
381 | int smu_set_rtc_time(struct rtc_time *time, int spinwait) | |
1da177e4 | 382 | { |
0365ba7f | 383 | struct smu_simple_cmd cmd; |
1da177e4 LT |
384 | int rc; |
385 | ||
386 | if (smu == NULL) | |
387 | return -ENODEV; | |
388 | ||
0365ba7f BH |
389 | rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, |
390 | SMU_CMD_RTC_SET_DATETIME, | |
391 | hex2bcd(time->tm_sec), | |
392 | hex2bcd(time->tm_min), | |
393 | hex2bcd(time->tm_hour), | |
394 | time->tm_wday, | |
395 | hex2bcd(time->tm_mday), | |
396 | hex2bcd(time->tm_mon) + 1, | |
397 | hex2bcd(time->tm_year - 100)); | |
398 | if (rc) | |
399 | return rc; | |
400 | smu_spinwait_simple(&cmd); | |
1da177e4 | 401 | |
0365ba7f | 402 | return 0; |
1da177e4 LT |
403 | } |
404 | ||
0365ba7f | 405 | |
1da177e4 LT |
406 | void smu_shutdown(void) |
407 | { | |
0365ba7f | 408 | struct smu_simple_cmd cmd; |
1da177e4 LT |
409 | |
410 | if (smu == NULL) | |
411 | return; | |
412 | ||
0365ba7f BH |
413 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, |
414 | 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) | |
415 | return; | |
416 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
417 | for (;;) |
418 | ; | |
1da177e4 LT |
419 | } |
420 | ||
0365ba7f | 421 | |
1da177e4 LT |
422 | void smu_restart(void) |
423 | { | |
0365ba7f | 424 | struct smu_simple_cmd cmd; |
1da177e4 LT |
425 | |
426 | if (smu == NULL) | |
427 | return; | |
428 | ||
0365ba7f BH |
429 | if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, |
430 | 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) | |
431 | return; | |
432 | smu_spinwait_simple(&cmd); | |
1da177e4 LT |
433 | for (;;) |
434 | ; | |
1da177e4 LT |
435 | } |
436 | ||
0365ba7f | 437 | |
1da177e4 LT |
438 | int smu_present(void) |
439 | { | |
440 | return smu != NULL; | |
441 | } | |
0365ba7f | 442 | EXPORT_SYMBOL(smu_present); |
1da177e4 LT |
443 | |
444 | ||
183d0202 | 445 | int __init smu_init (void) |
1da177e4 LT |
446 | { |
447 | struct device_node *np; | |
448 | u32 *data; | |
449 | ||
450 | np = of_find_node_by_type(NULL, "smu"); | |
451 | if (np == NULL) | |
452 | return -ENODEV; | |
453 | ||
0365ba7f BH |
454 | printk(KERN_INFO "SMU driver %s %s\n", VERSION, AUTHOR); |
455 | ||
1da177e4 LT |
456 | if (smu_cmdbuf_abs == 0) { |
457 | printk(KERN_ERR "SMU: Command buffer not allocated !\n"); | |
458 | return -EINVAL; | |
459 | } | |
460 | ||
461 | smu = alloc_bootmem(sizeof(struct smu_device)); | |
462 | if (smu == NULL) | |
463 | return -ENOMEM; | |
464 | memset(smu, 0, sizeof(*smu)); | |
465 | ||
466 | spin_lock_init(&smu->lock); | |
0365ba7f BH |
467 | INIT_LIST_HEAD(&smu->cmd_list); |
468 | INIT_LIST_HEAD(&smu->cmd_i2c_list); | |
1da177e4 | 469 | smu->of_node = np; |
0365ba7f BH |
470 | smu->db_irq = NO_IRQ; |
471 | smu->msg_irq = NO_IRQ; | |
472 | init_timer(&smu->i2c_timer); | |
473 | ||
1da177e4 LT |
474 | /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a |
475 | * 32 bits value safely | |
476 | */ | |
477 | smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; | |
478 | smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs); | |
479 | ||
480 | np = of_find_node_by_name(NULL, "smu-doorbell"); | |
481 | if (np == NULL) { | |
482 | printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); | |
483 | goto fail; | |
484 | } | |
485 | data = (u32 *)get_property(np, "reg", NULL); | |
1da177e4 | 486 | if (data == NULL) { |
0365ba7f | 487 | of_node_put(np); |
1da177e4 LT |
488 | printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); |
489 | goto fail; | |
490 | } | |
491 | ||
492 | /* Current setup has one doorbell GPIO that does both doorbell | |
493 | * and ack. GPIOs are at 0x50, best would be to find that out | |
494 | * in the device-tree though. | |
495 | */ | |
0365ba7f BH |
496 | smu->doorbell = *data; |
497 | if (smu->doorbell < 0x50) | |
498 | smu->doorbell += 0x50; | |
499 | if (np->n_intrs > 0) | |
500 | smu->db_irq = np->intrs[0].line; | |
501 | ||
502 | of_node_put(np); | |
503 | ||
504 | /* Now look for the smu-interrupt GPIO */ | |
505 | do { | |
506 | np = of_find_node_by_name(NULL, "smu-interrupt"); | |
507 | if (np == NULL) | |
508 | break; | |
509 | data = (u32 *)get_property(np, "reg", NULL); | |
510 | if (data == NULL) { | |
511 | of_node_put(np); | |
512 | break; | |
513 | } | |
514 | smu->msg = *data; | |
515 | if (smu->msg < 0x50) | |
516 | smu->msg += 0x50; | |
517 | if (np->n_intrs > 0) | |
518 | smu->msg_irq = np->intrs[0].line; | |
519 | of_node_put(np); | |
520 | } while(0); | |
1da177e4 LT |
521 | |
522 | /* Doorbell buffer is currently hard-coded, I didn't find a proper | |
523 | * device-tree entry giving the address. Best would probably to use | |
524 | * an offset for K2 base though, but let's do it that way for now. | |
525 | */ | |
526 | smu->db_buf = ioremap(0x8000860c, 0x1000); | |
527 | if (smu->db_buf == NULL) { | |
528 | printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); | |
529 | goto fail; | |
530 | } | |
531 | ||
532 | sys_ctrler = SYS_CTRLER_SMU; | |
533 | return 0; | |
534 | ||
535 | fail: | |
536 | smu = NULL; | |
537 | return -ENXIO; | |
538 | ||
539 | } | |
0365ba7f BH |
540 | |
541 | ||
542 | static int smu_late_init(void) | |
543 | { | |
544 | if (!smu) | |
545 | return 0; | |
546 | ||
547 | /* | |
548 | * Try to request the interrupts | |
549 | */ | |
550 | ||
551 | if (smu->db_irq != NO_IRQ) { | |
552 | if (request_irq(smu->db_irq, smu_db_intr, | |
553 | SA_SHIRQ, "SMU doorbell", smu) < 0) { | |
554 | printk(KERN_WARNING "SMU: can't " | |
555 | "request interrupt %d\n", | |
556 | smu->db_irq); | |
557 | smu->db_irq = NO_IRQ; | |
558 | } | |
559 | } | |
560 | ||
561 | if (smu->msg_irq != NO_IRQ) { | |
562 | if (request_irq(smu->msg_irq, smu_msg_intr, | |
563 | SA_SHIRQ, "SMU message", smu) < 0) { | |
564 | printk(KERN_WARNING "SMU: can't " | |
565 | "request interrupt %d\n", | |
566 | smu->msg_irq); | |
567 | smu->msg_irq = NO_IRQ; | |
568 | } | |
569 | } | |
570 | ||
571 | return 0; | |
572 | } | |
573 | arch_initcall(smu_late_init); | |
574 | ||
575 | /* | |
576 | * sysfs visibility | |
577 | */ | |
578 | ||
579 | static void smu_expose_childs(void *unused) | |
580 | { | |
581 | struct device_node *np; | |
582 | ||
583 | for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) { | |
584 | if (device_is_compatible(np, "smu-i2c")) { | |
585 | char name[32]; | |
586 | u32 *reg = (u32 *)get_property(np, "reg", NULL); | |
587 | ||
588 | if (reg == NULL) | |
589 | continue; | |
590 | sprintf(name, "smu-i2c-%02x", *reg); | |
591 | of_platform_device_create(np, name, &smu->of_dev->dev); | |
592 | } | |
75722d39 BH |
593 | if (device_is_compatible(np, "smu-sensors")) |
594 | of_platform_device_create(np, "smu-sensors", &smu->of_dev->dev); | |
0365ba7f BH |
595 | } |
596 | ||
597 | } | |
598 | ||
599 | static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs, NULL); | |
600 | ||
601 | static int smu_platform_probe(struct of_device* dev, | |
602 | const struct of_device_id *match) | |
603 | { | |
604 | if (!smu) | |
605 | return -ENODEV; | |
606 | smu->of_dev = dev; | |
607 | ||
608 | /* | |
609 | * Ok, we are matched, now expose all i2c busses. We have to defer | |
610 | * that unfortunately or it would deadlock inside the device model | |
611 | */ | |
612 | schedule_work(&smu_expose_childs_work); | |
613 | ||
614 | return 0; | |
615 | } | |
616 | ||
617 | static struct of_device_id smu_platform_match[] = | |
618 | { | |
619 | { | |
620 | .type = "smu", | |
621 | }, | |
622 | {}, | |
623 | }; | |
624 | ||
625 | static struct of_platform_driver smu_of_platform_driver = | |
626 | { | |
627 | .name = "smu", | |
628 | .match_table = smu_platform_match, | |
629 | .probe = smu_platform_probe, | |
630 | }; | |
631 | ||
632 | static int __init smu_init_sysfs(void) | |
633 | { | |
634 | int rc; | |
635 | ||
636 | /* | |
637 | * Due to sysfs bogosity, a sysdev is not a real device, so | |
638 | * we should in fact create both if we want sysdev semantics | |
639 | * for power management. | |
640 | * For now, we don't power manage machines with an SMU chip, | |
641 | * I'm a bit too far from figuring out how that works with those | |
642 | * new chipsets, but that will come back and bite us | |
643 | */ | |
644 | rc = of_register_driver(&smu_of_platform_driver); | |
645 | return 0; | |
646 | } | |
647 | ||
648 | device_initcall(smu_init_sysfs); | |
649 | ||
650 | struct of_device *smu_get_ofdev(void) | |
651 | { | |
652 | if (!smu) | |
653 | return NULL; | |
654 | return smu->of_dev; | |
655 | } | |
656 | ||
657 | EXPORT_SYMBOL_GPL(smu_get_ofdev); | |
658 | ||
659 | /* | |
660 | * i2c interface | |
661 | */ | |
662 | ||
663 | static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) | |
664 | { | |
665 | void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; | |
666 | void *misc = cmd->misc; | |
667 | unsigned long flags; | |
668 | ||
669 | /* Check for read case */ | |
670 | if (!fail && cmd->read) { | |
671 | if (cmd->pdata[0] < 1) | |
672 | fail = 1; | |
673 | else | |
674 | memcpy(cmd->info.data, &cmd->pdata[1], | |
675 | cmd->info.datalen); | |
676 | } | |
677 | ||
678 | DPRINTK("SMU: completing, success: %d\n", !fail); | |
679 | ||
680 | /* Update status and mark no pending i2c command with lock | |
681 | * held so nobody comes in while we dequeue an eventual | |
682 | * pending next i2c command | |
683 | */ | |
684 | spin_lock_irqsave(&smu->lock, flags); | |
685 | smu->cmd_i2c_cur = NULL; | |
686 | wmb(); | |
687 | cmd->status = fail ? -EIO : 0; | |
688 | ||
689 | /* Is there another i2c command waiting ? */ | |
690 | if (!list_empty(&smu->cmd_i2c_list)) { | |
691 | struct smu_i2c_cmd *newcmd; | |
692 | ||
693 | /* Fetch it, new current, remove from list */ | |
694 | newcmd = list_entry(smu->cmd_i2c_list.next, | |
695 | struct smu_i2c_cmd, link); | |
696 | smu->cmd_i2c_cur = newcmd; | |
697 | list_del(&cmd->link); | |
698 | ||
699 | /* Queue with low level smu */ | |
700 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
701 | if (smu->cmd_cur == NULL) | |
702 | smu_start_cmd(); | |
703 | } | |
704 | spin_unlock_irqrestore(&smu->lock, flags); | |
705 | ||
706 | /* Call command completion handler if any */ | |
707 | if (done) | |
708 | done(cmd, misc); | |
709 | ||
710 | } | |
711 | ||
712 | ||
713 | static void smu_i2c_retry(unsigned long data) | |
714 | { | |
715 | struct smu_i2c_cmd *cmd = (struct smu_i2c_cmd *)data; | |
716 | ||
717 | DPRINTK("SMU: i2c failure, requeuing...\n"); | |
718 | ||
719 | /* requeue command simply by resetting reply_len */ | |
720 | cmd->pdata[0] = 0xff; | |
721 | cmd->scmd.reply_len = 0x10; | |
722 | smu_queue_cmd(&cmd->scmd); | |
723 | } | |
724 | ||
725 | ||
726 | static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) | |
727 | { | |
728 | struct smu_i2c_cmd *cmd = misc; | |
729 | int fail = 0; | |
730 | ||
731 | DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", | |
732 | cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); | |
733 | ||
734 | /* Check for possible status */ | |
735 | if (scmd->status < 0) | |
736 | fail = 1; | |
737 | else if (cmd->read) { | |
738 | if (cmd->stage == 0) | |
739 | fail = cmd->pdata[0] != 0; | |
740 | else | |
741 | fail = cmd->pdata[0] >= 0x80; | |
742 | } else { | |
743 | fail = cmd->pdata[0] != 0; | |
744 | } | |
745 | ||
746 | /* Handle failures by requeuing command, after 5ms interval | |
747 | */ | |
748 | if (fail && --cmd->retries > 0) { | |
749 | DPRINTK("SMU: i2c failure, starting timer...\n"); | |
750 | smu->i2c_timer.function = smu_i2c_retry; | |
751 | smu->i2c_timer.data = (unsigned long)cmd; | |
752 | smu->i2c_timer.expires = jiffies + msecs_to_jiffies(5); | |
753 | add_timer(&smu->i2c_timer); | |
754 | return; | |
755 | } | |
756 | ||
757 | /* If failure or stage 1, command is complete */ | |
758 | if (fail || cmd->stage != 0) { | |
759 | smu_i2c_complete_command(cmd, fail); | |
760 | return; | |
761 | } | |
762 | ||
763 | DPRINTK("SMU: going to stage 1\n"); | |
764 | ||
765 | /* Ok, initial command complete, now poll status */ | |
766 | scmd->reply_buf = cmd->pdata; | |
767 | scmd->reply_len = 0x10; | |
768 | scmd->data_buf = cmd->pdata; | |
769 | scmd->data_len = 1; | |
770 | cmd->pdata[0] = 0; | |
771 | cmd->stage = 1; | |
772 | cmd->retries = 20; | |
773 | smu_queue_cmd(scmd); | |
774 | } | |
775 | ||
776 | ||
777 | int smu_queue_i2c(struct smu_i2c_cmd *cmd) | |
778 | { | |
779 | unsigned long flags; | |
780 | ||
781 | if (smu == NULL) | |
782 | return -ENODEV; | |
783 | ||
784 | /* Fill most fields of scmd */ | |
785 | cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; | |
786 | cmd->scmd.done = smu_i2c_low_completion; | |
787 | cmd->scmd.misc = cmd; | |
788 | cmd->scmd.reply_buf = cmd->pdata; | |
789 | cmd->scmd.reply_len = 0x10; | |
790 | cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; | |
791 | cmd->scmd.status = 1; | |
792 | cmd->stage = 0; | |
793 | cmd->pdata[0] = 0xff; | |
794 | cmd->retries = 20; | |
795 | cmd->status = 1; | |
796 | ||
797 | /* Check transfer type, sanitize some "info" fields | |
798 | * based on transfer type and do more checking | |
799 | */ | |
800 | cmd->info.caddr = cmd->info.devaddr; | |
801 | cmd->read = cmd->info.devaddr & 0x01; | |
802 | switch(cmd->info.type) { | |
803 | case SMU_I2C_TRANSFER_SIMPLE: | |
804 | memset(&cmd->info.sublen, 0, 4); | |
805 | break; | |
806 | case SMU_I2C_TRANSFER_COMBINED: | |
807 | cmd->info.devaddr &= 0xfe; | |
808 | case SMU_I2C_TRANSFER_STDSUB: | |
809 | if (cmd->info.sublen > 3) | |
810 | return -EINVAL; | |
811 | break; | |
812 | default: | |
813 | return -EINVAL; | |
814 | } | |
815 | ||
816 | /* Finish setting up command based on transfer direction | |
817 | */ | |
818 | if (cmd->read) { | |
819 | if (cmd->info.datalen > SMU_I2C_READ_MAX) | |
820 | return -EINVAL; | |
821 | memset(cmd->info.data, 0xff, cmd->info.datalen); | |
822 | cmd->scmd.data_len = 9; | |
823 | } else { | |
824 | if (cmd->info.datalen > SMU_I2C_WRITE_MAX) | |
825 | return -EINVAL; | |
826 | cmd->scmd.data_len = 9 + cmd->info.datalen; | |
827 | } | |
828 | ||
829 | DPRINTK("SMU: i2c enqueuing command\n"); | |
830 | DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", | |
831 | cmd->read ? "read" : "write", cmd->info.datalen, | |
832 | cmd->info.bus, cmd->info.caddr, | |
833 | cmd->info.subaddr[0], cmd->info.type); | |
834 | ||
835 | ||
836 | /* Enqueue command in i2c list, and if empty, enqueue also in | |
837 | * main command list | |
838 | */ | |
839 | spin_lock_irqsave(&smu->lock, flags); | |
840 | if (smu->cmd_i2c_cur == NULL) { | |
841 | smu->cmd_i2c_cur = cmd; | |
842 | list_add_tail(&cmd->scmd.link, &smu->cmd_list); | |
843 | if (smu->cmd_cur == NULL) | |
844 | smu_start_cmd(); | |
845 | } else | |
846 | list_add_tail(&cmd->link, &smu->cmd_i2c_list); | |
847 | spin_unlock_irqrestore(&smu->lock, flags); | |
848 | ||
849 | return 0; | |
850 | } | |
851 | ||
183d0202 BH |
852 | /* |
853 | * Handling of "partitions" | |
854 | */ | |
855 | ||
856 | static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) | |
857 | { | |
858 | DECLARE_COMPLETION(comp); | |
859 | unsigned int chunk; | |
860 | struct smu_cmd cmd; | |
861 | int rc; | |
862 | u8 params[8]; | |
863 | ||
864 | /* We currently use a chunk size of 0xe. We could check the | |
865 | * SMU firmware version and use bigger sizes though | |
866 | */ | |
867 | chunk = 0xe; | |
868 | ||
869 | while (len) { | |
870 | unsigned int clen = min(len, chunk); | |
871 | ||
872 | cmd.cmd = SMU_CMD_MISC_ee_COMMAND; | |
873 | cmd.data_len = 7; | |
874 | cmd.data_buf = params; | |
875 | cmd.reply_len = chunk; | |
876 | cmd.reply_buf = dest; | |
877 | cmd.done = smu_done_complete; | |
878 | cmd.misc = ∁ | |
879 | params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; | |
880 | params[1] = 0x4; | |
881 | *((u32 *)¶ms[2]) = addr; | |
882 | params[6] = clen; | |
883 | ||
884 | rc = smu_queue_cmd(&cmd); | |
885 | if (rc) | |
886 | return rc; | |
887 | wait_for_completion(&comp); | |
888 | if (cmd.status != 0) | |
889 | return rc; | |
890 | if (cmd.reply_len != clen) { | |
891 | printk(KERN_DEBUG "SMU: short read in " | |
892 | "smu_read_datablock, got: %d, want: %d\n", | |
893 | cmd.reply_len, clen); | |
894 | return -EIO; | |
895 | } | |
896 | len -= clen; | |
897 | addr += clen; | |
898 | dest += clen; | |
899 | } | |
900 | return 0; | |
901 | } | |
902 | ||
903 | static struct smu_sdbp_header *smu_create_sdb_partition(int id) | |
904 | { | |
905 | DECLARE_COMPLETION(comp); | |
906 | struct smu_simple_cmd cmd; | |
907 | unsigned int addr, len, tlen; | |
908 | struct smu_sdbp_header *hdr; | |
909 | struct property *prop; | |
910 | ||
911 | /* First query the partition info */ | |
1beb6a7d | 912 | DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); |
183d0202 BH |
913 | smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, |
914 | smu_done_complete, &comp, | |
915 | SMU_CMD_PARTITION_LATEST, id); | |
916 | wait_for_completion(&comp); | |
1beb6a7d BH |
917 | DPRINTK("SMU: done, status: %d, reply_len: %d\n", |
918 | cmd.cmd.status, cmd.cmd.reply_len); | |
183d0202 BH |
919 | |
920 | /* Partition doesn't exist (or other error) */ | |
921 | if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) | |
922 | return NULL; | |
923 | ||
924 | /* Fetch address and length from reply */ | |
925 | addr = *((u16 *)cmd.buffer); | |
926 | len = cmd.buffer[3] << 2; | |
927 | /* Calucluate total length to allocate, including the 17 bytes | |
928 | * for "sdb-partition-XX" that we append at the end of the buffer | |
929 | */ | |
930 | tlen = sizeof(struct property) + len + 18; | |
931 | ||
932 | prop = kcalloc(tlen, 1, GFP_KERNEL); | |
933 | if (prop == NULL) | |
934 | return NULL; | |
935 | hdr = (struct smu_sdbp_header *)(prop + 1); | |
936 | prop->name = ((char *)prop) + tlen - 18; | |
937 | sprintf(prop->name, "sdb-partition-%02x", id); | |
938 | prop->length = len; | |
939 | prop->value = (unsigned char *)hdr; | |
940 | prop->next = NULL; | |
941 | ||
942 | /* Read the datablock */ | |
943 | if (smu_read_datablock((u8 *)hdr, addr, len)) { | |
944 | printk(KERN_DEBUG "SMU: datablock read failed while reading " | |
945 | "partition %02x !\n", id); | |
946 | goto failure; | |
947 | } | |
948 | ||
949 | /* Got it, check a few things and create the property */ | |
950 | if (hdr->id != id) { | |
951 | printk(KERN_DEBUG "SMU: Reading partition %02x and got " | |
952 | "%02x !\n", id, hdr->id); | |
953 | goto failure; | |
954 | } | |
955 | if (prom_add_property(smu->of_node, prop)) { | |
956 | printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " | |
957 | "property !\n", id); | |
958 | goto failure; | |
959 | } | |
960 | ||
961 | return hdr; | |
962 | failure: | |
963 | kfree(prop); | |
964 | return NULL; | |
965 | } | |
966 | ||
967 | /* Note: Only allowed to return error code in pointers (using ERR_PTR) | |
968 | * when interruptible is 1 | |
969 | */ | |
970 | struct smu_sdbp_header *__smu_get_sdb_partition(int id, unsigned int *size, | |
971 | int interruptible) | |
4350147a BH |
972 | { |
973 | char pname[32]; | |
183d0202 | 974 | struct smu_sdbp_header *part; |
4350147a BH |
975 | |
976 | if (!smu) | |
977 | return NULL; | |
978 | ||
979 | sprintf(pname, "sdb-partition-%02x", id); | |
183d0202 | 980 | |
1beb6a7d BH |
981 | DPRINTK("smu_get_sdb_partition(%02x)\n", id); |
982 | ||
183d0202 BH |
983 | if (interruptible) { |
984 | int rc; | |
985 | rc = down_interruptible(&smu_part_access); | |
986 | if (rc) | |
987 | return ERR_PTR(rc); | |
988 | } else | |
989 | down(&smu_part_access); | |
990 | ||
991 | part = (struct smu_sdbp_header *)get_property(smu->of_node, | |
4350147a | 992 | pname, size); |
183d0202 | 993 | if (part == NULL) { |
1beb6a7d | 994 | DPRINTK("trying to extract from SMU ...\n"); |
183d0202 BH |
995 | part = smu_create_sdb_partition(id); |
996 | if (part != NULL && size) | |
997 | *size = part->len << 2; | |
998 | } | |
999 | up(&smu_part_access); | |
1000 | return part; | |
1001 | } | |
1002 | ||
1003 | struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) | |
1004 | { | |
1005 | return __smu_get_sdb_partition(id, size, 0); | |
4350147a BH |
1006 | } |
1007 | EXPORT_SYMBOL(smu_get_sdb_partition); | |
0365ba7f BH |
1008 | |
1009 | ||
1010 | /* | |
1011 | * Userland driver interface | |
1012 | */ | |
1013 | ||
1014 | ||
1015 | static LIST_HEAD(smu_clist); | |
1016 | static DEFINE_SPINLOCK(smu_clist_lock); | |
1017 | ||
1018 | enum smu_file_mode { | |
1019 | smu_file_commands, | |
1020 | smu_file_events, | |
1021 | smu_file_closing | |
1022 | }; | |
1023 | ||
1024 | struct smu_private | |
1025 | { | |
1026 | struct list_head list; | |
1027 | enum smu_file_mode mode; | |
1028 | int busy; | |
1029 | struct smu_cmd cmd; | |
1030 | spinlock_t lock; | |
1031 | wait_queue_head_t wait; | |
1032 | u8 buffer[SMU_MAX_DATA]; | |
1033 | }; | |
1034 | ||
1035 | ||
1036 | static int smu_open(struct inode *inode, struct file *file) | |
1037 | { | |
1038 | struct smu_private *pp; | |
1039 | unsigned long flags; | |
1040 | ||
1041 | pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL); | |
1042 | if (pp == 0) | |
1043 | return -ENOMEM; | |
1044 | memset(pp, 0, sizeof(struct smu_private)); | |
1045 | spin_lock_init(&pp->lock); | |
1046 | pp->mode = smu_file_commands; | |
1047 | init_waitqueue_head(&pp->wait); | |
1048 | ||
1049 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1050 | list_add(&pp->list, &smu_clist); | |
1051 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1052 | file->private_data = pp; | |
1053 | ||
1054 | return 0; | |
1055 | } | |
1056 | ||
1057 | ||
1058 | static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) | |
1059 | { | |
1060 | struct smu_private *pp = misc; | |
1061 | ||
1062 | wake_up_all(&pp->wait); | |
1063 | } | |
1064 | ||
1065 | ||
1066 | static ssize_t smu_write(struct file *file, const char __user *buf, | |
1067 | size_t count, loff_t *ppos) | |
1068 | { | |
1069 | struct smu_private *pp = file->private_data; | |
1070 | unsigned long flags; | |
1071 | struct smu_user_cmd_hdr hdr; | |
1072 | int rc = 0; | |
1073 | ||
1074 | if (pp->busy) | |
1075 | return -EBUSY; | |
1076 | else if (copy_from_user(&hdr, buf, sizeof(hdr))) | |
1077 | return -EFAULT; | |
1078 | else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { | |
1079 | pp->mode = smu_file_events; | |
1080 | return 0; | |
183d0202 BH |
1081 | } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { |
1082 | struct smu_sdbp_header *part; | |
1083 | part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); | |
1084 | if (part == NULL) | |
1085 | return -EINVAL; | |
1086 | else if (IS_ERR(part)) | |
1087 | return PTR_ERR(part); | |
1088 | return 0; | |
0365ba7f BH |
1089 | } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) |
1090 | return -EINVAL; | |
1091 | else if (pp->mode != smu_file_commands) | |
1092 | return -EBADFD; | |
1093 | else if (hdr.data_len > SMU_MAX_DATA) | |
1094 | return -EINVAL; | |
1095 | ||
1096 | spin_lock_irqsave(&pp->lock, flags); | |
1097 | if (pp->busy) { | |
1098 | spin_unlock_irqrestore(&pp->lock, flags); | |
1099 | return -EBUSY; | |
1100 | } | |
1101 | pp->busy = 1; | |
1102 | pp->cmd.status = 1; | |
1103 | spin_unlock_irqrestore(&pp->lock, flags); | |
1104 | ||
1105 | if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { | |
1106 | pp->busy = 0; | |
1107 | return -EFAULT; | |
1108 | } | |
1109 | ||
1110 | pp->cmd.cmd = hdr.cmd; | |
1111 | pp->cmd.data_len = hdr.data_len; | |
1112 | pp->cmd.reply_len = SMU_MAX_DATA; | |
1113 | pp->cmd.data_buf = pp->buffer; | |
1114 | pp->cmd.reply_buf = pp->buffer; | |
1115 | pp->cmd.done = smu_user_cmd_done; | |
1116 | pp->cmd.misc = pp; | |
1117 | rc = smu_queue_cmd(&pp->cmd); | |
1118 | if (rc < 0) | |
1119 | return rc; | |
1120 | return count; | |
1121 | } | |
1122 | ||
1123 | ||
1124 | static ssize_t smu_read_command(struct file *file, struct smu_private *pp, | |
1125 | char __user *buf, size_t count) | |
1126 | { | |
1127 | DECLARE_WAITQUEUE(wait, current); | |
1128 | struct smu_user_reply_hdr hdr; | |
1129 | unsigned long flags; | |
1130 | int size, rc = 0; | |
1131 | ||
1132 | if (!pp->busy) | |
1133 | return 0; | |
1134 | if (count < sizeof(struct smu_user_reply_hdr)) | |
1135 | return -EOVERFLOW; | |
1136 | spin_lock_irqsave(&pp->lock, flags); | |
1137 | if (pp->cmd.status == 1) { | |
1138 | if (file->f_flags & O_NONBLOCK) | |
1139 | return -EAGAIN; | |
1140 | add_wait_queue(&pp->wait, &wait); | |
1141 | for (;;) { | |
1142 | set_current_state(TASK_INTERRUPTIBLE); | |
1143 | rc = 0; | |
1144 | if (pp->cmd.status != 1) | |
1145 | break; | |
1146 | rc = -ERESTARTSYS; | |
1147 | if (signal_pending(current)) | |
1148 | break; | |
1149 | spin_unlock_irqrestore(&pp->lock, flags); | |
1150 | schedule(); | |
1151 | spin_lock_irqsave(&pp->lock, flags); | |
1152 | } | |
1153 | set_current_state(TASK_RUNNING); | |
1154 | remove_wait_queue(&pp->wait, &wait); | |
1155 | } | |
1156 | spin_unlock_irqrestore(&pp->lock, flags); | |
1157 | if (rc) | |
1158 | return rc; | |
1159 | if (pp->cmd.status != 0) | |
1160 | pp->cmd.reply_len = 0; | |
1161 | size = sizeof(hdr) + pp->cmd.reply_len; | |
1162 | if (count < size) | |
1163 | size = count; | |
1164 | rc = size; | |
1165 | hdr.status = pp->cmd.status; | |
1166 | hdr.reply_len = pp->cmd.reply_len; | |
1167 | if (copy_to_user(buf, &hdr, sizeof(hdr))) | |
1168 | return -EFAULT; | |
1169 | size -= sizeof(hdr); | |
1170 | if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) | |
1171 | return -EFAULT; | |
1172 | pp->busy = 0; | |
1173 | ||
1174 | return rc; | |
1175 | } | |
1176 | ||
1177 | ||
1178 | static ssize_t smu_read_events(struct file *file, struct smu_private *pp, | |
1179 | char __user *buf, size_t count) | |
1180 | { | |
1181 | /* Not implemented */ | |
1182 | msleep_interruptible(1000); | |
1183 | return 0; | |
1184 | } | |
1185 | ||
1186 | ||
1187 | static ssize_t smu_read(struct file *file, char __user *buf, | |
1188 | size_t count, loff_t *ppos) | |
1189 | { | |
1190 | struct smu_private *pp = file->private_data; | |
1191 | ||
1192 | if (pp->mode == smu_file_commands) | |
1193 | return smu_read_command(file, pp, buf, count); | |
1194 | if (pp->mode == smu_file_events) | |
1195 | return smu_read_events(file, pp, buf, count); | |
1196 | ||
1197 | return -EBADFD; | |
1198 | } | |
1199 | ||
1200 | static unsigned int smu_fpoll(struct file *file, poll_table *wait) | |
1201 | { | |
1202 | struct smu_private *pp = file->private_data; | |
1203 | unsigned int mask = 0; | |
1204 | unsigned long flags; | |
1205 | ||
1206 | if (pp == 0) | |
1207 | return 0; | |
1208 | ||
1209 | if (pp->mode == smu_file_commands) { | |
1210 | poll_wait(file, &pp->wait, wait); | |
1211 | ||
1212 | spin_lock_irqsave(&pp->lock, flags); | |
1213 | if (pp->busy && pp->cmd.status != 1) | |
1214 | mask |= POLLIN; | |
1215 | spin_unlock_irqrestore(&pp->lock, flags); | |
1216 | } if (pp->mode == smu_file_events) { | |
1217 | /* Not yet implemented */ | |
1218 | } | |
1219 | return mask; | |
1220 | } | |
1221 | ||
1222 | static int smu_release(struct inode *inode, struct file *file) | |
1223 | { | |
1224 | struct smu_private *pp = file->private_data; | |
1225 | unsigned long flags; | |
1226 | unsigned int busy; | |
1227 | ||
1228 | if (pp == 0) | |
1229 | return 0; | |
1230 | ||
1231 | file->private_data = NULL; | |
1232 | ||
1233 | /* Mark file as closing to avoid races with new request */ | |
1234 | spin_lock_irqsave(&pp->lock, flags); | |
1235 | pp->mode = smu_file_closing; | |
1236 | busy = pp->busy; | |
1237 | ||
1238 | /* Wait for any pending request to complete */ | |
1239 | if (busy && pp->cmd.status == 1) { | |
1240 | DECLARE_WAITQUEUE(wait, current); | |
1241 | ||
1242 | add_wait_queue(&pp->wait, &wait); | |
1243 | for (;;) { | |
1244 | set_current_state(TASK_UNINTERRUPTIBLE); | |
1245 | if (pp->cmd.status != 1) | |
1246 | break; | |
1247 | spin_lock_irqsave(&pp->lock, flags); | |
1248 | schedule(); | |
1249 | spin_unlock_irqrestore(&pp->lock, flags); | |
1250 | } | |
1251 | set_current_state(TASK_RUNNING); | |
1252 | remove_wait_queue(&pp->wait, &wait); | |
1253 | } | |
1254 | spin_unlock_irqrestore(&pp->lock, flags); | |
1255 | ||
1256 | spin_lock_irqsave(&smu_clist_lock, flags); | |
1257 | list_del(&pp->list); | |
1258 | spin_unlock_irqrestore(&smu_clist_lock, flags); | |
1259 | kfree(pp); | |
1260 | ||
1261 | return 0; | |
1262 | } | |
1263 | ||
1264 | ||
6b67f62c | 1265 | static struct file_operations smu_device_fops = { |
0365ba7f BH |
1266 | .llseek = no_llseek, |
1267 | .read = smu_read, | |
1268 | .write = smu_write, | |
1269 | .poll = smu_fpoll, | |
1270 | .open = smu_open, | |
1271 | .release = smu_release, | |
1272 | }; | |
1273 | ||
6b67f62c | 1274 | static struct miscdevice pmu_device = { |
0365ba7f BH |
1275 | MISC_DYNAMIC_MINOR, "smu", &smu_device_fops |
1276 | }; | |
1277 | ||
1278 | static int smu_device_init(void) | |
1279 | { | |
1280 | if (!smu) | |
1281 | return -ENODEV; | |
1282 | if (misc_register(&pmu_device) < 0) | |
1283 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
1284 | return 0; | |
1285 | } | |
1286 | device_initcall(smu_device_init); |