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1da177e4 LT |
1 | /* |
2 | * Device driver for the IIsi-style ADB on some Mac LC and II-class machines | |
3 | * | |
4 | * Based on via-cuda.c and via-macii.c, as well as the original | |
5 | * adb-bus.c, which in turn is somewhat influenced by (but uses no | |
6 | * code from) the NetBSD HWDIRECT ADB code. Original IIsi driver work | |
7 | * was done by Robert Thompson and integrated into the old style | |
8 | * driver by Michael Schmitz. | |
9 | * | |
10 | * Original sources (c) Alan Cox, Paul Mackerras, and others. | |
11 | * | |
12 | * Rewritten for Unified ADB by David Huggins-Daines <dhd@debian.org> | |
13 | * | |
14 | * 7/13/2000- extensive changes by Andrew McPherson <andrew@macduff.dhs.org> | |
15 | * Works about 30% of the time now. | |
16 | */ | |
17 | ||
18 | #include <linux/types.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/adb.h> | |
23 | #include <linux/cuda.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/interrupt.h> | |
26 | #include <asm/macintosh.h> | |
27 | #include <asm/macints.h> | |
28 | #include <asm/machw.h> | |
29 | #include <asm/mac_via.h> | |
30 | ||
31 | static volatile unsigned char *via; | |
32 | ||
33 | /* VIA registers - spaced 0x200 bytes apart - only the ones we actually use */ | |
34 | #define RS 0x200 /* skip between registers */ | |
35 | #define B 0 /* B-side data */ | |
36 | #define A RS /* A-side data */ | |
37 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
38 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
39 | #define SR (10*RS) /* Shift register */ | |
40 | #define ACR (11*RS) /* Auxiliary control register */ | |
41 | #define IFR (13*RS) /* Interrupt flag register */ | |
42 | #define IER (14*RS) /* Interrupt enable register */ | |
43 | ||
44 | /* Bits in B data register: all active low */ | |
45 | #define TREQ 0x08 /* Transfer request (input) */ | |
46 | #define TACK 0x10 /* Transfer acknowledge (output) */ | |
47 | #define TIP 0x20 /* Transfer in progress (output) */ | |
48 | #define ST_MASK 0x30 /* mask for selecting ADB state bits */ | |
49 | ||
50 | /* Bits in ACR */ | |
51 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
52 | #define SR_EXT 0x0c /* Shift on external clock */ | |
53 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
54 | ||
55 | /* Bits in IFR and IER */ | |
56 | #define IER_SET 0x80 /* set bits in IER */ | |
57 | #define IER_CLR 0 /* clear bits in IER */ | |
58 | #define SR_INT 0x04 /* Shift register full/empty */ | |
59 | #define SR_DATA 0x08 /* Shift register data */ | |
60 | #define SR_CLOCK 0x10 /* Shift register clock */ | |
61 | ||
62 | #define ADB_DELAY 150 | |
63 | ||
64 | #undef DEBUG_MACIISI_ADB | |
65 | ||
66 | static struct adb_request* current_req = NULL; | |
67 | static struct adb_request* last_req = NULL; | |
68 | static unsigned char maciisi_rbuf[16]; | |
69 | static unsigned char *reply_ptr = NULL; | |
70 | static int data_index; | |
71 | static int reading_reply; | |
72 | static int reply_len; | |
73 | static int tmp; | |
74 | static int need_sync; | |
75 | ||
76 | static enum maciisi_state { | |
77 | idle, | |
78 | sending, | |
79 | reading, | |
80 | } maciisi_state; | |
81 | ||
82 | static int maciisi_probe(void); | |
83 | static int maciisi_init(void); | |
84 | static int maciisi_send_request(struct adb_request* req, int sync); | |
85 | static void maciisi_sync(struct adb_request *req); | |
86 | static int maciisi_write(struct adb_request* req); | |
87 | static irqreturn_t maciisi_interrupt(int irq, void* arg, struct pt_regs* regs); | |
88 | static void maciisi_input(unsigned char *buf, int nb, struct pt_regs *regs); | |
89 | static int maciisi_init_via(void); | |
90 | static void maciisi_poll(void); | |
91 | static int maciisi_start(void); | |
92 | ||
93 | struct adb_driver via_maciisi_driver = { | |
94 | "Mac IIsi", | |
95 | maciisi_probe, | |
96 | maciisi_init, | |
97 | maciisi_send_request, | |
98 | NULL, /* maciisi_adb_autopoll, */ | |
99 | maciisi_poll, | |
100 | NULL /* maciisi_reset_adb_bus */ | |
101 | }; | |
102 | ||
103 | static int | |
104 | maciisi_probe(void) | |
105 | { | |
106 | if (macintosh_config->adb_type != MAC_ADB_IISI) | |
107 | return -ENODEV; | |
108 | ||
109 | via = via1; | |
110 | return 0; | |
111 | } | |
112 | ||
113 | static int | |
114 | maciisi_init(void) | |
115 | { | |
116 | int err; | |
117 | ||
118 | if (via == NULL) | |
119 | return -ENODEV; | |
120 | ||
121 | if ((err = maciisi_init_via())) { | |
122 | printk(KERN_ERR "maciisi_init: maciisi_init_via() failed, code %d\n", err); | |
123 | via = NULL; | |
124 | return err; | |
125 | } | |
126 | ||
127 | if (request_irq(IRQ_MAC_ADB, maciisi_interrupt, IRQ_FLG_LOCK | IRQ_FLG_FAST, | |
128 | "ADB", maciisi_interrupt)) { | |
129 | printk(KERN_ERR "maciisi_init: can't get irq %d\n", IRQ_MAC_ADB); | |
130 | return -EAGAIN; | |
131 | } | |
132 | ||
133 | printk("adb: Mac IIsi driver v0.2 for Unified ADB.\n"); | |
134 | return 0; | |
135 | } | |
136 | ||
137 | /* Flush data from the ADB controller */ | |
138 | static void | |
139 | maciisi_stfu(void) | |
140 | { | |
141 | int status = via[B] & (TIP|TREQ); | |
142 | ||
143 | if (status & TREQ) { | |
144 | #ifdef DEBUG_MACIISI_ADB | |
145 | printk (KERN_DEBUG "maciisi_stfu called with TREQ high!\n"); | |
146 | #endif | |
147 | return; | |
148 | } | |
149 | ||
150 | udelay(ADB_DELAY); | |
151 | via[ACR] &= ~SR_OUT; | |
152 | via[IER] = IER_CLR | SR_INT; | |
153 | ||
154 | udelay(ADB_DELAY); | |
155 | ||
156 | status = via[B] & (TIP|TREQ); | |
157 | ||
158 | if (!(status & TREQ)) | |
159 | { | |
160 | via[B] |= TIP; | |
161 | ||
162 | while(1) | |
163 | { | |
164 | int poll_timeout = ADB_DELAY * 5; | |
165 | /* Poll for SR interrupt */ | |
166 | while (!(via[IFR] & SR_INT) && poll_timeout-- > 0) | |
167 | status = via[B] & (TIP|TREQ); | |
168 | ||
169 | tmp = via[SR]; /* Clear shift register */ | |
170 | #ifdef DEBUG_MACIISI_ADB | |
171 | printk(KERN_DEBUG "maciisi_stfu: status %x timeout %d data %x\n", | |
172 | status, poll_timeout, tmp); | |
173 | #endif | |
174 | if(via[B] & TREQ) | |
175 | break; | |
176 | ||
177 | /* ACK on-off */ | |
178 | via[B] |= TACK; | |
179 | udelay(ADB_DELAY); | |
180 | via[B] &= ~TACK; | |
181 | } | |
182 | ||
183 | /* end frame */ | |
184 | via[B] &= ~TIP; | |
185 | udelay(ADB_DELAY); | |
186 | } | |
187 | ||
188 | via[IER] = IER_SET | SR_INT; | |
189 | } | |
190 | ||
191 | /* All specifically VIA-related initialization goes here */ | |
192 | static int | |
193 | maciisi_init_via(void) | |
194 | { | |
195 | int i; | |
196 | ||
197 | /* Set the lines up. We want TREQ as input TACK|TIP as output */ | |
198 | via[DIRB] = (via[DIRB] | TACK | TIP) & ~TREQ; | |
199 | /* Shift register on input */ | |
200 | via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT; | |
201 | #ifdef DEBUG_MACIISI_ADB | |
202 | printk(KERN_DEBUG "maciisi_init_via: initial status %x\n", via[B] & (TIP|TREQ)); | |
203 | #endif | |
204 | /* Wipe any pending data and int */ | |
205 | tmp = via[SR]; | |
206 | /* Enable keyboard interrupts */ | |
207 | via[IER] = IER_SET | SR_INT; | |
208 | /* Set initial state: idle */ | |
209 | via[B] &= ~(TACK|TIP); | |
210 | /* Clear interrupt bit */ | |
211 | via[IFR] = SR_INT; | |
212 | ||
213 | for(i = 0; i < 60; i++) { | |
214 | udelay(ADB_DELAY); | |
215 | maciisi_stfu(); | |
216 | udelay(ADB_DELAY); | |
217 | if(via[B] & TREQ) | |
218 | break; | |
219 | } | |
220 | if (i == 60) | |
221 | printk(KERN_ERR "maciisi_init_via: bus jam?\n"); | |
222 | ||
223 | maciisi_state = idle; | |
224 | need_sync = 0; | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
229 | /* Send a request, possibly waiting for a reply */ | |
230 | static int | |
231 | maciisi_send_request(struct adb_request* req, int sync) | |
232 | { | |
233 | int i; | |
234 | ||
235 | #ifdef DEBUG_MACIISI_ADB | |
236 | static int dump_packet = 0; | |
237 | #endif | |
238 | ||
239 | if (via == NULL) { | |
240 | req->complete = 1; | |
241 | return -ENXIO; | |
242 | } | |
243 | ||
244 | #ifdef DEBUG_MACIISI_ADB | |
245 | if (dump_packet) { | |
246 | printk(KERN_DEBUG "maciisi_send_request:"); | |
247 | for (i = 0; i < req->nbytes; i++) { | |
248 | printk(" %.2x", req->data[i]); | |
249 | } | |
250 | printk(" sync %d\n", sync); | |
251 | } | |
252 | #endif | |
253 | ||
254 | req->reply_expected = 1; | |
255 | ||
256 | i = maciisi_write(req); | |
257 | if (i) | |
258 | { | |
259 | /* Normally, if a packet requires syncing, that happens at the end of | |
260 | * maciisi_send_request. But if the transfer fails, it will be restarted | |
261 | * by maciisi_interrupt(). We use need_sync to tell maciisi_interrupt | |
262 | * when to sync a packet that it sends out. | |
263 | * | |
264 | * Suggestions on a better way to do this are welcome. | |
265 | */ | |
266 | if(i == -EBUSY && sync) | |
267 | need_sync = 1; | |
268 | else | |
269 | need_sync = 0; | |
270 | return i; | |
271 | } | |
272 | if(sync) | |
273 | maciisi_sync(req); | |
274 | ||
275 | return 0; | |
276 | } | |
277 | ||
278 | /* Poll the ADB chip until the request completes */ | |
279 | static void maciisi_sync(struct adb_request *req) | |
280 | { | |
281 | int count = 0; | |
282 | ||
283 | #ifdef DEBUG_MACIISI_ADB | |
284 | printk(KERN_DEBUG "maciisi_sync called\n"); | |
285 | #endif | |
286 | ||
287 | /* If for some reason the ADB chip shuts up on us, we want to avoid an endless loop. */ | |
288 | while (!req->complete && count++ < 50) { | |
289 | maciisi_poll(); | |
290 | } | |
291 | /* This could be BAD... when the ADB controller doesn't respond | |
292 | * for this long, it's probably not coming back :-( */ | |
293 | if(count >= 50) /* Hopefully shouldn't happen */ | |
294 | printk(KERN_ERR "maciisi_send_request: poll timed out!\n"); | |
295 | } | |
296 | ||
297 | /* Enqueue a request, and run the queue if possible */ | |
298 | static int | |
299 | maciisi_write(struct adb_request* req) | |
300 | { | |
301 | unsigned long flags; | |
302 | int i; | |
303 | ||
304 | /* We will accept CUDA packets - the VIA sends them to us, so | |
305 | it figures that we should be able to send them to it */ | |
306 | if (req->nbytes < 2 || req->data[0] > CUDA_PACKET) { | |
307 | printk(KERN_ERR "maciisi_write: packet too small or not an ADB or CUDA packet\n"); | |
308 | req->complete = 1; | |
309 | return -EINVAL; | |
310 | } | |
311 | req->next = 0; | |
312 | req->sent = 0; | |
313 | req->complete = 0; | |
314 | req->reply_len = 0; | |
315 | ||
316 | local_irq_save(flags); | |
317 | ||
318 | if (current_req) { | |
319 | last_req->next = req; | |
320 | last_req = req; | |
321 | } else { | |
322 | current_req = req; | |
323 | last_req = req; | |
324 | } | |
325 | if (maciisi_state == idle) | |
326 | { | |
327 | i = maciisi_start(); | |
328 | if(i != 0) | |
329 | { | |
330 | local_irq_restore(flags); | |
331 | return i; | |
332 | } | |
333 | } | |
334 | else | |
335 | { | |
336 | #ifdef DEBUG_MACIISI_ADB | |
337 | printk(KERN_DEBUG "maciisi_write: would start, but state is %d\n", maciisi_state); | |
338 | #endif | |
339 | local_irq_restore(flags); | |
340 | return -EBUSY; | |
341 | } | |
342 | ||
343 | local_irq_restore(flags); | |
344 | ||
345 | return 0; | |
346 | } | |
347 | ||
348 | static int | |
349 | maciisi_start(void) | |
350 | { | |
351 | struct adb_request* req; | |
352 | int status; | |
353 | ||
354 | #ifdef DEBUG_MACIISI_ADB | |
355 | status = via[B] & (TIP | TREQ); | |
356 | ||
357 | printk(KERN_DEBUG "maciisi_start called, state=%d, status=%x, ifr=%x\n", maciisi_state, status, via[IFR]); | |
358 | #endif | |
359 | ||
360 | if (maciisi_state != idle) { | |
361 | /* shouldn't happen */ | |
362 | printk(KERN_ERR "maciisi_start: maciisi_start called when driver busy!\n"); | |
363 | return -EBUSY; | |
364 | } | |
365 | ||
366 | req = current_req; | |
367 | if (req == NULL) | |
368 | return -EINVAL; | |
369 | ||
370 | status = via[B] & (TIP|TREQ); | |
371 | if (!(status & TREQ)) { | |
372 | #ifdef DEBUG_MACIISI_ADB | |
373 | printk(KERN_DEBUG "maciisi_start: bus busy - aborting\n"); | |
374 | #endif | |
375 | return -EBUSY; | |
376 | } | |
377 | ||
378 | /* Okay, send */ | |
379 | #ifdef DEBUG_MACIISI_ADB | |
380 | printk(KERN_DEBUG "maciisi_start: sending\n"); | |
381 | #endif | |
382 | /* Set state to active */ | |
383 | via[B] |= TIP; | |
384 | /* ACK off */ | |
385 | via[B] &= ~TACK; | |
386 | /* Delay */ | |
387 | udelay(ADB_DELAY); | |
388 | /* Shift out and send */ | |
389 | via[ACR] |= SR_OUT; | |
390 | via[SR] = req->data[0]; | |
391 | data_index = 1; | |
392 | /* ACK on */ | |
393 | via[B] |= TACK; | |
394 | maciisi_state = sending; | |
395 | ||
396 | return 0; | |
397 | } | |
398 | ||
399 | void | |
400 | maciisi_poll(void) | |
401 | { | |
402 | unsigned long flags; | |
403 | ||
404 | local_irq_save(flags); | |
405 | if (via[IFR] & SR_INT) { | |
406 | maciisi_interrupt(0, 0, 0); | |
407 | } | |
408 | else /* avoid calling this function too quickly in a loop */ | |
409 | udelay(ADB_DELAY); | |
410 | ||
411 | local_irq_restore(flags); | |
412 | } | |
413 | ||
414 | /* Shift register interrupt - this is *supposed* to mean that the | |
415 | register is either full or empty. In practice, I have no idea what | |
416 | it means :( */ | |
417 | static irqreturn_t | |
418 | maciisi_interrupt(int irq, void* arg, struct pt_regs* regs) | |
419 | { | |
420 | int status; | |
421 | struct adb_request *req; | |
422 | #ifdef DEBUG_MACIISI_ADB | |
423 | static int dump_reply = 0; | |
424 | #endif | |
425 | int i; | |
426 | unsigned long flags; | |
427 | ||
428 | local_irq_save(flags); | |
429 | ||
430 | status = via[B] & (TIP|TREQ); | |
431 | #ifdef DEBUG_MACIISI_ADB | |
432 | printk(KERN_DEBUG "state %d status %x ifr %x\n", maciisi_state, status, via[IFR]); | |
433 | #endif | |
434 | ||
435 | if (!(via[IFR] & SR_INT)) { | |
436 | /* Shouldn't happen, we hope */ | |
437 | printk(KERN_ERR "maciisi_interrupt: called without interrupt flag set\n"); | |
438 | local_irq_restore(flags); | |
439 | return IRQ_NONE; | |
440 | } | |
441 | ||
442 | /* Clear the interrupt */ | |
443 | /* via[IFR] = SR_INT; */ | |
444 | ||
445 | switch_start: | |
446 | switch (maciisi_state) { | |
447 | case idle: | |
448 | if (status & TIP) | |
449 | printk(KERN_ERR "maciisi_interrupt: state is idle but TIP asserted!\n"); | |
450 | ||
451 | if(!reading_reply) | |
452 | udelay(ADB_DELAY); | |
453 | /* Shift in */ | |
454 | via[ACR] &= ~SR_OUT; | |
455 | /* Signal start of frame */ | |
456 | via[B] |= TIP; | |
457 | /* Clear the interrupt (throw this value on the floor, it's useless) */ | |
458 | tmp = via[SR]; | |
459 | /* ACK adb chip, high-low */ | |
460 | via[B] |= TACK; | |
461 | udelay(ADB_DELAY); | |
462 | via[B] &= ~TACK; | |
463 | reply_len = 0; | |
464 | maciisi_state = reading; | |
465 | if (reading_reply) { | |
466 | reply_ptr = current_req->reply; | |
467 | } else { | |
468 | reply_ptr = maciisi_rbuf; | |
469 | } | |
470 | break; | |
471 | ||
472 | case sending: | |
473 | /* via[SR]; */ | |
474 | /* Set ACK off */ | |
475 | via[B] &= ~TACK; | |
476 | req = current_req; | |
477 | ||
478 | if (!(status & TREQ)) { | |
479 | /* collision */ | |
480 | printk(KERN_ERR "maciisi_interrupt: send collision\n"); | |
481 | /* Set idle and input */ | |
482 | via[ACR] &= ~SR_OUT; | |
483 | tmp = via[SR]; | |
484 | via[B] &= ~TIP; | |
485 | /* Must re-send */ | |
486 | reading_reply = 0; | |
487 | reply_len = 0; | |
488 | maciisi_state = idle; | |
489 | udelay(ADB_DELAY); | |
490 | /* process this now, because the IFR has been cleared */ | |
491 | goto switch_start; | |
492 | } | |
493 | ||
494 | udelay(ADB_DELAY); | |
495 | ||
496 | if (data_index >= req->nbytes) { | |
497 | /* Sent the whole packet, put the bus back in idle state */ | |
498 | /* Shift in, we are about to read a reply (hopefully) */ | |
499 | via[ACR] &= ~SR_OUT; | |
500 | tmp = via[SR]; | |
501 | /* End of frame */ | |
502 | via[B] &= ~TIP; | |
503 | req->sent = 1; | |
504 | maciisi_state = idle; | |
505 | if (req->reply_expected) { | |
506 | /* Note: only set this once we've | |
507 | successfully sent the packet */ | |
508 | reading_reply = 1; | |
509 | } else { | |
510 | current_req = req->next; | |
511 | if (req->done) | |
512 | (*req->done)(req); | |
513 | /* Do any queued requests now */ | |
514 | i = maciisi_start(); | |
515 | if(i == 0 && need_sync) { | |
516 | /* Packet needs to be synced */ | |
517 | maciisi_sync(current_req); | |
518 | } | |
519 | if(i != -EBUSY) | |
520 | need_sync = 0; | |
521 | } | |
522 | } else { | |
523 | /* Sending more stuff */ | |
524 | /* Shift out */ | |
525 | via[ACR] |= SR_OUT; | |
526 | /* Write */ | |
527 | via[SR] = req->data[data_index++]; | |
528 | /* Signal 'byte ready' */ | |
529 | via[B] |= TACK; | |
530 | } | |
531 | break; | |
532 | ||
533 | case reading: | |
534 | /* Shift in */ | |
535 | /* via[ACR] &= ~SR_OUT; */ /* Not in 2.2 */ | |
536 | if (reply_len++ > 16) { | |
537 | printk(KERN_ERR "maciisi_interrupt: reply too long, aborting read\n"); | |
538 | via[B] |= TACK; | |
539 | udelay(ADB_DELAY); | |
540 | via[B] &= ~(TACK|TIP); | |
541 | maciisi_state = idle; | |
542 | i = maciisi_start(); | |
543 | if(i == 0 && need_sync) { | |
544 | /* Packet needs to be synced */ | |
545 | maciisi_sync(current_req); | |
546 | } | |
547 | if(i != -EBUSY) | |
548 | need_sync = 0; | |
549 | break; | |
550 | } | |
551 | /* Read data */ | |
552 | *reply_ptr++ = via[SR]; | |
553 | status = via[B] & (TIP|TREQ); | |
554 | /* ACK on/off */ | |
555 | via[B] |= TACK; | |
556 | udelay(ADB_DELAY); | |
557 | via[B] &= ~TACK; | |
558 | if (!(status & TREQ)) | |
559 | break; /* more stuff to deal with */ | |
560 | ||
561 | /* end of frame */ | |
562 | via[B] &= ~TIP; | |
563 | tmp = via[SR]; /* That's what happens in 2.2 */ | |
564 | udelay(ADB_DELAY); /* Give controller time to recover */ | |
565 | ||
566 | /* end of packet, deal with it */ | |
567 | if (reading_reply) { | |
568 | req = current_req; | |
569 | req->reply_len = reply_ptr - req->reply; | |
570 | if (req->data[0] == ADB_PACKET) { | |
571 | /* Have to adjust the reply from ADB commands */ | |
572 | if (req->reply_len <= 2 || (req->reply[1] & 2) != 0) { | |
573 | /* the 0x2 bit indicates no response */ | |
574 | req->reply_len = 0; | |
575 | } else { | |
576 | /* leave just the command and result bytes in the reply */ | |
577 | req->reply_len -= 2; | |
578 | memmove(req->reply, req->reply + 2, req->reply_len); | |
579 | } | |
580 | } | |
581 | #ifdef DEBUG_MACIISI_ADB | |
582 | if (dump_reply) { | |
583 | int i; | |
584 | printk(KERN_DEBUG "maciisi_interrupt: reply is "); | |
585 | for (i = 0; i < req->reply_len; ++i) | |
586 | printk(" %.2x", req->reply[i]); | |
587 | printk("\n"); | |
588 | } | |
589 | #endif | |
590 | req->complete = 1; | |
591 | current_req = req->next; | |
592 | if (req->done) | |
593 | (*req->done)(req); | |
594 | /* Obviously, we got it */ | |
595 | reading_reply = 0; | |
596 | } else { | |
597 | maciisi_input(maciisi_rbuf, reply_ptr - maciisi_rbuf, regs); | |
598 | } | |
599 | maciisi_state = idle; | |
600 | status = via[B] & (TIP|TREQ); | |
601 | if (!(status & TREQ)) { | |
602 | /* Timeout?! More likely, another packet coming in already */ | |
603 | #ifdef DEBUG_MACIISI_ADB | |
604 | printk(KERN_DEBUG "extra data after packet: status %x ifr %x\n", | |
605 | status, via[IFR]); | |
606 | #endif | |
607 | #if 0 | |
608 | udelay(ADB_DELAY); | |
609 | via[B] |= TIP; | |
610 | ||
611 | maciisi_state = reading; | |
612 | reading_reply = 0; | |
613 | reply_ptr = maciisi_rbuf; | |
614 | #else | |
615 | /* Process the packet now */ | |
616 | reading_reply = 0; | |
617 | goto switch_start; | |
618 | #endif | |
619 | /* We used to do this... but the controller might actually have data for us */ | |
620 | /* maciisi_stfu(); */ | |
621 | } | |
622 | else { | |
623 | /* Do any queued requests now if possible */ | |
624 | i = maciisi_start(); | |
625 | if(i == 0 && need_sync) { | |
626 | /* Packet needs to be synced */ | |
627 | maciisi_sync(current_req); | |
628 | } | |
629 | if(i != -EBUSY) | |
630 | need_sync = 0; | |
631 | } | |
632 | break; | |
633 | ||
634 | default: | |
635 | printk("maciisi_interrupt: unknown maciisi_state %d?\n", maciisi_state); | |
636 | } | |
637 | local_irq_restore(flags); | |
638 | return IRQ_HANDLED; | |
639 | } | |
640 | ||
641 | static void | |
642 | maciisi_input(unsigned char *buf, int nb, struct pt_regs *regs) | |
643 | { | |
644 | #ifdef DEBUG_MACIISI_ADB | |
645 | int i; | |
646 | #endif | |
647 | ||
648 | switch (buf[0]) { | |
649 | case ADB_PACKET: | |
650 | adb_input(buf+2, nb-2, regs, buf[1] & 0x40); | |
651 | break; | |
652 | default: | |
653 | #ifdef DEBUG_MACIISI_ADB | |
654 | printk(KERN_DEBUG "data from IIsi ADB (%d bytes):", nb); | |
655 | for (i = 0; i < nb; ++i) | |
656 | printk(" %.2x", buf[i]); | |
657 | printk("\n"); | |
658 | #endif | |
659 | break; | |
660 | } | |
661 | } |