Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Device driver for the via-pmu on Apple Powermacs. | |
3 | * | |
4 | * The VIA (versatile interface adapter) interfaces to the PMU, | |
5 | * a 6805 microprocessor core whose primary function is to control | |
6 | * battery charging and system power on the PowerBook 3400 and 2400. | |
7 | * The PMU also controls the ADB (Apple Desktop Bus) which connects | |
8 | * to the keyboard and mouse, as well as the non-volatile RAM | |
9 | * and the RTC (real time clock) chip. | |
10 | * | |
11 | * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. | |
12 | * Copyright (C) 2001-2002 Benjamin Herrenschmidt | |
13 | * | |
14 | * THIS DRIVER IS BECOMING A TOTAL MESS ! | |
15 | * - Cleanup atomically disabling reply to PMU events after | |
16 | * a sleep or a freq. switch | |
17 | * - Move sleep code out of here to pmac_pm, merge into new | |
18 | * common PM infrastructure | |
19 | * - Move backlight code out as well | |
20 | * - Save/Restore PCI space properly | |
21 | * | |
22 | */ | |
23 | #include <stdarg.h> | |
24 | #include <linux/config.h> | |
25 | #include <linux/types.h> | |
26 | #include <linux/errno.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/sched.h> | |
30 | #include <linux/miscdevice.h> | |
31 | #include <linux/blkdev.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/poll.h> | |
35 | #include <linux/adb.h> | |
36 | #include <linux/pmu.h> | |
37 | #include <linux/cuda.h> | |
38 | #include <linux/smp_lock.h> | |
39 | #include <linux/module.h> | |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/pm.h> | |
42 | #include <linux/proc_fs.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/interrupt.h> | |
45 | #include <linux/device.h> | |
46 | #include <linux/sysdev.h> | |
47 | #include <linux/suspend.h> | |
48 | #include <linux/syscalls.h> | |
49 | #include <linux/cpu.h> | |
50 | #include <asm/prom.h> | |
51 | #include <asm/machdep.h> | |
52 | #include <asm/io.h> | |
53 | #include <asm/pgtable.h> | |
54 | #include <asm/system.h> | |
55 | #include <asm/sections.h> | |
56 | #include <asm/irq.h> | |
57 | #include <asm/pmac_feature.h> | |
58 | #include <asm/uaccess.h> | |
59 | #include <asm/mmu_context.h> | |
60 | #include <asm/cputable.h> | |
61 | #include <asm/time.h> | |
62 | #ifdef CONFIG_PMAC_BACKLIGHT | |
63 | #include <asm/backlight.h> | |
64 | #endif | |
65 | ||
e4ee69c8 BH |
66 | #ifdef CONFIG_PPC32 |
67 | #include <asm/open_pic.h> | |
68 | #endif | |
69 | ||
1da177e4 LT |
70 | /* Some compile options */ |
71 | #undef SUSPEND_USES_PMU | |
72 | #define DEBUG_SLEEP | |
73 | #undef HACKED_PCI_SAVE | |
74 | ||
75 | /* Misc minor number allocated for /dev/pmu */ | |
76 | #define PMU_MINOR 154 | |
77 | ||
78 | /* How many iterations between battery polls */ | |
79 | #define BATTERY_POLLING_COUNT 2 | |
80 | ||
81 | static volatile unsigned char __iomem *via; | |
82 | ||
83 | /* VIA registers - spaced 0x200 bytes apart */ | |
84 | #define RS 0x200 /* skip between registers */ | |
85 | #define B 0 /* B-side data */ | |
86 | #define A RS /* A-side data */ | |
87 | #define DIRB (2*RS) /* B-side direction (1=output) */ | |
88 | #define DIRA (3*RS) /* A-side direction (1=output) */ | |
89 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | |
90 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | |
91 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | |
92 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | |
93 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | |
94 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | |
95 | #define SR (10*RS) /* Shift register */ | |
96 | #define ACR (11*RS) /* Auxiliary control register */ | |
97 | #define PCR (12*RS) /* Peripheral control register */ | |
98 | #define IFR (13*RS) /* Interrupt flag register */ | |
99 | #define IER (14*RS) /* Interrupt enable register */ | |
100 | #define ANH (15*RS) /* A-side data, no handshake */ | |
101 | ||
102 | /* Bits in B data register: both active low */ | |
103 | #define TACK 0x08 /* Transfer acknowledge (input) */ | |
104 | #define TREQ 0x10 /* Transfer request (output) */ | |
105 | ||
106 | /* Bits in ACR */ | |
107 | #define SR_CTRL 0x1c /* Shift register control bits */ | |
108 | #define SR_EXT 0x0c /* Shift on external clock */ | |
109 | #define SR_OUT 0x10 /* Shift out if 1 */ | |
110 | ||
111 | /* Bits in IFR and IER */ | |
112 | #define IER_SET 0x80 /* set bits in IER */ | |
113 | #define IER_CLR 0 /* clear bits in IER */ | |
114 | #define SR_INT 0x04 /* Shift register full/empty */ | |
115 | #define CB2_INT 0x08 | |
116 | #define CB1_INT 0x10 /* transition on CB1 input */ | |
117 | ||
118 | static volatile enum pmu_state { | |
119 | idle, | |
120 | sending, | |
121 | intack, | |
122 | reading, | |
123 | reading_intr, | |
124 | locked, | |
125 | } pmu_state; | |
126 | ||
127 | static volatile enum int_data_state { | |
128 | int_data_empty, | |
129 | int_data_fill, | |
130 | int_data_ready, | |
131 | int_data_flush | |
132 | } int_data_state[2] = { int_data_empty, int_data_empty }; | |
133 | ||
134 | static struct adb_request *current_req; | |
135 | static struct adb_request *last_req; | |
136 | static struct adb_request *req_awaiting_reply; | |
137 | static unsigned char interrupt_data[2][32]; | |
138 | static int interrupt_data_len[2]; | |
139 | static int int_data_last; | |
140 | static unsigned char *reply_ptr; | |
141 | static int data_index; | |
142 | static int data_len; | |
143 | static volatile int adb_int_pending; | |
144 | static volatile int disable_poll; | |
145 | static struct adb_request bright_req_1, bright_req_2; | |
146 | static struct device_node *vias; | |
147 | static int pmu_kind = PMU_UNKNOWN; | |
148 | static int pmu_fully_inited = 0; | |
149 | static int pmu_has_adb; | |
51d3082f | 150 | static struct device_node *gpio_node; |
1da177e4 LT |
151 | static unsigned char __iomem *gpio_reg = NULL; |
152 | static int gpio_irq = -1; | |
153 | static int gpio_irq_enabled = -1; | |
154 | static volatile int pmu_suspended = 0; | |
155 | static spinlock_t pmu_lock; | |
156 | static u8 pmu_intr_mask; | |
157 | static int pmu_version; | |
158 | static int drop_interrupts; | |
a0005034 | 159 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 | 160 | static int option_lid_wakeup = 1; |
a0005034 | 161 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |
a04c8780 | 162 | static int sleep_in_progress; |
1da177e4 LT |
163 | static unsigned long async_req_locks; |
164 | static unsigned int pmu_irq_stats[11]; | |
165 | ||
166 | static struct proc_dir_entry *proc_pmu_root; | |
167 | static struct proc_dir_entry *proc_pmu_info; | |
168 | static struct proc_dir_entry *proc_pmu_irqstats; | |
169 | static struct proc_dir_entry *proc_pmu_options; | |
170 | static int option_server_mode; | |
171 | ||
1da177e4 LT |
172 | int pmu_battery_count; |
173 | int pmu_cur_battery; | |
174 | unsigned int pmu_power_flags; | |
175 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; | |
176 | static int query_batt_timer = BATTERY_POLLING_COUNT; | |
177 | static struct adb_request batt_req; | |
178 | static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; | |
1da177e4 LT |
179 | |
180 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
181 | extern int disable_kernel_backlight; | |
182 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | |
183 | ||
184 | int __fake_sleep; | |
185 | int asleep; | |
186 | struct notifier_block *sleep_notifier_list; | |
187 | ||
188 | #ifdef CONFIG_ADB | |
189 | static int adb_dev_map = 0; | |
190 | static int pmu_adb_flags; | |
191 | ||
192 | static int pmu_probe(void); | |
193 | static int pmu_init(void); | |
194 | static int pmu_send_request(struct adb_request *req, int sync); | |
195 | static int pmu_adb_autopoll(int devs); | |
196 | static int pmu_adb_reset_bus(void); | |
197 | #endif /* CONFIG_ADB */ | |
198 | ||
199 | static int init_pmu(void); | |
200 | static int pmu_queue_request(struct adb_request *req); | |
201 | static void pmu_start(void); | |
202 | static irqreturn_t via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs); | |
203 | static irqreturn_t gpio1_interrupt(int irq, void *arg, struct pt_regs *regs); | |
204 | static int proc_get_info(char *page, char **start, off_t off, | |
205 | int count, int *eof, void *data); | |
206 | static int proc_get_irqstats(char *page, char **start, off_t off, | |
207 | int count, int *eof, void *data); | |
208 | #ifdef CONFIG_PMAC_BACKLIGHT | |
209 | static int pmu_set_backlight_level(int level, void* data); | |
210 | static int pmu_set_backlight_enable(int on, int level, void* data); | |
211 | #endif /* CONFIG_PMAC_BACKLIGHT */ | |
1da177e4 LT |
212 | static void pmu_pass_intr(unsigned char *data, int len); |
213 | static int proc_get_batt(char *page, char **start, off_t off, | |
214 | int count, int *eof, void *data); | |
1da177e4 LT |
215 | static int proc_read_options(char *page, char **start, off_t off, |
216 | int count, int *eof, void *data); | |
217 | static int proc_write_options(struct file *file, const char __user *buffer, | |
218 | unsigned long count, void *data); | |
219 | ||
220 | #ifdef CONFIG_ADB | |
221 | struct adb_driver via_pmu_driver = { | |
222 | "PMU", | |
223 | pmu_probe, | |
224 | pmu_init, | |
225 | pmu_send_request, | |
226 | pmu_adb_autopoll, | |
227 | pmu_poll_adb, | |
228 | pmu_adb_reset_bus | |
229 | }; | |
230 | #endif /* CONFIG_ADB */ | |
231 | ||
232 | extern void low_sleep_handler(void); | |
233 | extern void enable_kernel_altivec(void); | |
234 | extern void enable_kernel_fp(void); | |
235 | ||
236 | #ifdef DEBUG_SLEEP | |
237 | int pmu_polled_request(struct adb_request *req); | |
238 | int pmu_wink(struct adb_request *req); | |
239 | #endif | |
240 | ||
241 | /* | |
242 | * This table indicates for each PMU opcode: | |
243 | * - the number of data bytes to be sent with the command, or -1 | |
244 | * if a length byte should be sent, | |
245 | * - the number of response bytes which the PMU will return, or | |
246 | * -1 if it will send a length byte. | |
247 | */ | |
aacaf9bd | 248 | static const s8 pmu_data_len[256][2] = { |
1da177e4 LT |
249 | /* 0 1 2 3 4 5 6 7 */ |
250 | /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
251 | /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
252 | /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
253 | /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
254 | /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
255 | /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, | |
256 | /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
257 | /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, | |
258 | /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
259 | /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, | |
260 | /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, | |
261 | /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, | |
262 | /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
263 | /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, | |
264 | /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
265 | /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, | |
266 | /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
267 | /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
268 | /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
269 | /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
270 | /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, | |
271 | /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
272 | /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
273 | /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
274 | /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
275 | /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
276 | /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
277 | /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, | |
278 | /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, | |
279 | /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, | |
280 | /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | |
281 | /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | |
282 | }; | |
283 | ||
284 | static char *pbook_type[] = { | |
285 | "Unknown PowerBook", | |
286 | "PowerBook 2400/3400/3500(G3)", | |
287 | "PowerBook G3 Series", | |
288 | "1999 PowerBook G3", | |
289 | "Core99" | |
290 | }; | |
291 | ||
292 | #ifdef CONFIG_PMAC_BACKLIGHT | |
293 | static struct backlight_controller pmu_backlight_controller = { | |
294 | pmu_set_backlight_enable, | |
295 | pmu_set_backlight_level | |
296 | }; | |
297 | #endif /* CONFIG_PMAC_BACKLIGHT */ | |
298 | ||
51d3082f | 299 | int __init find_via_pmu(void) |
1da177e4 | 300 | { |
cc5d0189 | 301 | u64 taddr; |
51d3082f BH |
302 | u32 *reg; |
303 | ||
1da177e4 LT |
304 | if (via != 0) |
305 | return 1; | |
51d3082f BH |
306 | vias = of_find_node_by_name(NULL, "via-pmu"); |
307 | if (vias == NULL) | |
1da177e4 | 308 | return 0; |
1da177e4 | 309 | |
51d3082f BH |
310 | reg = (u32 *)get_property(vias, "reg", NULL); |
311 | if (reg == NULL) { | |
312 | printk(KERN_ERR "via-pmu: No \"reg\" property !\n"); | |
313 | goto fail; | |
314 | } | |
315 | taddr = of_translate_address(vias, reg); | |
bb6b9b28 | 316 | if (taddr == OF_BAD_ADDR) { |
51d3082f BH |
317 | printk(KERN_ERR "via-pmu: Can't translate address !\n"); |
318 | goto fail; | |
1da177e4 LT |
319 | } |
320 | ||
321 | spin_lock_init(&pmu_lock); | |
322 | ||
323 | pmu_has_adb = 1; | |
324 | ||
325 | pmu_intr_mask = PMU_INT_PCEJECT | | |
326 | PMU_INT_SNDBRT | | |
327 | PMU_INT_ADB | | |
328 | PMU_INT_TICK; | |
329 | ||
330 | if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0) | |
331 | || device_is_compatible(vias->parent, "ohare"))) | |
332 | pmu_kind = PMU_OHARE_BASED; | |
333 | else if (device_is_compatible(vias->parent, "paddington")) | |
334 | pmu_kind = PMU_PADDINGTON_BASED; | |
335 | else if (device_is_compatible(vias->parent, "heathrow")) | |
336 | pmu_kind = PMU_HEATHROW_BASED; | |
337 | else if (device_is_compatible(vias->parent, "Keylargo") | |
338 | || device_is_compatible(vias->parent, "K2-Keylargo")) { | |
51d3082f | 339 | struct device_node *gpiop; |
cc5d0189 | 340 | u64 gaddr = OF_BAD_ADDR; |
1da177e4 LT |
341 | |
342 | pmu_kind = PMU_KEYLARGO_BASED; | |
343 | pmu_has_adb = (find_type_devices("adb") != NULL); | |
344 | pmu_intr_mask = PMU_INT_PCEJECT | | |
345 | PMU_INT_SNDBRT | | |
346 | PMU_INT_ADB | | |
347 | PMU_INT_TICK | | |
348 | PMU_INT_ENVIRONMENT; | |
349 | ||
51d3082f BH |
350 | gpiop = of_find_node_by_name(NULL, "gpio"); |
351 | if (gpiop) { | |
352 | reg = (u32 *)get_property(gpiop, "reg", NULL); | |
353 | if (reg) | |
354 | gaddr = of_translate_address(gpiop, reg); | |
cc5d0189 | 355 | if (gaddr != OF_BAD_ADDR) |
51d3082f | 356 | gpio_reg = ioremap(gaddr, 0x10); |
1da177e4 | 357 | } |
51d3082f BH |
358 | if (gpio_reg == NULL) |
359 | printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n"); | |
1da177e4 LT |
360 | } else |
361 | pmu_kind = PMU_UNKNOWN; | |
362 | ||
51d3082f BH |
363 | via = ioremap(taddr, 0x2000); |
364 | if (via == NULL) { | |
365 | printk(KERN_ERR "via-pmu: Can't map address !\n"); | |
366 | goto fail; | |
367 | } | |
1da177e4 LT |
368 | |
369 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
370 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
371 | ||
372 | pmu_state = idle; | |
373 | ||
374 | if (!init_pmu()) { | |
375 | via = NULL; | |
376 | return 0; | |
377 | } | |
378 | ||
bb6b9b28 | 379 | printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n", |
1da177e4 LT |
380 | PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); |
381 | ||
382 | sys_ctrler = SYS_CTRLER_PMU; | |
383 | ||
384 | return 1; | |
51d3082f BH |
385 | fail: |
386 | of_node_put(vias); | |
387 | vias = NULL; | |
388 | return 0; | |
1da177e4 LT |
389 | } |
390 | ||
391 | #ifdef CONFIG_ADB | |
51d3082f | 392 | static int pmu_probe(void) |
1da177e4 LT |
393 | { |
394 | return vias == NULL? -ENODEV: 0; | |
395 | } | |
396 | ||
51d3082f | 397 | static int __init pmu_init(void) |
1da177e4 LT |
398 | { |
399 | if (vias == NULL) | |
400 | return -ENODEV; | |
401 | return 0; | |
402 | } | |
403 | #endif /* CONFIG_ADB */ | |
404 | ||
405 | /* | |
406 | * We can't wait until pmu_init gets called, that happens too late. | |
407 | * It happens after IDE and SCSI initialization, which can take a few | |
408 | * seconds, and by that time the PMU could have given up on us and | |
409 | * turned us off. | |
410 | * Thus this is called with arch_initcall rather than device_initcall. | |
411 | */ | |
412 | static int __init via_pmu_start(void) | |
413 | { | |
414 | if (vias == NULL) | |
415 | return -ENODEV; | |
416 | ||
417 | bright_req_1.complete = 1; | |
418 | bright_req_2.complete = 1; | |
1da177e4 | 419 | batt_req.complete = 1; |
1da177e4 | 420 | |
51d3082f | 421 | #ifndef CONFIG_PPC_MERGE |
e4ee69c8 BH |
422 | if (pmu_kind == PMU_KEYLARGO_BASED) |
423 | openpic_set_irq_priority(vias->intrs[0].line, | |
424 | OPENPIC_PRIORITY_DEFAULT + 1); | |
425 | #endif | |
426 | ||
1da177e4 LT |
427 | if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU", |
428 | (void *)0)) { | |
429 | printk(KERN_ERR "VIA-PMU: can't get irq %d\n", | |
430 | vias->intrs[0].line); | |
431 | return -EAGAIN; | |
432 | } | |
433 | ||
51d3082f BH |
434 | if (pmu_kind == PMU_KEYLARGO_BASED) { |
435 | gpio_node = of_find_node_by_name(NULL, "extint-gpio1"); | |
436 | if (gpio_node == NULL) | |
437 | gpio_node = of_find_node_by_name(NULL, | |
438 | "pmu-interrupt"); | |
439 | if (gpio_node && gpio_node->n_intrs > 0) | |
440 | gpio_irq = gpio_node->intrs[0].line; | |
441 | ||
442 | if (gpio_irq != -1) { | |
443 | if (request_irq(gpio_irq, gpio1_interrupt, 0, | |
444 | "GPIO1 ADB", (void *)0)) | |
445 | printk(KERN_ERR "pmu: can't get irq %d" | |
446 | " (GPIO1)\n", gpio_irq); | |
447 | else | |
448 | gpio_irq_enabled = 1; | |
449 | } | |
1da177e4 LT |
450 | } |
451 | ||
452 | /* Enable interrupts */ | |
453 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
454 | ||
455 | pmu_fully_inited = 1; | |
456 | ||
457 | /* Make sure PMU settle down before continuing. This is _very_ important | |
458 | * since the IDE probe may shut interrupts down for quite a bit of time. If | |
459 | * a PMU communication is pending while this happens, the PMU may timeout | |
460 | * Not that on Core99 machines, the PMU keeps sending us environement | |
461 | * messages, we should find a way to either fix IDE or make it call | |
462 | * pmu_suspend() before masking interrupts. This can also happens while | |
463 | * scolling with some fbdevs. | |
464 | */ | |
465 | do { | |
466 | pmu_poll(); | |
467 | } while (pmu_state != idle); | |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
472 | arch_initcall(via_pmu_start); | |
473 | ||
474 | /* | |
475 | * This has to be done after pci_init, which is a subsys_initcall. | |
476 | */ | |
477 | static int __init via_pmu_dev_init(void) | |
478 | { | |
479 | if (vias == NULL) | |
480 | return -ENODEV; | |
481 | ||
1da177e4 LT |
482 | #ifdef CONFIG_PMAC_BACKLIGHT |
483 | /* Enable backlight */ | |
484 | register_backlight_controller(&pmu_backlight_controller, NULL, "pmu"); | |
485 | #endif /* CONFIG_PMAC_BACKLIGHT */ | |
486 | ||
8c870933 | 487 | #ifdef CONFIG_PPC32 |
1da177e4 LT |
488 | if (machine_is_compatible("AAPL,3400/2400") || |
489 | machine_is_compatible("AAPL,3500")) { | |
490 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
491 | NULL, PMAC_MB_INFO_MODEL, 0); | |
492 | pmu_battery_count = 1; | |
493 | if (mb == PMAC_TYPE_COMET) | |
494 | pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; | |
495 | else | |
496 | pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; | |
497 | } else if (machine_is_compatible("AAPL,PowerBook1998") || | |
498 | machine_is_compatible("PowerBook1,1")) { | |
499 | pmu_battery_count = 2; | |
500 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
501 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
502 | } else { | |
503 | struct device_node* prim = find_devices("power-mgt"); | |
504 | u32 *prim_info = NULL; | |
505 | if (prim) | |
506 | prim_info = (u32 *)get_property(prim, "prim-info", NULL); | |
507 | if (prim_info) { | |
508 | /* Other stuffs here yet unknown */ | |
509 | pmu_battery_count = (prim_info[6] >> 16) & 0xff; | |
510 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | |
511 | if (pmu_battery_count > 1) | |
512 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | |
513 | } | |
514 | } | |
8c870933 BH |
515 | #endif /* CONFIG_PPC32 */ |
516 | ||
1da177e4 LT |
517 | /* Create /proc/pmu */ |
518 | proc_pmu_root = proc_mkdir("pmu", NULL); | |
519 | if (proc_pmu_root) { | |
8c870933 | 520 | long i; |
1da177e4 LT |
521 | |
522 | for (i=0; i<pmu_battery_count; i++) { | |
523 | char title[16]; | |
8c870933 | 524 | sprintf(title, "battery_%ld", i); |
1da177e4 LT |
525 | proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root, |
526 | proc_get_batt, (void *)i); | |
527 | } | |
1da177e4 LT |
528 | |
529 | proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root, | |
530 | proc_get_info, NULL); | |
531 | proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root, | |
532 | proc_get_irqstats, NULL); | |
533 | proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root); | |
534 | if (proc_pmu_options) { | |
535 | proc_pmu_options->nlink = 1; | |
536 | proc_pmu_options->read_proc = proc_read_options; | |
537 | proc_pmu_options->write_proc = proc_write_options; | |
538 | } | |
539 | } | |
540 | return 0; | |
541 | } | |
542 | ||
543 | device_initcall(via_pmu_dev_init); | |
544 | ||
aacaf9bd | 545 | static int |
1da177e4 LT |
546 | init_pmu(void) |
547 | { | |
548 | int timeout; | |
549 | struct adb_request req; | |
550 | ||
551 | out_8(&via[B], via[B] | TREQ); /* negate TREQ */ | |
552 | out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */ | |
553 | ||
554 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
555 | timeout = 100000; | |
556 | while (!req.complete) { | |
557 | if (--timeout < 0) { | |
558 | printk(KERN_ERR "init_pmu: no response from PMU\n"); | |
559 | return 0; | |
560 | } | |
561 | udelay(10); | |
562 | pmu_poll(); | |
563 | } | |
564 | ||
565 | /* ack all pending interrupts */ | |
566 | timeout = 100000; | |
567 | interrupt_data[0][0] = 1; | |
568 | while (interrupt_data[0][0] || pmu_state != idle) { | |
569 | if (--timeout < 0) { | |
570 | printk(KERN_ERR "init_pmu: timed out acking intrs\n"); | |
571 | return 0; | |
572 | } | |
573 | if (pmu_state == idle) | |
574 | adb_int_pending = 1; | |
575 | via_pmu_interrupt(0, NULL, NULL); | |
576 | udelay(10); | |
577 | } | |
578 | ||
579 | /* Tell PMU we are ready. */ | |
580 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
581 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
582 | while (!req.complete) | |
583 | pmu_poll(); | |
584 | } | |
585 | ||
586 | /* Read PMU version */ | |
587 | pmu_request(&req, NULL, 1, PMU_GET_VERSION); | |
588 | pmu_wait_complete(&req); | |
589 | if (req.reply_len > 0) | |
590 | pmu_version = req.reply[0]; | |
591 | ||
592 | /* Read server mode setting */ | |
593 | if (pmu_kind == PMU_KEYLARGO_BASED) { | |
594 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, | |
595 | PMU_PWR_GET_POWERUP_EVENTS); | |
596 | pmu_wait_complete(&req); | |
597 | if (req.reply_len == 2) { | |
598 | if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) | |
599 | option_server_mode = 1; | |
600 | printk(KERN_INFO "via-pmu: Server Mode is %s\n", | |
601 | option_server_mode ? "enabled" : "disabled"); | |
602 | } | |
603 | } | |
604 | return 1; | |
605 | } | |
606 | ||
607 | int | |
608 | pmu_get_model(void) | |
609 | { | |
610 | return pmu_kind; | |
611 | } | |
612 | ||
1da177e4 LT |
613 | static void pmu_set_server_mode(int server_mode) |
614 | { | |
615 | struct adb_request req; | |
616 | ||
617 | if (pmu_kind != PMU_KEYLARGO_BASED) | |
618 | return; | |
619 | ||
620 | option_server_mode = server_mode; | |
621 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); | |
622 | pmu_wait_complete(&req); | |
623 | if (req.reply_len < 2) | |
624 | return; | |
625 | if (server_mode) | |
626 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
627 | PMU_PWR_SET_POWERUP_EVENTS, | |
628 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
629 | else | |
630 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | |
631 | PMU_PWR_CLR_POWERUP_EVENTS, | |
632 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | |
633 | pmu_wait_complete(&req); | |
634 | } | |
635 | ||
1da177e4 LT |
636 | /* This new version of the code for 2400/3400/3500 powerbooks |
637 | * is inspired from the implementation in gkrellm-pmu | |
638 | */ | |
aacaf9bd | 639 | static void |
1da177e4 LT |
640 | done_battery_state_ohare(struct adb_request* req) |
641 | { | |
642 | /* format: | |
643 | * [0] : flags | |
644 | * 0x01 : AC indicator | |
645 | * 0x02 : charging | |
646 | * 0x04 : battery exist | |
647 | * 0x08 : | |
648 | * 0x10 : | |
649 | * 0x20 : full charged | |
650 | * 0x40 : pcharge reset | |
651 | * 0x80 : battery exist | |
652 | * | |
653 | * [1][2] : battery voltage | |
654 | * [3] : CPU temperature | |
655 | * [4] : battery temperature | |
656 | * [5] : current | |
657 | * [6][7] : pcharge | |
658 | * --tkoba | |
659 | */ | |
660 | unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; | |
661 | long pcharge, charge, vb, vmax, lmax; | |
662 | long vmax_charging, vmax_charged; | |
663 | long amperage, voltage, time, max; | |
664 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | |
665 | NULL, PMAC_MB_INFO_MODEL, 0); | |
666 | ||
667 | if (req->reply[0] & 0x01) | |
668 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
669 | else | |
670 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
671 | ||
672 | if (mb == PMAC_TYPE_COMET) { | |
673 | vmax_charged = 189; | |
674 | vmax_charging = 213; | |
675 | lmax = 6500; | |
676 | } else { | |
677 | vmax_charged = 330; | |
678 | vmax_charging = 330; | |
679 | lmax = 6500; | |
680 | } | |
681 | vmax = vmax_charged; | |
682 | ||
683 | /* If battery installed */ | |
684 | if (req->reply[0] & 0x04) { | |
685 | bat_flags |= PMU_BATT_PRESENT; | |
686 | if (req->reply[0] & 0x02) | |
687 | bat_flags |= PMU_BATT_CHARGING; | |
688 | vb = (req->reply[1] << 8) | req->reply[2]; | |
689 | voltage = (vb * 265 + 72665) / 10; | |
690 | amperage = req->reply[5]; | |
691 | if ((req->reply[0] & 0x01) == 0) { | |
692 | if (amperage > 200) | |
693 | vb += ((amperage - 200) * 15)/100; | |
694 | } else if (req->reply[0] & 0x02) { | |
695 | vb = (vb * 97) / 100; | |
696 | vmax = vmax_charging; | |
697 | } | |
698 | charge = (100 * vb) / vmax; | |
699 | if (req->reply[0] & 0x40) { | |
700 | pcharge = (req->reply[6] << 8) + req->reply[7]; | |
701 | if (pcharge > lmax) | |
702 | pcharge = lmax; | |
703 | pcharge *= 100; | |
704 | pcharge = 100 - pcharge / lmax; | |
705 | if (pcharge < charge) | |
706 | charge = pcharge; | |
707 | } | |
708 | if (amperage > 0) | |
709 | time = (charge * 16440) / amperage; | |
710 | else | |
711 | time = 0; | |
712 | max = 100; | |
713 | amperage = -amperage; | |
714 | } else | |
715 | charge = max = amperage = voltage = time = 0; | |
716 | ||
717 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
718 | pmu_batteries[pmu_cur_battery].charge = charge; | |
719 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
720 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
721 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
722 | pmu_batteries[pmu_cur_battery].time_remaining = time; | |
723 | ||
724 | clear_bit(0, &async_req_locks); | |
725 | } | |
726 | ||
aacaf9bd | 727 | static void |
1da177e4 LT |
728 | done_battery_state_smart(struct adb_request* req) |
729 | { | |
730 | /* format: | |
731 | * [0] : format of this structure (known: 3,4,5) | |
732 | * [1] : flags | |
733 | * | |
734 | * format 3 & 4: | |
735 | * | |
736 | * [2] : charge | |
737 | * [3] : max charge | |
738 | * [4] : current | |
739 | * [5] : voltage | |
740 | * | |
741 | * format 5: | |
742 | * | |
743 | * [2][3] : charge | |
744 | * [4][5] : max charge | |
745 | * [6][7] : current | |
746 | * [8][9] : voltage | |
747 | */ | |
748 | ||
749 | unsigned int bat_flags = PMU_BATT_TYPE_SMART; | |
750 | int amperage; | |
751 | unsigned int capa, max, voltage; | |
752 | ||
753 | if (req->reply[1] & 0x01) | |
754 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | |
755 | else | |
756 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | |
757 | ||
758 | ||
759 | capa = max = amperage = voltage = 0; | |
760 | ||
761 | if (req->reply[1] & 0x04) { | |
762 | bat_flags |= PMU_BATT_PRESENT; | |
763 | switch(req->reply[0]) { | |
764 | case 3: | |
765 | case 4: capa = req->reply[2]; | |
766 | max = req->reply[3]; | |
767 | amperage = *((signed char *)&req->reply[4]); | |
768 | voltage = req->reply[5]; | |
769 | break; | |
770 | case 5: capa = (req->reply[2] << 8) | req->reply[3]; | |
771 | max = (req->reply[4] << 8) | req->reply[5]; | |
772 | amperage = *((signed short *)&req->reply[6]); | |
773 | voltage = (req->reply[8] << 8) | req->reply[9]; | |
774 | break; | |
775 | default: | |
776 | printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n", | |
777 | req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]); | |
778 | break; | |
779 | } | |
780 | } | |
781 | ||
782 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
783 | bat_flags |= PMU_BATT_CHARGING; | |
784 | ||
785 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | |
786 | pmu_batteries[pmu_cur_battery].charge = capa; | |
787 | pmu_batteries[pmu_cur_battery].max_charge = max; | |
788 | pmu_batteries[pmu_cur_battery].amperage = amperage; | |
789 | pmu_batteries[pmu_cur_battery].voltage = voltage; | |
790 | if (amperage) { | |
791 | if ((req->reply[1] & 0x01) && (amperage > 0)) | |
792 | pmu_batteries[pmu_cur_battery].time_remaining | |
793 | = ((max-capa) * 3600) / amperage; | |
794 | else | |
795 | pmu_batteries[pmu_cur_battery].time_remaining | |
796 | = (capa * 3600) / (-amperage); | |
797 | } else | |
798 | pmu_batteries[pmu_cur_battery].time_remaining = 0; | |
799 | ||
800 | pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; | |
801 | ||
802 | clear_bit(0, &async_req_locks); | |
803 | } | |
804 | ||
aacaf9bd | 805 | static void |
1da177e4 LT |
806 | query_battery_state(void) |
807 | { | |
808 | if (test_and_set_bit(0, &async_req_locks)) | |
809 | return; | |
810 | if (pmu_kind == PMU_OHARE_BASED) | |
811 | pmu_request(&batt_req, done_battery_state_ohare, | |
812 | 1, PMU_BATTERY_STATE); | |
813 | else | |
814 | pmu_request(&batt_req, done_battery_state_smart, | |
815 | 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); | |
816 | } | |
817 | ||
aacaf9bd | 818 | static int |
1da177e4 LT |
819 | proc_get_info(char *page, char **start, off_t off, |
820 | int count, int *eof, void *data) | |
821 | { | |
822 | char* p = page; | |
823 | ||
824 | p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION); | |
825 | p += sprintf(p, "PMU firmware version : %02x\n", pmu_version); | |
1da177e4 LT |
826 | p += sprintf(p, "AC Power : %d\n", |
827 | ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0)); | |
828 | p += sprintf(p, "Battery count : %d\n", pmu_battery_count); | |
1da177e4 LT |
829 | |
830 | return p - page; | |
831 | } | |
832 | ||
aacaf9bd | 833 | static int |
1da177e4 LT |
834 | proc_get_irqstats(char *page, char **start, off_t off, |
835 | int count, int *eof, void *data) | |
836 | { | |
837 | int i; | |
838 | char* p = page; | |
839 | static const char *irq_names[] = { | |
840 | "Total CB1 triggered events", | |
841 | "Total GPIO1 triggered events", | |
842 | "PC-Card eject button", | |
843 | "Sound/Brightness button", | |
844 | "ADB message", | |
845 | "Battery state change", | |
846 | "Environment interrupt", | |
847 | "Tick timer", | |
848 | "Ghost interrupt (zero len)", | |
849 | "Empty interrupt (empty mask)", | |
850 | "Max irqs in a row" | |
851 | }; | |
852 | ||
853 | for (i=0; i<11; i++) { | |
854 | p += sprintf(p, " %2u: %10u (%s)\n", | |
855 | i, pmu_irq_stats[i], irq_names[i]); | |
856 | } | |
857 | return p - page; | |
858 | } | |
859 | ||
aacaf9bd | 860 | static int |
1da177e4 LT |
861 | proc_get_batt(char *page, char **start, off_t off, |
862 | int count, int *eof, void *data) | |
863 | { | |
8c870933 | 864 | long batnum = (long)data; |
1da177e4 LT |
865 | char *p = page; |
866 | ||
867 | p += sprintf(p, "\n"); | |
868 | p += sprintf(p, "flags : %08x\n", | |
869 | pmu_batteries[batnum].flags); | |
870 | p += sprintf(p, "charge : %d\n", | |
871 | pmu_batteries[batnum].charge); | |
872 | p += sprintf(p, "max_charge : %d\n", | |
873 | pmu_batteries[batnum].max_charge); | |
874 | p += sprintf(p, "current : %d\n", | |
875 | pmu_batteries[batnum].amperage); | |
876 | p += sprintf(p, "voltage : %d\n", | |
877 | pmu_batteries[batnum].voltage); | |
878 | p += sprintf(p, "time rem. : %d\n", | |
879 | pmu_batteries[batnum].time_remaining); | |
880 | ||
881 | return p - page; | |
882 | } | |
1da177e4 | 883 | |
aacaf9bd | 884 | static int |
1da177e4 LT |
885 | proc_read_options(char *page, char **start, off_t off, |
886 | int count, int *eof, void *data) | |
887 | { | |
888 | char *p = page; | |
889 | ||
a0005034 | 890 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 LT |
891 | if (pmu_kind == PMU_KEYLARGO_BASED && |
892 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
893 | p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup); | |
8c870933 | 894 | #endif |
1da177e4 LT |
895 | if (pmu_kind == PMU_KEYLARGO_BASED) |
896 | p += sprintf(p, "server_mode=%d\n", option_server_mode); | |
897 | ||
898 | return p - page; | |
899 | } | |
900 | ||
aacaf9bd | 901 | static int |
1da177e4 LT |
902 | proc_write_options(struct file *file, const char __user *buffer, |
903 | unsigned long count, void *data) | |
904 | { | |
905 | char tmp[33]; | |
906 | char *label, *val; | |
907 | unsigned long fcount = count; | |
908 | ||
909 | if (!count) | |
910 | return -EINVAL; | |
911 | if (count > 32) | |
912 | count = 32; | |
913 | if (copy_from_user(tmp, buffer, count)) | |
914 | return -EFAULT; | |
915 | tmp[count] = 0; | |
916 | ||
917 | label = tmp; | |
918 | while(*label == ' ') | |
919 | label++; | |
920 | val = label; | |
921 | while(*val && (*val != '=')) { | |
922 | if (*val == ' ') | |
923 | *val = 0; | |
924 | val++; | |
925 | } | |
926 | if ((*val) == 0) | |
927 | return -EINVAL; | |
928 | *(val++) = 0; | |
929 | while(*val == ' ') | |
930 | val++; | |
a0005034 | 931 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 LT |
932 | if (pmu_kind == PMU_KEYLARGO_BASED && |
933 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | |
934 | if (!strcmp(label, "lid_wakeup")) | |
935 | option_lid_wakeup = ((*val) == '1'); | |
8c870933 | 936 | #endif |
1da177e4 LT |
937 | if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { |
938 | int new_value; | |
939 | new_value = ((*val) == '1'); | |
940 | if (new_value != option_server_mode) | |
941 | pmu_set_server_mode(new_value); | |
942 | } | |
943 | return fcount; | |
944 | } | |
945 | ||
946 | #ifdef CONFIG_ADB | |
947 | /* Send an ADB command */ | |
aacaf9bd | 948 | static int |
1da177e4 LT |
949 | pmu_send_request(struct adb_request *req, int sync) |
950 | { | |
951 | int i, ret; | |
952 | ||
953 | if ((vias == NULL) || (!pmu_fully_inited)) { | |
954 | req->complete = 1; | |
955 | return -ENXIO; | |
956 | } | |
957 | ||
958 | ret = -EINVAL; | |
959 | ||
960 | switch (req->data[0]) { | |
961 | case PMU_PACKET: | |
962 | for (i = 0; i < req->nbytes - 1; ++i) | |
963 | req->data[i] = req->data[i+1]; | |
964 | --req->nbytes; | |
965 | if (pmu_data_len[req->data[0]][1] != 0) { | |
966 | req->reply[0] = ADB_RET_OK; | |
967 | req->reply_len = 1; | |
968 | } else | |
969 | req->reply_len = 0; | |
970 | ret = pmu_queue_request(req); | |
971 | break; | |
972 | case CUDA_PACKET: | |
973 | switch (req->data[1]) { | |
974 | case CUDA_GET_TIME: | |
975 | if (req->nbytes != 2) | |
976 | break; | |
977 | req->data[0] = PMU_READ_RTC; | |
978 | req->nbytes = 1; | |
979 | req->reply_len = 3; | |
980 | req->reply[0] = CUDA_PACKET; | |
981 | req->reply[1] = 0; | |
982 | req->reply[2] = CUDA_GET_TIME; | |
983 | ret = pmu_queue_request(req); | |
984 | break; | |
985 | case CUDA_SET_TIME: | |
986 | if (req->nbytes != 6) | |
987 | break; | |
988 | req->data[0] = PMU_SET_RTC; | |
989 | req->nbytes = 5; | |
990 | for (i = 1; i <= 4; ++i) | |
991 | req->data[i] = req->data[i+1]; | |
992 | req->reply_len = 3; | |
993 | req->reply[0] = CUDA_PACKET; | |
994 | req->reply[1] = 0; | |
995 | req->reply[2] = CUDA_SET_TIME; | |
996 | ret = pmu_queue_request(req); | |
997 | break; | |
998 | } | |
999 | break; | |
1000 | case ADB_PACKET: | |
1001 | if (!pmu_has_adb) | |
1002 | return -ENXIO; | |
1003 | for (i = req->nbytes - 1; i > 1; --i) | |
1004 | req->data[i+2] = req->data[i]; | |
1005 | req->data[3] = req->nbytes - 2; | |
1006 | req->data[2] = pmu_adb_flags; | |
1007 | /*req->data[1] = req->data[1];*/ | |
1008 | req->data[0] = PMU_ADB_CMD; | |
1009 | req->nbytes += 2; | |
1010 | req->reply_expected = 1; | |
1011 | req->reply_len = 0; | |
1012 | ret = pmu_queue_request(req); | |
1013 | break; | |
1014 | } | |
1015 | if (ret) { | |
1016 | req->complete = 1; | |
1017 | return ret; | |
1018 | } | |
1019 | ||
1020 | if (sync) | |
1021 | while (!req->complete) | |
1022 | pmu_poll(); | |
1023 | ||
1024 | return 0; | |
1025 | } | |
1026 | ||
1027 | /* Enable/disable autopolling */ | |
aacaf9bd | 1028 | static int |
1da177e4 LT |
1029 | pmu_adb_autopoll(int devs) |
1030 | { | |
1031 | struct adb_request req; | |
1032 | ||
1033 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1034 | return -ENXIO; | |
1035 | ||
1036 | if (devs) { | |
1037 | adb_dev_map = devs; | |
1038 | pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, | |
1039 | adb_dev_map >> 8, adb_dev_map); | |
1040 | pmu_adb_flags = 2; | |
1041 | } else { | |
1042 | pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); | |
1043 | pmu_adb_flags = 0; | |
1044 | } | |
1045 | while (!req.complete) | |
1046 | pmu_poll(); | |
1047 | return 0; | |
1048 | } | |
1049 | ||
1050 | /* Reset the ADB bus */ | |
aacaf9bd | 1051 | static int |
1da177e4 LT |
1052 | pmu_adb_reset_bus(void) |
1053 | { | |
1054 | struct adb_request req; | |
1055 | int save_autopoll = adb_dev_map; | |
1056 | ||
1057 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | |
1058 | return -ENXIO; | |
1059 | ||
1060 | /* anyone got a better idea?? */ | |
1061 | pmu_adb_autopoll(0); | |
1062 | ||
1063 | req.nbytes = 5; | |
1064 | req.done = NULL; | |
1065 | req.data[0] = PMU_ADB_CMD; | |
1066 | req.data[1] = 0; | |
1067 | req.data[2] = ADB_BUSRESET; | |
1068 | req.data[3] = 0; | |
1069 | req.data[4] = 0; | |
1070 | req.reply_len = 0; | |
1071 | req.reply_expected = 1; | |
1072 | if (pmu_queue_request(&req) != 0) { | |
1073 | printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); | |
1074 | return -EIO; | |
1075 | } | |
1076 | pmu_wait_complete(&req); | |
1077 | ||
1078 | if (save_autopoll != 0) | |
1079 | pmu_adb_autopoll(save_autopoll); | |
1080 | ||
1081 | return 0; | |
1082 | } | |
1083 | #endif /* CONFIG_ADB */ | |
1084 | ||
1085 | /* Construct and send a pmu request */ | |
aacaf9bd | 1086 | int |
1da177e4 LT |
1087 | pmu_request(struct adb_request *req, void (*done)(struct adb_request *), |
1088 | int nbytes, ...) | |
1089 | { | |
1090 | va_list list; | |
1091 | int i; | |
1092 | ||
1093 | if (vias == NULL) | |
1094 | return -ENXIO; | |
1095 | ||
1096 | if (nbytes < 0 || nbytes > 32) { | |
1097 | printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); | |
1098 | req->complete = 1; | |
1099 | return -EINVAL; | |
1100 | } | |
1101 | req->nbytes = nbytes; | |
1102 | req->done = done; | |
1103 | va_start(list, nbytes); | |
1104 | for (i = 0; i < nbytes; ++i) | |
1105 | req->data[i] = va_arg(list, int); | |
1106 | va_end(list); | |
1107 | req->reply_len = 0; | |
1108 | req->reply_expected = 0; | |
1109 | return pmu_queue_request(req); | |
1110 | } | |
1111 | ||
aacaf9bd | 1112 | int |
1da177e4 LT |
1113 | pmu_queue_request(struct adb_request *req) |
1114 | { | |
1115 | unsigned long flags; | |
1116 | int nsend; | |
1117 | ||
1118 | if (via == NULL) { | |
1119 | req->complete = 1; | |
1120 | return -ENXIO; | |
1121 | } | |
1122 | if (req->nbytes <= 0) { | |
1123 | req->complete = 1; | |
1124 | return 0; | |
1125 | } | |
1126 | nsend = pmu_data_len[req->data[0]][0]; | |
1127 | if (nsend >= 0 && req->nbytes != nsend + 1) { | |
1128 | req->complete = 1; | |
1129 | return -EINVAL; | |
1130 | } | |
1131 | ||
1132 | req->next = NULL; | |
1133 | req->sent = 0; | |
1134 | req->complete = 0; | |
1135 | ||
1136 | spin_lock_irqsave(&pmu_lock, flags); | |
1137 | if (current_req != 0) { | |
1138 | last_req->next = req; | |
1139 | last_req = req; | |
1140 | } else { | |
1141 | current_req = req; | |
1142 | last_req = req; | |
1143 | if (pmu_state == idle) | |
1144 | pmu_start(); | |
1145 | } | |
1146 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1147 | ||
1148 | return 0; | |
1149 | } | |
1150 | ||
1151 | static inline void | |
1152 | wait_for_ack(void) | |
1153 | { | |
1154 | /* Sightly increased the delay, I had one occurrence of the message | |
1155 | * reported | |
1156 | */ | |
1157 | int timeout = 4000; | |
1158 | while ((in_8(&via[B]) & TACK) == 0) { | |
1159 | if (--timeout < 0) { | |
1160 | printk(KERN_ERR "PMU not responding (!ack)\n"); | |
1161 | return; | |
1162 | } | |
1163 | udelay(10); | |
1164 | } | |
1165 | } | |
1166 | ||
1167 | /* New PMU seems to be very sensitive to those timings, so we make sure | |
1168 | * PCI is flushed immediately */ | |
1169 | static inline void | |
1170 | send_byte(int x) | |
1171 | { | |
1172 | volatile unsigned char __iomem *v = via; | |
1173 | ||
1174 | out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT); | |
1175 | out_8(&v[SR], x); | |
1176 | out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ | |
1177 | (void)in_8(&v[B]); | |
1178 | } | |
1179 | ||
1180 | static inline void | |
1181 | recv_byte(void) | |
1182 | { | |
1183 | volatile unsigned char __iomem *v = via; | |
1184 | ||
1185 | out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT); | |
1186 | in_8(&v[SR]); /* resets SR */ | |
1187 | out_8(&v[B], in_8(&v[B]) & ~TREQ); | |
1188 | (void)in_8(&v[B]); | |
1189 | } | |
1190 | ||
1191 | static inline void | |
1192 | pmu_done(struct adb_request *req) | |
1193 | { | |
1194 | void (*done)(struct adb_request *) = req->done; | |
1195 | mb(); | |
1196 | req->complete = 1; | |
1197 | /* Here, we assume that if the request has a done member, the | |
1198 | * struct request will survive to setting req->complete to 1 | |
1199 | */ | |
1200 | if (done) | |
1201 | (*done)(req); | |
1202 | } | |
1203 | ||
aacaf9bd | 1204 | static void |
1da177e4 LT |
1205 | pmu_start(void) |
1206 | { | |
1207 | struct adb_request *req; | |
1208 | ||
1209 | /* assert pmu_state == idle */ | |
1210 | /* get the packet to send */ | |
1211 | req = current_req; | |
1212 | if (req == 0 || pmu_state != idle | |
1213 | || (/*req->reply_expected && */req_awaiting_reply)) | |
1214 | return; | |
1215 | ||
1216 | pmu_state = sending; | |
1217 | data_index = 1; | |
1218 | data_len = pmu_data_len[req->data[0]][0]; | |
1219 | ||
1220 | /* Sounds safer to make sure ACK is high before writing. This helped | |
1221 | * kill a problem with ADB and some iBooks | |
1222 | */ | |
1223 | wait_for_ack(); | |
1224 | /* set the shift register to shift out and send a byte */ | |
1225 | send_byte(req->data[0]); | |
1226 | } | |
1227 | ||
aacaf9bd | 1228 | void |
1da177e4 LT |
1229 | pmu_poll(void) |
1230 | { | |
1231 | if (!via) | |
1232 | return; | |
1233 | if (disable_poll) | |
1234 | return; | |
1235 | via_pmu_interrupt(0, NULL, NULL); | |
1236 | } | |
1237 | ||
aacaf9bd | 1238 | void |
1da177e4 LT |
1239 | pmu_poll_adb(void) |
1240 | { | |
1241 | if (!via) | |
1242 | return; | |
1243 | if (disable_poll) | |
1244 | return; | |
1245 | /* Kicks ADB read when PMU is suspended */ | |
1246 | adb_int_pending = 1; | |
1247 | do { | |
1248 | via_pmu_interrupt(0, NULL, NULL); | |
1249 | } while (pmu_suspended && (adb_int_pending || pmu_state != idle | |
1250 | || req_awaiting_reply)); | |
1251 | } | |
1252 | ||
aacaf9bd | 1253 | void |
1da177e4 LT |
1254 | pmu_wait_complete(struct adb_request *req) |
1255 | { | |
1256 | if (!via) | |
1257 | return; | |
1258 | while((pmu_state != idle && pmu_state != locked) || !req->complete) | |
1259 | via_pmu_interrupt(0, NULL, NULL); | |
1260 | } | |
1261 | ||
1262 | /* This function loops until the PMU is idle and prevents it from | |
1263 | * anwsering to ADB interrupts. pmu_request can still be called. | |
1264 | * This is done to avoid spurrious shutdowns when we know we'll have | |
1265 | * interrupts switched off for a long time | |
1266 | */ | |
aacaf9bd | 1267 | void |
1da177e4 LT |
1268 | pmu_suspend(void) |
1269 | { | |
1270 | unsigned long flags; | |
1271 | #ifdef SUSPEND_USES_PMU | |
1272 | struct adb_request *req; | |
1273 | #endif | |
1274 | if (!via) | |
1275 | return; | |
1276 | ||
1277 | spin_lock_irqsave(&pmu_lock, flags); | |
1278 | pmu_suspended++; | |
1279 | if (pmu_suspended > 1) { | |
1280 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1281 | return; | |
1282 | } | |
1283 | ||
1284 | do { | |
1285 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1286 | if (req_awaiting_reply) | |
1287 | adb_int_pending = 1; | |
1288 | via_pmu_interrupt(0, NULL, NULL); | |
1289 | spin_lock_irqsave(&pmu_lock, flags); | |
1290 | if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { | |
1291 | #ifdef SUSPEND_USES_PMU | |
1292 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | |
1293 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1294 | while(!req.complete) | |
1295 | pmu_poll(); | |
1296 | #else /* SUSPEND_USES_PMU */ | |
1297 | if (gpio_irq >= 0) | |
1298 | disable_irq_nosync(gpio_irq); | |
1299 | out_8(&via[IER], CB1_INT | IER_CLR); | |
1300 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1301 | #endif /* SUSPEND_USES_PMU */ | |
1302 | break; | |
1303 | } | |
1304 | } while (1); | |
1305 | } | |
1306 | ||
aacaf9bd | 1307 | void |
1da177e4 LT |
1308 | pmu_resume(void) |
1309 | { | |
1310 | unsigned long flags; | |
1311 | ||
1312 | if (!via || (pmu_suspended < 1)) | |
1313 | return; | |
1314 | ||
1315 | spin_lock_irqsave(&pmu_lock, flags); | |
1316 | pmu_suspended--; | |
1317 | if (pmu_suspended > 0) { | |
1318 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1319 | return; | |
1320 | } | |
1321 | adb_int_pending = 1; | |
1322 | #ifdef SUSPEND_USES_PMU | |
1323 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
1324 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1325 | while(!req.complete) | |
1326 | pmu_poll(); | |
1327 | #else /* SUSPEND_USES_PMU */ | |
1328 | if (gpio_irq >= 0) | |
1329 | enable_irq(gpio_irq); | |
1330 | out_8(&via[IER], CB1_INT | IER_SET); | |
1331 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1332 | pmu_poll(); | |
1333 | #endif /* SUSPEND_USES_PMU */ | |
1334 | } | |
1335 | ||
1336 | /* Interrupt data could be the result data from an ADB cmd */ | |
aacaf9bd | 1337 | static void |
1da177e4 LT |
1338 | pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs) |
1339 | { | |
1340 | unsigned char ints, pirq; | |
1341 | int i = 0; | |
1342 | ||
1343 | asleep = 0; | |
1344 | if (drop_interrupts || len < 1) { | |
1345 | adb_int_pending = 0; | |
1346 | pmu_irq_stats[8]++; | |
1347 | return; | |
1348 | } | |
1349 | ||
1350 | /* Get PMU interrupt mask */ | |
1351 | ints = data[0]; | |
1352 | ||
1353 | /* Record zero interrupts for stats */ | |
1354 | if (ints == 0) | |
1355 | pmu_irq_stats[9]++; | |
1356 | ||
1357 | /* Hack to deal with ADB autopoll flag */ | |
1358 | if (ints & PMU_INT_ADB) | |
1359 | ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); | |
1360 | ||
1361 | next: | |
1362 | ||
1363 | if (ints == 0) { | |
1364 | if (i > pmu_irq_stats[10]) | |
1365 | pmu_irq_stats[10] = i; | |
1366 | return; | |
1367 | } | |
1368 | ||
1369 | for (pirq = 0; pirq < 8; pirq++) | |
1370 | if (ints & (1 << pirq)) | |
1371 | break; | |
1372 | pmu_irq_stats[pirq]++; | |
1373 | i++; | |
1374 | ints &= ~(1 << pirq); | |
1375 | ||
1376 | /* Note: for some reason, we get an interrupt with len=1, | |
1377 | * data[0]==0 after each normal ADB interrupt, at least | |
1378 | * on the Pismo. Still investigating... --BenH | |
1379 | */ | |
1380 | if ((1 << pirq) & PMU_INT_ADB) { | |
1381 | if ((data[0] & PMU_INT_ADB_AUTO) == 0) { | |
1382 | struct adb_request *req = req_awaiting_reply; | |
1383 | if (req == 0) { | |
1384 | printk(KERN_ERR "PMU: extra ADB reply\n"); | |
1385 | return; | |
1386 | } | |
1387 | req_awaiting_reply = NULL; | |
1388 | if (len <= 2) | |
1389 | req->reply_len = 0; | |
1390 | else { | |
1391 | memcpy(req->reply, data + 1, len - 1); | |
1392 | req->reply_len = len - 1; | |
1393 | } | |
1394 | pmu_done(req); | |
1395 | } else { | |
1da177e4 LT |
1396 | if (len == 4 && data[1] == 0x2c) { |
1397 | extern int xmon_wants_key, xmon_adb_keycode; | |
1398 | if (xmon_wants_key) { | |
1399 | xmon_adb_keycode = data[2]; | |
1400 | return; | |
1401 | } | |
1402 | } | |
1da177e4 LT |
1403 | #ifdef CONFIG_ADB |
1404 | /* | |
1405 | * XXX On the [23]400 the PMU gives us an up | |
1406 | * event for keycodes 0x74 or 0x75 when the PC | |
1407 | * card eject buttons are released, so we | |
1408 | * ignore those events. | |
1409 | */ | |
1410 | if (!(pmu_kind == PMU_OHARE_BASED && len == 4 | |
1411 | && data[1] == 0x2c && data[3] == 0xff | |
1412 | && (data[2] & ~1) == 0xf4)) | |
1413 | adb_input(data+1, len-1, regs, 1); | |
1414 | #endif /* CONFIG_ADB */ | |
1415 | } | |
1416 | } | |
1417 | /* Sound/brightness button pressed */ | |
1418 | else if ((1 << pirq) & PMU_INT_SNDBRT) { | |
1419 | #ifdef CONFIG_PMAC_BACKLIGHT | |
1420 | if (len == 3) | |
1421 | #ifdef CONFIG_INPUT_ADBHID | |
1422 | if (!disable_kernel_backlight) | |
1423 | #endif /* CONFIG_INPUT_ADBHID */ | |
1424 | set_backlight_level(data[1] >> 4); | |
1425 | #endif /* CONFIG_PMAC_BACKLIGHT */ | |
1426 | } | |
1427 | /* Tick interrupt */ | |
1428 | else if ((1 << pirq) & PMU_INT_TICK) { | |
1da177e4 LT |
1429 | /* Environement or tick interrupt, query batteries */ |
1430 | if (pmu_battery_count) { | |
1431 | if ((--query_batt_timer) == 0) { | |
1432 | query_battery_state(); | |
1433 | query_batt_timer = BATTERY_POLLING_COUNT; | |
1434 | } | |
1435 | } | |
1436 | } | |
1437 | else if ((1 << pirq) & PMU_INT_ENVIRONMENT) { | |
1438 | if (pmu_battery_count) | |
1439 | query_battery_state(); | |
1440 | pmu_pass_intr(data, len); | |
1441 | } else { | |
1442 | pmu_pass_intr(data, len); | |
1da177e4 LT |
1443 | } |
1444 | goto next; | |
1445 | } | |
1446 | ||
aacaf9bd | 1447 | static struct adb_request* |
1da177e4 LT |
1448 | pmu_sr_intr(struct pt_regs *regs) |
1449 | { | |
1450 | struct adb_request *req; | |
1451 | int bite = 0; | |
1452 | ||
1453 | if (via[B] & TREQ) { | |
1454 | printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]); | |
1455 | out_8(&via[IFR], SR_INT); | |
1456 | return NULL; | |
1457 | } | |
1458 | /* The ack may not yet be low when we get the interrupt */ | |
1459 | while ((in_8(&via[B]) & TACK) != 0) | |
1460 | ; | |
1461 | ||
1462 | /* if reading grab the byte, and reset the interrupt */ | |
1463 | if (pmu_state == reading || pmu_state == reading_intr) | |
1464 | bite = in_8(&via[SR]); | |
1465 | ||
1466 | /* reset TREQ and wait for TACK to go high */ | |
1467 | out_8(&via[B], in_8(&via[B]) | TREQ); | |
1468 | wait_for_ack(); | |
1469 | ||
1470 | switch (pmu_state) { | |
1471 | case sending: | |
1472 | req = current_req; | |
1473 | if (data_len < 0) { | |
1474 | data_len = req->nbytes - 1; | |
1475 | send_byte(data_len); | |
1476 | break; | |
1477 | } | |
1478 | if (data_index <= data_len) { | |
1479 | send_byte(req->data[data_index++]); | |
1480 | break; | |
1481 | } | |
1482 | req->sent = 1; | |
1483 | data_len = pmu_data_len[req->data[0]][1]; | |
1484 | if (data_len == 0) { | |
1485 | pmu_state = idle; | |
1486 | current_req = req->next; | |
1487 | if (req->reply_expected) | |
1488 | req_awaiting_reply = req; | |
1489 | else | |
1490 | return req; | |
1491 | } else { | |
1492 | pmu_state = reading; | |
1493 | data_index = 0; | |
1494 | reply_ptr = req->reply + req->reply_len; | |
1495 | recv_byte(); | |
1496 | } | |
1497 | break; | |
1498 | ||
1499 | case intack: | |
1500 | data_index = 0; | |
1501 | data_len = -1; | |
1502 | pmu_state = reading_intr; | |
1503 | reply_ptr = interrupt_data[int_data_last]; | |
1504 | recv_byte(); | |
1505 | if (gpio_irq >= 0 && !gpio_irq_enabled) { | |
1506 | enable_irq(gpio_irq); | |
1507 | gpio_irq_enabled = 1; | |
1508 | } | |
1509 | break; | |
1510 | ||
1511 | case reading: | |
1512 | case reading_intr: | |
1513 | if (data_len == -1) { | |
1514 | data_len = bite; | |
1515 | if (bite > 32) | |
1516 | printk(KERN_ERR "PMU: bad reply len %d\n", bite); | |
1517 | } else if (data_index < 32) { | |
1518 | reply_ptr[data_index++] = bite; | |
1519 | } | |
1520 | if (data_index < data_len) { | |
1521 | recv_byte(); | |
1522 | break; | |
1523 | } | |
1524 | ||
1525 | if (pmu_state == reading_intr) { | |
1526 | pmu_state = idle; | |
1527 | int_data_state[int_data_last] = int_data_ready; | |
1528 | interrupt_data_len[int_data_last] = data_len; | |
1529 | } else { | |
1530 | req = current_req; | |
1531 | /* | |
1532 | * For PMU sleep and freq change requests, we lock the | |
1533 | * PMU until it's explicitely unlocked. This avoids any | |
1534 | * spurrious event polling getting in | |
1535 | */ | |
1536 | current_req = req->next; | |
1537 | req->reply_len += data_index; | |
1538 | if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) | |
1539 | pmu_state = locked; | |
1540 | else | |
1541 | pmu_state = idle; | |
1542 | return req; | |
1543 | } | |
1544 | break; | |
1545 | ||
1546 | default: | |
1547 | printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", | |
1548 | pmu_state); | |
1549 | } | |
1550 | return NULL; | |
1551 | } | |
1552 | ||
aacaf9bd | 1553 | static irqreturn_t |
1da177e4 LT |
1554 | via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs) |
1555 | { | |
1556 | unsigned long flags; | |
1557 | int intr; | |
1558 | int nloop = 0; | |
1559 | int int_data = -1; | |
1560 | struct adb_request *req = NULL; | |
1561 | int handled = 0; | |
1562 | ||
1563 | /* This is a bit brutal, we can probably do better */ | |
1564 | spin_lock_irqsave(&pmu_lock, flags); | |
1565 | ++disable_poll; | |
1566 | ||
1567 | for (;;) { | |
1568 | intr = in_8(&via[IFR]) & (SR_INT | CB1_INT); | |
1569 | if (intr == 0) | |
1570 | break; | |
1571 | handled = 1; | |
1572 | if (++nloop > 1000) { | |
1573 | printk(KERN_DEBUG "PMU: stuck in intr loop, " | |
1574 | "intr=%x, ier=%x pmu_state=%d\n", | |
1575 | intr, in_8(&via[IER]), pmu_state); | |
1576 | break; | |
1577 | } | |
1578 | out_8(&via[IFR], intr); | |
1579 | if (intr & CB1_INT) { | |
1580 | adb_int_pending = 1; | |
1581 | pmu_irq_stats[0]++; | |
1582 | } | |
1583 | if (intr & SR_INT) { | |
1584 | req = pmu_sr_intr(regs); | |
1585 | if (req) | |
1586 | break; | |
1587 | } | |
1588 | } | |
1589 | ||
1590 | recheck: | |
1591 | if (pmu_state == idle) { | |
1592 | if (adb_int_pending) { | |
1593 | if (int_data_state[0] == int_data_empty) | |
1594 | int_data_last = 0; | |
1595 | else if (int_data_state[1] == int_data_empty) | |
1596 | int_data_last = 1; | |
1597 | else | |
1598 | goto no_free_slot; | |
1599 | pmu_state = intack; | |
1600 | int_data_state[int_data_last] = int_data_fill; | |
1601 | /* Sounds safer to make sure ACK is high before writing. | |
1602 | * This helped kill a problem with ADB and some iBooks | |
1603 | */ | |
1604 | wait_for_ack(); | |
1605 | send_byte(PMU_INT_ACK); | |
1606 | adb_int_pending = 0; | |
1607 | } else if (current_req) | |
1608 | pmu_start(); | |
1609 | } | |
1610 | no_free_slot: | |
1611 | /* Mark the oldest buffer for flushing */ | |
1612 | if (int_data_state[!int_data_last] == int_data_ready) { | |
1613 | int_data_state[!int_data_last] = int_data_flush; | |
1614 | int_data = !int_data_last; | |
1615 | } else if (int_data_state[int_data_last] == int_data_ready) { | |
1616 | int_data_state[int_data_last] = int_data_flush; | |
1617 | int_data = int_data_last; | |
1618 | } | |
1619 | --disable_poll; | |
1620 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1621 | ||
1622 | /* Deal with completed PMU requests outside of the lock */ | |
1623 | if (req) { | |
1624 | pmu_done(req); | |
1625 | req = NULL; | |
1626 | } | |
1627 | ||
1628 | /* Deal with interrupt datas outside of the lock */ | |
1629 | if (int_data >= 0) { | |
1630 | pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data], regs); | |
1631 | spin_lock_irqsave(&pmu_lock, flags); | |
1632 | ++disable_poll; | |
1633 | int_data_state[int_data] = int_data_empty; | |
1634 | int_data = -1; | |
1635 | goto recheck; | |
1636 | } | |
1637 | ||
1638 | return IRQ_RETVAL(handled); | |
1639 | } | |
1640 | ||
aacaf9bd | 1641 | void |
1da177e4 LT |
1642 | pmu_unlock(void) |
1643 | { | |
1644 | unsigned long flags; | |
1645 | ||
1646 | spin_lock_irqsave(&pmu_lock, flags); | |
1647 | if (pmu_state == locked) | |
1648 | pmu_state = idle; | |
1649 | adb_int_pending = 1; | |
1650 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1651 | } | |
1652 | ||
1653 | ||
aacaf9bd | 1654 | static irqreturn_t |
1da177e4 LT |
1655 | gpio1_interrupt(int irq, void *arg, struct pt_regs *regs) |
1656 | { | |
1657 | unsigned long flags; | |
1658 | ||
1659 | if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { | |
1660 | spin_lock_irqsave(&pmu_lock, flags); | |
1661 | if (gpio_irq_enabled > 0) { | |
1662 | disable_irq_nosync(gpio_irq); | |
1663 | gpio_irq_enabled = 0; | |
1664 | } | |
1665 | pmu_irq_stats[1]++; | |
1666 | adb_int_pending = 1; | |
1667 | spin_unlock_irqrestore(&pmu_lock, flags); | |
1668 | via_pmu_interrupt(0, NULL, NULL); | |
1669 | return IRQ_HANDLED; | |
1670 | } | |
1671 | return IRQ_NONE; | |
1672 | } | |
1673 | ||
1674 | #ifdef CONFIG_PMAC_BACKLIGHT | |
aacaf9bd | 1675 | static int backlight_to_bright[] = { |
1da177e4 LT |
1676 | 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e, |
1677 | 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e | |
1678 | }; | |
1679 | ||
aacaf9bd | 1680 | static int |
1da177e4 LT |
1681 | pmu_set_backlight_enable(int on, int level, void* data) |
1682 | { | |
1683 | struct adb_request req; | |
1684 | ||
1685 | if (vias == NULL) | |
1686 | return -ENODEV; | |
1687 | ||
1688 | if (on) { | |
1689 | pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT, | |
1690 | backlight_to_bright[level]); | |
1691 | pmu_wait_complete(&req); | |
1692 | } | |
1693 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
1694 | PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF)); | |
1695 | pmu_wait_complete(&req); | |
1696 | ||
1697 | return 0; | |
1698 | } | |
1699 | ||
aacaf9bd | 1700 | static void |
1da177e4 LT |
1701 | pmu_bright_complete(struct adb_request *req) |
1702 | { | |
1703 | if (req == &bright_req_1) | |
1704 | clear_bit(1, &async_req_locks); | |
1705 | if (req == &bright_req_2) | |
1706 | clear_bit(2, &async_req_locks); | |
1707 | } | |
1708 | ||
aacaf9bd | 1709 | static int |
1da177e4 LT |
1710 | pmu_set_backlight_level(int level, void* data) |
1711 | { | |
1712 | if (vias == NULL) | |
1713 | return -ENODEV; | |
1714 | ||
1715 | if (test_and_set_bit(1, &async_req_locks)) | |
1716 | return -EAGAIN; | |
1717 | pmu_request(&bright_req_1, pmu_bright_complete, 2, PMU_BACKLIGHT_BRIGHT, | |
1718 | backlight_to_bright[level]); | |
1719 | if (test_and_set_bit(2, &async_req_locks)) | |
1720 | return -EAGAIN; | |
1721 | pmu_request(&bright_req_2, pmu_bright_complete, 2, PMU_POWER_CTRL, | |
1722 | PMU_POW_BACKLIGHT | (level > BACKLIGHT_OFF ? | |
1723 | PMU_POW_ON : PMU_POW_OFF)); | |
1724 | ||
1725 | return 0; | |
1726 | } | |
1727 | #endif /* CONFIG_PMAC_BACKLIGHT */ | |
1728 | ||
aacaf9bd | 1729 | void |
1da177e4 LT |
1730 | pmu_enable_irled(int on) |
1731 | { | |
1732 | struct adb_request req; | |
1733 | ||
1734 | if (vias == NULL) | |
1735 | return ; | |
1736 | if (pmu_kind == PMU_KEYLARGO_BASED) | |
1737 | return ; | |
1738 | ||
1739 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | | |
1740 | (on ? PMU_POW_ON : PMU_POW_OFF)); | |
1741 | pmu_wait_complete(&req); | |
1742 | } | |
1743 | ||
aacaf9bd | 1744 | void |
1da177e4 LT |
1745 | pmu_restart(void) |
1746 | { | |
1747 | struct adb_request req; | |
1748 | ||
1749 | if (via == NULL) | |
1750 | return; | |
1751 | ||
1752 | local_irq_disable(); | |
1753 | ||
1754 | drop_interrupts = 1; | |
1755 | ||
1756 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1757 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1758 | PMU_INT_TICK ); | |
1759 | while(!req.complete) | |
1760 | pmu_poll(); | |
1761 | } | |
1762 | ||
1763 | pmu_request(&req, NULL, 1, PMU_RESET); | |
1764 | pmu_wait_complete(&req); | |
1765 | for (;;) | |
1766 | ; | |
1767 | } | |
1768 | ||
aacaf9bd | 1769 | void |
1da177e4 LT |
1770 | pmu_shutdown(void) |
1771 | { | |
1772 | struct adb_request req; | |
1773 | ||
1774 | if (via == NULL) | |
1775 | return; | |
1776 | ||
1777 | local_irq_disable(); | |
1778 | ||
1779 | drop_interrupts = 1; | |
1780 | ||
1781 | if (pmu_kind != PMU_KEYLARGO_BASED) { | |
1782 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | |
1783 | PMU_INT_TICK ); | |
1784 | pmu_wait_complete(&req); | |
1785 | } else { | |
1786 | /* Disable server mode on shutdown or we'll just | |
1787 | * wake up again | |
1788 | */ | |
1789 | pmu_set_server_mode(0); | |
1790 | } | |
1791 | ||
1792 | pmu_request(&req, NULL, 5, PMU_SHUTDOWN, | |
1793 | 'M', 'A', 'T', 'T'); | |
1794 | pmu_wait_complete(&req); | |
1795 | for (;;) | |
1796 | ; | |
1797 | } | |
1798 | ||
1799 | int | |
1800 | pmu_present(void) | |
1801 | { | |
1802 | return via != 0; | |
1803 | } | |
1804 | ||
1805 | struct pmu_i2c_hdr { | |
1806 | u8 bus; | |
1807 | u8 mode; | |
1808 | u8 bus2; | |
1809 | u8 address; | |
1810 | u8 sub_addr; | |
1811 | u8 comb_addr; | |
1812 | u8 count; | |
1813 | }; | |
1814 | ||
1815 | int | |
1816 | pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len) | |
1817 | { | |
1818 | struct adb_request req; | |
1819 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | |
1820 | int retry; | |
1821 | int rc; | |
1822 | ||
1823 | for (retry=0; retry<16; retry++) { | |
1824 | memset(&req, 0, sizeof(req)); | |
1825 | ||
1826 | hdr->bus = bus; | |
1827 | hdr->address = addr & 0xfe; | |
1828 | hdr->mode = PMU_I2C_MODE_COMBINED; | |
1829 | hdr->bus2 = 0; | |
1830 | hdr->sub_addr = subaddr; | |
1831 | hdr->comb_addr = addr | 1; | |
1832 | hdr->count = len; | |
1833 | ||
1834 | req.nbytes = sizeof(struct pmu_i2c_hdr) + 1; | |
1835 | req.reply_expected = 0; | |
1836 | req.reply_len = 0; | |
1837 | req.data[0] = PMU_I2C_CMD; | |
1838 | req.reply[0] = 0xff; | |
1839 | rc = pmu_queue_request(&req); | |
1840 | if (rc) | |
1841 | return rc; | |
1842 | while(!req.complete) | |
1843 | pmu_poll(); | |
1844 | if (req.reply[0] == PMU_I2C_STATUS_OK) | |
1845 | break; | |
1846 | mdelay(15); | |
1847 | } | |
1848 | if (req.reply[0] != PMU_I2C_STATUS_OK) | |
1849 | return -1; | |
1850 | ||
1851 | for (retry=0; retry<16; retry++) { | |
1852 | memset(&req, 0, sizeof(req)); | |
1853 | ||
1854 | mdelay(15); | |
1855 | ||
1856 | hdr->bus = PMU_I2C_BUS_STATUS; | |
1857 | req.reply[0] = 0xff; | |
1858 | ||
1859 | req.nbytes = 2; | |
1860 | req.reply_expected = 0; | |
1861 | req.reply_len = 0; | |
1862 | req.data[0] = PMU_I2C_CMD; | |
1863 | rc = pmu_queue_request(&req); | |
1864 | if (rc) | |
1865 | return rc; | |
1866 | while(!req.complete) | |
1867 | pmu_poll(); | |
1868 | if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) { | |
1869 | memcpy(data, &req.reply[1], req.reply_len - 1); | |
1870 | return req.reply_len - 1; | |
1871 | } | |
1872 | } | |
1873 | return -1; | |
1874 | } | |
1875 | ||
1876 | int | |
1877 | pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len) | |
1878 | { | |
1879 | struct adb_request req; | |
1880 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | |
1881 | int retry; | |
1882 | int rc; | |
1883 | ||
1884 | for (retry=0; retry<16; retry++) { | |
1885 | memset(&req, 0, sizeof(req)); | |
1886 | ||
1887 | hdr->bus = bus; | |
1888 | hdr->address = addr & 0xfe; | |
1889 | hdr->mode = PMU_I2C_MODE_STDSUB; | |
1890 | hdr->bus2 = 0; | |
1891 | hdr->sub_addr = subaddr; | |
1892 | hdr->comb_addr = addr & 0xfe; | |
1893 | hdr->count = len; | |
1894 | ||
1895 | req.data[0] = PMU_I2C_CMD; | |
1896 | memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len); | |
1897 | req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1; | |
1898 | req.reply_expected = 0; | |
1899 | req.reply_len = 0; | |
1900 | req.reply[0] = 0xff; | |
1901 | rc = pmu_queue_request(&req); | |
1902 | if (rc) | |
1903 | return rc; | |
1904 | while(!req.complete) | |
1905 | pmu_poll(); | |
1906 | if (req.reply[0] == PMU_I2C_STATUS_OK) | |
1907 | break; | |
1908 | mdelay(15); | |
1909 | } | |
1910 | if (req.reply[0] != PMU_I2C_STATUS_OK) | |
1911 | return -1; | |
1912 | ||
1913 | for (retry=0; retry<16; retry++) { | |
1914 | memset(&req, 0, sizeof(req)); | |
1915 | ||
1916 | mdelay(15); | |
1917 | ||
1918 | hdr->bus = PMU_I2C_BUS_STATUS; | |
1919 | req.reply[0] = 0xff; | |
1920 | ||
1921 | req.nbytes = 2; | |
1922 | req.reply_expected = 0; | |
1923 | req.reply_len = 0; | |
1924 | req.data[0] = PMU_I2C_CMD; | |
1925 | rc = pmu_queue_request(&req); | |
1926 | if (rc) | |
1927 | return rc; | |
1928 | while(!req.complete) | |
1929 | pmu_poll(); | |
1930 | if (req.reply[0] == PMU_I2C_STATUS_OK) | |
1931 | return len; | |
1932 | } | |
1933 | return -1; | |
1934 | } | |
1935 | ||
1936 | int | |
1937 | pmu_i2c_simple_read(int bus, int addr, u8* data, int len) | |
1938 | { | |
1939 | struct adb_request req; | |
1940 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | |
1941 | int retry; | |
1942 | int rc; | |
1943 | ||
1944 | for (retry=0; retry<16; retry++) { | |
1945 | memset(&req, 0, sizeof(req)); | |
1946 | ||
1947 | hdr->bus = bus; | |
1948 | hdr->address = addr | 1; | |
1949 | hdr->mode = PMU_I2C_MODE_SIMPLE; | |
1950 | hdr->bus2 = 0; | |
1951 | hdr->sub_addr = 0; | |
1952 | hdr->comb_addr = 0; | |
1953 | hdr->count = len; | |
1954 | ||
1955 | req.data[0] = PMU_I2C_CMD; | |
1956 | req.nbytes = sizeof(struct pmu_i2c_hdr) + 1; | |
1957 | req.reply_expected = 0; | |
1958 | req.reply_len = 0; | |
1959 | req.reply[0] = 0xff; | |
1960 | rc = pmu_queue_request(&req); | |
1961 | if (rc) | |
1962 | return rc; | |
1963 | while(!req.complete) | |
1964 | pmu_poll(); | |
1965 | if (req.reply[0] == PMU_I2C_STATUS_OK) | |
1966 | break; | |
1967 | mdelay(15); | |
1968 | } | |
1969 | if (req.reply[0] != PMU_I2C_STATUS_OK) | |
1970 | return -1; | |
1971 | ||
1972 | for (retry=0; retry<16; retry++) { | |
1973 | memset(&req, 0, sizeof(req)); | |
1974 | ||
1975 | mdelay(15); | |
1976 | ||
1977 | hdr->bus = PMU_I2C_BUS_STATUS; | |
1978 | req.reply[0] = 0xff; | |
1979 | ||
1980 | req.nbytes = 2; | |
1981 | req.reply_expected = 0; | |
1982 | req.reply_len = 0; | |
1983 | req.data[0] = PMU_I2C_CMD; | |
1984 | rc = pmu_queue_request(&req); | |
1985 | if (rc) | |
1986 | return rc; | |
1987 | while(!req.complete) | |
1988 | pmu_poll(); | |
1989 | if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) { | |
1990 | memcpy(data, &req.reply[1], req.reply_len - 1); | |
1991 | return req.reply_len - 1; | |
1992 | } | |
1993 | } | |
1994 | return -1; | |
1995 | } | |
1996 | ||
1997 | int | |
1998 | pmu_i2c_simple_write(int bus, int addr, u8* data, int len) | |
1999 | { | |
2000 | struct adb_request req; | |
2001 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | |
2002 | int retry; | |
2003 | int rc; | |
2004 | ||
2005 | for (retry=0; retry<16; retry++) { | |
2006 | memset(&req, 0, sizeof(req)); | |
2007 | ||
2008 | hdr->bus = bus; | |
2009 | hdr->address = addr & 0xfe; | |
2010 | hdr->mode = PMU_I2C_MODE_SIMPLE; | |
2011 | hdr->bus2 = 0; | |
2012 | hdr->sub_addr = 0; | |
2013 | hdr->comb_addr = 0; | |
2014 | hdr->count = len; | |
2015 | ||
2016 | req.data[0] = PMU_I2C_CMD; | |
2017 | memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len); | |
2018 | req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1; | |
2019 | req.reply_expected = 0; | |
2020 | req.reply_len = 0; | |
2021 | req.reply[0] = 0xff; | |
2022 | rc = pmu_queue_request(&req); | |
2023 | if (rc) | |
2024 | return rc; | |
2025 | while(!req.complete) | |
2026 | pmu_poll(); | |
2027 | if (req.reply[0] == PMU_I2C_STATUS_OK) | |
2028 | break; | |
2029 | mdelay(15); | |
2030 | } | |
2031 | if (req.reply[0] != PMU_I2C_STATUS_OK) | |
2032 | return -1; | |
2033 | ||
2034 | for (retry=0; retry<16; retry++) { | |
2035 | memset(&req, 0, sizeof(req)); | |
2036 | ||
2037 | mdelay(15); | |
2038 | ||
2039 | hdr->bus = PMU_I2C_BUS_STATUS; | |
2040 | req.reply[0] = 0xff; | |
2041 | ||
2042 | req.nbytes = 2; | |
2043 | req.reply_expected = 0; | |
2044 | req.reply_len = 0; | |
2045 | req.data[0] = PMU_I2C_CMD; | |
2046 | rc = pmu_queue_request(&req); | |
2047 | if (rc) | |
2048 | return rc; | |
2049 | while(!req.complete) | |
2050 | pmu_poll(); | |
2051 | if (req.reply[0] == PMU_I2C_STATUS_OK) | |
2052 | return len; | |
2053 | } | |
2054 | return -1; | |
2055 | } | |
2056 | ||
8c870933 | 2057 | #ifdef CONFIG_PM |
1da177e4 LT |
2058 | |
2059 | static LIST_HEAD(sleep_notifiers); | |
2060 | ||
2061 | int | |
2062 | pmu_register_sleep_notifier(struct pmu_sleep_notifier *n) | |
2063 | { | |
2064 | struct list_head *list; | |
2065 | struct pmu_sleep_notifier *notifier; | |
2066 | ||
2067 | for (list = sleep_notifiers.next; list != &sleep_notifiers; | |
2068 | list = list->next) { | |
2069 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | |
2070 | if (n->priority > notifier->priority) | |
2071 | break; | |
2072 | } | |
2073 | __list_add(&n->list, list->prev, list); | |
2074 | return 0; | |
2075 | } | |
3fb62b51 | 2076 | EXPORT_SYMBOL(pmu_register_sleep_notifier); |
1da177e4 LT |
2077 | |
2078 | int | |
2079 | pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n) | |
2080 | { | |
2081 | if (n->list.next == 0) | |
2082 | return -ENOENT; | |
2083 | list_del(&n->list); | |
2084 | n->list.next = NULL; | |
2085 | return 0; | |
2086 | } | |
3fb62b51 | 2087 | EXPORT_SYMBOL(pmu_unregister_sleep_notifier); |
a0005034 PM |
2088 | #endif /* CONFIG_PM */ |
2089 | ||
2090 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) | |
1da177e4 LT |
2091 | |
2092 | /* Sleep is broadcast last-to-first */ | |
aacaf9bd | 2093 | static int |
1da177e4 LT |
2094 | broadcast_sleep(int when, int fallback) |
2095 | { | |
2096 | int ret = PBOOK_SLEEP_OK; | |
2097 | struct list_head *list; | |
2098 | struct pmu_sleep_notifier *notifier; | |
2099 | ||
2100 | for (list = sleep_notifiers.prev; list != &sleep_notifiers; | |
2101 | list = list->prev) { | |
2102 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | |
2103 | ret = notifier->notifier_call(notifier, when); | |
2104 | if (ret != PBOOK_SLEEP_OK) { | |
2105 | printk(KERN_DEBUG "sleep %d rejected by %p (%p)\n", | |
2106 | when, notifier, notifier->notifier_call); | |
2107 | for (; list != &sleep_notifiers; list = list->next) { | |
2108 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | |
2109 | notifier->notifier_call(notifier, fallback); | |
2110 | } | |
2111 | return ret; | |
2112 | } | |
2113 | } | |
2114 | return ret; | |
2115 | } | |
2116 | ||
2117 | /* Wake is broadcast first-to-last */ | |
aacaf9bd | 2118 | static int |
1da177e4 LT |
2119 | broadcast_wake(void) |
2120 | { | |
2121 | int ret = PBOOK_SLEEP_OK; | |
2122 | struct list_head *list; | |
2123 | struct pmu_sleep_notifier *notifier; | |
2124 | ||
2125 | for (list = sleep_notifiers.next; list != &sleep_notifiers; | |
2126 | list = list->next) { | |
2127 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | |
2128 | notifier->notifier_call(notifier, PBOOK_WAKE); | |
2129 | } | |
2130 | return ret; | |
2131 | } | |
2132 | ||
2133 | /* | |
2134 | * This struct is used to store config register values for | |
2135 | * PCI devices which may get powered off when we sleep. | |
2136 | */ | |
2137 | static struct pci_save { | |
2138 | #ifndef HACKED_PCI_SAVE | |
2139 | u16 command; | |
2140 | u16 cache_lat; | |
2141 | u16 intr; | |
2142 | u32 rom_address; | |
2143 | #else | |
2144 | u32 config[16]; | |
2145 | #endif | |
2146 | } *pbook_pci_saves; | |
2147 | static int pbook_npci_saves; | |
2148 | ||
aacaf9bd | 2149 | static void |
1da177e4 LT |
2150 | pbook_alloc_pci_save(void) |
2151 | { | |
2152 | int npci; | |
2153 | struct pci_dev *pd = NULL; | |
2154 | ||
2155 | npci = 0; | |
2156 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { | |
2157 | ++npci; | |
2158 | } | |
2159 | if (npci == 0) | |
2160 | return; | |
2161 | pbook_pci_saves = (struct pci_save *) | |
2162 | kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL); | |
2163 | pbook_npci_saves = npci; | |
2164 | } | |
2165 | ||
aacaf9bd | 2166 | static void |
1da177e4 LT |
2167 | pbook_free_pci_save(void) |
2168 | { | |
2169 | if (pbook_pci_saves == NULL) | |
2170 | return; | |
2171 | kfree(pbook_pci_saves); | |
2172 | pbook_pci_saves = NULL; | |
2173 | pbook_npci_saves = 0; | |
2174 | } | |
2175 | ||
aacaf9bd | 2176 | static void |
1da177e4 LT |
2177 | pbook_pci_save(void) |
2178 | { | |
2179 | struct pci_save *ps = pbook_pci_saves; | |
2180 | struct pci_dev *pd = NULL; | |
2181 | int npci = pbook_npci_saves; | |
2182 | ||
2183 | if (ps == NULL) | |
2184 | return; | |
2185 | ||
2186 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { | |
2187 | if (npci-- == 0) | |
2188 | return; | |
2189 | #ifndef HACKED_PCI_SAVE | |
2190 | pci_read_config_word(pd, PCI_COMMAND, &ps->command); | |
2191 | pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat); | |
2192 | pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr); | |
2193 | pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address); | |
2194 | #else | |
2195 | int i; | |
2196 | for (i=1;i<16;i++) | |
2197 | pci_read_config_dword(pd, i<<4, &ps->config[i]); | |
2198 | #endif | |
2199 | ++ps; | |
2200 | } | |
2201 | } | |
2202 | ||
2203 | /* For this to work, we must take care of a few things: If gmac was enabled | |
2204 | * during boot, it will be in the pci dev list. If it's disabled at this point | |
2205 | * (and it will probably be), then you can't access it's config space. | |
2206 | */ | |
aacaf9bd | 2207 | static void |
1da177e4 LT |
2208 | pbook_pci_restore(void) |
2209 | { | |
2210 | u16 cmd; | |
2211 | struct pci_save *ps = pbook_pci_saves - 1; | |
2212 | struct pci_dev *pd = NULL; | |
2213 | int npci = pbook_npci_saves; | |
2214 | int j; | |
2215 | ||
2216 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { | |
2217 | #ifdef HACKED_PCI_SAVE | |
2218 | int i; | |
2219 | if (npci-- == 0) | |
2220 | return; | |
2221 | ps++; | |
2222 | for (i=2;i<16;i++) | |
2223 | pci_write_config_dword(pd, i<<4, ps->config[i]); | |
2224 | pci_write_config_dword(pd, 4, ps->config[1]); | |
2225 | #else | |
2226 | if (npci-- == 0) | |
2227 | return; | |
2228 | ps++; | |
2229 | if (ps->command == 0) | |
2230 | continue; | |
2231 | pci_read_config_word(pd, PCI_COMMAND, &cmd); | |
2232 | if ((ps->command & ~cmd) == 0) | |
2233 | continue; | |
2234 | switch (pd->hdr_type) { | |
2235 | case PCI_HEADER_TYPE_NORMAL: | |
2236 | for (j = 0; j < 6; ++j) | |
2237 | pci_write_config_dword(pd, | |
2238 | PCI_BASE_ADDRESS_0 + j*4, | |
2239 | pd->resource[j].start); | |
2240 | pci_write_config_dword(pd, PCI_ROM_ADDRESS, | |
2241 | ps->rom_address); | |
2242 | pci_write_config_word(pd, PCI_CACHE_LINE_SIZE, | |
2243 | ps->cache_lat); | |
2244 | pci_write_config_word(pd, PCI_INTERRUPT_LINE, | |
2245 | ps->intr); | |
2246 | pci_write_config_word(pd, PCI_COMMAND, ps->command); | |
2247 | break; | |
2248 | } | |
2249 | #endif | |
2250 | } | |
2251 | } | |
2252 | ||
2253 | #ifdef DEBUG_SLEEP | |
2254 | /* N.B. This doesn't work on the 3400 */ | |
aacaf9bd | 2255 | void |
1da177e4 LT |
2256 | pmu_blink(int n) |
2257 | { | |
2258 | struct adb_request req; | |
2259 | ||
2260 | memset(&req, 0, sizeof(req)); | |
2261 | ||
2262 | for (; n > 0; --n) { | |
2263 | req.nbytes = 4; | |
2264 | req.done = NULL; | |
2265 | req.data[0] = 0xee; | |
2266 | req.data[1] = 4; | |
2267 | req.data[2] = 0; | |
2268 | req.data[3] = 1; | |
2269 | req.reply[0] = ADB_RET_OK; | |
2270 | req.reply_len = 1; | |
2271 | req.reply_expected = 0; | |
2272 | pmu_polled_request(&req); | |
2273 | mdelay(50); | |
2274 | req.nbytes = 4; | |
2275 | req.done = NULL; | |
2276 | req.data[0] = 0xee; | |
2277 | req.data[1] = 4; | |
2278 | req.data[2] = 0; | |
2279 | req.data[3] = 0; | |
2280 | req.reply[0] = ADB_RET_OK; | |
2281 | req.reply_len = 1; | |
2282 | req.reply_expected = 0; | |
2283 | pmu_polled_request(&req); | |
2284 | mdelay(50); | |
2285 | } | |
2286 | mdelay(50); | |
2287 | } | |
2288 | #endif | |
2289 | ||
2290 | /* | |
2291 | * Put the powerbook to sleep. | |
2292 | */ | |
2293 | ||
aacaf9bd | 2294 | static u32 save_via[8]; |
1da177e4 | 2295 | |
aacaf9bd | 2296 | static void |
1da177e4 LT |
2297 | save_via_state(void) |
2298 | { | |
2299 | save_via[0] = in_8(&via[ANH]); | |
2300 | save_via[1] = in_8(&via[DIRA]); | |
2301 | save_via[2] = in_8(&via[B]); | |
2302 | save_via[3] = in_8(&via[DIRB]); | |
2303 | save_via[4] = in_8(&via[PCR]); | |
2304 | save_via[5] = in_8(&via[ACR]); | |
2305 | save_via[6] = in_8(&via[T1CL]); | |
2306 | save_via[7] = in_8(&via[T1CH]); | |
2307 | } | |
aacaf9bd | 2308 | static void |
1da177e4 LT |
2309 | restore_via_state(void) |
2310 | { | |
2311 | out_8(&via[ANH], save_via[0]); | |
2312 | out_8(&via[DIRA], save_via[1]); | |
2313 | out_8(&via[B], save_via[2]); | |
2314 | out_8(&via[DIRB], save_via[3]); | |
2315 | out_8(&via[PCR], save_via[4]); | |
2316 | out_8(&via[ACR], save_via[5]); | |
2317 | out_8(&via[T1CL], save_via[6]); | |
2318 | out_8(&via[T1CH], save_via[7]); | |
2319 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | |
2320 | out_8(&via[IFR], 0x7f); /* clear IFR */ | |
2321 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | |
2322 | } | |
2323 | ||
aacaf9bd | 2324 | static int |
1da177e4 LT |
2325 | pmac_suspend_devices(void) |
2326 | { | |
2327 | int ret; | |
2328 | ||
2329 | pm_prepare_console(); | |
2330 | ||
2331 | /* Notify old-style device drivers & userland */ | |
2332 | ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT); | |
2333 | if (ret != PBOOK_SLEEP_OK) { | |
2334 | printk(KERN_ERR "Sleep rejected by drivers\n"); | |
2335 | return -EBUSY; | |
2336 | } | |
2337 | ||
2338 | /* Sync the disks. */ | |
2339 | /* XXX It would be nice to have some way to ensure that | |
2340 | * nobody is dirtying any new buffers while we wait. That | |
2341 | * could be achieved using the refrigerator for processes | |
2342 | * that swsusp uses | |
2343 | */ | |
2344 | sys_sync(); | |
2345 | ||
2346 | /* Sleep can fail now. May not be very robust but useful for debugging */ | |
2347 | ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE); | |
2348 | if (ret != PBOOK_SLEEP_OK) { | |
2349 | printk(KERN_ERR "Driver sleep failed\n"); | |
2350 | return -EBUSY; | |
2351 | } | |
2352 | ||
2353 | /* Send suspend call to devices, hold the device core's dpm_sem */ | |
2354 | ret = device_suspend(PMSG_SUSPEND); | |
2355 | if (ret) { | |
2356 | broadcast_wake(); | |
2357 | printk(KERN_ERR "Driver sleep failed\n"); | |
2358 | return -EBUSY; | |
2359 | } | |
2360 | ||
e521dca6 BH |
2361 | /* Disable clock spreading on some machines */ |
2362 | pmac_tweak_clock_spreading(0); | |
2363 | ||
2364 | /* Stop preemption */ | |
1da177e4 LT |
2365 | preempt_disable(); |
2366 | ||
2367 | /* Make sure the decrementer won't interrupt us */ | |
2368 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
2369 | /* Make sure any pending DEC interrupt occurring while we did | |
2370 | * the above didn't re-enable the DEC */ | |
2371 | mb(); | |
2372 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | |
2373 | ||
2374 | /* We can now disable MSR_EE. This code of course works properly only | |
2375 | * on UP machines... For SMP, if we ever implement sleep, we'll have to | |
2376 | * stop the "other" CPUs way before we do all that stuff. | |
2377 | */ | |
2378 | local_irq_disable(); | |
2379 | ||
2380 | /* Broadcast power down irq | |
2381 | * This isn't that useful in most cases (only directly wired devices can | |
2382 | * use this but still... This will take care of sysdev's as well, so | |
2383 | * we exit from here with local irqs disabled and PIC off. | |
2384 | */ | |
bf2049f9 | 2385 | ret = device_power_down(PMSG_SUSPEND); |
1da177e4 LT |
2386 | if (ret) { |
2387 | wakeup_decrementer(); | |
2388 | local_irq_enable(); | |
2389 | preempt_enable(); | |
2390 | device_resume(); | |
2391 | broadcast_wake(); | |
2392 | printk(KERN_ERR "Driver powerdown failed\n"); | |
2393 | return -EBUSY; | |
2394 | } | |
2395 | ||
2396 | /* Wait for completion of async backlight requests */ | |
2397 | while (!bright_req_1.complete || !bright_req_2.complete || | |
2398 | !batt_req.complete) | |
2399 | pmu_poll(); | |
2400 | ||
2401 | /* Giveup the lazy FPU & vec so we don't have to back them | |
2402 | * up from the low level code | |
2403 | */ | |
2404 | enable_kernel_fp(); | |
2405 | ||
2406 | #ifdef CONFIG_ALTIVEC | |
2407 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | |
2408 | enable_kernel_altivec(); | |
2409 | #endif /* CONFIG_ALTIVEC */ | |
2410 | ||
2411 | return 0; | |
2412 | } | |
2413 | ||
aacaf9bd | 2414 | static int |
1da177e4 LT |
2415 | pmac_wakeup_devices(void) |
2416 | { | |
2417 | mdelay(100); | |
2418 | ||
2419 | /* Power back up system devices (including the PIC) */ | |
2420 | device_power_up(); | |
2421 | ||
2422 | /* Force a poll of ADB interrupts */ | |
2423 | adb_int_pending = 1; | |
2424 | via_pmu_interrupt(0, NULL, NULL); | |
2425 | ||
2426 | /* Restart jiffies & scheduling */ | |
2427 | wakeup_decrementer(); | |
2428 | ||
2429 | /* Re-enable local CPU interrupts */ | |
2430 | local_irq_enable(); | |
b16eeb47 | 2431 | mdelay(10); |
1da177e4 LT |
2432 | preempt_enable(); |
2433 | ||
e521dca6 BH |
2434 | /* Re-enable clock spreading on some machines */ |
2435 | pmac_tweak_clock_spreading(1); | |
2436 | ||
1da177e4 LT |
2437 | /* Resume devices */ |
2438 | device_resume(); | |
2439 | ||
2440 | /* Notify old style drivers */ | |
2441 | broadcast_wake(); | |
2442 | ||
2443 | pm_restore_console(); | |
2444 | ||
2445 | return 0; | |
2446 | } | |
2447 | ||
2448 | #define GRACKLE_PM (1<<7) | |
2449 | #define GRACKLE_DOZE (1<<5) | |
2450 | #define GRACKLE_NAP (1<<4) | |
2451 | #define GRACKLE_SLEEP (1<<3) | |
2452 | ||
aacaf9bd | 2453 | int |
1da177e4 LT |
2454 | powerbook_sleep_grackle(void) |
2455 | { | |
2456 | unsigned long save_l2cr; | |
2457 | unsigned short pmcr1; | |
2458 | struct adb_request req; | |
2459 | int ret; | |
2460 | struct pci_dev *grackle; | |
2461 | ||
2462 | grackle = pci_find_slot(0, 0); | |
2463 | if (!grackle) | |
2464 | return -ENODEV; | |
2465 | ||
2466 | ret = pmac_suspend_devices(); | |
2467 | if (ret) { | |
2468 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2469 | return ret; | |
2470 | } | |
2471 | ||
2472 | /* Turn off various things. Darwin does some retry tests here... */ | |
2473 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); | |
2474 | pmu_wait_complete(&req); | |
2475 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
2476 | PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
2477 | pmu_wait_complete(&req); | |
2478 | ||
2479 | /* For 750, save backside cache setting and disable it */ | |
2480 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
2481 | ||
2482 | if (!__fake_sleep) { | |
2483 | /* Ask the PMU to put us to sleep */ | |
2484 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2485 | pmu_wait_complete(&req); | |
2486 | } | |
2487 | ||
2488 | /* The VIA is supposed not to be restored correctly*/ | |
2489 | save_via_state(); | |
2490 | /* We shut down some HW */ | |
2491 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | |
2492 | ||
2493 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
2494 | /* Apparently, MacOS uses NAP mode for Grackle ??? */ | |
2495 | pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); | |
2496 | pmcr1 |= GRACKLE_PM|GRACKLE_NAP; | |
2497 | pci_write_config_word(grackle, 0x70, pmcr1); | |
2498 | ||
2499 | /* Call low-level ASM sleep handler */ | |
2500 | if (__fake_sleep) | |
2501 | mdelay(5000); | |
2502 | else | |
2503 | low_sleep_handler(); | |
2504 | ||
2505 | /* We're awake again, stop grackle PM */ | |
2506 | pci_read_config_word(grackle, 0x70, &pmcr1); | |
2507 | pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); | |
2508 | pci_write_config_word(grackle, 0x70, pmcr1); | |
2509 | ||
2510 | /* Make sure the PMU is idle */ | |
2511 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | |
2512 | restore_via_state(); | |
2513 | ||
2514 | /* Restore L2 cache */ | |
2515 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
2516 | _set_L2CR(save_l2cr); | |
2517 | ||
2518 | /* Restore userland MMU context */ | |
2519 | set_context(current->active_mm->context, current->active_mm->pgd); | |
2520 | ||
2521 | /* Power things up */ | |
2522 | pmu_unlock(); | |
2523 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
2524 | pmu_wait_complete(&req); | |
2525 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, | |
2526 | PMU_POW0_ON|PMU_POW0_HARD_DRIVE); | |
2527 | pmu_wait_complete(&req); | |
2528 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | |
2529 | PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); | |
2530 | pmu_wait_complete(&req); | |
2531 | ||
2532 | pmac_wakeup_devices(); | |
2533 | ||
2534 | return 0; | |
2535 | } | |
2536 | ||
aacaf9bd | 2537 | static int |
1da177e4 LT |
2538 | powerbook_sleep_Core99(void) |
2539 | { | |
2540 | unsigned long save_l2cr; | |
2541 | unsigned long save_l3cr; | |
2542 | struct adb_request req; | |
2543 | int ret; | |
2544 | ||
2545 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { | |
2546 | printk(KERN_ERR "Sleep mode not supported on this machine\n"); | |
2547 | return -ENOSYS; | |
2548 | } | |
2549 | ||
2550 | if (num_online_cpus() > 1 || cpu_is_offline(0)) | |
2551 | return -EAGAIN; | |
2552 | ||
2553 | ret = pmac_suspend_devices(); | |
2554 | if (ret) { | |
2555 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2556 | return ret; | |
2557 | } | |
2558 | ||
b16eeb47 BH |
2559 | /* Stop environment and ADB interrupts */ |
2560 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | |
2561 | pmu_wait_complete(&req); | |
1da177e4 LT |
2562 | |
2563 | /* Tell PMU what events will wake us up */ | |
2564 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, | |
2565 | 0xff, 0xff); | |
2566 | pmu_wait_complete(&req); | |
2567 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, | |
2568 | 0, PMU_PWR_WAKEUP_KEY | | |
2569 | (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); | |
2570 | pmu_wait_complete(&req); | |
2571 | ||
2572 | /* Save the state of the L2 and L3 caches */ | |
2573 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | |
2574 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | |
2575 | ||
2576 | if (!__fake_sleep) { | |
2577 | /* Ask the PMU to put us to sleep */ | |
2578 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2579 | pmu_wait_complete(&req); | |
2580 | } | |
2581 | ||
2582 | /* The VIA is supposed not to be restored correctly*/ | |
2583 | save_via_state(); | |
2584 | ||
2585 | /* Shut down various ASICs. There's a chance that we can no longer | |
2586 | * talk to the PMU after this, so I moved it to _after_ sending the | |
2587 | * sleep command to it. Still need to be checked. | |
2588 | */ | |
2589 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); | |
2590 | ||
2591 | /* Call low-level ASM sleep handler */ | |
2592 | if (__fake_sleep) | |
2593 | mdelay(5000); | |
2594 | else | |
2595 | low_sleep_handler(); | |
2596 | ||
2597 | /* Restore Apple core ASICs state */ | |
2598 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); | |
2599 | ||
2600 | /* Restore VIA */ | |
2601 | restore_via_state(); | |
2602 | ||
0086b5ec BH |
2603 | /* tweak LPJ before cpufreq is there */ |
2604 | loops_per_jiffy *= 2; | |
2605 | ||
1da177e4 LT |
2606 | /* Restore video */ |
2607 | pmac_call_early_video_resume(); | |
2608 | ||
2609 | /* Restore L2 cache */ | |
2610 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | |
2611 | _set_L2CR(save_l2cr); | |
2612 | /* Restore L3 cache */ | |
2613 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | |
2614 | _set_L3CR(save_l3cr); | |
2615 | ||
2616 | /* Restore userland MMU context */ | |
2617 | set_context(current->active_mm->context, current->active_mm->pgd); | |
2618 | ||
2619 | /* Tell PMU we are ready */ | |
2620 | pmu_unlock(); | |
2621 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
2622 | pmu_wait_complete(&req); | |
2623 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | |
2624 | pmu_wait_complete(&req); | |
2625 | ||
0086b5ec BH |
2626 | /* Restore LPJ, cpufreq will adjust the cpu frequency */ |
2627 | loops_per_jiffy /= 2; | |
2628 | ||
1da177e4 LT |
2629 | pmac_wakeup_devices(); |
2630 | ||
2631 | return 0; | |
2632 | } | |
2633 | ||
2634 | #define PB3400_MEM_CTRL 0xf8000000 | |
2635 | #define PB3400_MEM_CTRL_SLEEP 0x70 | |
2636 | ||
aacaf9bd | 2637 | static int |
1da177e4 LT |
2638 | powerbook_sleep_3400(void) |
2639 | { | |
2640 | int ret, i, x; | |
2641 | unsigned int hid0; | |
2642 | unsigned long p; | |
2643 | struct adb_request sleep_req; | |
2644 | void __iomem *mem_ctrl; | |
2645 | unsigned int __iomem *mem_ctrl_sleep; | |
2646 | ||
2647 | /* first map in the memory controller registers */ | |
2648 | mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); | |
2649 | if (mem_ctrl == NULL) { | |
2650 | printk("powerbook_sleep_3400: ioremap failed\n"); | |
2651 | return -ENOMEM; | |
2652 | } | |
2653 | mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP; | |
2654 | ||
2655 | /* Allocate room for PCI save */ | |
2656 | pbook_alloc_pci_save(); | |
2657 | ||
2658 | ret = pmac_suspend_devices(); | |
2659 | if (ret) { | |
2660 | pbook_free_pci_save(); | |
2661 | printk(KERN_ERR "Sleep rejected by devices\n"); | |
2662 | return ret; | |
2663 | } | |
2664 | ||
2665 | /* Save the state of PCI config space for some slots */ | |
2666 | pbook_pci_save(); | |
2667 | ||
2668 | /* Set the memory controller to keep the memory refreshed | |
2669 | while we're asleep */ | |
2670 | for (i = 0x403f; i >= 0x4000; --i) { | |
2671 | out_be32(mem_ctrl_sleep, i); | |
2672 | do { | |
2673 | x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; | |
2674 | } while (x == 0); | |
2675 | if (x >= 0x100) | |
2676 | break; | |
2677 | } | |
2678 | ||
2679 | /* Ask the PMU to put us to sleep */ | |
2680 | pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | |
2681 | while (!sleep_req.complete) | |
2682 | mb(); | |
2683 | ||
2684 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | |
2685 | ||
2686 | /* displacement-flush the L2 cache - necessary? */ | |
2687 | for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000) | |
2688 | i = *(volatile int *)p; | |
2689 | asleep = 1; | |
2690 | ||
2691 | /* Put the CPU into sleep mode */ | |
21fe3301 | 2692 | hid0 = mfspr(SPRN_HID0); |
1da177e4 | 2693 | hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; |
21fe3301 BH |
2694 | mtspr(SPRN_HID0, hid0); |
2695 | mtmsr(mfmsr() | MSR_POW | MSR_EE); | |
1da177e4 LT |
2696 | udelay(10); |
2697 | ||
2698 | /* OK, we're awake again, start restoring things */ | |
2699 | out_be32(mem_ctrl_sleep, 0x3f); | |
2700 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | |
2701 | pbook_pci_restore(); | |
2702 | pmu_unlock(); | |
2703 | ||
2704 | /* wait for the PMU interrupt sequence to complete */ | |
2705 | while (asleep) | |
2706 | mb(); | |
2707 | ||
2708 | pmac_wakeup_devices(); | |
2709 | pbook_free_pci_save(); | |
2710 | iounmap(mem_ctrl); | |
2711 | ||
2712 | return 0; | |
2713 | } | |
2714 | ||
a0005034 | 2715 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |
8c870933 | 2716 | |
1da177e4 LT |
2717 | /* |
2718 | * Support for /dev/pmu device | |
2719 | */ | |
2720 | #define RB_SIZE 0x10 | |
2721 | struct pmu_private { | |
2722 | struct list_head list; | |
2723 | int rb_get; | |
2724 | int rb_put; | |
2725 | struct rb_entry { | |
2726 | unsigned short len; | |
2727 | unsigned char data[16]; | |
2728 | } rb_buf[RB_SIZE]; | |
2729 | wait_queue_head_t wait; | |
2730 | spinlock_t lock; | |
2731 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2732 | int backlight_locker; | |
2733 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | |
2734 | }; | |
2735 | ||
2736 | static LIST_HEAD(all_pmu_pvt); | |
aacaf9bd | 2737 | static DEFINE_SPINLOCK(all_pvt_lock); |
1da177e4 | 2738 | |
aacaf9bd | 2739 | static void |
1da177e4 LT |
2740 | pmu_pass_intr(unsigned char *data, int len) |
2741 | { | |
2742 | struct pmu_private *pp; | |
2743 | struct list_head *list; | |
2744 | int i; | |
2745 | unsigned long flags; | |
2746 | ||
2747 | if (len > sizeof(pp->rb_buf[0].data)) | |
2748 | len = sizeof(pp->rb_buf[0].data); | |
2749 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2750 | for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { | |
2751 | pp = list_entry(list, struct pmu_private, list); | |
2752 | spin_lock(&pp->lock); | |
2753 | i = pp->rb_put + 1; | |
2754 | if (i >= RB_SIZE) | |
2755 | i = 0; | |
2756 | if (i != pp->rb_get) { | |
2757 | struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; | |
2758 | rp->len = len; | |
2759 | memcpy(rp->data, data, len); | |
2760 | pp->rb_put = i; | |
2761 | wake_up_interruptible(&pp->wait); | |
2762 | } | |
2763 | spin_unlock(&pp->lock); | |
2764 | } | |
2765 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2766 | } | |
2767 | ||
aacaf9bd | 2768 | static int |
1da177e4 LT |
2769 | pmu_open(struct inode *inode, struct file *file) |
2770 | { | |
2771 | struct pmu_private *pp; | |
2772 | unsigned long flags; | |
2773 | ||
2774 | pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); | |
2775 | if (pp == 0) | |
2776 | return -ENOMEM; | |
2777 | pp->rb_get = pp->rb_put = 0; | |
2778 | spin_lock_init(&pp->lock); | |
2779 | init_waitqueue_head(&pp->wait); | |
2780 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2781 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2782 | pp->backlight_locker = 0; | |
2783 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | |
2784 | list_add(&pp->list, &all_pmu_pvt); | |
2785 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2786 | file->private_data = pp; | |
2787 | return 0; | |
2788 | } | |
2789 | ||
aacaf9bd | 2790 | static ssize_t |
1da177e4 LT |
2791 | pmu_read(struct file *file, char __user *buf, |
2792 | size_t count, loff_t *ppos) | |
2793 | { | |
2794 | struct pmu_private *pp = file->private_data; | |
2795 | DECLARE_WAITQUEUE(wait, current); | |
2796 | unsigned long flags; | |
2797 | int ret = 0; | |
2798 | ||
2799 | if (count < 1 || pp == 0) | |
2800 | return -EINVAL; | |
2801 | if (!access_ok(VERIFY_WRITE, buf, count)) | |
2802 | return -EFAULT; | |
2803 | ||
2804 | spin_lock_irqsave(&pp->lock, flags); | |
2805 | add_wait_queue(&pp->wait, &wait); | |
2806 | current->state = TASK_INTERRUPTIBLE; | |
2807 | ||
2808 | for (;;) { | |
2809 | ret = -EAGAIN; | |
2810 | if (pp->rb_get != pp->rb_put) { | |
2811 | int i = pp->rb_get; | |
2812 | struct rb_entry *rp = &pp->rb_buf[i]; | |
2813 | ret = rp->len; | |
2814 | spin_unlock_irqrestore(&pp->lock, flags); | |
2815 | if (ret > count) | |
2816 | ret = count; | |
2817 | if (ret > 0 && copy_to_user(buf, rp->data, ret)) | |
2818 | ret = -EFAULT; | |
2819 | if (++i >= RB_SIZE) | |
2820 | i = 0; | |
2821 | spin_lock_irqsave(&pp->lock, flags); | |
2822 | pp->rb_get = i; | |
2823 | } | |
2824 | if (ret >= 0) | |
2825 | break; | |
2826 | if (file->f_flags & O_NONBLOCK) | |
2827 | break; | |
2828 | ret = -ERESTARTSYS; | |
2829 | if (signal_pending(current)) | |
2830 | break; | |
2831 | spin_unlock_irqrestore(&pp->lock, flags); | |
2832 | schedule(); | |
2833 | spin_lock_irqsave(&pp->lock, flags); | |
2834 | } | |
2835 | current->state = TASK_RUNNING; | |
2836 | remove_wait_queue(&pp->wait, &wait); | |
2837 | spin_unlock_irqrestore(&pp->lock, flags); | |
2838 | ||
2839 | return ret; | |
2840 | } | |
2841 | ||
aacaf9bd | 2842 | static ssize_t |
1da177e4 LT |
2843 | pmu_write(struct file *file, const char __user *buf, |
2844 | size_t count, loff_t *ppos) | |
2845 | { | |
2846 | return 0; | |
2847 | } | |
2848 | ||
aacaf9bd | 2849 | static unsigned int |
1da177e4 LT |
2850 | pmu_fpoll(struct file *filp, poll_table *wait) |
2851 | { | |
2852 | struct pmu_private *pp = filp->private_data; | |
2853 | unsigned int mask = 0; | |
2854 | unsigned long flags; | |
2855 | ||
2856 | if (pp == 0) | |
2857 | return 0; | |
2858 | poll_wait(filp, &pp->wait, wait); | |
2859 | spin_lock_irqsave(&pp->lock, flags); | |
2860 | if (pp->rb_get != pp->rb_put) | |
2861 | mask |= POLLIN; | |
2862 | spin_unlock_irqrestore(&pp->lock, flags); | |
2863 | return mask; | |
2864 | } | |
2865 | ||
aacaf9bd | 2866 | static int |
1da177e4 LT |
2867 | pmu_release(struct inode *inode, struct file *file) |
2868 | { | |
2869 | struct pmu_private *pp = file->private_data; | |
2870 | unsigned long flags; | |
2871 | ||
2872 | lock_kernel(); | |
2873 | if (pp != 0) { | |
2874 | file->private_data = NULL; | |
2875 | spin_lock_irqsave(&all_pvt_lock, flags); | |
2876 | list_del(&pp->list); | |
2877 | spin_unlock_irqrestore(&all_pvt_lock, flags); | |
2878 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | |
2879 | if (pp->backlight_locker) { | |
2880 | spin_lock_irqsave(&pmu_lock, flags); | |
2881 | disable_kernel_backlight--; | |
2882 | spin_unlock_irqrestore(&pmu_lock, flags); | |
2883 | } | |
2884 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | |
2885 | kfree(pp); | |
2886 | } | |
2887 | unlock_kernel(); | |
2888 | return 0; | |
2889 | } | |
2890 | ||
aacaf9bd | 2891 | static int |
1da177e4 LT |
2892 | pmu_ioctl(struct inode * inode, struct file *filp, |
2893 | u_int cmd, u_long arg) | |
2894 | { | |
1da177e4 | 2895 | __u32 __user *argp = (__u32 __user *)arg; |
8c870933 | 2896 | int error = -EINVAL; |
1da177e4 LT |
2897 | |
2898 | switch (cmd) { | |
a0005034 | 2899 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 LT |
2900 | case PMU_IOC_SLEEP: |
2901 | if (!capable(CAP_SYS_ADMIN)) | |
2902 | return -EACCES; | |
2903 | if (sleep_in_progress) | |
2904 | return -EBUSY; | |
2905 | sleep_in_progress = 1; | |
2906 | switch (pmu_kind) { | |
2907 | case PMU_OHARE_BASED: | |
2908 | error = powerbook_sleep_3400(); | |
2909 | break; | |
2910 | case PMU_HEATHROW_BASED: | |
2911 | case PMU_PADDINGTON_BASED: | |
2912 | error = powerbook_sleep_grackle(); | |
2913 | break; | |
2914 | case PMU_KEYLARGO_BASED: | |
2915 | error = powerbook_sleep_Core99(); | |
2916 | break; | |
2917 | default: | |
2918 | error = -ENOSYS; | |
2919 | } | |
2920 | sleep_in_progress = 0; | |
8c870933 | 2921 | break; |
1da177e4 LT |
2922 | case PMU_IOC_CAN_SLEEP: |
2923 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) | |
2924 | return put_user(0, argp); | |
2925 | else | |
2926 | return put_user(1, argp); | |
a0005034 | 2927 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |
1da177e4 LT |
2928 | |
2929 | #ifdef CONFIG_PMAC_BACKLIGHT | |
2930 | /* Backlight should have its own device or go via | |
2931 | * the fbdev | |
2932 | */ | |
2933 | case PMU_IOC_GET_BACKLIGHT: | |
2934 | if (sleep_in_progress) | |
2935 | return -EBUSY; | |
2936 | error = get_backlight_level(); | |
2937 | if (error < 0) | |
2938 | return error; | |
2939 | return put_user(error, argp); | |
2940 | case PMU_IOC_SET_BACKLIGHT: | |
2941 | { | |
2942 | __u32 value; | |
2943 | if (sleep_in_progress) | |
2944 | return -EBUSY; | |
2945 | error = get_user(value, argp); | |
2946 | if (!error) | |
2947 | error = set_backlight_level(value); | |
8c870933 | 2948 | break; |
1da177e4 LT |
2949 | } |
2950 | #ifdef CONFIG_INPUT_ADBHID | |
2951 | case PMU_IOC_GRAB_BACKLIGHT: { | |
8c870933 | 2952 | struct pmu_private *pp = filp->private_data; |
1da177e4 | 2953 | unsigned long flags; |
8c870933 | 2954 | |
1da177e4 LT |
2955 | if (pp->backlight_locker) |
2956 | return 0; | |
2957 | pp->backlight_locker = 1; | |
2958 | spin_lock_irqsave(&pmu_lock, flags); | |
2959 | disable_kernel_backlight++; | |
2960 | spin_unlock_irqrestore(&pmu_lock, flags); | |
2961 | return 0; | |
2962 | } | |
2963 | #endif /* CONFIG_INPUT_ADBHID */ | |
2964 | #endif /* CONFIG_PMAC_BACKLIGHT */ | |
2965 | case PMU_IOC_GET_MODEL: | |
2966 | return put_user(pmu_kind, argp); | |
2967 | case PMU_IOC_HAS_ADB: | |
2968 | return put_user(pmu_has_adb, argp); | |
2969 | } | |
8c870933 | 2970 | return error; |
1da177e4 LT |
2971 | } |
2972 | ||
aacaf9bd | 2973 | static struct file_operations pmu_device_fops = { |
1da177e4 LT |
2974 | .read = pmu_read, |
2975 | .write = pmu_write, | |
2976 | .poll = pmu_fpoll, | |
2977 | .ioctl = pmu_ioctl, | |
2978 | .open = pmu_open, | |
2979 | .release = pmu_release, | |
2980 | }; | |
2981 | ||
aacaf9bd | 2982 | static struct miscdevice pmu_device = { |
1da177e4 LT |
2983 | PMU_MINOR, "pmu", &pmu_device_fops |
2984 | }; | |
2985 | ||
8c870933 | 2986 | static int pmu_device_init(void) |
1da177e4 LT |
2987 | { |
2988 | if (!via) | |
8c870933 | 2989 | return 0; |
1da177e4 LT |
2990 | if (misc_register(&pmu_device) < 0) |
2991 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | |
8c870933 | 2992 | return 0; |
1da177e4 | 2993 | } |
8c870933 BH |
2994 | device_initcall(pmu_device_init); |
2995 | ||
1da177e4 LT |
2996 | |
2997 | #ifdef DEBUG_SLEEP | |
aacaf9bd | 2998 | static inline void |
1da177e4 LT |
2999 | polled_handshake(volatile unsigned char __iomem *via) |
3000 | { | |
3001 | via[B] &= ~TREQ; eieio(); | |
3002 | while ((via[B] & TACK) != 0) | |
3003 | ; | |
3004 | via[B] |= TREQ; eieio(); | |
3005 | while ((via[B] & TACK) == 0) | |
3006 | ; | |
3007 | } | |
3008 | ||
aacaf9bd | 3009 | static inline void |
1da177e4 LT |
3010 | polled_send_byte(volatile unsigned char __iomem *via, int x) |
3011 | { | |
3012 | via[ACR] |= SR_OUT | SR_EXT; eieio(); | |
3013 | via[SR] = x; eieio(); | |
3014 | polled_handshake(via); | |
3015 | } | |
3016 | ||
aacaf9bd | 3017 | static inline int |
1da177e4 LT |
3018 | polled_recv_byte(volatile unsigned char __iomem *via) |
3019 | { | |
3020 | int x; | |
3021 | ||
3022 | via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio(); | |
3023 | x = via[SR]; eieio(); | |
3024 | polled_handshake(via); | |
3025 | x = via[SR]; eieio(); | |
3026 | return x; | |
3027 | } | |
3028 | ||
aacaf9bd | 3029 | int |
1da177e4 LT |
3030 | pmu_polled_request(struct adb_request *req) |
3031 | { | |
3032 | unsigned long flags; | |
3033 | int i, l, c; | |
3034 | volatile unsigned char __iomem *v = via; | |
3035 | ||
3036 | req->complete = 1; | |
3037 | c = req->data[0]; | |
3038 | l = pmu_data_len[c][0]; | |
3039 | if (l >= 0 && req->nbytes != l + 1) | |
3040 | return -EINVAL; | |
3041 | ||
3042 | local_irq_save(flags); | |
3043 | while (pmu_state != idle) | |
3044 | pmu_poll(); | |
3045 | ||
3046 | while ((via[B] & TACK) == 0) | |
3047 | ; | |
3048 | polled_send_byte(v, c); | |
3049 | if (l < 0) { | |
3050 | l = req->nbytes - 1; | |
3051 | polled_send_byte(v, l); | |
3052 | } | |
3053 | for (i = 1; i <= l; ++i) | |
3054 | polled_send_byte(v, req->data[i]); | |
3055 | ||
3056 | l = pmu_data_len[c][1]; | |
3057 | if (l < 0) | |
3058 | l = polled_recv_byte(v); | |
3059 | for (i = 0; i < l; ++i) | |
3060 | req->reply[i + req->reply_len] = polled_recv_byte(v); | |
3061 | ||
3062 | if (req->done) | |
3063 | (*req->done)(req); | |
3064 | ||
3065 | local_irq_restore(flags); | |
3066 | return 0; | |
3067 | } | |
3068 | #endif /* DEBUG_SLEEP */ | |
3069 | ||
3070 | ||
3071 | /* FIXME: This is a temporary set of callbacks to enable us | |
3072 | * to do suspend-to-disk. | |
3073 | */ | |
3074 | ||
a0005034 | 3075 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 LT |
3076 | |
3077 | static int pmu_sys_suspended = 0; | |
3078 | ||
3bfffd97 | 3079 | static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state) |
1da177e4 | 3080 | { |
ca078bae | 3081 | if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended) |
1da177e4 LT |
3082 | return 0; |
3083 | ||
3084 | /* Suspend PMU event interrupts */ | |
3085 | pmu_suspend(); | |
3086 | ||
3087 | pmu_sys_suspended = 1; | |
3088 | return 0; | |
3089 | } | |
3090 | ||
3091 | static int pmu_sys_resume(struct sys_device *sysdev) | |
3092 | { | |
3093 | struct adb_request req; | |
3094 | ||
3095 | if (!pmu_sys_suspended) | |
3096 | return 0; | |
3097 | ||
3098 | /* Tell PMU we are ready */ | |
3099 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | |
3100 | pmu_wait_complete(&req); | |
3101 | ||
3102 | /* Resume PMU event interrupts */ | |
3103 | pmu_resume(); | |
3104 | ||
3105 | pmu_sys_suspended = 0; | |
3106 | ||
3107 | return 0; | |
3108 | } | |
3109 | ||
a0005034 | 3110 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |
1da177e4 LT |
3111 | |
3112 | static struct sysdev_class pmu_sysclass = { | |
3113 | set_kset_name("pmu"), | |
3114 | }; | |
3115 | ||
3116 | static struct sys_device device_pmu = { | |
3117 | .id = 0, | |
3118 | .cls = &pmu_sysclass, | |
3119 | }; | |
3120 | ||
3121 | static struct sysdev_driver driver_pmu = { | |
a0005034 | 3122 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 LT |
3123 | .suspend = &pmu_sys_suspend, |
3124 | .resume = &pmu_sys_resume, | |
a0005034 | 3125 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |
1da177e4 LT |
3126 | }; |
3127 | ||
3128 | static int __init init_pmu_sysfs(void) | |
3129 | { | |
3130 | int rc; | |
3131 | ||
3132 | rc = sysdev_class_register(&pmu_sysclass); | |
3133 | if (rc) { | |
3134 | printk(KERN_ERR "Failed registering PMU sys class\n"); | |
3135 | return -ENODEV; | |
3136 | } | |
3137 | rc = sysdev_register(&device_pmu); | |
3138 | if (rc) { | |
3139 | printk(KERN_ERR "Failed registering PMU sys device\n"); | |
3140 | return -ENODEV; | |
3141 | } | |
3142 | rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu); | |
3143 | if (rc) { | |
3144 | printk(KERN_ERR "Failed registering PMU sys driver\n"); | |
3145 | return -ENODEV; | |
3146 | } | |
3147 | return 0; | |
3148 | } | |
3149 | ||
3150 | subsys_initcall(init_pmu_sysfs); | |
3151 | ||
3152 | EXPORT_SYMBOL(pmu_request); | |
3153 | EXPORT_SYMBOL(pmu_poll); | |
3154 | EXPORT_SYMBOL(pmu_poll_adb); | |
3155 | EXPORT_SYMBOL(pmu_wait_complete); | |
3156 | EXPORT_SYMBOL(pmu_suspend); | |
3157 | EXPORT_SYMBOL(pmu_resume); | |
3158 | EXPORT_SYMBOL(pmu_unlock); | |
3159 | EXPORT_SYMBOL(pmu_i2c_combined_read); | |
3160 | EXPORT_SYMBOL(pmu_i2c_stdsub_write); | |
3161 | EXPORT_SYMBOL(pmu_i2c_simple_read); | |
3162 | EXPORT_SYMBOL(pmu_i2c_simple_write); | |
a0005034 | 3163 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
1da177e4 LT |
3164 | EXPORT_SYMBOL(pmu_enable_irled); |
3165 | EXPORT_SYMBOL(pmu_battery_count); | |
3166 | EXPORT_SYMBOL(pmu_batteries); | |
3167 | EXPORT_SYMBOL(pmu_power_flags); | |
a0005034 | 3168 | #endif /* CONFIG_PM && CONFIG_PPC32 */ |
1da177e4 | 3169 |