projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] powerpc: powermac adb fix udbg_adb_use_btext warning
[deliverable/linux.git] / drivers / macintosh / via-pmu.c
CommitLineData
1da177e4
LT		 1/*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
13 *
14 * THIS DRIVER IS BECOMING A TOTAL MESS !
15 * - Cleanup atomically disabling reply to PMU events after
16 * a sleep or a freq. switch
17 * - Move sleep code out of here to pmac_pm, merge into new
18 * common PM infrastructure
19 * - Move backlight code out as well
20 * - Save/Restore PCI space properly
21 *
22 */
23#include <stdarg.h>
24#include <linux/config.h>
25#include <linux/types.h>
26#include <linux/errno.h>
27#include <linux/kernel.h>
28#include <linux/delay.h>
29#include <linux/sched.h>
30#include <linux/miscdevice.h>
31#include <linux/blkdev.h>
32#include <linux/pci.h>
33#include <linux/slab.h>
34#include <linux/poll.h>
35#include <linux/adb.h>
36#include <linux/pmu.h>
37#include <linux/cuda.h>
38#include <linux/smp_lock.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/pm.h>
42#include <linux/proc_fs.h>
43#include <linux/init.h>
44#include <linux/interrupt.h>
45#include <linux/device.h>
46#include <linux/sysdev.h>
47#include <linux/suspend.h>
48#include <linux/syscalls.h>
49#include <linux/cpu.h>
50#include <asm/prom.h>
51#include <asm/machdep.h>
52#include <asm/io.h>
53#include <asm/pgtable.h>
54#include <asm/system.h>
55#include <asm/sections.h>
56#include <asm/irq.h>
57#include <asm/pmac_feature.h>
58#include <asm/uaccess.h>
59#include <asm/mmu_context.h>
60#include <asm/cputable.h>
61#include <asm/time.h>
62#ifdef CONFIG_PMAC_BACKLIGHT
63#include <asm/backlight.h>
64#endif
65
e4ee69c8
BH		 66#ifdef CONFIG_PPC32
67#include <asm/open_pic.h>
68#endif
69
1da177e4
LT		 70/* Some compile options */
71#undef SUSPEND_USES_PMU
72#define DEBUG_SLEEP
73#undef HACKED_PCI_SAVE
74
75/* Misc minor number allocated for /dev/pmu */
76#define PMU_MINOR 154
77
78/* How many iterations between battery polls */
79#define BATTERY_POLLING_COUNT 2
80
81static volatile unsigned char __iomem *via;
82
83/* VIA registers - spaced 0x200 bytes apart */
84#define RS 0x200 /* skip between registers */
85#define B 0 /* B-side data */
86#define A RS /* A-side data */
87#define DIRB (2*RS) /* B-side direction (1=output) */
88#define DIRA (3*RS) /* A-side direction (1=output) */
89#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
90#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
91#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
92#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
93#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
94#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
95#define SR (10*RS) /* Shift register */
96#define ACR (11*RS) /* Auxiliary control register */
97#define PCR (12*RS) /* Peripheral control register */
98#define IFR (13*RS) /* Interrupt flag register */
99#define IER (14*RS) /* Interrupt enable register */
100#define ANH (15*RS) /* A-side data, no handshake */
101
102/* Bits in B data register: both active low */
103#define TACK 0x08 /* Transfer acknowledge (input) */
104#define TREQ 0x10 /* Transfer request (output) */
105
106/* Bits in ACR */
107#define SR_CTRL 0x1c /* Shift register control bits */
108#define SR_EXT 0x0c /* Shift on external clock */
109#define SR_OUT 0x10 /* Shift out if 1 */
110
111/* Bits in IFR and IER */
112#define IER_SET 0x80 /* set bits in IER */
113#define IER_CLR 0 /* clear bits in IER */
114#define SR_INT 0x04 /* Shift register full/empty */
115#define CB2_INT 0x08
116#define CB1_INT 0x10 /* transition on CB1 input */
117
118static volatile enum pmu_state {
119 idle,
120 sending,
121 intack,
122 reading,
123 reading_intr,
124 locked,
125} pmu_state;
126
127static volatile enum int_data_state {
128 int_data_empty,
129 int_data_fill,
130 int_data_ready,
131 int_data_flush
132} int_data_state[2] = { int_data_empty, int_data_empty };
133
134static struct adb_request *current_req;
135static struct adb_request *last_req;
136static struct adb_request *req_awaiting_reply;
137static unsigned char interrupt_data[2][32];
138static int interrupt_data_len[2];
139static int int_data_last;
140static unsigned char *reply_ptr;
141static int data_index;
142static int data_len;
143static volatile int adb_int_pending;
144static volatile int disable_poll;
145static struct adb_request bright_req_1, bright_req_2;
146static struct device_node *vias;
147static int pmu_kind = PMU_UNKNOWN;
148static int pmu_fully_inited = 0;
149static int pmu_has_adb;
51d3082f 150static struct device_node *gpio_node;
1da177e4
LT		 151static unsigned char __iomem *gpio_reg = NULL;
152static int gpio_irq = -1;
153static int gpio_irq_enabled = -1;
154static volatile int pmu_suspended = 0;
155static spinlock_t pmu_lock;
156static u8 pmu_intr_mask;
157static int pmu_version;
158static int drop_interrupts;
a0005034 159#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 160static int option_lid_wakeup = 1;
161static int sleep_in_progress;
a0005034 162#endif /* CONFIG_PM && CONFIG_PPC32 */
1da177e4
LT		 163static unsigned long async_req_locks;
164static unsigned int pmu_irq_stats[11];
165
166static struct proc_dir_entry *proc_pmu_root;
167static struct proc_dir_entry *proc_pmu_info;
168static struct proc_dir_entry *proc_pmu_irqstats;
169static struct proc_dir_entry *proc_pmu_options;
170static int option_server_mode;
171
1da177e4
LT		 172int pmu_battery_count;
173int pmu_cur_battery;
174unsigned int pmu_power_flags;
175struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
176static int query_batt_timer = BATTERY_POLLING_COUNT;
177static struct adb_request batt_req;
178static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4
LT		 179
180#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
181extern int disable_kernel_backlight;
182#endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
183
184int __fake_sleep;
185int asleep;
186struct notifier_block *sleep_notifier_list;
187
188#ifdef CONFIG_ADB
189static int adb_dev_map = 0;
190static int pmu_adb_flags;
191
192static int pmu_probe(void);
193static int pmu_init(void);
194static int pmu_send_request(struct adb_request *req, int sync);
195static int pmu_adb_autopoll(int devs);
196static int pmu_adb_reset_bus(void);
197#endif /* CONFIG_ADB */
198
199static int init_pmu(void);
200static int pmu_queue_request(struct adb_request *req);
201static void pmu_start(void);
202static irqreturn_t via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs);
203static irqreturn_t gpio1_interrupt(int irq, void *arg, struct pt_regs *regs);
204static int proc_get_info(char *page, char **start, off_t off,
205 int count, int *eof, void *data);
206static int proc_get_irqstats(char *page, char **start, off_t off,
207 int count, int *eof, void *data);
208#ifdef CONFIG_PMAC_BACKLIGHT
209static int pmu_set_backlight_level(int level, void* data);
210static int pmu_set_backlight_enable(int on, int level, void* data);
211#endif /* CONFIG_PMAC_BACKLIGHT */
1da177e4
LT		 212static void pmu_pass_intr(unsigned char *data, int len);
213static int proc_get_batt(char *page, char **start, off_t off,
214 int count, int *eof, void *data);
1da177e4
LT		 215static int proc_read_options(char *page, char **start, off_t off,
216 int count, int *eof, void *data);
217static int proc_write_options(struct file *file, const char __user *buffer,
218 unsigned long count, void *data);
219
220#ifdef CONFIG_ADB
221struct adb_driver via_pmu_driver = {
222 "PMU",
223 pmu_probe,
224 pmu_init,
225 pmu_send_request,
226 pmu_adb_autopoll,
227 pmu_poll_adb,
228 pmu_adb_reset_bus
229};
230#endif /* CONFIG_ADB */
231
232extern void low_sleep_handler(void);
233extern void enable_kernel_altivec(void);
234extern void enable_kernel_fp(void);
235
236#ifdef DEBUG_SLEEP
237int pmu_polled_request(struct adb_request *req);
238int pmu_wink(struct adb_request *req);
239#endif
240
241/*
242 * This table indicates for each PMU opcode:
243 * - the number of data bytes to be sent with the command, or -1
244 * if a length byte should be sent,
245 * - the number of response bytes which the PMU will return, or
246 * -1 if it will send a length byte.
247 */
aacaf9bd 248static const s8 pmu_data_len[256][2] = {
1da177e4
LT		 249/* 0 1 2 3 4 5 6 7 */
250/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
251/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
252/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
254/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
255/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
256/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
258/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
259/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
260/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
261/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
262/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
263/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
264/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
265/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
266/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
267/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
268/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
269/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
270/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
271/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
272/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
273/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
274/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
275/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
276/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
277/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
278/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
279/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
280/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
281/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
282};
283
284static char *pbook_type[] = {
285 "Unknown PowerBook",
286 "PowerBook 2400/3400/3500(G3)",
287 "PowerBook G3 Series",
288 "1999 PowerBook G3",
289 "Core99"
290};
291
292#ifdef CONFIG_PMAC_BACKLIGHT
293static struct backlight_controller pmu_backlight_controller = {
294 pmu_set_backlight_enable,
295 pmu_set_backlight_level
296};
297#endif /* CONFIG_PMAC_BACKLIGHT */
298
51d3082f 299int __init find_via_pmu(void)
1da177e4 300{
51d3082f
BH		 301 phys_addr_t taddr;
302 u32 *reg;
303
1da177e4
LT		 304 if (via != 0)
305 return 1;
51d3082f
BH		 306 vias = of_find_node_by_name(NULL, "via-pmu");
307 if (vias == NULL)
1da177e4 308 return 0;
1da177e4 309
51d3082f
BH		 310 reg = (u32 *)get_property(vias, "reg", NULL);
311 if (reg == NULL) {
312 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
313 goto fail;
314 }
315 taddr = of_translate_address(vias, reg);
316 if (taddr == 0) {
317 printk(KERN_ERR "via-pmu: Can't translate address !\n");
318 goto fail;
1da177e4
LT		 319 }
320
321 spin_lock_init(&pmu_lock);
322
323 pmu_has_adb = 1;
324
325 pmu_intr_mask = PMU_INT_PCEJECT |
326 PMU_INT_SNDBRT |
327 PMU_INT_ADB |
328 PMU_INT_TICK;
329
330 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
331 || device_is_compatible(vias->parent, "ohare")))
332 pmu_kind = PMU_OHARE_BASED;
333 else if (device_is_compatible(vias->parent, "paddington"))
334 pmu_kind = PMU_PADDINGTON_BASED;
335 else if (device_is_compatible(vias->parent, "heathrow"))
336 pmu_kind = PMU_HEATHROW_BASED;
337 else if (device_is_compatible(vias->parent, "Keylargo")
338 || device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f
BH		 339 struct device_node *gpiop;
340 phys_addr_t gaddr = 0;
1da177e4
LT		 341
342 pmu_kind = PMU_KEYLARGO_BASED;
343 pmu_has_adb = (find_type_devices("adb") != NULL);
344 pmu_intr_mask = PMU_INT_PCEJECT |
345 PMU_INT_SNDBRT |
346 PMU_INT_ADB |
347 PMU_INT_TICK |
348 PMU_INT_ENVIRONMENT;
349
51d3082f
BH		 350 gpiop = of_find_node_by_name(NULL, "gpio");
351 if (gpiop) {
352 reg = (u32 *)get_property(gpiop, "reg", NULL);
353 if (reg)
354 gaddr = of_translate_address(gpiop, reg);
355 if (gaddr != 0)
356 gpio_reg = ioremap(gaddr, 0x10);
1da177e4 357 }
51d3082f
BH		 358 if (gpio_reg == NULL)
359 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
1da177e4
LT		 360 } else
361 pmu_kind = PMU_UNKNOWN;
362
51d3082f
BH		 363 via = ioremap(taddr, 0x2000);
364 if (via == NULL) {
365 printk(KERN_ERR "via-pmu: Can't map address !\n");
366 goto fail;
367 }
1da177e4
LT		 368
369 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
370 out_8(&via[IFR], 0x7f); /* clear IFR */
371
372 pmu_state = idle;
373
374 if (!init_pmu()) {
375 via = NULL;
376 return 0;
377 }
378
379 printk(KERN_INFO "PMU driver %d initialized for %s, firmware: %02x\n",
380 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
381
382 sys_ctrler = SYS_CTRLER_PMU;
383
384 return 1;
51d3082f
BH		 385 fail:
386 of_node_put(vias);
387 vias = NULL;
388 return 0;
1da177e4
LT		 389}
390
391#ifdef CONFIG_ADB
51d3082f 392static int pmu_probe(void)
1da177e4
LT		 393{
394 return vias == NULL? -ENODEV: 0;
395}
396
51d3082f 397static int __init pmu_init(void)
1da177e4
LT		 398{
399 if (vias == NULL)
400 return -ENODEV;
401 return 0;
402}
403#endif /* CONFIG_ADB */
404
405/*
406 * We can't wait until pmu_init gets called, that happens too late.
407 * It happens after IDE and SCSI initialization, which can take a few
408 * seconds, and by that time the PMU could have given up on us and
409 * turned us off.
410 * Thus this is called with arch_initcall rather than device_initcall.
411 */
412static int __init via_pmu_start(void)
413{
414 if (vias == NULL)
415 return -ENODEV;
416
417 bright_req_1.complete = 1;
418 bright_req_2.complete = 1;
1da177e4 419 batt_req.complete = 1;
1da177e4 420
51d3082f 421#ifndef CONFIG_PPC_MERGE
e4ee69c8
BH		 422 if (pmu_kind == PMU_KEYLARGO_BASED)
423 openpic_set_irq_priority(vias->intrs[0].line,
424 OPENPIC_PRIORITY_DEFAULT + 1);
425#endif
426
1da177e4
LT		 427 if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
428 (void *)0)) {
429 printk(KERN_ERR "VIA-PMU: can't get irq %d\n",
430 vias->intrs[0].line);
431 return -EAGAIN;
432 }
433
51d3082f
BH		 434 if (pmu_kind == PMU_KEYLARGO_BASED) {
435 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
436 if (gpio_node == NULL)
437 gpio_node = of_find_node_by_name(NULL,
438 "pmu-interrupt");
439 if (gpio_node && gpio_node->n_intrs > 0)
440 gpio_irq = gpio_node->intrs[0].line;
441
442 if (gpio_irq != -1) {
443 if (request_irq(gpio_irq, gpio1_interrupt, 0,
444 "GPIO1 ADB", (void *)0))
445 printk(KERN_ERR "pmu: can't get irq %d"
446 " (GPIO1)\n", gpio_irq);
447 else
448 gpio_irq_enabled = 1;
449 }
1da177e4
LT		 450 }
451
452 /* Enable interrupts */
453 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
454
455 pmu_fully_inited = 1;
456
457 /* Make sure PMU settle down before continuing. This is _very_ important
458 * since the IDE probe may shut interrupts down for quite a bit of time. If
459 * a PMU communication is pending while this happens, the PMU may timeout
460 * Not that on Core99 machines, the PMU keeps sending us environement
461 * messages, we should find a way to either fix IDE or make it call
462 * pmu_suspend() before masking interrupts. This can also happens while
463 * scolling with some fbdevs.
464 */
465 do {
466 pmu_poll();
467 } while (pmu_state != idle);
468
469 return 0;
470}
471
472arch_initcall(via_pmu_start);
473
474/*
475 * This has to be done after pci_init, which is a subsys_initcall.
476 */
477static int __init via_pmu_dev_init(void)
478{
479 if (vias == NULL)
480 return -ENODEV;
481
482#ifndef CONFIG_PPC64
483 request_OF_resource(vias, 0, NULL);
484#endif
485#ifdef CONFIG_PMAC_BACKLIGHT
486 /* Enable backlight */
487 register_backlight_controller(&pmu_backlight_controller, NULL, "pmu");
488#endif /* CONFIG_PMAC_BACKLIGHT */
489
8c870933 490#ifdef CONFIG_PPC32
1da177e4
LT		 491 if (machine_is_compatible("AAPL,3400/2400") ||
492 machine_is_compatible("AAPL,3500")) {
493 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
494 NULL, PMAC_MB_INFO_MODEL, 0);
495 pmu_battery_count = 1;
496 if (mb == PMAC_TYPE_COMET)
497 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
498 else
499 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
500 } else if (machine_is_compatible("AAPL,PowerBook1998") ||
501 machine_is_compatible("PowerBook1,1")) {
502 pmu_battery_count = 2;
503 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
504 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
505 } else {
506 struct device_node* prim = find_devices("power-mgt");
507 u32 *prim_info = NULL;
508 if (prim)
509 prim_info = (u32 *)get_property(prim, "prim-info", NULL);
510 if (prim_info) {
511 /* Other stuffs here yet unknown */
512 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
513 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
514 if (pmu_battery_count > 1)
515 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
516 }
517 }
8c870933
BH		 518#endif /* CONFIG_PPC32 */
519
1da177e4
LT		 520 /* Create /proc/pmu */
521 proc_pmu_root = proc_mkdir("pmu", NULL);
522 if (proc_pmu_root) {
8c870933 523 long i;
1da177e4
LT		 524
525 for (i=0; i<pmu_battery_count; i++) {
526 char title[16];
8c870933 527 sprintf(title, "battery_%ld", i);
1da177e4
LT		 528 proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
529 proc_get_batt, (void *)i);
530 }
1da177e4
LT		 531
532 proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
533 proc_get_info, NULL);
534 proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root,
535 proc_get_irqstats, NULL);
536 proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
537 if (proc_pmu_options) {
538 proc_pmu_options->nlink = 1;
539 proc_pmu_options->read_proc = proc_read_options;
540 proc_pmu_options->write_proc = proc_write_options;
541 }
542 }
543 return 0;
544}
545
546device_initcall(via_pmu_dev_init);
547
aacaf9bd 548static int
1da177e4
LT		 549init_pmu(void)
550{
551 int timeout;
552 struct adb_request req;
553
554 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
555 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
556
557 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
558 timeout = 100000;
559 while (!req.complete) {
560 if (--timeout < 0) {
561 printk(KERN_ERR "init_pmu: no response from PMU\n");
562 return 0;
563 }
564 udelay(10);
565 pmu_poll();
566 }
567
568 /* ack all pending interrupts */
569 timeout = 100000;
570 interrupt_data[0][0] = 1;
571 while (interrupt_data[0][0] || pmu_state != idle) {
572 if (--timeout < 0) {
573 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
574 return 0;
575 }
576 if (pmu_state == idle)
577 adb_int_pending = 1;
578 via_pmu_interrupt(0, NULL, NULL);
579 udelay(10);
580 }
581
582 /* Tell PMU we are ready. */
583 if (pmu_kind == PMU_KEYLARGO_BASED) {
584 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
585 while (!req.complete)
586 pmu_poll();
587 }
588
589 /* Read PMU version */
590 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
591 pmu_wait_complete(&req);
592 if (req.reply_len > 0)
593 pmu_version = req.reply[0];
594
595 /* Read server mode setting */
596 if (pmu_kind == PMU_KEYLARGO_BASED) {
597 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
598 PMU_PWR_GET_POWERUP_EVENTS);
599 pmu_wait_complete(&req);
600 if (req.reply_len == 2) {
601 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
602 option_server_mode = 1;
603 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
604 option_server_mode ? "enabled" : "disabled");
605 }
606 }
607 return 1;
608}
609
610int
611pmu_get_model(void)
612{
613 return pmu_kind;
614}
615
1da177e4
LT		 616static void pmu_set_server_mode(int server_mode)
617{
618 struct adb_request req;
619
620 if (pmu_kind != PMU_KEYLARGO_BASED)
621 return;
622
623 option_server_mode = server_mode;
624 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
625 pmu_wait_complete(&req);
626 if (req.reply_len < 2)
627 return;
628 if (server_mode)
629 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
630 PMU_PWR_SET_POWERUP_EVENTS,
631 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
632 else
633 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
634 PMU_PWR_CLR_POWERUP_EVENTS,
635 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
636 pmu_wait_complete(&req);
637}
638
1da177e4
LT		 639/* This new version of the code for 2400/3400/3500 powerbooks
640 * is inspired from the implementation in gkrellm-pmu
641 */
aacaf9bd 642static void
1da177e4
LT		 643done_battery_state_ohare(struct adb_request* req)
644{
645 /* format:
646 * [0] : flags
647 * 0x01 : AC indicator
648 * 0x02 : charging
649 * 0x04 : battery exist
650 * 0x08 :
651 * 0x10 :
652 * 0x20 : full charged
653 * 0x40 : pcharge reset
654 * 0x80 : battery exist
655 *
656 * [1][2] : battery voltage
657 * [3] : CPU temperature
658 * [4] : battery temperature
659 * [5] : current
660 * [6][7] : pcharge
661 * --tkoba
662 */
663 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
664 long pcharge, charge, vb, vmax, lmax;
665 long vmax_charging, vmax_charged;
666 long amperage, voltage, time, max;
667 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
668 NULL, PMAC_MB_INFO_MODEL, 0);
669
670 if (req->reply[0] & 0x01)
671 pmu_power_flags |= PMU_PWR_AC_PRESENT;
672 else
673 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
674
675 if (mb == PMAC_TYPE_COMET) {
676 vmax_charged = 189;
677 vmax_charging = 213;
678 lmax = 6500;
679 } else {
680 vmax_charged = 330;
681 vmax_charging = 330;
682 lmax = 6500;
683 }
684 vmax = vmax_charged;
685
686 /* If battery installed */
687 if (req->reply[0] & 0x04) {
688 bat_flags |= PMU_BATT_PRESENT;
689 if (req->reply[0] & 0x02)
690 bat_flags |= PMU_BATT_CHARGING;
691 vb = (req->reply[1] << 8) | req->reply[2];
692 voltage = (vb * 265 + 72665) / 10;
693 amperage = req->reply[5];
694 if ((req->reply[0] & 0x01) == 0) {
695 if (amperage > 200)
696 vb += ((amperage - 200) * 15)/100;
697 } else if (req->reply[0] & 0x02) {
698 vb = (vb * 97) / 100;
699 vmax = vmax_charging;
700 }
701 charge = (100 * vb) / vmax;
702 if (req->reply[0] & 0x40) {
703 pcharge = (req->reply[6] << 8) + req->reply[7];
704 if (pcharge > lmax)
705 pcharge = lmax;
706 pcharge *= 100;
707 pcharge = 100 - pcharge / lmax;
708 if (pcharge < charge)
709 charge = pcharge;
710 }
711 if (amperage > 0)
712 time = (charge * 16440) / amperage;
713 else
714 time = 0;
715 max = 100;
716 amperage = -amperage;
717 } else
718 charge = max = amperage = voltage = time = 0;
719
720 pmu_batteries[pmu_cur_battery].flags = bat_flags;
721 pmu_batteries[pmu_cur_battery].charge = charge;
722 pmu_batteries[pmu_cur_battery].max_charge = max;
723 pmu_batteries[pmu_cur_battery].amperage = amperage;
724 pmu_batteries[pmu_cur_battery].voltage = voltage;
725 pmu_batteries[pmu_cur_battery].time_remaining = time;
726
727 clear_bit(0, &async_req_locks);
728}
729
aacaf9bd 730static void
1da177e4
LT		 731done_battery_state_smart(struct adb_request* req)
732{
733 /* format:
734 * [0] : format of this structure (known: 3,4,5)
735 * [1] : flags
736 *
737 * format 3 & 4:
738 *
739 * [2] : charge
740 * [3] : max charge
741 * [4] : current
742 * [5] : voltage
743 *
744 * format 5:
745 *
746 * [2][3] : charge
747 * [4][5] : max charge
748 * [6][7] : current
749 * [8][9] : voltage
750 */
751
752 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
753 int amperage;
754 unsigned int capa, max, voltage;
755
756 if (req->reply[1] & 0x01)
757 pmu_power_flags |= PMU_PWR_AC_PRESENT;
758 else
759 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
760
761
762 capa = max = amperage = voltage = 0;
763
764 if (req->reply[1] & 0x04) {
765 bat_flags |= PMU_BATT_PRESENT;
766 switch(req->reply[0]) {
767 case 3:
768 case 4: capa = req->reply[2];
769 max = req->reply[3];
770 amperage = *((signed char *)&req->reply[4]);
771 voltage = req->reply[5];
772 break;
773 case 5: capa = (req->reply[2] << 8) | req->reply[3];
774 max = (req->reply[4] << 8) | req->reply[5];
775 amperage = *((signed short *)&req->reply[6]);
776 voltage = (req->reply[8] << 8) | req->reply[9];
777 break;
778 default:
779 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
780 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
781 break;
782 }
783 }
784
785 if ((req->reply[1] & 0x01) && (amperage > 0))
786 bat_flags |= PMU_BATT_CHARGING;
787
788 pmu_batteries[pmu_cur_battery].flags = bat_flags;
789 pmu_batteries[pmu_cur_battery].charge = capa;
790 pmu_batteries[pmu_cur_battery].max_charge = max;
791 pmu_batteries[pmu_cur_battery].amperage = amperage;
792 pmu_batteries[pmu_cur_battery].voltage = voltage;
793 if (amperage) {
794 if ((req->reply[1] & 0x01) && (amperage > 0))
795 pmu_batteries[pmu_cur_battery].time_remaining
796 = ((max-capa) * 3600) / amperage;
797 else
798 pmu_batteries[pmu_cur_battery].time_remaining
799 = (capa * 3600) / (-amperage);
800 } else
801 pmu_batteries[pmu_cur_battery].time_remaining = 0;
802
803 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
804
805 clear_bit(0, &async_req_locks);
806}
807
aacaf9bd 808static void
1da177e4
LT		 809query_battery_state(void)
810{
811 if (test_and_set_bit(0, &async_req_locks))
812 return;
813 if (pmu_kind == PMU_OHARE_BASED)
814 pmu_request(&batt_req, done_battery_state_ohare,
815 1, PMU_BATTERY_STATE);
816 else
817 pmu_request(&batt_req, done_battery_state_smart,
818 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
819}
820
aacaf9bd 821static int
1da177e4
LT		 822proc_get_info(char *page, char **start, off_t off,
823 int count, int *eof, void *data)
824{
825 char* p = page;
826
827 p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
828 p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
1da177e4
LT		 829 p += sprintf(p, "AC Power : %d\n",
830 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0));
831 p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
1da177e4
LT		 832
833 return p - page;
834}
835
aacaf9bd 836static int
1da177e4
LT		 837proc_get_irqstats(char *page, char **start, off_t off,
838 int count, int *eof, void *data)
839{
840 int i;
841 char* p = page;
842 static const char *irq_names[] = {
843 "Total CB1 triggered events",
844 "Total GPIO1 triggered events",
845 "PC-Card eject button",
846 "Sound/Brightness button",
847 "ADB message",
848 "Battery state change",
849 "Environment interrupt",
850 "Tick timer",
851 "Ghost interrupt (zero len)",
852 "Empty interrupt (empty mask)",
853 "Max irqs in a row"
854 };
855
856 for (i=0; i<11; i++) {
857 p += sprintf(p, " %2u: %10u (%s)\n",
858 i, pmu_irq_stats[i], irq_names[i]);
859 }
860 return p - page;
861}
862
aacaf9bd 863static int
1da177e4
LT		 864proc_get_batt(char *page, char **start, off_t off,
865 int count, int *eof, void *data)
866{
8c870933 867 long batnum = (long)data;
1da177e4
LT		 868 char *p = page;
869
870 p += sprintf(p, "\n");
871 p += sprintf(p, "flags : %08x\n",
872 pmu_batteries[batnum].flags);
873 p += sprintf(p, "charge : %d\n",
874 pmu_batteries[batnum].charge);
875 p += sprintf(p, "max_charge : %d\n",
876 pmu_batteries[batnum].max_charge);
877 p += sprintf(p, "current : %d\n",
878 pmu_batteries[batnum].amperage);
879 p += sprintf(p, "voltage : %d\n",
880 pmu_batteries[batnum].voltage);
881 p += sprintf(p, "time rem. : %d\n",
882 pmu_batteries[batnum].time_remaining);
883
884 return p - page;
885}
1da177e4 886
aacaf9bd 887static int
1da177e4
LT		 888proc_read_options(char *page, char **start, off_t off,
889 int count, int *eof, void *data)
890{
891 char *p = page;
892
a0005034 893#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 894 if (pmu_kind == PMU_KEYLARGO_BASED &&
895 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
896 p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 897#endif
1da177e4
LT		 898 if (pmu_kind == PMU_KEYLARGO_BASED)
899 p += sprintf(p, "server_mode=%d\n", option_server_mode);
900
901 return p - page;
902}
903
aacaf9bd 904static int
1da177e4
LT		 905proc_write_options(struct file *file, const char __user *buffer,
906 unsigned long count, void *data)
907{
908 char tmp[33];
909 char *label, *val;
910 unsigned long fcount = count;
911
912 if (!count)
913 return -EINVAL;
914 if (count > 32)
915 count = 32;
916 if (copy_from_user(tmp, buffer, count))
917 return -EFAULT;
918 tmp[count] = 0;
919
920 label = tmp;
921 while(*label == ' ')
922 label++;
923 val = label;
924 while(*val && (*val != '=')) {
925 if (*val == ' ')
926 *val = 0;
927 val++;
928 }
929 if ((*val) == 0)
930 return -EINVAL;
931 *(val++) = 0;
932 while(*val == ' ')
933 val++;
a0005034 934#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 935 if (pmu_kind == PMU_KEYLARGO_BASED &&
936 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
937 if (!strcmp(label, "lid_wakeup"))
938 option_lid_wakeup = ((*val) == '1');
8c870933 939#endif
1da177e4
LT		 940 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
941 int new_value;
942 new_value = ((*val) == '1');
943 if (new_value != option_server_mode)
944 pmu_set_server_mode(new_value);
945 }
946 return fcount;
947}
948
949#ifdef CONFIG_ADB
950/* Send an ADB command */
aacaf9bd 951static int
1da177e4
LT		 952pmu_send_request(struct adb_request *req, int sync)
953{
954 int i, ret;
955
956 if ((vias == NULL) || (!pmu_fully_inited)) {
957 req->complete = 1;
958 return -ENXIO;
959 }
960
961 ret = -EINVAL;
962
963 switch (req->data[0]) {
964 case PMU_PACKET:
965 for (i = 0; i < req->nbytes - 1; ++i)
966 req->data[i] = req->data[i+1];
967 --req->nbytes;
968 if (pmu_data_len[req->data[0]][1] != 0) {
969 req->reply[0] = ADB_RET_OK;
970 req->reply_len = 1;
971 } else
972 req->reply_len = 0;
973 ret = pmu_queue_request(req);
974 break;
975 case CUDA_PACKET:
976 switch (req->data[1]) {
977 case CUDA_GET_TIME:
978 if (req->nbytes != 2)
979 break;
980 req->data[0] = PMU_READ_RTC;
981 req->nbytes = 1;
982 req->reply_len = 3;
983 req->reply[0] = CUDA_PACKET;
984 req->reply[1] = 0;
985 req->reply[2] = CUDA_GET_TIME;
986 ret = pmu_queue_request(req);
987 break;
988 case CUDA_SET_TIME:
989 if (req->nbytes != 6)
990 break;
991 req->data[0] = PMU_SET_RTC;
992 req->nbytes = 5;
993 for (i = 1; i <= 4; ++i)
994 req->data[i] = req->data[i+1];
995 req->reply_len = 3;
996 req->reply[0] = CUDA_PACKET;
997 req->reply[1] = 0;
998 req->reply[2] = CUDA_SET_TIME;
999 ret = pmu_queue_request(req);
1000 break;
1001 }
1002 break;
1003 case ADB_PACKET:
1004 if (!pmu_has_adb)
1005 return -ENXIO;
1006 for (i = req->nbytes - 1; i > 1; --i)
1007 req->data[i+2] = req->data[i];
1008 req->data[3] = req->nbytes - 2;
1009 req->data[2] = pmu_adb_flags;
1010 /*req->data[1] = req->data[1];*/
1011 req->data[0] = PMU_ADB_CMD;
1012 req->nbytes += 2;
1013 req->reply_expected = 1;
1014 req->reply_len = 0;
1015 ret = pmu_queue_request(req);
1016 break;
1017 }
1018 if (ret) {
1019 req->complete = 1;
1020 return ret;
1021 }
1022
1023 if (sync)
1024 while (!req->complete)
1025 pmu_poll();
1026
1027 return 0;
1028}
1029
1030/* Enable/disable autopolling */
aacaf9bd 1031static int
1da177e4
LT		 1032pmu_adb_autopoll(int devs)
1033{
1034 struct adb_request req;
1035
1036 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1037 return -ENXIO;
1038
1039 if (devs) {
1040 adb_dev_map = devs;
1041 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1042 adb_dev_map >> 8, adb_dev_map);
1043 pmu_adb_flags = 2;
1044 } else {
1045 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1046 pmu_adb_flags = 0;
1047 }
1048 while (!req.complete)
1049 pmu_poll();
1050 return 0;
1051}
1052
1053/* Reset the ADB bus */
aacaf9bd 1054static int
1da177e4
LT		 1055pmu_adb_reset_bus(void)
1056{
1057 struct adb_request req;
1058 int save_autopoll = adb_dev_map;
1059
1060 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1061 return -ENXIO;
1062
1063 /* anyone got a better idea?? */
1064 pmu_adb_autopoll(0);
1065
1066 req.nbytes = 5;
1067 req.done = NULL;
1068 req.data[0] = PMU_ADB_CMD;
1069 req.data[1] = 0;
1070 req.data[2] = ADB_BUSRESET;
1071 req.data[3] = 0;
1072 req.data[4] = 0;
1073 req.reply_len = 0;
1074 req.reply_expected = 1;
1075 if (pmu_queue_request(&req) != 0) {
1076 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1077 return -EIO;
1078 }
1079 pmu_wait_complete(&req);
1080
1081 if (save_autopoll != 0)
1082 pmu_adb_autopoll(save_autopoll);
1083
1084 return 0;
1085}
1086#endif /* CONFIG_ADB */
1087
1088/* Construct and send a pmu request */
aacaf9bd 1089int
1da177e4
LT		 1090pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1091 int nbytes, ...)
1092{
1093 va_list list;
1094 int i;
1095
1096 if (vias == NULL)
1097 return -ENXIO;
1098
1099 if (nbytes < 0 || nbytes > 32) {
1100 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1101 req->complete = 1;
1102 return -EINVAL;
1103 }
1104 req->nbytes = nbytes;
1105 req->done = done;
1106 va_start(list, nbytes);
1107 for (i = 0; i < nbytes; ++i)
1108 req->data[i] = va_arg(list, int);
1109 va_end(list);
1110 req->reply_len = 0;
1111 req->reply_expected = 0;
1112 return pmu_queue_request(req);
1113}
1114
aacaf9bd 1115int
1da177e4
LT		 1116pmu_queue_request(struct adb_request *req)
1117{
1118 unsigned long flags;
1119 int nsend;
1120
1121 if (via == NULL) {
1122 req->complete = 1;
1123 return -ENXIO;
1124 }
1125 if (req->nbytes <= 0) {
1126 req->complete = 1;
1127 return 0;
1128 }
1129 nsend = pmu_data_len[req->data[0]][0];
1130 if (nsend >= 0 && req->nbytes != nsend + 1) {
1131 req->complete = 1;
1132 return -EINVAL;
1133 }
1134
1135 req->next = NULL;
1136 req->sent = 0;
1137 req->complete = 0;
1138
1139 spin_lock_irqsave(&pmu_lock, flags);
1140 if (current_req != 0) {
1141 last_req->next = req;
1142 last_req = req;
1143 } else {
1144 current_req = req;
1145 last_req = req;
1146 if (pmu_state == idle)
1147 pmu_start();
1148 }
1149 spin_unlock_irqrestore(&pmu_lock, flags);
1150
1151 return 0;
1152}
1153
1154static inline void
1155wait_for_ack(void)
1156{
1157 /* Sightly increased the delay, I had one occurrence of the message
1158 * reported
1159 */
1160 int timeout = 4000;
1161 while ((in_8(&via[B]) & TACK) == 0) {
1162 if (--timeout < 0) {
1163 printk(KERN_ERR "PMU not responding (!ack)\n");
1164 return;
1165 }
1166 udelay(10);
1167 }
1168}
1169
1170/* New PMU seems to be very sensitive to those timings, so we make sure
1171 * PCI is flushed immediately */
1172static inline void
1173send_byte(int x)
1174{
1175 volatile unsigned char __iomem *v = via;
1176
1177 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1178 out_8(&v[SR], x);
1179 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1180 (void)in_8(&v[B]);
1181}
1182
1183static inline void
1184recv_byte(void)
1185{
1186 volatile unsigned char __iomem *v = via;
1187
1188 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1189 in_8(&v[SR]); /* resets SR */
1190 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1191 (void)in_8(&v[B]);
1192}
1193
1194static inline void
1195pmu_done(struct adb_request *req)
1196{
1197 void (*done)(struct adb_request *) = req->done;
1198 mb();
1199 req->complete = 1;
1200 /* Here, we assume that if the request has a done member, the
1201 * struct request will survive to setting req->complete to 1
1202 */
1203 if (done)
1204 (*done)(req);
1205}
1206
aacaf9bd 1207static void
1da177e4
LT		 1208pmu_start(void)
1209{
1210 struct adb_request *req;
1211
1212 /* assert pmu_state == idle */
1213 /* get the packet to send */
1214 req = current_req;
1215 if (req == 0 || pmu_state != idle
1216 || (/*req->reply_expected && */req_awaiting_reply))
1217 return;
1218
1219 pmu_state = sending;
1220 data_index = 1;
1221 data_len = pmu_data_len[req->data[0]][0];
1222
1223 /* Sounds safer to make sure ACK is high before writing. This helped
1224 * kill a problem with ADB and some iBooks
1225 */
1226 wait_for_ack();
1227 /* set the shift register to shift out and send a byte */
1228 send_byte(req->data[0]);
1229}
1230
aacaf9bd 1231void
1da177e4
LT		 1232pmu_poll(void)
1233{
1234 if (!via)
1235 return;
1236 if (disable_poll)
1237 return;
1238 via_pmu_interrupt(0, NULL, NULL);
1239}
1240
aacaf9bd 1241void
1da177e4
LT		 1242pmu_poll_adb(void)
1243{
1244 if (!via)
1245 return;
1246 if (disable_poll)
1247 return;
1248 /* Kicks ADB read when PMU is suspended */
1249 adb_int_pending = 1;
1250 do {
1251 via_pmu_interrupt(0, NULL, NULL);
1252 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1253 || req_awaiting_reply));
1254}
1255
aacaf9bd 1256void
1da177e4
LT		 1257pmu_wait_complete(struct adb_request *req)
1258{
1259 if (!via)
1260 return;
1261 while((pmu_state != idle && pmu_state != locked) || !req->complete)
1262 via_pmu_interrupt(0, NULL, NULL);
1263}
1264
1265/* This function loops until the PMU is idle and prevents it from
1266 * anwsering to ADB interrupts. pmu_request can still be called.
1267 * This is done to avoid spurrious shutdowns when we know we'll have
1268 * interrupts switched off for a long time
1269 */
aacaf9bd 1270void
1da177e4
LT		 1271pmu_suspend(void)
1272{
1273 unsigned long flags;
1274#ifdef SUSPEND_USES_PMU
1275 struct adb_request *req;
1276#endif
1277 if (!via)
1278 return;
1279
1280 spin_lock_irqsave(&pmu_lock, flags);
1281 pmu_suspended++;
1282 if (pmu_suspended > 1) {
1283 spin_unlock_irqrestore(&pmu_lock, flags);
1284 return;
1285 }
1286
1287 do {
1288 spin_unlock_irqrestore(&pmu_lock, flags);
1289 if (req_awaiting_reply)
1290 adb_int_pending = 1;
1291 via_pmu_interrupt(0, NULL, NULL);
1292 spin_lock_irqsave(&pmu_lock, flags);
1293 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1294#ifdef SUSPEND_USES_PMU
1295 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1296 spin_unlock_irqrestore(&pmu_lock, flags);
1297 while(!req.complete)
1298 pmu_poll();
1299#else /* SUSPEND_USES_PMU */
1300 if (gpio_irq >= 0)
1301 disable_irq_nosync(gpio_irq);
1302 out_8(&via[IER], CB1_INT | IER_CLR);
1303 spin_unlock_irqrestore(&pmu_lock, flags);
1304#endif /* SUSPEND_USES_PMU */
1305 break;
1306 }
1307 } while (1);
1308}
1309
aacaf9bd 1310void
1da177e4
LT		 1311pmu_resume(void)
1312{
1313 unsigned long flags;
1314
1315 if (!via || (pmu_suspended < 1))
1316 return;
1317
1318 spin_lock_irqsave(&pmu_lock, flags);
1319 pmu_suspended--;
1320 if (pmu_suspended > 0) {
1321 spin_unlock_irqrestore(&pmu_lock, flags);
1322 return;
1323 }
1324 adb_int_pending = 1;
1325#ifdef SUSPEND_USES_PMU
1326 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1327 spin_unlock_irqrestore(&pmu_lock, flags);
1328 while(!req.complete)
1329 pmu_poll();
1330#else /* SUSPEND_USES_PMU */
1331 if (gpio_irq >= 0)
1332 enable_irq(gpio_irq);
1333 out_8(&via[IER], CB1_INT | IER_SET);
1334 spin_unlock_irqrestore(&pmu_lock, flags);
1335 pmu_poll();
1336#endif /* SUSPEND_USES_PMU */
1337}
1338
1339/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1340static void
1da177e4
LT		 1341pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
1342{
1343 unsigned char ints, pirq;
1344 int i = 0;
1345
1346 asleep = 0;
1347 if (drop_interrupts || len < 1) {
1348 adb_int_pending = 0;
1349 pmu_irq_stats[8]++;
1350 return;
1351 }
1352
1353 /* Get PMU interrupt mask */
1354 ints = data[0];
1355
1356 /* Record zero interrupts for stats */
1357 if (ints == 0)
1358 pmu_irq_stats[9]++;
1359
1360 /* Hack to deal with ADB autopoll flag */
1361 if (ints & PMU_INT_ADB)
1362 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1363
1364next:
1365
1366 if (ints == 0) {
1367 if (i > pmu_irq_stats[10])
1368 pmu_irq_stats[10] = i;
1369 return;
1370 }
1371
1372 for (pirq = 0; pirq < 8; pirq++)
1373 if (ints & (1 << pirq))
1374 break;
1375 pmu_irq_stats[pirq]++;
1376 i++;
1377 ints &= ~(1 << pirq);
1378
1379 /* Note: for some reason, we get an interrupt with len=1,
1380 * data[0]==0 after each normal ADB interrupt, at least
1381 * on the Pismo. Still investigating... --BenH
1382 */
1383 if ((1 << pirq) & PMU_INT_ADB) {
1384 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1385 struct adb_request *req = req_awaiting_reply;
1386 if (req == 0) {
1387 printk(KERN_ERR "PMU: extra ADB reply\n");
1388 return;
1389 }
1390 req_awaiting_reply = NULL;
1391 if (len <= 2)
1392 req->reply_len = 0;
1393 else {
1394 memcpy(req->reply, data + 1, len - 1);
1395 req->reply_len = len - 1;
1396 }
1397 pmu_done(req);
1398 } else {
1da177e4
LT		 1399 if (len == 4 && data[1] == 0x2c) {
1400 extern int xmon_wants_key, xmon_adb_keycode;
1401 if (xmon_wants_key) {
1402 xmon_adb_keycode = data[2];
1403 return;
1404 }
1405 }
1da177e4
LT		 1406#ifdef CONFIG_ADB
1407 /*
1408 * XXX On the [23]400 the PMU gives us an up
1409 * event for keycodes 0x74 or 0x75 when the PC
1410 * card eject buttons are released, so we
1411 * ignore those events.
1412 */
1413 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1414 && data[1] == 0x2c && data[3] == 0xff
1415 && (data[2] & ~1) == 0xf4))
1416 adb_input(data+1, len-1, regs, 1);
1417#endif /* CONFIG_ADB */
1418 }
1419 }
1420 /* Sound/brightness button pressed */
1421 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1422#ifdef CONFIG_PMAC_BACKLIGHT
1423 if (len == 3)
1424#ifdef CONFIG_INPUT_ADBHID
1425 if (!disable_kernel_backlight)
1426#endif /* CONFIG_INPUT_ADBHID */
1427 set_backlight_level(data[1] >> 4);
1428#endif /* CONFIG_PMAC_BACKLIGHT */
1429 }
1430 /* Tick interrupt */
1431 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT		 1432 /* Environement or tick interrupt, query batteries */
1433 if (pmu_battery_count) {
1434 if ((--query_batt_timer) == 0) {
1435 query_battery_state();
1436 query_batt_timer = BATTERY_POLLING_COUNT;
1437 }
1438 }
1439 }
1440 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1441 if (pmu_battery_count)
1442 query_battery_state();
1443 pmu_pass_intr(data, len);
1444 } else {
1445 pmu_pass_intr(data, len);
1da177e4
LT		 1446 }
1447 goto next;
1448}
1449
aacaf9bd 1450static struct adb_request*
1da177e4
LT		 1451pmu_sr_intr(struct pt_regs *regs)
1452{
1453 struct adb_request *req;
1454 int bite = 0;
1455
1456 if (via[B] & TREQ) {
1457 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1458 out_8(&via[IFR], SR_INT);
1459 return NULL;
1460 }
1461 /* The ack may not yet be low when we get the interrupt */
1462 while ((in_8(&via[B]) & TACK) != 0)
1463 ;
1464
1465 /* if reading grab the byte, and reset the interrupt */
1466 if (pmu_state == reading || pmu_state == reading_intr)
1467 bite = in_8(&via[SR]);
1468
1469 /* reset TREQ and wait for TACK to go high */
1470 out_8(&via[B], in_8(&via[B]) | TREQ);
1471 wait_for_ack();
1472
1473 switch (pmu_state) {
1474 case sending:
1475 req = current_req;
1476 if (data_len < 0) {
1477 data_len = req->nbytes - 1;
1478 send_byte(data_len);
1479 break;
1480 }
1481 if (data_index <= data_len) {
1482 send_byte(req->data[data_index++]);
1483 break;
1484 }
1485 req->sent = 1;
1486 data_len = pmu_data_len[req->data[0]][1];
1487 if (data_len == 0) {
1488 pmu_state = idle;
1489 current_req = req->next;
1490 if (req->reply_expected)
1491 req_awaiting_reply = req;
1492 else
1493 return req;
1494 } else {
1495 pmu_state = reading;
1496 data_index = 0;
1497 reply_ptr = req->reply + req->reply_len;
1498 recv_byte();
1499 }
1500 break;
1501
1502 case intack:
1503 data_index = 0;
1504 data_len = -1;
1505 pmu_state = reading_intr;
1506 reply_ptr = interrupt_data[int_data_last];
1507 recv_byte();
1508 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1509 enable_irq(gpio_irq);
1510 gpio_irq_enabled = 1;
1511 }
1512 break;
1513
1514 case reading:
1515 case reading_intr:
1516 if (data_len == -1) {
1517 data_len = bite;
1518 if (bite > 32)
1519 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1520 } else if (data_index < 32) {
1521 reply_ptr[data_index++] = bite;
1522 }
1523 if (data_index < data_len) {
1524 recv_byte();
1525 break;
1526 }
1527
1528 if (pmu_state == reading_intr) {
1529 pmu_state = idle;
1530 int_data_state[int_data_last] = int_data_ready;
1531 interrupt_data_len[int_data_last] = data_len;
1532 } else {
1533 req = current_req;
1534 /*
1535 * For PMU sleep and freq change requests, we lock the
1536 * PMU until it's explicitely unlocked. This avoids any
1537 * spurrious event polling getting in
1538 */
1539 current_req = req->next;
1540 req->reply_len += data_index;
1541 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1542 pmu_state = locked;
1543 else
1544 pmu_state = idle;
1545 return req;
1546 }
1547 break;
1548
1549 default:
1550 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1551 pmu_state);
1552 }
1553 return NULL;
1554}
1555
aacaf9bd 1556static irqreturn_t
1da177e4
LT		 1557via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
1558{
1559 unsigned long flags;
1560 int intr;
1561 int nloop = 0;
1562 int int_data = -1;
1563 struct adb_request *req = NULL;
1564 int handled = 0;
1565
1566 /* This is a bit brutal, we can probably do better */
1567 spin_lock_irqsave(&pmu_lock, flags);
1568 ++disable_poll;
1569
1570 for (;;) {
1571 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1572 if (intr == 0)
1573 break;
1574 handled = 1;
1575 if (++nloop > 1000) {
1576 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1577 "intr=%x, ier=%x pmu_state=%d\n",
1578 intr, in_8(&via[IER]), pmu_state);
1579 break;
1580 }
1581 out_8(&via[IFR], intr);
1582 if (intr & CB1_INT) {
1583 adb_int_pending = 1;
1584 pmu_irq_stats[0]++;
1585 }
1586 if (intr & SR_INT) {
1587 req = pmu_sr_intr(regs);
1588 if (req)
1589 break;
1590 }
1591 }
1592
1593recheck:
1594 if (pmu_state == idle) {
1595 if (adb_int_pending) {
1596 if (int_data_state[0] == int_data_empty)
1597 int_data_last = 0;
1598 else if (int_data_state[1] == int_data_empty)
1599 int_data_last = 1;
1600 else
1601 goto no_free_slot;
1602 pmu_state = intack;
1603 int_data_state[int_data_last] = int_data_fill;
1604 /* Sounds safer to make sure ACK is high before writing.
1605 * This helped kill a problem with ADB and some iBooks
1606 */
1607 wait_for_ack();
1608 send_byte(PMU_INT_ACK);
1609 adb_int_pending = 0;
1610 } else if (current_req)
1611 pmu_start();
1612 }
1613no_free_slot:
1614 /* Mark the oldest buffer for flushing */
1615 if (int_data_state[!int_data_last] == int_data_ready) {
1616 int_data_state[!int_data_last] = int_data_flush;
1617 int_data = !int_data_last;
1618 } else if (int_data_state[int_data_last] == int_data_ready) {
1619 int_data_state[int_data_last] = int_data_flush;
1620 int_data = int_data_last;
1621 }
1622 --disable_poll;
1623 spin_unlock_irqrestore(&pmu_lock, flags);
1624
1625 /* Deal with completed PMU requests outside of the lock */
1626 if (req) {
1627 pmu_done(req);
1628 req = NULL;
1629 }
1630
1631 /* Deal with interrupt datas outside of the lock */
1632 if (int_data >= 0) {
1633 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data], regs);
1634 spin_lock_irqsave(&pmu_lock, flags);
1635 ++disable_poll;
1636 int_data_state[int_data] = int_data_empty;
1637 int_data = -1;
1638 goto recheck;
1639 }
1640
1641 return IRQ_RETVAL(handled);
1642}
1643
aacaf9bd 1644void
1da177e4
LT		 1645pmu_unlock(void)
1646{
1647 unsigned long flags;
1648
1649 spin_lock_irqsave(&pmu_lock, flags);
1650 if (pmu_state == locked)
1651 pmu_state = idle;
1652 adb_int_pending = 1;
1653 spin_unlock_irqrestore(&pmu_lock, flags);
1654}
1655
1656
aacaf9bd 1657static irqreturn_t
1da177e4
LT		 1658gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
1659{
1660 unsigned long flags;
1661
1662 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1663 spin_lock_irqsave(&pmu_lock, flags);
1664 if (gpio_irq_enabled > 0) {
1665 disable_irq_nosync(gpio_irq);
1666 gpio_irq_enabled = 0;
1667 }
1668 pmu_irq_stats[1]++;
1669 adb_int_pending = 1;
1670 spin_unlock_irqrestore(&pmu_lock, flags);
1671 via_pmu_interrupt(0, NULL, NULL);
1672 return IRQ_HANDLED;
1673 }
1674 return IRQ_NONE;
1675}
1676
1677#ifdef CONFIG_PMAC_BACKLIGHT
aacaf9bd 1678static int backlight_to_bright[] = {
1da177e4
LT		 1679 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e,
1680 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e
1681};
1682
aacaf9bd 1683static int
1da177e4
LT		 1684pmu_set_backlight_enable(int on, int level, void* data)
1685{
1686 struct adb_request req;
1687
1688 if (vias == NULL)
1689 return -ENODEV;
1690
1691 if (on) {
1692 pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
1693 backlight_to_bright[level]);
1694 pmu_wait_complete(&req);
1695 }
1696 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1697 PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF));
1698 pmu_wait_complete(&req);
1699
1700 return 0;
1701}
1702
aacaf9bd 1703static void
1da177e4
LT		 1704pmu_bright_complete(struct adb_request *req)
1705{
1706 if (req == &bright_req_1)
1707 clear_bit(1, &async_req_locks);
1708 if (req == &bright_req_2)
1709 clear_bit(2, &async_req_locks);
1710}
1711
aacaf9bd 1712static int
1da177e4
LT		 1713pmu_set_backlight_level(int level, void* data)
1714{
1715 if (vias == NULL)
1716 return -ENODEV;
1717
1718 if (test_and_set_bit(1, &async_req_locks))
1719 return -EAGAIN;
1720 pmu_request(&bright_req_1, pmu_bright_complete, 2, PMU_BACKLIGHT_BRIGHT,
1721 backlight_to_bright[level]);
1722 if (test_and_set_bit(2, &async_req_locks))
1723 return -EAGAIN;
1724 pmu_request(&bright_req_2, pmu_bright_complete, 2, PMU_POWER_CTRL,
1725 PMU_POW_BACKLIGHT | (level > BACKLIGHT_OFF ?
1726 PMU_POW_ON : PMU_POW_OFF));
1727
1728 return 0;
1729}
1730#endif /* CONFIG_PMAC_BACKLIGHT */
1731
aacaf9bd 1732void
1da177e4
LT		 1733pmu_enable_irled(int on)
1734{
1735 struct adb_request req;
1736
1737 if (vias == NULL)
1738 return ;
1739 if (pmu_kind == PMU_KEYLARGO_BASED)
1740 return ;
1741
1742 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1743 (on ? PMU_POW_ON : PMU_POW_OFF));
1744 pmu_wait_complete(&req);
1745}
1746
aacaf9bd 1747void
1da177e4
LT		 1748pmu_restart(void)
1749{
1750 struct adb_request req;
1751
1752 if (via == NULL)
1753 return;
1754
1755 local_irq_disable();
1756
1757 drop_interrupts = 1;
1758
1759 if (pmu_kind != PMU_KEYLARGO_BASED) {
1760 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1761 PMU_INT_TICK );
1762 while(!req.complete)
1763 pmu_poll();
1764 }
1765
1766 pmu_request(&req, NULL, 1, PMU_RESET);
1767 pmu_wait_complete(&req);
1768 for (;;)
1769 ;
1770}
1771
aacaf9bd 1772void
1da177e4
LT		 1773pmu_shutdown(void)
1774{
1775 struct adb_request req;
1776
1777 if (via == NULL)
1778 return;
1779
1780 local_irq_disable();
1781
1782 drop_interrupts = 1;
1783
1784 if (pmu_kind != PMU_KEYLARGO_BASED) {
1785 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1786 PMU_INT_TICK );
1787 pmu_wait_complete(&req);
1788 } else {
1789 /* Disable server mode on shutdown or we'll just
1790 * wake up again
1791 */
1792 pmu_set_server_mode(0);
1793 }
1794
1795 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1796 'M', 'A', 'T', 'T');
1797 pmu_wait_complete(&req);
1798 for (;;)
1799 ;
1800}
1801
1802int
1803pmu_present(void)
1804{
1805 return via != 0;
1806}
1807
1808struct pmu_i2c_hdr {
1809 u8 bus;
1810 u8 mode;
1811 u8 bus2;
1812 u8 address;
1813 u8 sub_addr;
1814 u8 comb_addr;
1815 u8 count;
1816};
1817
1818int
1819pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len)
1820{
1821 struct adb_request req;
1822 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1823 int retry;
1824 int rc;
1825
1826 for (retry=0; retry<16; retry++) {
1827 memset(&req, 0, sizeof(req));
1828
1829 hdr->bus = bus;
1830 hdr->address = addr & 0xfe;
1831 hdr->mode = PMU_I2C_MODE_COMBINED;
1832 hdr->bus2 = 0;
1833 hdr->sub_addr = subaddr;
1834 hdr->comb_addr = addr | 1;
1835 hdr->count = len;
1836
1837 req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
1838 req.reply_expected = 0;
1839 req.reply_len = 0;
1840 req.data[0] = PMU_I2C_CMD;
1841 req.reply[0] = 0xff;
1842 rc = pmu_queue_request(&req);
1843 if (rc)
1844 return rc;
1845 while(!req.complete)
1846 pmu_poll();
1847 if (req.reply[0] == PMU_I2C_STATUS_OK)
1848 break;
1849 mdelay(15);
1850 }
1851 if (req.reply[0] != PMU_I2C_STATUS_OK)
1852 return -1;
1853
1854 for (retry=0; retry<16; retry++) {
1855 memset(&req, 0, sizeof(req));
1856
1857 mdelay(15);
1858
1859 hdr->bus = PMU_I2C_BUS_STATUS;
1860 req.reply[0] = 0xff;
1861
1862 req.nbytes = 2;
1863 req.reply_expected = 0;
1864 req.reply_len = 0;
1865 req.data[0] = PMU_I2C_CMD;
1866 rc = pmu_queue_request(&req);
1867 if (rc)
1868 return rc;
1869 while(!req.complete)
1870 pmu_poll();
1871 if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
1872 memcpy(data, &req.reply[1], req.reply_len - 1);
1873 return req.reply_len - 1;
1874 }
1875 }
1876 return -1;
1877}
1878
1879int
1880pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len)
1881{
1882 struct adb_request req;
1883 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1884 int retry;
1885 int rc;
1886
1887 for (retry=0; retry<16; retry++) {
1888 memset(&req, 0, sizeof(req));
1889
1890 hdr->bus = bus;
1891 hdr->address = addr & 0xfe;
1892 hdr->mode = PMU_I2C_MODE_STDSUB;
1893 hdr->bus2 = 0;
1894 hdr->sub_addr = subaddr;
1895 hdr->comb_addr = addr & 0xfe;
1896 hdr->count = len;
1897
1898 req.data[0] = PMU_I2C_CMD;
1899 memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
1900 req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
1901 req.reply_expected = 0;
1902 req.reply_len = 0;
1903 req.reply[0] = 0xff;
1904 rc = pmu_queue_request(&req);
1905 if (rc)
1906 return rc;
1907 while(!req.complete)
1908 pmu_poll();
1909 if (req.reply[0] == PMU_I2C_STATUS_OK)
1910 break;
1911 mdelay(15);
1912 }
1913 if (req.reply[0] != PMU_I2C_STATUS_OK)
1914 return -1;
1915
1916 for (retry=0; retry<16; retry++) {
1917 memset(&req, 0, sizeof(req));
1918
1919 mdelay(15);
1920
1921 hdr->bus = PMU_I2C_BUS_STATUS;
1922 req.reply[0] = 0xff;
1923
1924 req.nbytes = 2;
1925 req.reply_expected = 0;
1926 req.reply_len = 0;
1927 req.data[0] = PMU_I2C_CMD;
1928 rc = pmu_queue_request(&req);
1929 if (rc)
1930 return rc;
1931 while(!req.complete)
1932 pmu_poll();
1933 if (req.reply[0] == PMU_I2C_STATUS_OK)
1934 return len;
1935 }
1936 return -1;
1937}
1938
1939int
1940pmu_i2c_simple_read(int bus, int addr, u8* data, int len)
1941{
1942 struct adb_request req;
1943 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
1944 int retry;
1945 int rc;
1946
1947 for (retry=0; retry<16; retry++) {
1948 memset(&req, 0, sizeof(req));
1949
1950 hdr->bus = bus;
1951 hdr->address = addr | 1;
1952 hdr->mode = PMU_I2C_MODE_SIMPLE;
1953 hdr->bus2 = 0;
1954 hdr->sub_addr = 0;
1955 hdr->comb_addr = 0;
1956 hdr->count = len;
1957
1958 req.data[0] = PMU_I2C_CMD;
1959 req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
1960 req.reply_expected = 0;
1961 req.reply_len = 0;
1962 req.reply[0] = 0xff;
1963 rc = pmu_queue_request(&req);
1964 if (rc)
1965 return rc;
1966 while(!req.complete)
1967 pmu_poll();
1968 if (req.reply[0] == PMU_I2C_STATUS_OK)
1969 break;
1970 mdelay(15);
1971 }
1972 if (req.reply[0] != PMU_I2C_STATUS_OK)
1973 return -1;
1974
1975 for (retry=0; retry<16; retry++) {
1976 memset(&req, 0, sizeof(req));
1977
1978 mdelay(15);
1979
1980 hdr->bus = PMU_I2C_BUS_STATUS;
1981 req.reply[0] = 0xff;
1982
1983 req.nbytes = 2;
1984 req.reply_expected = 0;
1985 req.reply_len = 0;
1986 req.data[0] = PMU_I2C_CMD;
1987 rc = pmu_queue_request(&req);
1988 if (rc)
1989 return rc;
1990 while(!req.complete)
1991 pmu_poll();
1992 if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
1993 memcpy(data, &req.reply[1], req.reply_len - 1);
1994 return req.reply_len - 1;
1995 }
1996 }
1997 return -1;
1998}
1999
2000int
2001pmu_i2c_simple_write(int bus, int addr, u8* data, int len)
2002{
2003 struct adb_request req;
2004 struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
2005 int retry;
2006 int rc;
2007
2008 for (retry=0; retry<16; retry++) {
2009 memset(&req, 0, sizeof(req));
2010
2011 hdr->bus = bus;
2012 hdr->address = addr & 0xfe;
2013 hdr->mode = PMU_I2C_MODE_SIMPLE;
2014 hdr->bus2 = 0;
2015 hdr->sub_addr = 0;
2016 hdr->comb_addr = 0;
2017 hdr->count = len;
2018
2019 req.data[0] = PMU_I2C_CMD;
2020 memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
2021 req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
2022 req.reply_expected = 0;
2023 req.reply_len = 0;
2024 req.reply[0] = 0xff;
2025 rc = pmu_queue_request(&req);
2026 if (rc)
2027 return rc;
2028 while(!req.complete)
2029 pmu_poll();
2030 if (req.reply[0] == PMU_I2C_STATUS_OK)
2031 break;
2032 mdelay(15);
2033 }
2034 if (req.reply[0] != PMU_I2C_STATUS_OK)
2035 return -1;
2036
2037 for (retry=0; retry<16; retry++) {
2038 memset(&req, 0, sizeof(req));
2039
2040 mdelay(15);
2041
2042 hdr->bus = PMU_I2C_BUS_STATUS;
2043 req.reply[0] = 0xff;
2044
2045 req.nbytes = 2;
2046 req.reply_expected = 0;
2047 req.reply_len = 0;
2048 req.data[0] = PMU_I2C_CMD;
2049 rc = pmu_queue_request(&req);
2050 if (rc)
2051 return rc;
2052 while(!req.complete)
2053 pmu_poll();
2054 if (req.reply[0] == PMU_I2C_STATUS_OK)
2055 return len;
2056 }
2057 return -1;
2058}
2059
8c870933 2060#ifdef CONFIG_PM
1da177e4
LT		 2061
2062static LIST_HEAD(sleep_notifiers);
2063
2064int
2065pmu_register_sleep_notifier(struct pmu_sleep_notifier *n)
2066{
2067 struct list_head *list;
2068 struct pmu_sleep_notifier *notifier;
2069
2070 for (list = sleep_notifiers.next; list != &sleep_notifiers;
2071 list = list->next) {
2072 notifier = list_entry(list, struct pmu_sleep_notifier, list);
2073 if (n->priority > notifier->priority)
2074 break;
2075 }
2076 __list_add(&n->list, list->prev, list);
2077 return 0;
2078}
3fb62b51 2079EXPORT_SYMBOL(pmu_register_sleep_notifier);
1da177e4
LT		 2080
2081int
2082pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n)
2083{
2084 if (n->list.next == 0)
2085 return -ENOENT;
2086 list_del(&n->list);
2087 n->list.next = NULL;
2088 return 0;
2089}
3fb62b51 2090EXPORT_SYMBOL(pmu_unregister_sleep_notifier);
a0005034
PM		 2091#endif /* CONFIG_PM */
2092
2093#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 2094
2095/* Sleep is broadcast last-to-first */
aacaf9bd 2096static int
1da177e4
LT		 2097broadcast_sleep(int when, int fallback)
2098{
2099 int ret = PBOOK_SLEEP_OK;
2100 struct list_head *list;
2101 struct pmu_sleep_notifier *notifier;
2102
2103 for (list = sleep_notifiers.prev; list != &sleep_notifiers;
2104 list = list->prev) {
2105 notifier = list_entry(list, struct pmu_sleep_notifier, list);
2106 ret = notifier->notifier_call(notifier, when);
2107 if (ret != PBOOK_SLEEP_OK) {
2108 printk(KERN_DEBUG "sleep %d rejected by %p (%p)\n",
2109 when, notifier, notifier->notifier_call);
2110 for (; list != &sleep_notifiers; list = list->next) {
2111 notifier = list_entry(list, struct pmu_sleep_notifier, list);
2112 notifier->notifier_call(notifier, fallback);
2113 }
2114 return ret;
2115 }
2116 }
2117 return ret;
2118}
2119
2120/* Wake is broadcast first-to-last */
aacaf9bd 2121static int
1da177e4
LT		 2122broadcast_wake(void)
2123{
2124 int ret = PBOOK_SLEEP_OK;
2125 struct list_head *list;
2126 struct pmu_sleep_notifier *notifier;
2127
2128 for (list = sleep_notifiers.next; list != &sleep_notifiers;
2129 list = list->next) {
2130 notifier = list_entry(list, struct pmu_sleep_notifier, list);
2131 notifier->notifier_call(notifier, PBOOK_WAKE);
2132 }
2133 return ret;
2134}
2135
2136/*
2137 * This struct is used to store config register values for
2138 * PCI devices which may get powered off when we sleep.
2139 */
2140static struct pci_save {
2141#ifndef HACKED_PCI_SAVE
2142 u16 command;
2143 u16 cache_lat;
2144 u16 intr;
2145 u32 rom_address;
2146#else
2147 u32 config[16];
2148#endif
2149} *pbook_pci_saves;
2150static int pbook_npci_saves;
2151
aacaf9bd 2152static void
1da177e4
LT		 2153pbook_alloc_pci_save(void)
2154{
2155 int npci;
2156 struct pci_dev *pd = NULL;
2157
2158 npci = 0;
2159 while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
2160 ++npci;
2161 }
2162 if (npci == 0)
2163 return;
2164 pbook_pci_saves = (struct pci_save *)
2165 kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL);
2166 pbook_npci_saves = npci;
2167}
2168
aacaf9bd 2169static void
1da177e4
LT		 2170pbook_free_pci_save(void)
2171{
2172 if (pbook_pci_saves == NULL)
2173 return;
2174 kfree(pbook_pci_saves);
2175 pbook_pci_saves = NULL;
2176 pbook_npci_saves = 0;
2177}
2178
aacaf9bd 2179static void
1da177e4
LT		 2180pbook_pci_save(void)
2181{
2182 struct pci_save *ps = pbook_pci_saves;
2183 struct pci_dev *pd = NULL;
2184 int npci = pbook_npci_saves;
2185
2186 if (ps == NULL)
2187 return;
2188
2189 while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
2190 if (npci-- == 0)
2191 return;
2192#ifndef HACKED_PCI_SAVE
2193 pci_read_config_word(pd, PCI_COMMAND, &ps->command);
2194 pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
2195 pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
2196 pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address);
2197#else
2198 int i;
2199 for (i=1;i<16;i++)
2200 pci_read_config_dword(pd, i<<4, &ps->config[i]);
2201#endif
2202 ++ps;
2203 }
2204}
2205
2206/* For this to work, we must take care of a few things: If gmac was enabled
2207 * during boot, it will be in the pci dev list. If it's disabled at this point
2208 * (and it will probably be), then you can't access it's config space.
2209 */
aacaf9bd 2210static void
1da177e4
LT		 2211pbook_pci_restore(void)
2212{
2213 u16 cmd;
2214 struct pci_save *ps = pbook_pci_saves - 1;
2215 struct pci_dev *pd = NULL;
2216 int npci = pbook_npci_saves;
2217 int j;
2218
2219 while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
2220#ifdef HACKED_PCI_SAVE
2221 int i;
2222 if (npci-- == 0)
2223 return;
2224 ps++;
2225 for (i=2;i<16;i++)
2226 pci_write_config_dword(pd, i<<4, ps->config[i]);
2227 pci_write_config_dword(pd, 4, ps->config[1]);
2228#else
2229 if (npci-- == 0)
2230 return;
2231 ps++;
2232 if (ps->command == 0)
2233 continue;
2234 pci_read_config_word(pd, PCI_COMMAND, &cmd);
2235 if ((ps->command & ~cmd) == 0)
2236 continue;
2237 switch (pd->hdr_type) {
2238 case PCI_HEADER_TYPE_NORMAL:
2239 for (j = 0; j < 6; ++j)
2240 pci_write_config_dword(pd,
2241 PCI_BASE_ADDRESS_0 + j*4,
2242 pd->resource[j].start);
2243 pci_write_config_dword(pd, PCI_ROM_ADDRESS,
2244 ps->rom_address);
2245 pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
2246 ps->cache_lat);
2247 pci_write_config_word(pd, PCI_INTERRUPT_LINE,
2248 ps->intr);
2249 pci_write_config_word(pd, PCI_COMMAND, ps->command);
2250 break;
2251 }
2252#endif
2253 }
2254}
2255
2256#ifdef DEBUG_SLEEP
2257/* N.B. This doesn't work on the 3400 */
aacaf9bd 2258void
1da177e4
LT		 2259pmu_blink(int n)
2260{
2261 struct adb_request req;
2262
2263 memset(&req, 0, sizeof(req));
2264
2265 for (; n > 0; --n) {
2266 req.nbytes = 4;
2267 req.done = NULL;
2268 req.data[0] = 0xee;
2269 req.data[1] = 4;
2270 req.data[2] = 0;
2271 req.data[3] = 1;
2272 req.reply[0] = ADB_RET_OK;
2273 req.reply_len = 1;
2274 req.reply_expected = 0;
2275 pmu_polled_request(&req);
2276 mdelay(50);
2277 req.nbytes = 4;
2278 req.done = NULL;
2279 req.data[0] = 0xee;
2280 req.data[1] = 4;
2281 req.data[2] = 0;
2282 req.data[3] = 0;
2283 req.reply[0] = ADB_RET_OK;
2284 req.reply_len = 1;
2285 req.reply_expected = 0;
2286 pmu_polled_request(&req);
2287 mdelay(50);
2288 }
2289 mdelay(50);
2290}
2291#endif
2292
2293/*
2294 * Put the powerbook to sleep.
2295 */
2296
aacaf9bd 2297static u32 save_via[8];
1da177e4 2298
aacaf9bd 2299static void
1da177e4
LT		 2300save_via_state(void)
2301{
2302 save_via[0] = in_8(&via[ANH]);
2303 save_via[1] = in_8(&via[DIRA]);
2304 save_via[2] = in_8(&via[B]);
2305 save_via[3] = in_8(&via[DIRB]);
2306 save_via[4] = in_8(&via[PCR]);
2307 save_via[5] = in_8(&via[ACR]);
2308 save_via[6] = in_8(&via[T1CL]);
2309 save_via[7] = in_8(&via[T1CH]);
2310}
aacaf9bd 2311static void
1da177e4
LT		 2312restore_via_state(void)
2313{
2314 out_8(&via[ANH], save_via[0]);
2315 out_8(&via[DIRA], save_via[1]);
2316 out_8(&via[B], save_via[2]);
2317 out_8(&via[DIRB], save_via[3]);
2318 out_8(&via[PCR], save_via[4]);
2319 out_8(&via[ACR], save_via[5]);
2320 out_8(&via[T1CL], save_via[6]);
2321 out_8(&via[T1CH], save_via[7]);
2322 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
2323 out_8(&via[IFR], 0x7f); /* clear IFR */
2324 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
2325}
2326
aacaf9bd 2327static int
1da177e4
LT		 2328pmac_suspend_devices(void)
2329{
2330 int ret;
2331
2332 pm_prepare_console();
2333
2334 /* Notify old-style device drivers & userland */
2335 ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT);
2336 if (ret != PBOOK_SLEEP_OK) {
2337 printk(KERN_ERR "Sleep rejected by drivers\n");
2338 return -EBUSY;
2339 }
2340
2341 /* Sync the disks. */
2342 /* XXX It would be nice to have some way to ensure that
2343 * nobody is dirtying any new buffers while we wait. That
2344 * could be achieved using the refrigerator for processes
2345 * that swsusp uses
2346 */
2347 sys_sync();
2348
2349 /* Sleep can fail now. May not be very robust but useful for debugging */
2350 ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE);
2351 if (ret != PBOOK_SLEEP_OK) {
2352 printk(KERN_ERR "Driver sleep failed\n");
2353 return -EBUSY;
2354 }
2355
2356 /* Send suspend call to devices, hold the device core's dpm_sem */
2357 ret = device_suspend(PMSG_SUSPEND);
2358 if (ret) {
2359 broadcast_wake();
2360 printk(KERN_ERR "Driver sleep failed\n");
2361 return -EBUSY;
2362 }
2363
e521dca6
BH		 2364 /* Disable clock spreading on some machines */
2365 pmac_tweak_clock_spreading(0);
2366
2367 /* Stop preemption */
1da177e4
LT		 2368 preempt_disable();
2369
2370 /* Make sure the decrementer won't interrupt us */
2371 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2372 /* Make sure any pending DEC interrupt occurring while we did
2373 * the above didn't re-enable the DEC */
2374 mb();
2375 asm volatile("mtdec %0" : : "r" (0x7fffffff));
2376
2377 /* We can now disable MSR_EE. This code of course works properly only
2378 * on UP machines... For SMP, if we ever implement sleep, we'll have to
2379 * stop the "other" CPUs way before we do all that stuff.
2380 */
2381 local_irq_disable();
2382
2383 /* Broadcast power down irq
2384 * This isn't that useful in most cases (only directly wired devices can
2385 * use this but still... This will take care of sysdev's as well, so
2386 * we exit from here with local irqs disabled and PIC off.
2387 */
bf2049f9 2388 ret = device_power_down(PMSG_SUSPEND);
1da177e4
LT		 2389 if (ret) {
2390 wakeup_decrementer();
2391 local_irq_enable();
2392 preempt_enable();
2393 device_resume();
2394 broadcast_wake();
2395 printk(KERN_ERR "Driver powerdown failed\n");
2396 return -EBUSY;
2397 }
2398
2399 /* Wait for completion of async backlight requests */
2400 while (!bright_req_1.complete || !bright_req_2.complete ||
2401 !batt_req.complete)
2402 pmu_poll();
2403
2404 /* Giveup the lazy FPU & vec so we don't have to back them
2405 * up from the low level code
2406 */
2407 enable_kernel_fp();
2408
2409#ifdef CONFIG_ALTIVEC
2410 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2411 enable_kernel_altivec();
2412#endif /* CONFIG_ALTIVEC */
2413
2414 return 0;
2415}
2416
aacaf9bd 2417static int
1da177e4
LT		 2418pmac_wakeup_devices(void)
2419{
2420 mdelay(100);
2421
2422 /* Power back up system devices (including the PIC) */
2423 device_power_up();
2424
2425 /* Force a poll of ADB interrupts */
2426 adb_int_pending = 1;
2427 via_pmu_interrupt(0, NULL, NULL);
2428
2429 /* Restart jiffies & scheduling */
2430 wakeup_decrementer();
2431
2432 /* Re-enable local CPU interrupts */
2433 local_irq_enable();
b16eeb47 2434 mdelay(10);
1da177e4
LT		 2435 preempt_enable();
2436
e521dca6
BH		 2437 /* Re-enable clock spreading on some machines */
2438 pmac_tweak_clock_spreading(1);
2439
1da177e4
LT		 2440 /* Resume devices */
2441 device_resume();
2442
2443 /* Notify old style drivers */
2444 broadcast_wake();
2445
2446 pm_restore_console();
2447
2448 return 0;
2449}
2450
2451#define GRACKLE_PM (1<<7)
2452#define GRACKLE_DOZE (1<<5)
2453#define GRACKLE_NAP (1<<4)
2454#define GRACKLE_SLEEP (1<<3)
2455
aacaf9bd 2456int
1da177e4
LT		 2457powerbook_sleep_grackle(void)
2458{
2459 unsigned long save_l2cr;
2460 unsigned short pmcr1;
2461 struct adb_request req;
2462 int ret;
2463 struct pci_dev *grackle;
2464
2465 grackle = pci_find_slot(0, 0);
2466 if (!grackle)
2467 return -ENODEV;
2468
2469 ret = pmac_suspend_devices();
2470 if (ret) {
2471 printk(KERN_ERR "Sleep rejected by devices\n");
2472 return ret;
2473 }
2474
2475 /* Turn off various things. Darwin does some retry tests here... */
2476 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
2477 pmu_wait_complete(&req);
2478 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
2479 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
2480 pmu_wait_complete(&req);
2481
2482 /* For 750, save backside cache setting and disable it */
2483 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
2484
2485 if (!__fake_sleep) {
2486 /* Ask the PMU to put us to sleep */
2487 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2488 pmu_wait_complete(&req);
2489 }
2490
2491 /* The VIA is supposed not to be restored correctly*/
2492 save_via_state();
2493 /* We shut down some HW */
2494 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
2495
2496 pci_read_config_word(grackle, 0x70, &pmcr1);
2497 /* Apparently, MacOS uses NAP mode for Grackle ??? */
2498 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
2499 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
2500 pci_write_config_word(grackle, 0x70, pmcr1);
2501
2502 /* Call low-level ASM sleep handler */
2503 if (__fake_sleep)
2504 mdelay(5000);
2505 else
2506 low_sleep_handler();
2507
2508 /* We're awake again, stop grackle PM */
2509 pci_read_config_word(grackle, 0x70, &pmcr1);
2510 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
2511 pci_write_config_word(grackle, 0x70, pmcr1);
2512
2513 /* Make sure the PMU is idle */
2514 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
2515 restore_via_state();
2516
2517 /* Restore L2 cache */
2518 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2519 _set_L2CR(save_l2cr);
2520
2521 /* Restore userland MMU context */
2522 set_context(current->active_mm->context, current->active_mm->pgd);
2523
2524 /* Power things up */
2525 pmu_unlock();
2526 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
2527 pmu_wait_complete(&req);
2528 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
2529 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
2530 pmu_wait_complete(&req);
2531 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
2532 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
2533 pmu_wait_complete(&req);
2534
2535 pmac_wakeup_devices();
2536
2537 return 0;
2538}
2539
aacaf9bd 2540static int
1da177e4
LT		 2541powerbook_sleep_Core99(void)
2542{
2543 unsigned long save_l2cr;
2544 unsigned long save_l3cr;
2545 struct adb_request req;
2546 int ret;
2547
2548 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
2549 printk(KERN_ERR "Sleep mode not supported on this machine\n");
2550 return -ENOSYS;
2551 }
2552
2553 if (num_online_cpus() > 1 || cpu_is_offline(0))
2554 return -EAGAIN;
2555
2556 ret = pmac_suspend_devices();
2557 if (ret) {
2558 printk(KERN_ERR "Sleep rejected by devices\n");
2559 return ret;
2560 }
2561
b16eeb47
BH		 2562 /* Stop environment and ADB interrupts */
2563 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
2564 pmu_wait_complete(&req);
1da177e4
LT		 2565
2566 /* Tell PMU what events will wake us up */
2567 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
2568 0xff, 0xff);
2569 pmu_wait_complete(&req);
2570 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
2571 0, PMU_PWR_WAKEUP_KEY |
2572 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
2573 pmu_wait_complete(&req);
2574
2575 /* Save the state of the L2 and L3 caches */
2576 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
2577 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
2578
2579 if (!__fake_sleep) {
2580 /* Ask the PMU to put us to sleep */
2581 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2582 pmu_wait_complete(&req);
2583 }
2584
2585 /* The VIA is supposed not to be restored correctly*/
2586 save_via_state();
2587
2588 /* Shut down various ASICs. There's a chance that we can no longer
2589 * talk to the PMU after this, so I moved it to _after_ sending the
2590 * sleep command to it. Still need to be checked.
2591 */
2592 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
2593
2594 /* Call low-level ASM sleep handler */
2595 if (__fake_sleep)
2596 mdelay(5000);
2597 else
2598 low_sleep_handler();
2599
2600 /* Restore Apple core ASICs state */
2601 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
2602
2603 /* Restore VIA */
2604 restore_via_state();
2605
0086b5ec
BH		 2606 /* tweak LPJ before cpufreq is there */
2607 loops_per_jiffy *= 2;
2608
1da177e4
LT		 2609 /* Restore video */
2610 pmac_call_early_video_resume();
2611
2612 /* Restore L2 cache */
2613 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
2614 _set_L2CR(save_l2cr);
2615 /* Restore L3 cache */
2616 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
2617 _set_L3CR(save_l3cr);
2618
2619 /* Restore userland MMU context */
2620 set_context(current->active_mm->context, current->active_mm->pgd);
2621
2622 /* Tell PMU we are ready */
2623 pmu_unlock();
2624 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2625 pmu_wait_complete(&req);
2626 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
2627 pmu_wait_complete(&req);
2628
0086b5ec
BH		 2629 /* Restore LPJ, cpufreq will adjust the cpu frequency */
2630 loops_per_jiffy /= 2;
2631
1da177e4
LT		 2632 pmac_wakeup_devices();
2633
2634 return 0;
2635}
2636
2637#define PB3400_MEM_CTRL 0xf8000000
2638#define PB3400_MEM_CTRL_SLEEP 0x70
2639
aacaf9bd 2640static int
1da177e4
LT		 2641powerbook_sleep_3400(void)
2642{
2643 int ret, i, x;
2644 unsigned int hid0;
2645 unsigned long p;
2646 struct adb_request sleep_req;
2647 void __iomem *mem_ctrl;
2648 unsigned int __iomem *mem_ctrl_sleep;
2649
2650 /* first map in the memory controller registers */
2651 mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
2652 if (mem_ctrl == NULL) {
2653 printk("powerbook_sleep_3400: ioremap failed\n");
2654 return -ENOMEM;
2655 }
2656 mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP;
2657
2658 /* Allocate room for PCI save */
2659 pbook_alloc_pci_save();
2660
2661 ret = pmac_suspend_devices();
2662 if (ret) {
2663 pbook_free_pci_save();
2664 printk(KERN_ERR "Sleep rejected by devices\n");
2665 return ret;
2666 }
2667
2668 /* Save the state of PCI config space for some slots */
2669 pbook_pci_save();
2670
2671 /* Set the memory controller to keep the memory refreshed
2672 while we're asleep */
2673 for (i = 0x403f; i >= 0x4000; --i) {
2674 out_be32(mem_ctrl_sleep, i);
2675 do {
2676 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
2677 } while (x == 0);
2678 if (x >= 0x100)
2679 break;
2680 }
2681
2682 /* Ask the PMU to put us to sleep */
2683 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
2684 while (!sleep_req.complete)
2685 mb();
2686
2687 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
2688
2689 /* displacement-flush the L2 cache - necessary? */
2690 for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
2691 i = *(volatile int *)p;
2692 asleep = 1;
2693
2694 /* Put the CPU into sleep mode */
21fe3301 2695 hid0 = mfspr(SPRN_HID0);
1da177e4 2696 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301
BH		 2697 mtspr(SPRN_HID0, hid0);
2698 mtmsr(mfmsr() | MSR_POW | MSR_EE);
1da177e4
LT		 2699 udelay(10);
2700
2701 /* OK, we're awake again, start restoring things */
2702 out_be32(mem_ctrl_sleep, 0x3f);
2703 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
2704 pbook_pci_restore();
2705 pmu_unlock();
2706
2707 /* wait for the PMU interrupt sequence to complete */
2708 while (asleep)
2709 mb();
2710
2711 pmac_wakeup_devices();
2712 pbook_free_pci_save();
2713 iounmap(mem_ctrl);
2714
2715 return 0;
2716}
2717
a0005034 2718#endif /* CONFIG_PM && CONFIG_PPC32 */
8c870933 2719
1da177e4
LT		 2720/*
2721 * Support for /dev/pmu device
2722 */
2723#define RB_SIZE 0x10
2724struct pmu_private {
2725 struct list_head list;
2726 int rb_get;
2727 int rb_put;
2728 struct rb_entry {
2729 unsigned short len;
2730 unsigned char data[16];
2731 } rb_buf[RB_SIZE];
2732 wait_queue_head_t wait;
2733 spinlock_t lock;
2734#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2735 int backlight_locker;
2736#endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
2737};
2738
2739static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2740static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2741
aacaf9bd 2742static void
1da177e4
LT		 2743pmu_pass_intr(unsigned char *data, int len)
2744{
2745 struct pmu_private *pp;
2746 struct list_head *list;
2747 int i;
2748 unsigned long flags;
2749
2750 if (len > sizeof(pp->rb_buf[0].data))
2751 len = sizeof(pp->rb_buf[0].data);
2752 spin_lock_irqsave(&all_pvt_lock, flags);
2753 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2754 pp = list_entry(list, struct pmu_private, list);
2755 spin_lock(&pp->lock);
2756 i = pp->rb_put + 1;
2757 if (i >= RB_SIZE)
2758 i = 0;
2759 if (i != pp->rb_get) {
2760 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2761 rp->len = len;
2762 memcpy(rp->data, data, len);
2763 pp->rb_put = i;
2764 wake_up_interruptible(&pp->wait);
2765 }
2766 spin_unlock(&pp->lock);
2767 }
2768 spin_unlock_irqrestore(&all_pvt_lock, flags);
2769}
2770
aacaf9bd 2771static int
1da177e4
LT		 2772pmu_open(struct inode *inode, struct file *file)
2773{
2774 struct pmu_private *pp;
2775 unsigned long flags;
2776
2777 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2778 if (pp == 0)
2779 return -ENOMEM;
2780 pp->rb_get = pp->rb_put = 0;
2781 spin_lock_init(&pp->lock);
2782 init_waitqueue_head(&pp->wait);
2783 spin_lock_irqsave(&all_pvt_lock, flags);
2784#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2785 pp->backlight_locker = 0;
2786#endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
2787 list_add(&pp->list, &all_pmu_pvt);
2788 spin_unlock_irqrestore(&all_pvt_lock, flags);
2789 file->private_data = pp;
2790 return 0;
2791}
2792
aacaf9bd 2793static ssize_t
1da177e4
LT		 2794pmu_read(struct file *file, char __user *buf,
2795 size_t count, loff_t *ppos)
2796{
2797 struct pmu_private *pp = file->private_data;
2798 DECLARE_WAITQUEUE(wait, current);
2799 unsigned long flags;
2800 int ret = 0;
2801
2802 if (count < 1 || pp == 0)
2803 return -EINVAL;
2804 if (!access_ok(VERIFY_WRITE, buf, count))
2805 return -EFAULT;
2806
2807 spin_lock_irqsave(&pp->lock, flags);
2808 add_wait_queue(&pp->wait, &wait);
2809 current->state = TASK_INTERRUPTIBLE;
2810
2811 for (;;) {
2812 ret = -EAGAIN;
2813 if (pp->rb_get != pp->rb_put) {
2814 int i = pp->rb_get;
2815 struct rb_entry *rp = &pp->rb_buf[i];
2816 ret = rp->len;
2817 spin_unlock_irqrestore(&pp->lock, flags);
2818 if (ret > count)
2819 ret = count;
2820 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2821 ret = -EFAULT;
2822 if (++i >= RB_SIZE)
2823 i = 0;
2824 spin_lock_irqsave(&pp->lock, flags);
2825 pp->rb_get = i;
2826 }
2827 if (ret >= 0)
2828 break;
2829 if (file->f_flags & O_NONBLOCK)
2830 break;
2831 ret = -ERESTARTSYS;
2832 if (signal_pending(current))
2833 break;
2834 spin_unlock_irqrestore(&pp->lock, flags);
2835 schedule();
2836 spin_lock_irqsave(&pp->lock, flags);
2837 }
2838 current->state = TASK_RUNNING;
2839 remove_wait_queue(&pp->wait, &wait);
2840 spin_unlock_irqrestore(&pp->lock, flags);
2841
2842 return ret;
2843}
2844
aacaf9bd 2845static ssize_t
1da177e4
LT		 2846pmu_write(struct file *file, const char __user *buf,
2847 size_t count, loff_t *ppos)
2848{
2849 return 0;
2850}
2851
aacaf9bd 2852static unsigned int
1da177e4
LT		 2853pmu_fpoll(struct file *filp, poll_table *wait)
2854{
2855 struct pmu_private *pp = filp->private_data;
2856 unsigned int mask = 0;
2857 unsigned long flags;
2858
2859 if (pp == 0)
2860 return 0;
2861 poll_wait(filp, &pp->wait, wait);
2862 spin_lock_irqsave(&pp->lock, flags);
2863 if (pp->rb_get != pp->rb_put)
2864 mask |= POLLIN;
2865 spin_unlock_irqrestore(&pp->lock, flags);
2866 return mask;
2867}
2868
aacaf9bd 2869static int
1da177e4
LT		 2870pmu_release(struct inode *inode, struct file *file)
2871{
2872 struct pmu_private *pp = file->private_data;
2873 unsigned long flags;
2874
2875 lock_kernel();
2876 if (pp != 0) {
2877 file->private_data = NULL;
2878 spin_lock_irqsave(&all_pvt_lock, flags);
2879 list_del(&pp->list);
2880 spin_unlock_irqrestore(&all_pvt_lock, flags);
2881#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2882 if (pp->backlight_locker) {
2883 spin_lock_irqsave(&pmu_lock, flags);
2884 disable_kernel_backlight--;
2885 spin_unlock_irqrestore(&pmu_lock, flags);
2886 }
2887#endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
2888 kfree(pp);
2889 }
2890 unlock_kernel();
2891 return 0;
2892}
2893
aacaf9bd 2894static int
1da177e4
LT		 2895pmu_ioctl(struct inode * inode, struct file *filp,
2896 u_int cmd, u_long arg)
2897{
1da177e4 2898 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2899 int error = -EINVAL;
1da177e4
LT		 2900
2901 switch (cmd) {
a0005034 2902#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 2903 case PMU_IOC_SLEEP:
2904 if (!capable(CAP_SYS_ADMIN))
2905 return -EACCES;
2906 if (sleep_in_progress)
2907 return -EBUSY;
2908 sleep_in_progress = 1;
2909 switch (pmu_kind) {
2910 case PMU_OHARE_BASED:
2911 error = powerbook_sleep_3400();
2912 break;
2913 case PMU_HEATHROW_BASED:
2914 case PMU_PADDINGTON_BASED:
2915 error = powerbook_sleep_grackle();
2916 break;
2917 case PMU_KEYLARGO_BASED:
2918 error = powerbook_sleep_Core99();
2919 break;
2920 default:
2921 error = -ENOSYS;
2922 }
2923 sleep_in_progress = 0;
8c870933 2924 break;
1da177e4
LT		 2925 case PMU_IOC_CAN_SLEEP:
2926 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0)
2927 return put_user(0, argp);
2928 else
2929 return put_user(1, argp);
a0005034 2930#endif /* CONFIG_PM && CONFIG_PPC32 */
1da177e4
LT		 2931
2932#ifdef CONFIG_PMAC_BACKLIGHT
2933 /* Backlight should have its own device or go via
2934 * the fbdev
2935 */
2936 case PMU_IOC_GET_BACKLIGHT:
2937 if (sleep_in_progress)
2938 return -EBUSY;
2939 error = get_backlight_level();
2940 if (error < 0)
2941 return error;
2942 return put_user(error, argp);
2943 case PMU_IOC_SET_BACKLIGHT:
2944 {
2945 __u32 value;
2946 if (sleep_in_progress)
2947 return -EBUSY;
2948 error = get_user(value, argp);
2949 if (!error)
2950 error = set_backlight_level(value);
8c870933 2951 break;
1da177e4
LT		 2952 }
2953#ifdef CONFIG_INPUT_ADBHID
2954 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2955 struct pmu_private *pp = filp->private_data;
1da177e4 2956 unsigned long flags;
8c870933 2957
1da177e4
LT		 2958 if (pp->backlight_locker)
2959 return 0;
2960 pp->backlight_locker = 1;
2961 spin_lock_irqsave(&pmu_lock, flags);
2962 disable_kernel_backlight++;
2963 spin_unlock_irqrestore(&pmu_lock, flags);
2964 return 0;
2965 }
2966#endif /* CONFIG_INPUT_ADBHID */
2967#endif /* CONFIG_PMAC_BACKLIGHT */
2968 case PMU_IOC_GET_MODEL:
2969 return put_user(pmu_kind, argp);
2970 case PMU_IOC_HAS_ADB:
2971 return put_user(pmu_has_adb, argp);
2972 }
8c870933 2973 return error;
1da177e4
LT		 2974}
2975
aacaf9bd 2976static struct file_operations pmu_device_fops = {
1da177e4
LT		 2977 .read = pmu_read,
2978 .write = pmu_write,
2979 .poll = pmu_fpoll,
2980 .ioctl = pmu_ioctl,
2981 .open = pmu_open,
2982 .release = pmu_release,
2983};
2984
aacaf9bd 2985static struct miscdevice pmu_device = {
1da177e4
LT		 2986 PMU_MINOR, "pmu", &pmu_device_fops
2987};
2988
8c870933 2989static int pmu_device_init(void)
1da177e4
LT		 2990{
2991 if (!via)
8c870933 2992 return 0;
1da177e4
LT		 2993 if (misc_register(&pmu_device) < 0)
2994 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2995 return 0;
1da177e4 2996}
8c870933
BH		 2997device_initcall(pmu_device_init);
2998
1da177e4
LT		 2999
3000#ifdef DEBUG_SLEEP
aacaf9bd 3001static inline void
1da177e4
LT		 3002polled_handshake(volatile unsigned char __iomem *via)
3003{
3004 via[B] &= ~TREQ; eieio();
3005 while ((via[B] & TACK) != 0)
3006 ;
3007 via[B] |= TREQ; eieio();
3008 while ((via[B] & TACK) == 0)
3009 ;
3010}
3011
aacaf9bd 3012static inline void
1da177e4
LT		 3013polled_send_byte(volatile unsigned char __iomem *via, int x)
3014{
3015 via[ACR] |= SR_OUT | SR_EXT; eieio();
3016 via[SR] = x; eieio();
3017 polled_handshake(via);
3018}
3019
aacaf9bd 3020static inline int
1da177e4
LT		 3021polled_recv_byte(volatile unsigned char __iomem *via)
3022{
3023 int x;
3024
3025 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
3026 x = via[SR]; eieio();
3027 polled_handshake(via);
3028 x = via[SR]; eieio();
3029 return x;
3030}
3031
aacaf9bd 3032int
1da177e4
LT		 3033pmu_polled_request(struct adb_request *req)
3034{
3035 unsigned long flags;
3036 int i, l, c;
3037 volatile unsigned char __iomem *v = via;
3038
3039 req->complete = 1;
3040 c = req->data[0];
3041 l = pmu_data_len[c][0];
3042 if (l >= 0 && req->nbytes != l + 1)
3043 return -EINVAL;
3044
3045 local_irq_save(flags);
3046 while (pmu_state != idle)
3047 pmu_poll();
3048
3049 while ((via[B] & TACK) == 0)
3050 ;
3051 polled_send_byte(v, c);
3052 if (l < 0) {
3053 l = req->nbytes - 1;
3054 polled_send_byte(v, l);
3055 }
3056 for (i = 1; i <= l; ++i)
3057 polled_send_byte(v, req->data[i]);
3058
3059 l = pmu_data_len[c][1];
3060 if (l < 0)
3061 l = polled_recv_byte(v);
3062 for (i = 0; i < l; ++i)
3063 req->reply[i + req->reply_len] = polled_recv_byte(v);
3064
3065 if (req->done)
3066 (*req->done)(req);
3067
3068 local_irq_restore(flags);
3069 return 0;
3070}
3071#endif /* DEBUG_SLEEP */
3072
3073
3074/* FIXME: This is a temporary set of callbacks to enable us
3075 * to do suspend-to-disk.
3076 */
3077
a0005034 3078#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 3079
3080static int pmu_sys_suspended = 0;
3081
3bfffd97 3082static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
1da177e4 3083{
ca078bae 3084 if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
1da177e4
LT		 3085 return 0;
3086
3087 /* Suspend PMU event interrupts */
3088 pmu_suspend();
3089
3090 pmu_sys_suspended = 1;
3091 return 0;
3092}
3093
3094static int pmu_sys_resume(struct sys_device *sysdev)
3095{
3096 struct adb_request req;
3097
3098 if (!pmu_sys_suspended)
3099 return 0;
3100
3101 /* Tell PMU we are ready */
3102 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
3103 pmu_wait_complete(&req);
3104
3105 /* Resume PMU event interrupts */
3106 pmu_resume();
3107
3108 pmu_sys_suspended = 0;
3109
3110 return 0;
3111}
3112
a0005034 3113#endif /* CONFIG_PM && CONFIG_PPC32 */
1da177e4
LT		 3114
3115static struct sysdev_class pmu_sysclass = {
3116 set_kset_name("pmu"),
3117};
3118
3119static struct sys_device device_pmu = {
3120 .id = 0,
3121 .cls = &pmu_sysclass,
3122};
3123
3124static struct sysdev_driver driver_pmu = {
a0005034 3125#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 3126 .suspend = &pmu_sys_suspend,
3127 .resume = &pmu_sys_resume,
a0005034 3128#endif /* CONFIG_PM && CONFIG_PPC32 */
1da177e4
LT		 3129};
3130
3131static int __init init_pmu_sysfs(void)
3132{
3133 int rc;
3134
3135 rc = sysdev_class_register(&pmu_sysclass);
3136 if (rc) {
3137 printk(KERN_ERR "Failed registering PMU sys class\n");
3138 return -ENODEV;
3139 }
3140 rc = sysdev_register(&device_pmu);
3141 if (rc) {
3142 printk(KERN_ERR "Failed registering PMU sys device\n");
3143 return -ENODEV;
3144 }
3145 rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
3146 if (rc) {
3147 printk(KERN_ERR "Failed registering PMU sys driver\n");
3148 return -ENODEV;
3149 }
3150 return 0;
3151}
3152
3153subsys_initcall(init_pmu_sysfs);
3154
3155EXPORT_SYMBOL(pmu_request);
3156EXPORT_SYMBOL(pmu_poll);
3157EXPORT_SYMBOL(pmu_poll_adb);
3158EXPORT_SYMBOL(pmu_wait_complete);
3159EXPORT_SYMBOL(pmu_suspend);
3160EXPORT_SYMBOL(pmu_resume);
3161EXPORT_SYMBOL(pmu_unlock);
3162EXPORT_SYMBOL(pmu_i2c_combined_read);
3163EXPORT_SYMBOL(pmu_i2c_stdsub_write);
3164EXPORT_SYMBOL(pmu_i2c_simple_read);
3165EXPORT_SYMBOL(pmu_i2c_simple_write);
a0005034 3166#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
1da177e4
LT		 3167EXPORT_SYMBOL(pmu_enable_irled);
3168EXPORT_SYMBOL(pmu_battery_count);
3169EXPORT_SYMBOL(pmu_batteries);
3170EXPORT_SYMBOL(pmu_power_flags);
a0005034 3171#endif /* CONFIG_PM && CONFIG_PPC32 */
1da177e4 3172
Linux kernel - Deliverables
This page took 0.211295 seconds and 5 git commands to generate.