[POWERPC] Fix sleep on some powerbooks
[deliverable/linux.git] / drivers / macintosh / via-pmu.c
CommitLineData
1da177e4
LT
1/*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 13 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT
14 *
15 * THIS DRIVER IS BECOMING A TOTAL MESS !
16 * - Cleanup atomically disabling reply to PMU events after
17 * a sleep or a freq. switch
1da177e4
LT
18 *
19 */
20#include <stdarg.h>
1da177e4
LT
21#include <linux/types.h>
22#include <linux/errno.h>
23#include <linux/kernel.h>
24#include <linux/delay.h>
25#include <linux/sched.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/pci.h>
29#include <linux/slab.h>
30#include <linux/poll.h>
31#include <linux/adb.h>
32#include <linux/pmu.h>
33#include <linux/cuda.h>
1da177e4
LT
34#include <linux/module.h>
35#include <linux/spinlock.h>
36#include <linux/pm.h>
37#include <linux/proc_fs.h>
38#include <linux/init.h>
39#include <linux/interrupt.h>
40#include <linux/device.h>
41#include <linux/sysdev.h>
7dfb7103 42#include <linux/freezer.h>
1da177e4 43#include <linux/syscalls.h>
6002f544 44#include <linux/suspend.h>
1da177e4
LT
45#include <linux/cpu.h>
46#include <asm/prom.h>
47#include <asm/machdep.h>
48#include <asm/io.h>
49#include <asm/pgtable.h>
50#include <asm/system.h>
51#include <asm/sections.h>
52#include <asm/irq.h>
53#include <asm/pmac_feature.h>
5b9ca526
BH
54#include <asm/pmac_pfunc.h>
55#include <asm/pmac_low_i2c.h>
1da177e4
LT
56#include <asm/uaccess.h>
57#include <asm/mmu_context.h>
58#include <asm/cputable.h>
59#include <asm/time.h>
1da177e4 60#include <asm/backlight.h>
1da177e4 61
9e8e30a0
JB
62#include "via-pmu-event.h"
63
1da177e4 64/* Some compile options */
f91266ed 65#undef DEBUG_SLEEP
1da177e4
LT
66
67/* Misc minor number allocated for /dev/pmu */
68#define PMU_MINOR 154
69
70/* How many iterations between battery polls */
71#define BATTERY_POLLING_COUNT 2
72
73static volatile unsigned char __iomem *via;
74
75/* VIA registers - spaced 0x200 bytes apart */
76#define RS 0x200 /* skip between registers */
77#define B 0 /* B-side data */
78#define A RS /* A-side data */
79#define DIRB (2*RS) /* B-side direction (1=output) */
80#define DIRA (3*RS) /* A-side direction (1=output) */
81#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
82#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
83#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
84#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
85#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
86#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
87#define SR (10*RS) /* Shift register */
88#define ACR (11*RS) /* Auxiliary control register */
89#define PCR (12*RS) /* Peripheral control register */
90#define IFR (13*RS) /* Interrupt flag register */
91#define IER (14*RS) /* Interrupt enable register */
92#define ANH (15*RS) /* A-side data, no handshake */
93
94/* Bits in B data register: both active low */
95#define TACK 0x08 /* Transfer acknowledge (input) */
96#define TREQ 0x10 /* Transfer request (output) */
97
98/* Bits in ACR */
99#define SR_CTRL 0x1c /* Shift register control bits */
100#define SR_EXT 0x0c /* Shift on external clock */
101#define SR_OUT 0x10 /* Shift out if 1 */
102
103/* Bits in IFR and IER */
104#define IER_SET 0x80 /* set bits in IER */
105#define IER_CLR 0 /* clear bits in IER */
106#define SR_INT 0x04 /* Shift register full/empty */
107#define CB2_INT 0x08
108#define CB1_INT 0x10 /* transition on CB1 input */
109
110static volatile enum pmu_state {
111 idle,
112 sending,
113 intack,
114 reading,
115 reading_intr,
116 locked,
117} pmu_state;
118
119static volatile enum int_data_state {
120 int_data_empty,
121 int_data_fill,
122 int_data_ready,
123 int_data_flush
124} int_data_state[2] = { int_data_empty, int_data_empty };
125
126static struct adb_request *current_req;
127static struct adb_request *last_req;
128static struct adb_request *req_awaiting_reply;
129static unsigned char interrupt_data[2][32];
130static int interrupt_data_len[2];
131static int int_data_last;
132static unsigned char *reply_ptr;
133static int data_index;
134static int data_len;
135static volatile int adb_int_pending;
136static volatile int disable_poll;
1da177e4
LT
137static struct device_node *vias;
138static int pmu_kind = PMU_UNKNOWN;
87275856 139static int pmu_fully_inited;
1da177e4 140static int pmu_has_adb;
51d3082f 141static struct device_node *gpio_node;
87275856 142static unsigned char __iomem *gpio_reg;
0ebfff14 143static int gpio_irq = NO_IRQ;
1da177e4 144static int gpio_irq_enabled = -1;
87275856 145static volatile int pmu_suspended;
1da177e4
LT
146static spinlock_t pmu_lock;
147static u8 pmu_intr_mask;
148static int pmu_version;
149static int drop_interrupts;
f91266ed 150#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 151static int option_lid_wakeup = 1;
f91266ed 152#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
153static unsigned long async_req_locks;
154static unsigned int pmu_irq_stats[11];
155
156static struct proc_dir_entry *proc_pmu_root;
157static struct proc_dir_entry *proc_pmu_info;
158static struct proc_dir_entry *proc_pmu_irqstats;
159static struct proc_dir_entry *proc_pmu_options;
160static int option_server_mode;
161
1da177e4
LT
162int pmu_battery_count;
163int pmu_cur_battery;
a334bdbd 164unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT
165struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
166static int query_batt_timer = BATTERY_POLLING_COUNT;
167static struct adb_request batt_req;
168static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 169
1da177e4
LT
170int __fake_sleep;
171int asleep;
1da177e4
LT
172
173#ifdef CONFIG_ADB
87275856 174static int adb_dev_map;
1da177e4
LT
175static int pmu_adb_flags;
176
177static int pmu_probe(void);
178static int pmu_init(void);
179static int pmu_send_request(struct adb_request *req, int sync);
180static int pmu_adb_autopoll(int devs);
181static int pmu_adb_reset_bus(void);
182#endif /* CONFIG_ADB */
183
184static int init_pmu(void);
1da177e4 185static void pmu_start(void);
7d12e780
DH
186static irqreturn_t via_pmu_interrupt(int irq, void *arg);
187static irqreturn_t gpio1_interrupt(int irq, void *arg);
1da177e4
LT
188static int proc_get_info(char *page, char **start, off_t off,
189 int count, int *eof, void *data);
190static int proc_get_irqstats(char *page, char **start, off_t off,
191 int count, int *eof, void *data);
1da177e4
LT
192static void pmu_pass_intr(unsigned char *data, int len);
193static int proc_get_batt(char *page, char **start, off_t off,
194 int count, int *eof, void *data);
1da177e4
LT
195static int proc_read_options(char *page, char **start, off_t off,
196 int count, int *eof, void *data);
197static int proc_write_options(struct file *file, const char __user *buffer,
198 unsigned long count, void *data);
199
200#ifdef CONFIG_ADB
201struct adb_driver via_pmu_driver = {
202 "PMU",
203 pmu_probe,
204 pmu_init,
205 pmu_send_request,
206 pmu_adb_autopoll,
207 pmu_poll_adb,
208 pmu_adb_reset_bus
209};
210#endif /* CONFIG_ADB */
211
212extern void low_sleep_handler(void);
213extern void enable_kernel_altivec(void);
214extern void enable_kernel_fp(void);
215
216#ifdef DEBUG_SLEEP
217int pmu_polled_request(struct adb_request *req);
f91266ed 218void pmu_blink(int n);
1da177e4
LT
219#endif
220
221/*
222 * This table indicates for each PMU opcode:
223 * - the number of data bytes to be sent with the command, or -1
224 * if a length byte should be sent,
225 * - the number of response bytes which the PMU will return, or
226 * -1 if it will send a length byte.
227 */
aacaf9bd 228static const s8 pmu_data_len[256][2] = {
1da177e4
LT
229/* 0 1 2 3 4 5 6 7 */
230/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
231/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
232/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
233/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
234/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
235/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
236/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
237/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
238/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
239/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
240/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
241/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
242/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
244/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
246/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
247/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
248/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
250/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
251/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
252/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
254/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
255/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
256/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
258/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
259/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
260/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262};
263
264static char *pbook_type[] = {
265 "Unknown PowerBook",
266 "PowerBook 2400/3400/3500(G3)",
267 "PowerBook G3 Series",
268 "1999 PowerBook G3",
269 "Core99"
270};
271
51d3082f 272int __init find_via_pmu(void)
1da177e4 273{
cc5d0189 274 u64 taddr;
018a3d1d 275 const u32 *reg;
51d3082f 276
1da177e4
LT
277 if (via != 0)
278 return 1;
51d3082f
BH
279 vias = of_find_node_by_name(NULL, "via-pmu");
280 if (vias == NULL)
1da177e4 281 return 0;
1da177e4 282
01b2726d 283 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH
284 if (reg == NULL) {
285 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
286 goto fail;
287 }
288 taddr = of_translate_address(vias, reg);
bb6b9b28 289 if (taddr == OF_BAD_ADDR) {
51d3082f
BH
290 printk(KERN_ERR "via-pmu: Can't translate address !\n");
291 goto fail;
1da177e4
LT
292 }
293
294 spin_lock_init(&pmu_lock);
295
296 pmu_has_adb = 1;
297
298 pmu_intr_mask = PMU_INT_PCEJECT |
299 PMU_INT_SNDBRT |
300 PMU_INT_ADB |
301 PMU_INT_TICK;
302
303 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 304 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 305 pmu_kind = PMU_OHARE_BASED;
55b61fec 306 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 307 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 308 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 309 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR
310 else if (of_device_is_compatible(vias->parent, "Keylargo")
311 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 312 struct device_node *gpiop;
1658ab66 313 struct device_node *adbp;
cc5d0189 314 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT
315
316 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR
317 adbp = of_find_node_by_type(NULL, "adb");
318 pmu_has_adb = (adbp != NULL);
319 of_node_put(adbp);
1da177e4
LT
320 pmu_intr_mask = PMU_INT_PCEJECT |
321 PMU_INT_SNDBRT |
322 PMU_INT_ADB |
323 PMU_INT_TICK |
324 PMU_INT_ENVIRONMENT;
325
51d3082f
BH
326 gpiop = of_find_node_by_name(NULL, "gpio");
327 if (gpiop) {
01b2726d 328 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH
329 if (reg)
330 gaddr = of_translate_address(gpiop, reg);
cc5d0189 331 if (gaddr != OF_BAD_ADDR)
51d3082f 332 gpio_reg = ioremap(gaddr, 0x10);
1da177e4 333 }
61e37ca2 334 if (gpio_reg == NULL) {
51d3082f 335 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
61e37ca2
OH
336 goto fail_gpio;
337 }
1da177e4
LT
338 } else
339 pmu_kind = PMU_UNKNOWN;
340
51d3082f
BH
341 via = ioremap(taddr, 0x2000);
342 if (via == NULL) {
343 printk(KERN_ERR "via-pmu: Can't map address !\n");
344 goto fail;
345 }
1da177e4
LT
346
347 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
348 out_8(&via[IFR], 0x7f); /* clear IFR */
349
350 pmu_state = idle;
351
352 if (!init_pmu()) {
353 via = NULL;
354 return 0;
355 }
356
bb6b9b28 357 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT
358 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
359
360 sys_ctrler = SYS_CTRLER_PMU;
361
362 return 1;
51d3082f
BH
363 fail:
364 of_node_put(vias);
61e37ca2
OH
365 iounmap(gpio_reg);
366 gpio_reg = NULL;
367 fail_gpio:
51d3082f
BH
368 vias = NULL;
369 return 0;
1da177e4
LT
370}
371
372#ifdef CONFIG_ADB
51d3082f 373static int pmu_probe(void)
1da177e4
LT
374{
375 return vias == NULL? -ENODEV: 0;
376}
377
51d3082f 378static int __init pmu_init(void)
1da177e4
LT
379{
380 if (vias == NULL)
381 return -ENODEV;
382 return 0;
383}
384#endif /* CONFIG_ADB */
385
386/*
387 * We can't wait until pmu_init gets called, that happens too late.
388 * It happens after IDE and SCSI initialization, which can take a few
389 * seconds, and by that time the PMU could have given up on us and
390 * turned us off.
391 * Thus this is called with arch_initcall rather than device_initcall.
392 */
393static int __init via_pmu_start(void)
394{
0ebfff14
BH
395 unsigned int irq;
396
1da177e4
LT
397 if (vias == NULL)
398 return -ENODEV;
399
1da177e4 400 batt_req.complete = 1;
1da177e4 401
0ebfff14
BH
402 irq = irq_of_parse_and_map(vias, 0);
403 if (irq == NO_IRQ) {
7b52b440 404 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH
405 return -ENODEV;
406 }
407 if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) {
408 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
409 return -ENODEV;
1da177e4
LT
410 }
411
51d3082f
BH
412 if (pmu_kind == PMU_KEYLARGO_BASED) {
413 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
414 if (gpio_node == NULL)
415 gpio_node = of_find_node_by_name(NULL,
416 "pmu-interrupt");
0ebfff14
BH
417 if (gpio_node)
418 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 419
0ebfff14 420 if (gpio_irq != NO_IRQ) {
51d3082f
BH
421 if (request_irq(gpio_irq, gpio1_interrupt, 0,
422 "GPIO1 ADB", (void *)0))
423 printk(KERN_ERR "pmu: can't get irq %d"
424 " (GPIO1)\n", gpio_irq);
425 else
426 gpio_irq_enabled = 1;
427 }
1da177e4
LT
428 }
429
430 /* Enable interrupts */
431 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
432
433 pmu_fully_inited = 1;
434
435 /* Make sure PMU settle down before continuing. This is _very_ important
436 * since the IDE probe may shut interrupts down for quite a bit of time. If
437 * a PMU communication is pending while this happens, the PMU may timeout
438 * Not that on Core99 machines, the PMU keeps sending us environement
439 * messages, we should find a way to either fix IDE or make it call
440 * pmu_suspend() before masking interrupts. This can also happens while
441 * scolling with some fbdevs.
442 */
443 do {
444 pmu_poll();
445 } while (pmu_state != idle);
446
447 return 0;
448}
449
450arch_initcall(via_pmu_start);
451
452/*
453 * This has to be done after pci_init, which is a subsys_initcall.
454 */
455static int __init via_pmu_dev_init(void)
456{
457 if (vias == NULL)
458 return -ENODEV;
459
1da177e4 460#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 461 /* Initialize backlight */
4b755999 462 pmu_backlight_init();
5474c120 463#endif
1da177e4 464
8c870933 465#ifdef CONFIG_PPC32
1da177e4
LT
466 if (machine_is_compatible("AAPL,3400/2400") ||
467 machine_is_compatible("AAPL,3500")) {
468 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
469 NULL, PMAC_MB_INFO_MODEL, 0);
470 pmu_battery_count = 1;
471 if (mb == PMAC_TYPE_COMET)
472 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
473 else
474 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
475 } else if (machine_is_compatible("AAPL,PowerBook1998") ||
476 machine_is_compatible("PowerBook1,1")) {
477 pmu_battery_count = 2;
478 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
479 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
480 } else {
30686ba6
SR
481 struct device_node* prim =
482 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 483 const u32 *prim_info = NULL;
1da177e4 484 if (prim)
01b2726d 485 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT
486 if (prim_info) {
487 /* Other stuffs here yet unknown */
488 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
489 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
490 if (pmu_battery_count > 1)
491 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
492 }
30686ba6 493 of_node_put(prim);
1da177e4 494 }
8c870933
BH
495#endif /* CONFIG_PPC32 */
496
1da177e4
LT
497 /* Create /proc/pmu */
498 proc_pmu_root = proc_mkdir("pmu", NULL);
499 if (proc_pmu_root) {
8c870933 500 long i;
1da177e4
LT
501
502 for (i=0; i<pmu_battery_count; i++) {
503 char title[16];
8c870933 504 sprintf(title, "battery_%ld", i);
1da177e4
LT
505 proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
506 proc_get_batt, (void *)i);
507 }
1da177e4
LT
508
509 proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
510 proc_get_info, NULL);
511 proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root,
512 proc_get_irqstats, NULL);
513 proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
514 if (proc_pmu_options) {
1da177e4
LT
515 proc_pmu_options->read_proc = proc_read_options;
516 proc_pmu_options->write_proc = proc_write_options;
517 }
518 }
519 return 0;
520}
521
522device_initcall(via_pmu_dev_init);
523
aacaf9bd 524static int
1da177e4
LT
525init_pmu(void)
526{
527 int timeout;
528 struct adb_request req;
529
530 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
531 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
532
533 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
534 timeout = 100000;
535 while (!req.complete) {
536 if (--timeout < 0) {
537 printk(KERN_ERR "init_pmu: no response from PMU\n");
538 return 0;
539 }
540 udelay(10);
541 pmu_poll();
542 }
543
544 /* ack all pending interrupts */
545 timeout = 100000;
546 interrupt_data[0][0] = 1;
547 while (interrupt_data[0][0] || pmu_state != idle) {
548 if (--timeout < 0) {
549 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
550 return 0;
551 }
552 if (pmu_state == idle)
553 adb_int_pending = 1;
7d12e780 554 via_pmu_interrupt(0, NULL);
1da177e4
LT
555 udelay(10);
556 }
557
558 /* Tell PMU we are ready. */
559 if (pmu_kind == PMU_KEYLARGO_BASED) {
560 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
561 while (!req.complete)
562 pmu_poll();
563 }
564
565 /* Read PMU version */
566 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
567 pmu_wait_complete(&req);
568 if (req.reply_len > 0)
569 pmu_version = req.reply[0];
570
571 /* Read server mode setting */
572 if (pmu_kind == PMU_KEYLARGO_BASED) {
573 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
574 PMU_PWR_GET_POWERUP_EVENTS);
575 pmu_wait_complete(&req);
576 if (req.reply_len == 2) {
577 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
578 option_server_mode = 1;
579 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
580 option_server_mode ? "enabled" : "disabled");
581 }
582 }
583 return 1;
584}
585
586int
587pmu_get_model(void)
588{
589 return pmu_kind;
590}
591
1da177e4
LT
592static void pmu_set_server_mode(int server_mode)
593{
594 struct adb_request req;
595
596 if (pmu_kind != PMU_KEYLARGO_BASED)
597 return;
598
599 option_server_mode = server_mode;
600 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
601 pmu_wait_complete(&req);
602 if (req.reply_len < 2)
603 return;
604 if (server_mode)
605 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
606 PMU_PWR_SET_POWERUP_EVENTS,
607 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
608 else
609 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
610 PMU_PWR_CLR_POWERUP_EVENTS,
611 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
612 pmu_wait_complete(&req);
613}
614
1da177e4
LT
615/* This new version of the code for 2400/3400/3500 powerbooks
616 * is inspired from the implementation in gkrellm-pmu
617 */
aacaf9bd 618static void
1da177e4
LT
619done_battery_state_ohare(struct adb_request* req)
620{
621 /* format:
622 * [0] : flags
623 * 0x01 : AC indicator
624 * 0x02 : charging
625 * 0x04 : battery exist
626 * 0x08 :
627 * 0x10 :
628 * 0x20 : full charged
629 * 0x40 : pcharge reset
630 * 0x80 : battery exist
631 *
632 * [1][2] : battery voltage
633 * [3] : CPU temperature
634 * [4] : battery temperature
635 * [5] : current
636 * [6][7] : pcharge
637 * --tkoba
638 */
639 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
640 long pcharge, charge, vb, vmax, lmax;
641 long vmax_charging, vmax_charged;
642 long amperage, voltage, time, max;
643 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
644 NULL, PMAC_MB_INFO_MODEL, 0);
645
646 if (req->reply[0] & 0x01)
647 pmu_power_flags |= PMU_PWR_AC_PRESENT;
648 else
649 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
650
651 if (mb == PMAC_TYPE_COMET) {
652 vmax_charged = 189;
653 vmax_charging = 213;
654 lmax = 6500;
655 } else {
656 vmax_charged = 330;
657 vmax_charging = 330;
658 lmax = 6500;
659 }
660 vmax = vmax_charged;
661
662 /* If battery installed */
663 if (req->reply[0] & 0x04) {
664 bat_flags |= PMU_BATT_PRESENT;
665 if (req->reply[0] & 0x02)
666 bat_flags |= PMU_BATT_CHARGING;
667 vb = (req->reply[1] << 8) | req->reply[2];
668 voltage = (vb * 265 + 72665) / 10;
669 amperage = req->reply[5];
670 if ((req->reply[0] & 0x01) == 0) {
671 if (amperage > 200)
672 vb += ((amperage - 200) * 15)/100;
673 } else if (req->reply[0] & 0x02) {
674 vb = (vb * 97) / 100;
675 vmax = vmax_charging;
676 }
677 charge = (100 * vb) / vmax;
678 if (req->reply[0] & 0x40) {
679 pcharge = (req->reply[6] << 8) + req->reply[7];
680 if (pcharge > lmax)
681 pcharge = lmax;
682 pcharge *= 100;
683 pcharge = 100 - pcharge / lmax;
684 if (pcharge < charge)
685 charge = pcharge;
686 }
687 if (amperage > 0)
688 time = (charge * 16440) / amperage;
689 else
690 time = 0;
691 max = 100;
692 amperage = -amperage;
693 } else
694 charge = max = amperage = voltage = time = 0;
695
696 pmu_batteries[pmu_cur_battery].flags = bat_flags;
697 pmu_batteries[pmu_cur_battery].charge = charge;
698 pmu_batteries[pmu_cur_battery].max_charge = max;
699 pmu_batteries[pmu_cur_battery].amperage = amperage;
700 pmu_batteries[pmu_cur_battery].voltage = voltage;
701 pmu_batteries[pmu_cur_battery].time_remaining = time;
702
703 clear_bit(0, &async_req_locks);
704}
705
aacaf9bd 706static void
1da177e4
LT
707done_battery_state_smart(struct adb_request* req)
708{
709 /* format:
710 * [0] : format of this structure (known: 3,4,5)
711 * [1] : flags
712 *
713 * format 3 & 4:
714 *
715 * [2] : charge
716 * [3] : max charge
717 * [4] : current
718 * [5] : voltage
719 *
720 * format 5:
721 *
722 * [2][3] : charge
723 * [4][5] : max charge
724 * [6][7] : current
725 * [8][9] : voltage
726 */
727
728 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
729 int amperage;
730 unsigned int capa, max, voltage;
731
732 if (req->reply[1] & 0x01)
733 pmu_power_flags |= PMU_PWR_AC_PRESENT;
734 else
735 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
736
737
738 capa = max = amperage = voltage = 0;
739
740 if (req->reply[1] & 0x04) {
741 bat_flags |= PMU_BATT_PRESENT;
742 switch(req->reply[0]) {
743 case 3:
744 case 4: capa = req->reply[2];
745 max = req->reply[3];
746 amperage = *((signed char *)&req->reply[4]);
747 voltage = req->reply[5];
748 break;
749 case 5: capa = (req->reply[2] << 8) | req->reply[3];
750 max = (req->reply[4] << 8) | req->reply[5];
751 amperage = *((signed short *)&req->reply[6]);
752 voltage = (req->reply[8] << 8) | req->reply[9];
753 break;
754 default:
755 printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
756 req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
757 break;
758 }
759 }
760
761 if ((req->reply[1] & 0x01) && (amperage > 0))
762 bat_flags |= PMU_BATT_CHARGING;
763
764 pmu_batteries[pmu_cur_battery].flags = bat_flags;
765 pmu_batteries[pmu_cur_battery].charge = capa;
766 pmu_batteries[pmu_cur_battery].max_charge = max;
767 pmu_batteries[pmu_cur_battery].amperage = amperage;
768 pmu_batteries[pmu_cur_battery].voltage = voltage;
769 if (amperage) {
770 if ((req->reply[1] & 0x01) && (amperage > 0))
771 pmu_batteries[pmu_cur_battery].time_remaining
772 = ((max-capa) * 3600) / amperage;
773 else
774 pmu_batteries[pmu_cur_battery].time_remaining
775 = (capa * 3600) / (-amperage);
776 } else
777 pmu_batteries[pmu_cur_battery].time_remaining = 0;
778
779 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
780
781 clear_bit(0, &async_req_locks);
782}
783
aacaf9bd 784static void
1da177e4
LT
785query_battery_state(void)
786{
787 if (test_and_set_bit(0, &async_req_locks))
788 return;
789 if (pmu_kind == PMU_OHARE_BASED)
790 pmu_request(&batt_req, done_battery_state_ohare,
791 1, PMU_BATTERY_STATE);
792 else
793 pmu_request(&batt_req, done_battery_state_smart,
794 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
795}
796
aacaf9bd 797static int
1da177e4
LT
798proc_get_info(char *page, char **start, off_t off,
799 int count, int *eof, void *data)
800{
801 char* p = page;
802
803 p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
804 p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
1da177e4 805 p += sprintf(p, "AC Power : %d\n",
63e1fd41 806 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
1da177e4 807 p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
1da177e4
LT
808
809 return p - page;
810}
811
aacaf9bd 812static int
1da177e4
LT
813proc_get_irqstats(char *page, char **start, off_t off,
814 int count, int *eof, void *data)
815{
816 int i;
817 char* p = page;
818 static const char *irq_names[] = {
819 "Total CB1 triggered events",
820 "Total GPIO1 triggered events",
821 "PC-Card eject button",
822 "Sound/Brightness button",
823 "ADB message",
824 "Battery state change",
825 "Environment interrupt",
826 "Tick timer",
827 "Ghost interrupt (zero len)",
828 "Empty interrupt (empty mask)",
829 "Max irqs in a row"
830 };
831
832 for (i=0; i<11; i++) {
833 p += sprintf(p, " %2u: %10u (%s)\n",
834 i, pmu_irq_stats[i], irq_names[i]);
835 }
836 return p - page;
837}
838
aacaf9bd 839static int
1da177e4
LT
840proc_get_batt(char *page, char **start, off_t off,
841 int count, int *eof, void *data)
842{
8c870933 843 long batnum = (long)data;
1da177e4
LT
844 char *p = page;
845
846 p += sprintf(p, "\n");
847 p += sprintf(p, "flags : %08x\n",
848 pmu_batteries[batnum].flags);
849 p += sprintf(p, "charge : %d\n",
850 pmu_batteries[batnum].charge);
851 p += sprintf(p, "max_charge : %d\n",
852 pmu_batteries[batnum].max_charge);
853 p += sprintf(p, "current : %d\n",
854 pmu_batteries[batnum].amperage);
855 p += sprintf(p, "voltage : %d\n",
856 pmu_batteries[batnum].voltage);
857 p += sprintf(p, "time rem. : %d\n",
858 pmu_batteries[batnum].time_remaining);
859
860 return p - page;
861}
1da177e4 862
aacaf9bd 863static int
1da177e4
LT
864proc_read_options(char *page, char **start, off_t off,
865 int count, int *eof, void *data)
866{
867 char *p = page;
868
f91266ed 869#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
870 if (pmu_kind == PMU_KEYLARGO_BASED &&
871 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
872 p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 873#endif
1da177e4
LT
874 if (pmu_kind == PMU_KEYLARGO_BASED)
875 p += sprintf(p, "server_mode=%d\n", option_server_mode);
876
877 return p - page;
878}
879
aacaf9bd 880static int
1da177e4
LT
881proc_write_options(struct file *file, const char __user *buffer,
882 unsigned long count, void *data)
883{
884 char tmp[33];
885 char *label, *val;
886 unsigned long fcount = count;
887
888 if (!count)
889 return -EINVAL;
890 if (count > 32)
891 count = 32;
892 if (copy_from_user(tmp, buffer, count))
893 return -EFAULT;
894 tmp[count] = 0;
895
896 label = tmp;
897 while(*label == ' ')
898 label++;
899 val = label;
900 while(*val && (*val != '=')) {
901 if (*val == ' ')
902 *val = 0;
903 val++;
904 }
905 if ((*val) == 0)
906 return -EINVAL;
907 *(val++) = 0;
908 while(*val == ' ')
909 val++;
f91266ed 910#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
911 if (pmu_kind == PMU_KEYLARGO_BASED &&
912 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
913 if (!strcmp(label, "lid_wakeup"))
914 option_lid_wakeup = ((*val) == '1');
8c870933 915#endif
1da177e4
LT
916 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
917 int new_value;
918 new_value = ((*val) == '1');
919 if (new_value != option_server_mode)
920 pmu_set_server_mode(new_value);
921 }
922 return fcount;
923}
924
925#ifdef CONFIG_ADB
926/* Send an ADB command */
aacaf9bd 927static int
1da177e4
LT
928pmu_send_request(struct adb_request *req, int sync)
929{
930 int i, ret;
931
932 if ((vias == NULL) || (!pmu_fully_inited)) {
933 req->complete = 1;
934 return -ENXIO;
935 }
936
937 ret = -EINVAL;
938
939 switch (req->data[0]) {
940 case PMU_PACKET:
941 for (i = 0; i < req->nbytes - 1; ++i)
942 req->data[i] = req->data[i+1];
943 --req->nbytes;
944 if (pmu_data_len[req->data[0]][1] != 0) {
945 req->reply[0] = ADB_RET_OK;
946 req->reply_len = 1;
947 } else
948 req->reply_len = 0;
949 ret = pmu_queue_request(req);
950 break;
951 case CUDA_PACKET:
952 switch (req->data[1]) {
953 case CUDA_GET_TIME:
954 if (req->nbytes != 2)
955 break;
956 req->data[0] = PMU_READ_RTC;
957 req->nbytes = 1;
958 req->reply_len = 3;
959 req->reply[0] = CUDA_PACKET;
960 req->reply[1] = 0;
961 req->reply[2] = CUDA_GET_TIME;
962 ret = pmu_queue_request(req);
963 break;
964 case CUDA_SET_TIME:
965 if (req->nbytes != 6)
966 break;
967 req->data[0] = PMU_SET_RTC;
968 req->nbytes = 5;
969 for (i = 1; i <= 4; ++i)
970 req->data[i] = req->data[i+1];
971 req->reply_len = 3;
972 req->reply[0] = CUDA_PACKET;
973 req->reply[1] = 0;
974 req->reply[2] = CUDA_SET_TIME;
975 ret = pmu_queue_request(req);
976 break;
977 }
978 break;
979 case ADB_PACKET:
980 if (!pmu_has_adb)
981 return -ENXIO;
982 for (i = req->nbytes - 1; i > 1; --i)
983 req->data[i+2] = req->data[i];
984 req->data[3] = req->nbytes - 2;
985 req->data[2] = pmu_adb_flags;
986 /*req->data[1] = req->data[1];*/
987 req->data[0] = PMU_ADB_CMD;
988 req->nbytes += 2;
989 req->reply_expected = 1;
990 req->reply_len = 0;
991 ret = pmu_queue_request(req);
992 break;
993 }
994 if (ret) {
995 req->complete = 1;
996 return ret;
997 }
998
999 if (sync)
1000 while (!req->complete)
1001 pmu_poll();
1002
1003 return 0;
1004}
1005
1006/* Enable/disable autopolling */
aacaf9bd 1007static int
1da177e4
LT
1008pmu_adb_autopoll(int devs)
1009{
1010 struct adb_request req;
1011
1012 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1013 return -ENXIO;
1014
1015 if (devs) {
1016 adb_dev_map = devs;
1017 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1018 adb_dev_map >> 8, adb_dev_map);
1019 pmu_adb_flags = 2;
1020 } else {
1021 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1022 pmu_adb_flags = 0;
1023 }
1024 while (!req.complete)
1025 pmu_poll();
1026 return 0;
1027}
1028
1029/* Reset the ADB bus */
aacaf9bd 1030static int
1da177e4
LT
1031pmu_adb_reset_bus(void)
1032{
1033 struct adb_request req;
1034 int save_autopoll = adb_dev_map;
1035
1036 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1037 return -ENXIO;
1038
1039 /* anyone got a better idea?? */
1040 pmu_adb_autopoll(0);
1041
1042 req.nbytes = 5;
1043 req.done = NULL;
1044 req.data[0] = PMU_ADB_CMD;
1045 req.data[1] = 0;
1046 req.data[2] = ADB_BUSRESET;
1047 req.data[3] = 0;
1048 req.data[4] = 0;
1049 req.reply_len = 0;
1050 req.reply_expected = 1;
1051 if (pmu_queue_request(&req) != 0) {
1052 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1053 return -EIO;
1054 }
1055 pmu_wait_complete(&req);
1056
1057 if (save_autopoll != 0)
1058 pmu_adb_autopoll(save_autopoll);
1059
1060 return 0;
1061}
1062#endif /* CONFIG_ADB */
1063
1064/* Construct and send a pmu request */
aacaf9bd 1065int
1da177e4
LT
1066pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1067 int nbytes, ...)
1068{
1069 va_list list;
1070 int i;
1071
1072 if (vias == NULL)
1073 return -ENXIO;
1074
1075 if (nbytes < 0 || nbytes > 32) {
1076 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1077 req->complete = 1;
1078 return -EINVAL;
1079 }
1080 req->nbytes = nbytes;
1081 req->done = done;
1082 va_start(list, nbytes);
1083 for (i = 0; i < nbytes; ++i)
1084 req->data[i] = va_arg(list, int);
1085 va_end(list);
1086 req->reply_len = 0;
1087 req->reply_expected = 0;
1088 return pmu_queue_request(req);
1089}
1090
aacaf9bd 1091int
1da177e4
LT
1092pmu_queue_request(struct adb_request *req)
1093{
1094 unsigned long flags;
1095 int nsend;
1096
1097 if (via == NULL) {
1098 req->complete = 1;
1099 return -ENXIO;
1100 }
1101 if (req->nbytes <= 0) {
1102 req->complete = 1;
1103 return 0;
1104 }
1105 nsend = pmu_data_len[req->data[0]][0];
1106 if (nsend >= 0 && req->nbytes != nsend + 1) {
1107 req->complete = 1;
1108 return -EINVAL;
1109 }
1110
1111 req->next = NULL;
1112 req->sent = 0;
1113 req->complete = 0;
1114
1115 spin_lock_irqsave(&pmu_lock, flags);
1116 if (current_req != 0) {
1117 last_req->next = req;
1118 last_req = req;
1119 } else {
1120 current_req = req;
1121 last_req = req;
1122 if (pmu_state == idle)
1123 pmu_start();
1124 }
1125 spin_unlock_irqrestore(&pmu_lock, flags);
1126
1127 return 0;
1128}
1129
1130static inline void
1131wait_for_ack(void)
1132{
1133 /* Sightly increased the delay, I had one occurrence of the message
1134 * reported
1135 */
1136 int timeout = 4000;
1137 while ((in_8(&via[B]) & TACK) == 0) {
1138 if (--timeout < 0) {
1139 printk(KERN_ERR "PMU not responding (!ack)\n");
1140 return;
1141 }
1142 udelay(10);
1143 }
1144}
1145
1146/* New PMU seems to be very sensitive to those timings, so we make sure
1147 * PCI is flushed immediately */
1148static inline void
1149send_byte(int x)
1150{
1151 volatile unsigned char __iomem *v = via;
1152
1153 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1154 out_8(&v[SR], x);
1155 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1156 (void)in_8(&v[B]);
1157}
1158
1159static inline void
1160recv_byte(void)
1161{
1162 volatile unsigned char __iomem *v = via;
1163
1164 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1165 in_8(&v[SR]); /* resets SR */
1166 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1167 (void)in_8(&v[B]);
1168}
1169
1170static inline void
1171pmu_done(struct adb_request *req)
1172{
1173 void (*done)(struct adb_request *) = req->done;
1174 mb();
1175 req->complete = 1;
1176 /* Here, we assume that if the request has a done member, the
1177 * struct request will survive to setting req->complete to 1
1178 */
1179 if (done)
1180 (*done)(req);
1181}
1182
aacaf9bd 1183static void
1da177e4
LT
1184pmu_start(void)
1185{
1186 struct adb_request *req;
1187
1188 /* assert pmu_state == idle */
1189 /* get the packet to send */
1190 req = current_req;
1191 if (req == 0 || pmu_state != idle
1192 || (/*req->reply_expected && */req_awaiting_reply))
1193 return;
1194
1195 pmu_state = sending;
1196 data_index = 1;
1197 data_len = pmu_data_len[req->data[0]][0];
1198
1199 /* Sounds safer to make sure ACK is high before writing. This helped
1200 * kill a problem with ADB and some iBooks
1201 */
1202 wait_for_ack();
1203 /* set the shift register to shift out and send a byte */
1204 send_byte(req->data[0]);
1205}
1206
aacaf9bd 1207void
1da177e4
LT
1208pmu_poll(void)
1209{
1210 if (!via)
1211 return;
1212 if (disable_poll)
1213 return;
7d12e780 1214 via_pmu_interrupt(0, NULL);
1da177e4
LT
1215}
1216
aacaf9bd 1217void
1da177e4
LT
1218pmu_poll_adb(void)
1219{
1220 if (!via)
1221 return;
1222 if (disable_poll)
1223 return;
1224 /* Kicks ADB read when PMU is suspended */
1225 adb_int_pending = 1;
1226 do {
7d12e780 1227 via_pmu_interrupt(0, NULL);
1da177e4
LT
1228 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1229 || req_awaiting_reply));
1230}
1231
aacaf9bd 1232void
1da177e4
LT
1233pmu_wait_complete(struct adb_request *req)
1234{
1235 if (!via)
1236 return;
1237 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1238 via_pmu_interrupt(0, NULL);
1da177e4
LT
1239}
1240
1241/* This function loops until the PMU is idle and prevents it from
1242 * anwsering to ADB interrupts. pmu_request can still be called.
1243 * This is done to avoid spurrious shutdowns when we know we'll have
1244 * interrupts switched off for a long time
1245 */
aacaf9bd 1246void
1da177e4
LT
1247pmu_suspend(void)
1248{
1249 unsigned long flags;
1b0e9d44 1250
1da177e4
LT
1251 if (!via)
1252 return;
1253
1254 spin_lock_irqsave(&pmu_lock, flags);
1255 pmu_suspended++;
1256 if (pmu_suspended > 1) {
1257 spin_unlock_irqrestore(&pmu_lock, flags);
1258 return;
1259 }
1260
1261 do {
1262 spin_unlock_irqrestore(&pmu_lock, flags);
1263 if (req_awaiting_reply)
1264 adb_int_pending = 1;
7d12e780 1265 via_pmu_interrupt(0, NULL);
1da177e4
LT
1266 spin_lock_irqsave(&pmu_lock, flags);
1267 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT
1268 if (gpio_irq >= 0)
1269 disable_irq_nosync(gpio_irq);
1270 out_8(&via[IER], CB1_INT | IER_CLR);
1271 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT
1272 break;
1273 }
1274 } while (1);
1275}
1276
aacaf9bd 1277void
1da177e4
LT
1278pmu_resume(void)
1279{
1280 unsigned long flags;
1281
1282 if (!via || (pmu_suspended < 1))
1283 return;
1284
1285 spin_lock_irqsave(&pmu_lock, flags);
1286 pmu_suspended--;
1287 if (pmu_suspended > 0) {
1288 spin_unlock_irqrestore(&pmu_lock, flags);
1289 return;
1290 }
1291 adb_int_pending = 1;
1da177e4
LT
1292 if (gpio_irq >= 0)
1293 enable_irq(gpio_irq);
1294 out_8(&via[IER], CB1_INT | IER_SET);
1295 spin_unlock_irqrestore(&pmu_lock, flags);
1296 pmu_poll();
1da177e4
LT
1297}
1298
1299/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1300static void
7d12e780 1301pmu_handle_data(unsigned char *data, int len)
1da177e4
LT
1302{
1303 unsigned char ints, pirq;
1304 int i = 0;
1305
1306 asleep = 0;
1307 if (drop_interrupts || len < 1) {
1308 adb_int_pending = 0;
1309 pmu_irq_stats[8]++;
1310 return;
1311 }
1312
1313 /* Get PMU interrupt mask */
1314 ints = data[0];
1315
1316 /* Record zero interrupts for stats */
1317 if (ints == 0)
1318 pmu_irq_stats[9]++;
1319
1320 /* Hack to deal with ADB autopoll flag */
1321 if (ints & PMU_INT_ADB)
1322 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1323
1324next:
1325
1326 if (ints == 0) {
1327 if (i > pmu_irq_stats[10])
1328 pmu_irq_stats[10] = i;
1329 return;
1330 }
1331
1332 for (pirq = 0; pirq < 8; pirq++)
1333 if (ints & (1 << pirq))
1334 break;
1335 pmu_irq_stats[pirq]++;
1336 i++;
1337 ints &= ~(1 << pirq);
1338
1339 /* Note: for some reason, we get an interrupt with len=1,
1340 * data[0]==0 after each normal ADB interrupt, at least
1341 * on the Pismo. Still investigating... --BenH
1342 */
1343 if ((1 << pirq) & PMU_INT_ADB) {
1344 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1345 struct adb_request *req = req_awaiting_reply;
1346 if (req == 0) {
1347 printk(KERN_ERR "PMU: extra ADB reply\n");
1348 return;
1349 }
1350 req_awaiting_reply = NULL;
1351 if (len <= 2)
1352 req->reply_len = 0;
1353 else {
1354 memcpy(req->reply, data + 1, len - 1);
1355 req->reply_len = len - 1;
1356 }
1357 pmu_done(req);
1358 } else {
1da177e4
LT
1359 if (len == 4 && data[1] == 0x2c) {
1360 extern int xmon_wants_key, xmon_adb_keycode;
1361 if (xmon_wants_key) {
1362 xmon_adb_keycode = data[2];
1363 return;
1364 }
1365 }
1da177e4
LT
1366#ifdef CONFIG_ADB
1367 /*
1368 * XXX On the [23]400 the PMU gives us an up
1369 * event for keycodes 0x74 or 0x75 when the PC
1370 * card eject buttons are released, so we
1371 * ignore those events.
1372 */
1373 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1374 && data[1] == 0x2c && data[3] == 0xff
1375 && (data[2] & ~1) == 0xf4))
7d12e780 1376 adb_input(data+1, len-1, 1);
1da177e4
LT
1377#endif /* CONFIG_ADB */
1378 }
1379 }
1380 /* Sound/brightness button pressed */
1381 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1382#ifdef CONFIG_PMAC_BACKLIGHT
1383 if (len == 3)
4b755999
MH
1384 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1385#endif
1da177e4
LT
1386 }
1387 /* Tick interrupt */
1388 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT
1389 /* Environement or tick interrupt, query batteries */
1390 if (pmu_battery_count) {
1391 if ((--query_batt_timer) == 0) {
1392 query_battery_state();
1393 query_batt_timer = BATTERY_POLLING_COUNT;
1394 }
1395 }
1396 }
1397 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1398 if (pmu_battery_count)
1399 query_battery_state();
1400 pmu_pass_intr(data, len);
9e8e30a0
JB
1401 /* len == 6 is probably a bad check. But how do I
1402 * know what PMU versions send what events here? */
1403 if (len == 6) {
1404 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1405 via_pmu_event(PMU_EVT_LID, data[1]&1);
1406 }
1da177e4
LT
1407 } else {
1408 pmu_pass_intr(data, len);
1da177e4
LT
1409 }
1410 goto next;
1411}
1412
aacaf9bd 1413static struct adb_request*
7d12e780 1414pmu_sr_intr(void)
1da177e4
LT
1415{
1416 struct adb_request *req;
1417 int bite = 0;
1418
1419 if (via[B] & TREQ) {
1420 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1421 out_8(&via[IFR], SR_INT);
1422 return NULL;
1423 }
1424 /* The ack may not yet be low when we get the interrupt */
1425 while ((in_8(&via[B]) & TACK) != 0)
1426 ;
1427
1428 /* if reading grab the byte, and reset the interrupt */
1429 if (pmu_state == reading || pmu_state == reading_intr)
1430 bite = in_8(&via[SR]);
1431
1432 /* reset TREQ and wait for TACK to go high */
1433 out_8(&via[B], in_8(&via[B]) | TREQ);
1434 wait_for_ack();
1435
1436 switch (pmu_state) {
1437 case sending:
1438 req = current_req;
1439 if (data_len < 0) {
1440 data_len = req->nbytes - 1;
1441 send_byte(data_len);
1442 break;
1443 }
1444 if (data_index <= data_len) {
1445 send_byte(req->data[data_index++]);
1446 break;
1447 }
1448 req->sent = 1;
1449 data_len = pmu_data_len[req->data[0]][1];
1450 if (data_len == 0) {
1451 pmu_state = idle;
1452 current_req = req->next;
1453 if (req->reply_expected)
1454 req_awaiting_reply = req;
1455 else
1456 return req;
1457 } else {
1458 pmu_state = reading;
1459 data_index = 0;
1460 reply_ptr = req->reply + req->reply_len;
1461 recv_byte();
1462 }
1463 break;
1464
1465 case intack:
1466 data_index = 0;
1467 data_len = -1;
1468 pmu_state = reading_intr;
1469 reply_ptr = interrupt_data[int_data_last];
1470 recv_byte();
1471 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1472 enable_irq(gpio_irq);
1473 gpio_irq_enabled = 1;
1474 }
1475 break;
1476
1477 case reading:
1478 case reading_intr:
1479 if (data_len == -1) {
1480 data_len = bite;
1481 if (bite > 32)
1482 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1483 } else if (data_index < 32) {
1484 reply_ptr[data_index++] = bite;
1485 }
1486 if (data_index < data_len) {
1487 recv_byte();
1488 break;
1489 }
1490
1491 if (pmu_state == reading_intr) {
1492 pmu_state = idle;
1493 int_data_state[int_data_last] = int_data_ready;
1494 interrupt_data_len[int_data_last] = data_len;
1495 } else {
1496 req = current_req;
1497 /*
1498 * For PMU sleep and freq change requests, we lock the
c03983ac 1499 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT
1500 * spurrious event polling getting in
1501 */
1502 current_req = req->next;
1503 req->reply_len += data_index;
1504 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1505 pmu_state = locked;
1506 else
1507 pmu_state = idle;
1508 return req;
1509 }
1510 break;
1511
1512 default:
1513 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1514 pmu_state);
1515 }
1516 return NULL;
1517}
1518
aacaf9bd 1519static irqreturn_t
7d12e780 1520via_pmu_interrupt(int irq, void *arg)
1da177e4
LT
1521{
1522 unsigned long flags;
1523 int intr;
1524 int nloop = 0;
1525 int int_data = -1;
1526 struct adb_request *req = NULL;
1527 int handled = 0;
1528
1529 /* This is a bit brutal, we can probably do better */
1530 spin_lock_irqsave(&pmu_lock, flags);
1531 ++disable_poll;
1532
1533 for (;;) {
1534 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1535 if (intr == 0)
1536 break;
1537 handled = 1;
1538 if (++nloop > 1000) {
1539 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1540 "intr=%x, ier=%x pmu_state=%d\n",
1541 intr, in_8(&via[IER]), pmu_state);
1542 break;
1543 }
1544 out_8(&via[IFR], intr);
1545 if (intr & CB1_INT) {
1546 adb_int_pending = 1;
1547 pmu_irq_stats[0]++;
1548 }
1549 if (intr & SR_INT) {
7d12e780 1550 req = pmu_sr_intr();
1da177e4
LT
1551 if (req)
1552 break;
1553 }
1554 }
1555
1556recheck:
1557 if (pmu_state == idle) {
1558 if (adb_int_pending) {
1559 if (int_data_state[0] == int_data_empty)
1560 int_data_last = 0;
1561 else if (int_data_state[1] == int_data_empty)
1562 int_data_last = 1;
1563 else
1564 goto no_free_slot;
1565 pmu_state = intack;
1566 int_data_state[int_data_last] = int_data_fill;
1567 /* Sounds safer to make sure ACK is high before writing.
1568 * This helped kill a problem with ADB and some iBooks
1569 */
1570 wait_for_ack();
1571 send_byte(PMU_INT_ACK);
1572 adb_int_pending = 0;
1573 } else if (current_req)
1574 pmu_start();
1575 }
1576no_free_slot:
1577 /* Mark the oldest buffer for flushing */
1578 if (int_data_state[!int_data_last] == int_data_ready) {
1579 int_data_state[!int_data_last] = int_data_flush;
1580 int_data = !int_data_last;
1581 } else if (int_data_state[int_data_last] == int_data_ready) {
1582 int_data_state[int_data_last] = int_data_flush;
1583 int_data = int_data_last;
1584 }
1585 --disable_poll;
1586 spin_unlock_irqrestore(&pmu_lock, flags);
1587
1588 /* Deal with completed PMU requests outside of the lock */
1589 if (req) {
1590 pmu_done(req);
1591 req = NULL;
1592 }
1593
1594 /* Deal with interrupt datas outside of the lock */
1595 if (int_data >= 0) {
7d12e780 1596 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT
1597 spin_lock_irqsave(&pmu_lock, flags);
1598 ++disable_poll;
1599 int_data_state[int_data] = int_data_empty;
1600 int_data = -1;
1601 goto recheck;
1602 }
1603
1604 return IRQ_RETVAL(handled);
1605}
1606
aacaf9bd 1607void
1da177e4
LT
1608pmu_unlock(void)
1609{
1610 unsigned long flags;
1611
1612 spin_lock_irqsave(&pmu_lock, flags);
1613 if (pmu_state == locked)
1614 pmu_state = idle;
1615 adb_int_pending = 1;
1616 spin_unlock_irqrestore(&pmu_lock, flags);
1617}
1618
1619
aacaf9bd 1620static irqreturn_t
7d12e780 1621gpio1_interrupt(int irq, void *arg)
1da177e4
LT
1622{
1623 unsigned long flags;
1624
1625 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1626 spin_lock_irqsave(&pmu_lock, flags);
1627 if (gpio_irq_enabled > 0) {
1628 disable_irq_nosync(gpio_irq);
1629 gpio_irq_enabled = 0;
1630 }
1631 pmu_irq_stats[1]++;
1632 adb_int_pending = 1;
1633 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1634 via_pmu_interrupt(0, NULL);
1da177e4
LT
1635 return IRQ_HANDLED;
1636 }
1637 return IRQ_NONE;
1638}
1639
aacaf9bd 1640void
1da177e4
LT
1641pmu_enable_irled(int on)
1642{
1643 struct adb_request req;
1644
1645 if (vias == NULL)
1646 return ;
1647 if (pmu_kind == PMU_KEYLARGO_BASED)
1648 return ;
1649
1650 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1651 (on ? PMU_POW_ON : PMU_POW_OFF));
1652 pmu_wait_complete(&req);
1653}
1654
aacaf9bd 1655void
1da177e4
LT
1656pmu_restart(void)
1657{
1658 struct adb_request req;
1659
1660 if (via == NULL)
1661 return;
1662
1663 local_irq_disable();
1664
1665 drop_interrupts = 1;
1666
1667 if (pmu_kind != PMU_KEYLARGO_BASED) {
1668 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1669 PMU_INT_TICK );
1670 while(!req.complete)
1671 pmu_poll();
1672 }
1673
1674 pmu_request(&req, NULL, 1, PMU_RESET);
1675 pmu_wait_complete(&req);
1676 for (;;)
1677 ;
1678}
1679
aacaf9bd 1680void
1da177e4
LT
1681pmu_shutdown(void)
1682{
1683 struct adb_request req;
1684
1685 if (via == NULL)
1686 return;
1687
1688 local_irq_disable();
1689
1690 drop_interrupts = 1;
1691
1692 if (pmu_kind != PMU_KEYLARGO_BASED) {
1693 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1694 PMU_INT_TICK );
1695 pmu_wait_complete(&req);
1696 } else {
1697 /* Disable server mode on shutdown or we'll just
1698 * wake up again
1699 */
1700 pmu_set_server_mode(0);
1701 }
1702
1703 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1704 'M', 'A', 'T', 'T');
1705 pmu_wait_complete(&req);
1706 for (;;)
1707 ;
1708}
1709
1710int
1711pmu_present(void)
1712{
1713 return via != 0;
1714}
1715
f91266ed 1716#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
1717/*
1718 * Put the powerbook to sleep.
1719 */
1720
aacaf9bd 1721static u32 save_via[8];
1da177e4 1722
aacaf9bd 1723static void
1da177e4
LT
1724save_via_state(void)
1725{
1726 save_via[0] = in_8(&via[ANH]);
1727 save_via[1] = in_8(&via[DIRA]);
1728 save_via[2] = in_8(&via[B]);
1729 save_via[3] = in_8(&via[DIRB]);
1730 save_via[4] = in_8(&via[PCR]);
1731 save_via[5] = in_8(&via[ACR]);
1732 save_via[6] = in_8(&via[T1CL]);
1733 save_via[7] = in_8(&via[T1CH]);
1734}
aacaf9bd 1735static void
1da177e4
LT
1736restore_via_state(void)
1737{
1738 out_8(&via[ANH], save_via[0]);
1739 out_8(&via[DIRA], save_via[1]);
1740 out_8(&via[B], save_via[2]);
1741 out_8(&via[DIRB], save_via[3]);
1742 out_8(&via[PCR], save_via[4]);
1743 out_8(&via[ACR], save_via[5]);
1744 out_8(&via[T1CL], save_via[6]);
1745 out_8(&via[T1CH], save_via[7]);
1746 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1747 out_8(&via[IFR], 0x7f); /* clear IFR */
1748 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1749}
1750
1da177e4
LT
1751#define GRACKLE_PM (1<<7)
1752#define GRACKLE_DOZE (1<<5)
1753#define GRACKLE_NAP (1<<4)
1754#define GRACKLE_SLEEP (1<<3)
1755
3bea6313 1756static int powerbook_sleep_grackle(void)
1da177e4
LT
1757{
1758 unsigned long save_l2cr;
1759 unsigned short pmcr1;
1760 struct adb_request req;
1da177e4
LT
1761 struct pci_dev *grackle;
1762
c78f8305 1763 grackle = pci_get_bus_and_slot(0, 0);
1da177e4
LT
1764 if (!grackle)
1765 return -ENODEV;
1766
1da177e4
LT
1767 /* Turn off various things. Darwin does some retry tests here... */
1768 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1769 pmu_wait_complete(&req);
1770 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1771 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1772 pmu_wait_complete(&req);
1773
1774 /* For 750, save backside cache setting and disable it */
1775 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1776
1777 if (!__fake_sleep) {
1778 /* Ask the PMU to put us to sleep */
1779 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1780 pmu_wait_complete(&req);
1781 }
1782
1783 /* The VIA is supposed not to be restored correctly*/
1784 save_via_state();
1785 /* We shut down some HW */
1786 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1787
1788 pci_read_config_word(grackle, 0x70, &pmcr1);
1789 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1790 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1791 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1792 pci_write_config_word(grackle, 0x70, pmcr1);
1793
1794 /* Call low-level ASM sleep handler */
1795 if (__fake_sleep)
1796 mdelay(5000);
1797 else
1798 low_sleep_handler();
1799
1800 /* We're awake again, stop grackle PM */
1801 pci_read_config_word(grackle, 0x70, &pmcr1);
1802 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1803 pci_write_config_word(grackle, 0x70, pmcr1);
1804
c78f8305
AC
1805 pci_dev_put(grackle);
1806
1da177e4
LT
1807 /* Make sure the PMU is idle */
1808 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1809 restore_via_state();
1810
1811 /* Restore L2 cache */
1812 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1813 _set_L2CR(save_l2cr);
1814
1815 /* Restore userland MMU context */
6218a761 1816 set_context(current->active_mm->context.id, current->active_mm->pgd);
1da177e4
LT
1817
1818 /* Power things up */
1819 pmu_unlock();
1820 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1821 pmu_wait_complete(&req);
1822 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1823 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1824 pmu_wait_complete(&req);
1825 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1826 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1827 pmu_wait_complete(&req);
1828
1da177e4
LT
1829 return 0;
1830}
1831
aacaf9bd 1832static int
1da177e4
LT
1833powerbook_sleep_Core99(void)
1834{
1835 unsigned long save_l2cr;
1836 unsigned long save_l3cr;
1837 struct adb_request req;
1da177e4
LT
1838
1839 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1840 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1841 return -ENOSYS;
1842 }
1843
1844 if (num_online_cpus() > 1 || cpu_is_offline(0))
1845 return -EAGAIN;
1846
b16eeb47
BH
1847 /* Stop environment and ADB interrupts */
1848 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1849 pmu_wait_complete(&req);
1da177e4
LT
1850
1851 /* Tell PMU what events will wake us up */
1852 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1853 0xff, 0xff);
1854 pmu_wait_complete(&req);
1855 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1856 0, PMU_PWR_WAKEUP_KEY |
1857 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1858 pmu_wait_complete(&req);
1859
1860 /* Save the state of the L2 and L3 caches */
1861 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1862 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1863
1864 if (!__fake_sleep) {
1865 /* Ask the PMU to put us to sleep */
1866 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1867 pmu_wait_complete(&req);
1868 }
1869
1870 /* The VIA is supposed not to be restored correctly*/
1871 save_via_state();
1872
1873 /* Shut down various ASICs. There's a chance that we can no longer
1874 * talk to the PMU after this, so I moved it to _after_ sending the
1875 * sleep command to it. Still need to be checked.
1876 */
1877 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1878
1879 /* Call low-level ASM sleep handler */
1880 if (__fake_sleep)
1881 mdelay(5000);
1882 else
1883 low_sleep_handler();
1884
1885 /* Restore Apple core ASICs state */
1886 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1887
1888 /* Restore VIA */
1889 restore_via_state();
1890
0086b5ec
BH
1891 /* tweak LPJ before cpufreq is there */
1892 loops_per_jiffy *= 2;
1893
1da177e4
LT
1894 /* Restore video */
1895 pmac_call_early_video_resume();
1896
1897 /* Restore L2 cache */
1898 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1899 _set_L2CR(save_l2cr);
1900 /* Restore L3 cache */
1901 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1902 _set_L3CR(save_l3cr);
1903
1904 /* Restore userland MMU context */
6218a761 1905 set_context(current->active_mm->context.id, current->active_mm->pgd);
1da177e4
LT
1906
1907 /* Tell PMU we are ready */
1908 pmu_unlock();
1909 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1910 pmu_wait_complete(&req);
1911 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1912 pmu_wait_complete(&req);
1913
0086b5ec
BH
1914 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1915 loops_per_jiffy /= 2;
1916
1da177e4
LT
1917 return 0;
1918}
1919
1920#define PB3400_MEM_CTRL 0xf8000000
1921#define PB3400_MEM_CTRL_SLEEP 0x70
1922
887ef35a
PM
1923static void __iomem *pb3400_mem_ctrl;
1924
1925static void powerbook_sleep_init_3400(void)
1926{
1927 /* map in the memory controller registers */
1928 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1929 if (pb3400_mem_ctrl == NULL)
1930 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1931}
1932
1933static int powerbook_sleep_3400(void)
1da177e4 1934{
f91266ed 1935 int i, x;
1da177e4 1936 unsigned int hid0;
887ef35a 1937 unsigned long msr;
1da177e4 1938 struct adb_request sleep_req;
1da177e4
LT
1939 unsigned int __iomem *mem_ctrl_sleep;
1940
887ef35a 1941 if (pb3400_mem_ctrl == NULL)
1da177e4 1942 return -ENOMEM;
887ef35a 1943 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1944
1da177e4
LT
1945 /* Set the memory controller to keep the memory refreshed
1946 while we're asleep */
1947 for (i = 0x403f; i >= 0x4000; --i) {
1948 out_be32(mem_ctrl_sleep, i);
1949 do {
1950 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1951 } while (x == 0);
1952 if (x >= 0x100)
1953 break;
1954 }
1955
1956 /* Ask the PMU to put us to sleep */
1957 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM
1958 pmu_wait_complete(&sleep_req);
1959 pmu_unlock();
1da177e4 1960
887ef35a 1961 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 1962
1da177e4
LT
1963 asleep = 1;
1964
1965 /* Put the CPU into sleep mode */
21fe3301 1966 hid0 = mfspr(SPRN_HID0);
1da177e4 1967 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 1968 mtspr(SPRN_HID0, hid0);
887ef35a
PM
1969 local_irq_enable();
1970 msr = mfmsr() | MSR_POW;
1971 while (asleep) {
1972 mb();
1973 mtmsr(msr);
1974 isync();
1975 }
1976 local_irq_disable();
1da177e4
LT
1977
1978 /* OK, we're awake again, start restoring things */
1979 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 1980 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 1981
1da177e4
LT
1982 return 0;
1983}
1984
f91266ed 1985#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 1986
1da177e4
LT
1987/*
1988 * Support for /dev/pmu device
1989 */
1990#define RB_SIZE 0x10
1991struct pmu_private {
1992 struct list_head list;
1993 int rb_get;
1994 int rb_put;
1995 struct rb_entry {
1996 unsigned short len;
1997 unsigned char data[16];
1998 } rb_buf[RB_SIZE];
1999 wait_queue_head_t wait;
2000 spinlock_t lock;
2001#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2002 int backlight_locker;
4b755999 2003#endif
1da177e4
LT
2004};
2005
2006static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2007static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2008
aacaf9bd 2009static void
1da177e4
LT
2010pmu_pass_intr(unsigned char *data, int len)
2011{
2012 struct pmu_private *pp;
2013 struct list_head *list;
2014 int i;
2015 unsigned long flags;
2016
2017 if (len > sizeof(pp->rb_buf[0].data))
2018 len = sizeof(pp->rb_buf[0].data);
2019 spin_lock_irqsave(&all_pvt_lock, flags);
2020 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2021 pp = list_entry(list, struct pmu_private, list);
2022 spin_lock(&pp->lock);
2023 i = pp->rb_put + 1;
2024 if (i >= RB_SIZE)
2025 i = 0;
2026 if (i != pp->rb_get) {
2027 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2028 rp->len = len;
2029 memcpy(rp->data, data, len);
2030 pp->rb_put = i;
2031 wake_up_interruptible(&pp->wait);
2032 }
2033 spin_unlock(&pp->lock);
2034 }
2035 spin_unlock_irqrestore(&all_pvt_lock, flags);
2036}
2037
aacaf9bd 2038static int
1da177e4
LT
2039pmu_open(struct inode *inode, struct file *file)
2040{
2041 struct pmu_private *pp;
2042 unsigned long flags;
2043
2044 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2045 if (pp == 0)
2046 return -ENOMEM;
2047 pp->rb_get = pp->rb_put = 0;
2048 spin_lock_init(&pp->lock);
2049 init_waitqueue_head(&pp->wait);
2050 spin_lock_irqsave(&all_pvt_lock, flags);
2051#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2052 pp->backlight_locker = 0;
4b755999 2053#endif
1da177e4
LT
2054 list_add(&pp->list, &all_pmu_pvt);
2055 spin_unlock_irqrestore(&all_pvt_lock, flags);
2056 file->private_data = pp;
2057 return 0;
2058}
2059
aacaf9bd 2060static ssize_t
1da177e4
LT
2061pmu_read(struct file *file, char __user *buf,
2062 size_t count, loff_t *ppos)
2063{
2064 struct pmu_private *pp = file->private_data;
2065 DECLARE_WAITQUEUE(wait, current);
2066 unsigned long flags;
2067 int ret = 0;
2068
2069 if (count < 1 || pp == 0)
2070 return -EINVAL;
2071 if (!access_ok(VERIFY_WRITE, buf, count))
2072 return -EFAULT;
2073
2074 spin_lock_irqsave(&pp->lock, flags);
2075 add_wait_queue(&pp->wait, &wait);
2076 current->state = TASK_INTERRUPTIBLE;
2077
2078 for (;;) {
2079 ret = -EAGAIN;
2080 if (pp->rb_get != pp->rb_put) {
2081 int i = pp->rb_get;
2082 struct rb_entry *rp = &pp->rb_buf[i];
2083 ret = rp->len;
2084 spin_unlock_irqrestore(&pp->lock, flags);
2085 if (ret > count)
2086 ret = count;
2087 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2088 ret = -EFAULT;
2089 if (++i >= RB_SIZE)
2090 i = 0;
2091 spin_lock_irqsave(&pp->lock, flags);
2092 pp->rb_get = i;
2093 }
2094 if (ret >= 0)
2095 break;
2096 if (file->f_flags & O_NONBLOCK)
2097 break;
2098 ret = -ERESTARTSYS;
2099 if (signal_pending(current))
2100 break;
2101 spin_unlock_irqrestore(&pp->lock, flags);
2102 schedule();
2103 spin_lock_irqsave(&pp->lock, flags);
2104 }
2105 current->state = TASK_RUNNING;
2106 remove_wait_queue(&pp->wait, &wait);
2107 spin_unlock_irqrestore(&pp->lock, flags);
2108
2109 return ret;
2110}
2111
aacaf9bd 2112static ssize_t
1da177e4
LT
2113pmu_write(struct file *file, const char __user *buf,
2114 size_t count, loff_t *ppos)
2115{
2116 return 0;
2117}
2118
aacaf9bd 2119static unsigned int
1da177e4
LT
2120pmu_fpoll(struct file *filp, poll_table *wait)
2121{
2122 struct pmu_private *pp = filp->private_data;
2123 unsigned int mask = 0;
2124 unsigned long flags;
2125
2126 if (pp == 0)
2127 return 0;
2128 poll_wait(filp, &pp->wait, wait);
2129 spin_lock_irqsave(&pp->lock, flags);
2130 if (pp->rb_get != pp->rb_put)
2131 mask |= POLLIN;
2132 spin_unlock_irqrestore(&pp->lock, flags);
2133 return mask;
2134}
2135
aacaf9bd 2136static int
1da177e4
LT
2137pmu_release(struct inode *inode, struct file *file)
2138{
2139 struct pmu_private *pp = file->private_data;
2140 unsigned long flags;
2141
1da177e4
LT
2142 if (pp != 0) {
2143 file->private_data = NULL;
2144 spin_lock_irqsave(&all_pvt_lock, flags);
2145 list_del(&pp->list);
2146 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2147
1da177e4 2148#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH
2149 if (pp->backlight_locker)
2150 pmac_backlight_enable();
2151#endif
2152
1da177e4
LT
2153 kfree(pp);
2154 }
1da177e4
LT
2155 return 0;
2156}
2157
f91266ed 2158#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2159static void pmac_suspend_disable_irqs(void)
f91266ed 2160{
f91266ed
JB
2161 /* Call platform functions marked "on sleep" */
2162 pmac_pfunc_i2c_suspend();
2163 pmac_pfunc_base_suspend();
f91266ed
JB
2164}
2165
2166static int powerbook_sleep(suspend_state_t state)
2167{
2168 int error = 0;
2169
2170 /* Wait for completion of async requests */
2171 while (!batt_req.complete)
2172 pmu_poll();
2173
2174 /* Giveup the lazy FPU & vec so we don't have to back them
2175 * up from the low level code
2176 */
2177 enable_kernel_fp();
2178
2179#ifdef CONFIG_ALTIVEC
2180 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2181 enable_kernel_altivec();
2182#endif /* CONFIG_ALTIVEC */
2183
2184 switch (pmu_kind) {
2185 case PMU_OHARE_BASED:
2186 error = powerbook_sleep_3400();
2187 break;
2188 case PMU_HEATHROW_BASED:
2189 case PMU_PADDINGTON_BASED:
2190 error = powerbook_sleep_grackle();
2191 break;
2192 case PMU_KEYLARGO_BASED:
2193 error = powerbook_sleep_Core99();
2194 break;
2195 default:
2196 return -ENOSYS;
2197 }
2198
2199 if (error)
2200 return error;
2201
2202 mdelay(100);
2203
f91266ed
JB
2204 return 0;
2205}
2206
7ac5dde9 2207static void pmac_suspend_enable_irqs(void)
f91266ed
JB
2208{
2209 /* Force a poll of ADB interrupts */
2210 adb_int_pending = 1;
2211 via_pmu_interrupt(0, NULL);
2212
f91266ed 2213 mdelay(10);
f91266ed
JB
2214
2215 /* Call platform functions marked "on wake" */
2216 pmac_pfunc_base_resume();
2217 pmac_pfunc_i2c_resume();
2218}
2219
2220static int pmu_sleep_valid(suspend_state_t state)
2221{
2222 return state == PM_SUSPEND_MEM
2223 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2224}
2225
2226static struct platform_suspend_ops pmu_pm_ops = {
2227 .enter = powerbook_sleep,
2228 .valid = pmu_sleep_valid,
2229};
2230
2231static int register_pmu_pm_ops(void)
2232{
7ac5dde9
SW
2233 if (pmu_kind == PMU_OHARE_BASED)
2234 powerbook_sleep_init_3400();
2235 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2236 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB
2237 suspend_set_ops(&pmu_pm_ops);
2238
2239 return 0;
2240}
2241
2242device_initcall(register_pmu_pm_ops);
2243#endif
2244
aacaf9bd 2245static int
1da177e4
LT
2246pmu_ioctl(struct inode * inode, struct file *filp,
2247 u_int cmd, u_long arg)
2248{
1da177e4 2249 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2250 int error = -EINVAL;
1da177e4
LT
2251
2252 switch (cmd) {
2253 case PMU_IOC_SLEEP:
2254 if (!capable(CAP_SYS_ADMIN))
2255 return -EACCES;
f91266ed 2256 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2257 case PMU_IOC_CAN_SLEEP:
f91266ed 2258 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT
2259 return put_user(0, argp);
2260 else
2261 return put_user(1, argp);
2262
5474c120
MH
2263#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2264 /* Compatibility ioctl's for backlight */
1da177e4 2265 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH
2266 {
2267 int brightness;
2268
5474c120
MH
2269 brightness = pmac_backlight_get_legacy_brightness();
2270 if (brightness < 0)
2271 return brightness;
2272 else
2273 return put_user(brightness, argp);
2274
2275 }
1da177e4
LT
2276 case PMU_IOC_SET_BACKLIGHT:
2277 {
5474c120
MH
2278 int brightness;
2279
5474c120
MH
2280 error = get_user(brightness, argp);
2281 if (error)
2282 return error;
2283
2284 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT
2285 }
2286#ifdef CONFIG_INPUT_ADBHID
2287 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2288 struct pmu_private *pp = filp->private_data;
8c870933 2289
1da177e4
LT
2290 if (pp->backlight_locker)
2291 return 0;
4b755999 2292
1da177e4 2293 pp->backlight_locker = 1;
4b755999
MH
2294 pmac_backlight_disable();
2295
1da177e4
LT
2296 return 0;
2297 }
2298#endif /* CONFIG_INPUT_ADBHID */
5474c120 2299#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2300
1da177e4
LT
2301 case PMU_IOC_GET_MODEL:
2302 return put_user(pmu_kind, argp);
2303 case PMU_IOC_HAS_ADB:
2304 return put_user(pmu_has_adb, argp);
2305 }
8c870933 2306 return error;
1da177e4
LT
2307}
2308
fa027c2a 2309static const struct file_operations pmu_device_fops = {
1da177e4
LT
2310 .read = pmu_read,
2311 .write = pmu_write,
2312 .poll = pmu_fpoll,
2313 .ioctl = pmu_ioctl,
2314 .open = pmu_open,
2315 .release = pmu_release,
2316};
2317
aacaf9bd 2318static struct miscdevice pmu_device = {
1da177e4
LT
2319 PMU_MINOR, "pmu", &pmu_device_fops
2320};
2321
8c870933 2322static int pmu_device_init(void)
1da177e4
LT
2323{
2324 if (!via)
8c870933 2325 return 0;
1da177e4
LT
2326 if (misc_register(&pmu_device) < 0)
2327 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2328 return 0;
1da177e4 2329}
8c870933
BH
2330device_initcall(pmu_device_init);
2331
1da177e4
LT
2332
2333#ifdef DEBUG_SLEEP
aacaf9bd 2334static inline void
1da177e4
LT
2335polled_handshake(volatile unsigned char __iomem *via)
2336{
2337 via[B] &= ~TREQ; eieio();
2338 while ((via[B] & TACK) != 0)
2339 ;
2340 via[B] |= TREQ; eieio();
2341 while ((via[B] & TACK) == 0)
2342 ;
2343}
2344
aacaf9bd 2345static inline void
1da177e4
LT
2346polled_send_byte(volatile unsigned char __iomem *via, int x)
2347{
2348 via[ACR] |= SR_OUT | SR_EXT; eieio();
2349 via[SR] = x; eieio();
2350 polled_handshake(via);
2351}
2352
aacaf9bd 2353static inline int
1da177e4
LT
2354polled_recv_byte(volatile unsigned char __iomem *via)
2355{
2356 int x;
2357
2358 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2359 x = via[SR]; eieio();
2360 polled_handshake(via);
2361 x = via[SR]; eieio();
2362 return x;
2363}
2364
aacaf9bd 2365int
1da177e4
LT
2366pmu_polled_request(struct adb_request *req)
2367{
2368 unsigned long flags;
2369 int i, l, c;
2370 volatile unsigned char __iomem *v = via;
2371
2372 req->complete = 1;
2373 c = req->data[0];
2374 l = pmu_data_len[c][0];
2375 if (l >= 0 && req->nbytes != l + 1)
2376 return -EINVAL;
2377
2378 local_irq_save(flags);
2379 while (pmu_state != idle)
2380 pmu_poll();
2381
2382 while ((via[B] & TACK) == 0)
2383 ;
2384 polled_send_byte(v, c);
2385 if (l < 0) {
2386 l = req->nbytes - 1;
2387 polled_send_byte(v, l);
2388 }
2389 for (i = 1; i <= l; ++i)
2390 polled_send_byte(v, req->data[i]);
2391
2392 l = pmu_data_len[c][1];
2393 if (l < 0)
2394 l = polled_recv_byte(v);
2395 for (i = 0; i < l; ++i)
2396 req->reply[i + req->reply_len] = polled_recv_byte(v);
2397
2398 if (req->done)
2399 (*req->done)(req);
2400
2401 local_irq_restore(flags);
2402 return 0;
2403}
1da177e4 2404
f91266ed
JB
2405/* N.B. This doesn't work on the 3400 */
2406void pmu_blink(int n)
2407{
2408 struct adb_request req;
1da177e4 2409
f91266ed 2410 memset(&req, 0, sizeof(req));
1da177e4 2411
f91266ed
JB
2412 for (; n > 0; --n) {
2413 req.nbytes = 4;
2414 req.done = NULL;
2415 req.data[0] = 0xee;
2416 req.data[1] = 4;
2417 req.data[2] = 0;
2418 req.data[3] = 1;
2419 req.reply[0] = ADB_RET_OK;
2420 req.reply_len = 1;
2421 req.reply_expected = 0;
2422 pmu_polled_request(&req);
2423 mdelay(50);
2424 req.nbytes = 4;
2425 req.done = NULL;
2426 req.data[0] = 0xee;
2427 req.data[1] = 4;
2428 req.data[2] = 0;
2429 req.data[3] = 0;
2430 req.reply[0] = ADB_RET_OK;
2431 req.reply_len = 1;
2432 req.reply_expected = 0;
2433 pmu_polled_request(&req);
2434 mdelay(50);
2435 }
2436 mdelay(50);
2437}
2438#endif /* DEBUG_SLEEP */
1da177e4 2439
f91266ed 2440#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2441int pmu_sys_suspended;
1da177e4 2442
3bfffd97 2443static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
1da177e4 2444{
ca078bae 2445 if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
1da177e4
LT
2446 return 0;
2447
0094f2cd 2448 /* Suspend PMU event interrupts */\
1da177e4 2449 pmu_suspend();
1da177e4 2450 pmu_sys_suspended = 1;
0094f2cd
BH
2451
2452#ifdef CONFIG_PMAC_BACKLIGHT
2453 /* Tell backlight code not to muck around with the chip anymore */
2454 pmu_backlight_set_sleep(1);
2455#endif
2456
1da177e4
LT
2457 return 0;
2458}
2459
2460static int pmu_sys_resume(struct sys_device *sysdev)
2461{
2462 struct adb_request req;
2463
2464 if (!pmu_sys_suspended)
2465 return 0;
2466
2467 /* Tell PMU we are ready */
2468 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2469 pmu_wait_complete(&req);
2470
0094f2cd
BH
2471#ifdef CONFIG_PMAC_BACKLIGHT
2472 /* Tell backlight code it can use the chip again */
2473 pmu_backlight_set_sleep(0);
2474#endif
1da177e4
LT
2475 /* Resume PMU event interrupts */
2476 pmu_resume();
1da177e4
LT
2477 pmu_sys_suspended = 0;
2478
2479 return 0;
2480}
2481
f91266ed 2482#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2483
2484static struct sysdev_class pmu_sysclass = {
af5ca3f4 2485 .name = "pmu",
1da177e4
LT
2486};
2487
2488static struct sys_device device_pmu = {
1da177e4
LT
2489 .cls = &pmu_sysclass,
2490};
2491
2492static struct sysdev_driver driver_pmu = {
f91266ed 2493#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
2494 .suspend = &pmu_sys_suspend,
2495 .resume = &pmu_sys_resume,
f91266ed 2496#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT
2497};
2498
2499static int __init init_pmu_sysfs(void)
2500{
2501 int rc;
2502
2503 rc = sysdev_class_register(&pmu_sysclass);
2504 if (rc) {
2505 printk(KERN_ERR "Failed registering PMU sys class\n");
2506 return -ENODEV;
2507 }
2508 rc = sysdev_register(&device_pmu);
2509 if (rc) {
2510 printk(KERN_ERR "Failed registering PMU sys device\n");
2511 return -ENODEV;
2512 }
2513 rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
2514 if (rc) {
2515 printk(KERN_ERR "Failed registering PMU sys driver\n");
2516 return -ENODEV;
2517 }
2518 return 0;
2519}
2520
2521subsys_initcall(init_pmu_sysfs);
2522
2523EXPORT_SYMBOL(pmu_request);
730745a5 2524EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT
2525EXPORT_SYMBOL(pmu_poll);
2526EXPORT_SYMBOL(pmu_poll_adb);
2527EXPORT_SYMBOL(pmu_wait_complete);
2528EXPORT_SYMBOL(pmu_suspend);
2529EXPORT_SYMBOL(pmu_resume);
2530EXPORT_SYMBOL(pmu_unlock);
f91266ed 2531#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT
2532EXPORT_SYMBOL(pmu_enable_irled);
2533EXPORT_SYMBOL(pmu_battery_count);
2534EXPORT_SYMBOL(pmu_batteries);
2535EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2536#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2537
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