Commit | Line | Data |
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30058677 RH |
1 | menuconfig MAILBOX |
2 | bool "Mailbox Hardware Support" | |
3 | help | |
4 | Mailbox is a framework to control hardware communication between | |
5 | on-chip processors through queued messages and interrupt driven | |
6 | signals. Say Y if your platform supports hardware mailboxes. | |
7 | ||
8 | if MAILBOX | |
ee23d66a JB |
9 | |
10 | config ARM_MHU | |
11 | tristate "ARM MHU Mailbox" | |
12 | depends on ARM_AMBA | |
13 | help | |
14 | Say Y here if you want to build the ARM MHU controller driver. | |
15 | The controller has 3 mailbox channels, the last of which can be | |
16 | used in Secure mode only. | |
17 | ||
30058677 RH |
18 | config PL320_MBOX |
19 | bool "ARM PL320 Mailbox" | |
20 | depends on ARM_AMBA | |
21 | help | |
22 | An implementation of the ARM PL320 Interprocessor Communication | |
23 | Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to | |
24 | send short messages between Highbank's A9 cores and the EnergyCore | |
25 | Management Engine, primarily for cpufreq. Say Y here if you want | |
26 | to use the PL320 IPCM support. | |
27 | ||
c869c75c SA |
28 | config OMAP2PLUS_MBOX |
29 | tristate "OMAP2+ Mailbox framework support" | |
30 | depends on ARCH_OMAP2PLUS | |
c869c75c SA |
31 | help |
32 | Mailbox implementation for OMAP family chips with hardware for | |
33 | interprocessor communication involving DSP, IVA1.0 and IVA2 in | |
34 | OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you | |
35 | want to use OMAP2+ Mailbox framework support. | |
36 | ||
37 | config OMAP_MBOX_KFIFO_SIZE | |
38 | int "Mailbox kfifo default buffer size (bytes)" | |
79859094 | 39 | depends on OMAP2PLUS_MBOX |
c869c75c SA |
40 | default 256 |
41 | help | |
42 | Specify the default size of mailbox's kfifo buffers (bytes). | |
43 | This can also be changed at runtime (via the mbox_kfifo_size | |
44 | module parameter). | |
86c22f8c AC |
45 | |
46 | config PCC | |
47 | bool "Platform Communication Channel Driver" | |
48 | depends on ACPI | |
b6fc6072 | 49 | default n |
86c22f8c AC |
50 | help |
51 | ACPI 5.0+ spec defines a generic mode of communication | |
52 | between the OS and a platform such as the BMC. This medium | |
53 | (PCC) is typically used by CPPC (ACPI CPU Performance management), | |
54 | RAS (ACPI reliability protocol) and MPST (ACPI Memory power | |
55 | states). Select this driver if your platform implements the | |
56 | PCC clients mentioned above. | |
57 | ||
f62092f6 LFT |
58 | config ALTERA_MBOX |
59 | tristate "Altera Mailbox" | |
59dd3f02 | 60 | depends on HAS_IOMEM |
f62092f6 LFT |
61 | help |
62 | An implementation of the Altera Mailbox soft core. It is used | |
63 | to send message between processors. Say Y here if you want to use the | |
64 | Altera mailbox support. | |
0bae6af6 LR |
65 | |
66 | config BCM2835_MBOX | |
67 | tristate "BCM2835 Mailbox" | |
68 | depends on ARCH_BCM2835 | |
69 | help | |
70 | An implementation of the BCM2385 Mailbox. It is used to invoke | |
71 | the services of the Videocore. Say Y here if you want to use the | |
72 | BCM2835 Mailbox. | |
73 | ||
9ef4546c LJ |
74 | config STI_MBOX |
75 | tristate "STI Mailbox framework support" | |
76 | depends on ARCH_STI && OF | |
77 | help | |
78 | Mailbox implementation for STMicroelectonics family chips with | |
79 | hardware for interprocessor communication. | |
80 | ||
8ea4484d LJ |
81 | config MAILBOX_TEST |
82 | tristate "Mailbox Test Client" | |
83 | depends on OF | |
65d3b04a | 84 | depends on HAS_IOMEM |
8ea4484d LJ |
85 | help |
86 | Test client to help with testing new Controller driver | |
87 | implementations. | |
88 | ||
30058677 | 89 | endif |