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[media] ddbridge: Initial check-in
[deliverable/linux.git] / drivers / media / dvb / ddbridge / ddbridge-core.c
CommitLineData
ccad0457
RM		 1/*
2 * ddbridge.c: Digital Devices PCIe bridge driver
3 *
4 * Copyright (C) 2010-2011 Digital Devices GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.
9 *
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301, USA
21 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
22 */
23
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <linux/delay.h>
28#include <linux/slab.h>
29#include <linux/poll.h>
30#include <asm/io.h>
31#include <linux/pci.h>
32#include <linux/pci_ids.h>
33#include <linux/timer.h>
34#include <linux/version.h>
35#include <linux/i2c.h>
36#include <linux/swab.h>
37#include <linux/vmalloc.h>
38#include "ddbridge.h"
39
40#include "ddbridge-regs.h"
41
42#include "tda18271c2dd.h"
43#include "stv6110x.h"
44#include "stv090x.h"
45#include "lnbh24.h"
46#include "drxk.h"
47
48DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
49
50/* MSI had problems with lost interrupts, fixed but needs testing */
51#undef CONFIG_PCI_MSI
52
53/******************************************************************************/
54
55static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val)
56{
57 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
58 .buf = val, .len = 1 }};
59 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
60}
61
62static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val)
63{
64 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
65 .buf = &reg, .len = 1 },
66 {.addr = adr, .flags = I2C_M_RD,
67 .buf = val, .len = 1 }};
68 return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
69}
70
71static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr,
72 u16 reg, u8 *val)
73{
74 u8 msg[2] = {reg>>8, reg&0xff};
75 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
76 .buf = msg, .len = 2},
77 {.addr = adr, .flags = I2C_M_RD,
78 .buf = val, .len = 1}};
79 return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
80}
81
82static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
83{
84 struct ddb *dev = i2c->dev;
85 int stat;
86 u32 val;
87
88 i2c->done = 0;
89 ddbwritel((adr << 9) | cmd, i2c->regs + I2C_COMMAND);
90 stat = wait_event_timeout(i2c->wq, i2c->done == 1, HZ);
91 if (stat <= 0) {
92 printk("I2C timeout\n");
93 { /* MSI debugging*/
94 u32 istat = ddbreadl(INTERRUPT_STATUS);
95 printk("IRS %08x\n", istat);
96 ddbwritel(istat, INTERRUPT_ACK);
97 }
98 return -EIO;
99 }
100 val=ddbreadl(i2c->regs+I2C_COMMAND);
101 if (val & 0x70000)
102 return -EIO;
103 return 0;
104}
105
106static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
107 struct i2c_msg msg[], int num)
108{
109 struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
110 struct ddb *dev = i2c->dev;
111 u8 addr=0;
112
113 if (num)
114 addr = msg[0].addr;
115
116 if (num == 2 && msg[1].flags & I2C_M_RD &&
117 !(msg[0].flags & I2C_M_RD)) {
118 memcpy_toio(dev->regs + I2C_TASKMEM_BASE + i2c->wbuf,
119 msg[0].buf,msg[0].len);
120 ddbwritel(msg[0].len|(msg[1].len << 16),
121 i2c->regs+I2C_TASKLENGTH);
122 if (!ddb_i2c_cmd(i2c, addr, 1)) {
123 memcpy_fromio(msg[1].buf,
124 dev->regs + I2C_TASKMEM_BASE + i2c->rbuf,
125 msg[1].len);
126 return num;
127 }
128 }
129
130 if (num == 1 && !(msg[0].flags & I2C_M_RD)) {
131 ddbcpyto(I2C_TASKMEM_BASE + i2c->wbuf,msg[0].buf, msg[0].len);
132 ddbwritel(msg[0].len, i2c->regs + I2C_TASKLENGTH);
133 if (!ddb_i2c_cmd(i2c, addr, 2))
134 return num;
135 }
136 if (num == 1 && (msg[0].flags & I2C_M_RD)) {
137 ddbwritel(msg[0].len << 16, i2c->regs + I2C_TASKLENGTH);
138 if (!ddb_i2c_cmd(i2c, addr, 3)) {
139 ddbcpyfrom(msg[0].buf,
140 I2C_TASKMEM_BASE + i2c->rbuf, msg[0].len);
141 return num;
142 }
143 }
144 return -EIO;
145}
146
147
148static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
149{
150 return I2C_FUNC_SMBUS_EMUL;
151}
152
153struct i2c_algorithm ddb_i2c_algo = {
154 .master_xfer = ddb_i2c_master_xfer,
155 .functionality = ddb_i2c_functionality,
156};
157
158static void ddb_i2c_release(struct ddb *dev)
159{
160 int i;
161 struct ddb_i2c *i2c;
162 struct i2c_adapter *adap;
163
164 for (i = 0; i < dev->info->port_num; i++) {
165 i2c = &dev->i2c[i];
166 adap = &i2c->adap;
167 i2c_del_adapter(adap);
168 }
169}
170
171static int ddb_i2c_init(struct ddb *dev)
172{
173 int i, j, stat = 0;
174 struct ddb_i2c *i2c;
175 struct i2c_adapter *adap;
176
177 for (i = 0; i < dev->info->port_num; i++) {
178 i2c = &dev->i2c[i];
179 i2c->dev = dev;
180 i2c->nr = i;
181 i2c->wbuf = i * (I2C_TASKMEM_SIZE / 4);
182 i2c->rbuf = i2c->wbuf + (I2C_TASKMEM_SIZE / 8);
183 i2c->regs = 0x80 + i * 0x20;
184 ddbwritel(I2C_SPEED_100, i2c->regs + I2C_TIMING);
185 ddbwritel((i2c->rbuf << 16) | i2c->wbuf,
186 i2c->regs + I2C_TASKADDRESS);
187 init_waitqueue_head(&i2c->wq);
188
189 adap = &i2c->adap;
190 i2c_set_adapdata(adap, i2c);
191#ifdef I2C_ADAP_CLASS_TV_DIGITAL
192 adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
193#else
194#ifdef I2C_CLASS_TV_ANALOG
195 adap->class = I2C_CLASS_TV_ANALOG;
196#endif
197#endif
198 strcpy(adap->name, "ddbridge");
199 adap->algo = &ddb_i2c_algo;
200 adap->algo_data = (void *)i2c;
201 adap->dev.parent = &dev->pdev->dev;
202 stat = i2c_add_adapter(adap);
203 if (stat)
204 break;
205 }
206 if (stat)
207 for (j = 0; j < i; j++) {
208 i2c = &dev->i2c[j];
209 adap = &i2c->adap;
210 i2c_del_adapter(adap);
211 }
212 return stat;
213}
214
215
216/******************************************************************************/
217/******************************************************************************/
218/******************************************************************************/
219
220static void set_table(struct ddb *dev, u32 off,
221 dma_addr_t *pbuf, u32 num)
222{
223 u32 i, base;
224 u64 mem;
225
226 base = DMA_BASE_ADDRESS_TABLE + off;
227 for (i = 0; i < num; i++) {
228 mem = pbuf[i];
229 ddbwritel(mem & 0xffffffff, base + i * 8);
230 ddbwritel(mem >> 32, base + i * 8 + 4);
231 }
232}
233
234static void ddb_address_table(struct ddb *dev)
235{
236 u32 i, j, base;
237 u64 mem;
238 dma_addr_t *pbuf;
239
240 for (i = 0; i < dev->info->port_num * 2; i++) {
241 base = DMA_BASE_ADDRESS_TABLE + i * 0x100;
242 pbuf = dev->input[i].pbuf;
243 for (j = 0; j < dev->input[i].dma_buf_num; j++) {
244 mem = pbuf[j];
245 ddbwritel(mem & 0xffffffff, base + j * 8);
246 ddbwritel(mem >> 32, base + j * 8 + 4);
247 }
248 }
249 for (i = 0; i < dev->info->port_num; i++) {
250 base = DMA_BASE_ADDRESS_TABLE + 0x800 + i * 0x100;
251 pbuf = dev->output[i].pbuf;
252 for (j = 0; j < dev->output[i].dma_buf_num; j++) {
253 mem = pbuf[j];
254 ddbwritel(mem & 0xffffffff, base + j * 8);
255 ddbwritel(mem >> 32, base + j * 8 + 4);
256 }
257 }
258}
259
260static void io_free(struct pci_dev *pdev, u8 **vbuf,
261 dma_addr_t *pbuf, u32 size, int num)
262{
263 int i;
264
265 for (i = 0; i < num; i++) {
266 if (vbuf[i]) {
267 pci_free_consistent(pdev, size, vbuf[i], pbuf[i]);
268 vbuf[i] = 0;
269 }
270 }
271}
272
273static int io_alloc(struct pci_dev *pdev, u8 **vbuf,
274 dma_addr_t *pbuf, u32 size, int num)
275{
276 int i;
277
278 for (i = 0; i < num; i++) {
279 vbuf[i] = pci_alloc_consistent(pdev, size, &pbuf[i]);
280 if (!vbuf[i])
281 return -ENOMEM;
282 }
283 return 0;
284}
285
286static int ddb_buffers_alloc(struct ddb *dev)
287{
288 int i;
289 struct ddb_port *port;
290
291 for (i = 0; i < dev->info->port_num; i++) {
292 port = &dev->port[i];
293 switch (port->class) {
294 case DDB_PORT_TUNER:
295 if (io_alloc(dev->pdev, port->input[0]->vbuf,
296 port->input[0]->pbuf,
297 port->input[0]->dma_buf_size,
298 port->input[0]->dma_buf_num) < 0)
299 return -1;
300 if (io_alloc(dev->pdev, port->input[1]->vbuf,
301 port->input[1]->pbuf,
302 port->input[1]->dma_buf_size,
303 port->input[1]->dma_buf_num) < 0)
304 return -1;
305 break;
306 case DDB_PORT_CI:
307 if (io_alloc(dev->pdev, port->input[0]->vbuf,
308 port->input[0]->pbuf,
309 port->input[0]->dma_buf_size,
310 port->input[0]->dma_buf_num) < 0)
311 return -1;
312 if (io_alloc(dev->pdev, port->output->vbuf,
313 port->output->pbuf,
314 port->output->dma_buf_size,
315 port->output->dma_buf_num) < 0)
316 return -1;
317 break;
318 default:
319 break;
320 }
321 }
322 ddb_address_table(dev);
323 return 0;
324}
325
326static void ddb_buffers_free(struct ddb *dev)
327{
328 int i;
329 struct ddb_port *port;
330
331 for (i = 0; i < dev->info->port_num; i++) {
332 port = &dev->port[i];
333 io_free(dev->pdev, port->input[0]->vbuf,
334 port->input[0]->pbuf,
335 port->input[0]->dma_buf_size,
336 port->input[0]->dma_buf_num);
337 io_free(dev->pdev, port->input[1]->vbuf,
338 port->input[1]->pbuf,
339 port->input[1]->dma_buf_size,
340 port->input[1]->dma_buf_num);
341 io_free(dev->pdev, port->output->vbuf,
342 port->output->pbuf,
343 port->output->dma_buf_size,
344 port->output->dma_buf_num);
345 }
346}
347
348static void ddb_input_start(struct ddb_input *input)
349{
350 struct ddb *dev = input->port->dev;
351
352 spin_lock_irq(&input->lock);
353 input->cbuf = 0;
354 input->coff = 0;
355
356 /* reset */
357 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
358 ddbwritel(2, TS_INPUT_CONTROL(input->nr));
359 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
360
361 ddbwritel((1 << 16) |
362 (input->dma_buf_num << 11) |
363 (input->dma_buf_size >> 7),
364 DMA_BUFFER_SIZE(input->nr));
365 ddbwritel(0, DMA_BUFFER_ACK(input->nr));
366
367 ddbwritel(1, DMA_BASE_WRITE);
368 ddbwritel(3, DMA_BUFFER_CONTROL(input->nr));
369 ddbwritel(9, TS_INPUT_CONTROL(input->nr));
370 input->running = 1;
371 spin_unlock_irq(&input->lock);
372}
373
374static void ddb_input_stop(struct ddb_input *input)
375{
376 struct ddb *dev = input->port->dev;
377
378 spin_lock_irq(&input->lock);
379 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
380 ddbwritel(0, DMA_BUFFER_CONTROL(input->nr));
381 input->running = 0;
382 spin_unlock_irq(&input->lock);
383}
384
385static void ddb_output_start(struct ddb_output *output)
386{
387 struct ddb *dev = output->port->dev;
388
389 spin_lock_irq(&output->lock);
390 output->cbuf = 0;
391 output->coff = 0;
392 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
393 ddbwritel(2, TS_OUTPUT_CONTROL(output->nr));
394 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
395 ddbwritel(0x3c, TS_OUTPUT_CONTROL(output->nr));
396 ddbwritel((1 << 16) |
397 (output->dma_buf_num << 11) |
398 (output->dma_buf_size >> 7),
399 DMA_BUFFER_SIZE(output->nr + 8));
400 ddbwritel(0, DMA_BUFFER_ACK(output->nr + 8));
401
402 ddbwritel(1, DMA_BASE_READ);
403 ddbwritel(3, DMA_BUFFER_CONTROL(output->nr + 8));
404 //ddbwritel(0xbd, TS_OUTPUT_CONTROL(output->nr));
405 ddbwritel(0x1d, TS_OUTPUT_CONTROL(output->nr));
406 output->running = 1;
407 spin_unlock_irq(&output->lock);
408}
409
410static void ddb_output_stop(struct ddb_output *output)
411{
412 struct ddb *dev = output->port->dev;
413
414 spin_lock_irq(&output->lock);
415 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
416 ddbwritel(0, DMA_BUFFER_CONTROL(output->nr + 8));
417 output->running = 0;
418 spin_unlock_irq(&output->lock);
419}
420
421static u32 ddb_output_free(struct ddb_output *output)
422{
423 u32 idx, off, stat = output->stat;
424 s32 diff;
425
426 idx = (stat >> 11) & 0x1f;
427 off = (stat & 0x7ff) << 7;
428
429 if (output->cbuf != idx) {
430 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
431 (output->dma_buf_size - output->coff <= 188))
432 return 0;
433 return 188;
434 }
435 diff = off - output->coff;
436 if (diff <= 0 || diff > 188)
437 return 188;
438 return 0;
439}
440
441static ssize_t ddb_output_write(struct ddb_output* output,
442 const u8 *buf, size_t count)
443{
444 struct ddb *dev = output->port->dev;
445 u32 idx, off, stat = output->stat;
446 u32 left = count, len;
447
448 idx = (stat >> 11) & 0x1f;
449 off = (stat & 0x7ff) << 7;
450
451 while (left) {
452 len = output->dma_buf_size - output->coff;
453 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
454 (off == 0)) {
455 if (len<=188)
456 break;
457 len-=188;
458 }
459 if (output->cbuf == idx) {
460 if (off > output->coff) {
461#if 1
462 len = off - output->coff;
463 len -= (len % 188);
464 if (len <= 188)
465
466#endif
467 break;
468 len -= 188;
469 }
470 }
471 if (len > left)
472 len = left;
473 if (copy_from_user(output->vbuf[output->cbuf] + output->coff,
474 buf, len))
475 return -EIO;
476 left -= len;
477 buf += len;
478 output->coff += len;
479 if (output->coff == output->dma_buf_size) {
480 output->coff = 0;
481 output->cbuf = ((output->cbuf + 1) % output->dma_buf_num);
482 }
483 ddbwritel((output->cbuf << 11) | (output->coff >> 7),
484 DMA_BUFFER_ACK(output->nr + 8));
485 }
486 return count - left;
487}
488
489static u32 ddb_input_avail(struct ddb_input *input)
490{
491 struct ddb *dev = input->port->dev;
492 u32 idx, off, stat = input->stat;
493 u32 ctrl = ddbreadl(DMA_BUFFER_CONTROL(input->nr));
494
495 idx = (stat >> 11) & 0x1f;
496 off = (stat & 0x7ff) << 7;
497
498 if (ctrl & 4) {
499 printk("IA %d %d %08x\n", idx, off, ctrl);
500 ddbwritel(input->stat, DMA_BUFFER_ACK(input->nr));
501 return 0;
502 }
503 if (input->cbuf != idx)
504 return 188;
505 return 0;
506}
507
508static size_t ddb_input_read(struct ddb_input *input, u8 *buf, size_t count)
509{
510 struct ddb *dev = input->port->dev;
511 u32 left = count;
512 u32 idx, off, free, stat = input->stat;
513 int ret;
514
515 idx = (stat >> 11) & 0x1f;
516 off = (stat & 0x7ff) << 7;
517
518 while (left) {
519 if (input->cbuf == idx)
520 return count - left;
521 free = input->dma_buf_size - input->coff;
522 if (free > left)
523 free = left;
524 ret = copy_to_user(buf, input->vbuf[input->cbuf] +
525 input->coff, free);
526 input->coff += free;
527 if (input->coff == input->dma_buf_size) {
528 input->coff = 0;
529 input->cbuf = (input->cbuf+1) % input->dma_buf_num;
530 }
531 left -= free;
532 ddbwritel((input->cbuf << 11) | (input->coff >> 7),
533 DMA_BUFFER_ACK(input->nr));
534 }
535 return count;
536}
537
538/******************************************************************************/
539/******************************************************************************/
540/******************************************************************************/
541
542#if 0
543static struct ddb_input *fe2input(struct ddb *dev, struct dvb_frontend *fe)
544{
545 int i;
546
547 for (i = 0; i < dev->info->port_num * 2; i++) {
548 if (dev->input[i].fe==fe)
549 return &dev->input[i];
550 }
551 return NULL;
552}
553#endif
554
555static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
556{
557 struct ddb_input *input = fe->sec_priv;
558 struct ddb_port *port = input->port;
559 int status;
560
561 if (enable) {
562 mutex_lock(&port->i2c_gate_lock);
563 status = input->gate_ctrl(fe, 1);
564 } else {
565 status = input->gate_ctrl(fe, 0);
566 mutex_unlock(&port->i2c_gate_lock);
567 }
568 return status;
569}
570
571static int demod_attach_drxk(struct ddb_input *input)
572{
573 struct i2c_adapter *i2c = &input->port->i2c->adap;
574 struct dvb_frontend *fe;
575
576 fe=input->fe = dvb_attach(drxk_attach,
577 i2c, 0x29 + (input->nr&1),
578 &input->fe2);
579 if (!input->fe) {
580 printk("No DRXK found!\n");
581 return -ENODEV;
582 }
583 fe->sec_priv = input;
584 input->gate_ctrl = fe->ops.i2c_gate_ctrl;
585 fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
586 return 0;
587}
588
589static int tuner_attach_tda18271(struct ddb_input *input)
590{
591 struct i2c_adapter *i2c = &input->port->i2c->adap;
592 struct dvb_frontend *fe;
593
594 if (input->fe->ops.i2c_gate_ctrl)
595 input->fe->ops.i2c_gate_ctrl(input->fe, 1);
596 fe = dvb_attach(tda18271c2dd_attach, input->fe, i2c, 0x60);
597 if (!fe) {
598 printk("No TDA18271 found!\n");
599 return -ENODEV;
600 }
601 if (input->fe->ops.i2c_gate_ctrl)
602 input->fe->ops.i2c_gate_ctrl(input->fe, 0);
603 return 0;
604}
605
606/******************************************************************************/
607/******************************************************************************/
608/******************************************************************************/
609
610static struct stv090x_config stv0900 = {
611 .device = STV0900,
612 .demod_mode = STV090x_DUAL,
613 .clk_mode = STV090x_CLK_EXT,
614
615 .xtal = 27000000,
616 .address = 0x69,
617
618 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
619 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
620
621 .repeater_level = STV090x_RPTLEVEL_16,
622
623 .adc1_range = STV090x_ADC_1Vpp,
624 .adc2_range = STV090x_ADC_1Vpp,
625
626 .diseqc_envelope_mode = true,
627};
628
629static struct stv090x_config stv0900_aa = {
630 .device = STV0900,
631 .demod_mode = STV090x_DUAL,
632 .clk_mode = STV090x_CLK_EXT,
633
634 .xtal = 27000000,
635 .address = 0x68,
636
637 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
638 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
639
640 .repeater_level = STV090x_RPTLEVEL_16,
641
642 .adc1_range = STV090x_ADC_1Vpp,
643 .adc2_range = STV090x_ADC_1Vpp,
644
645 .diseqc_envelope_mode = true,
646};
647
648static struct stv6110x_config stv6110a = {
649 .addr = 0x60,
650 .refclk = 27000000,
651 .clk_div = 1,
652};
653
654static struct stv6110x_config stv6110b = {
655 .addr = 0x63,
656 .refclk = 27000000,
657 .clk_div = 1,
658};
659
660static int demod_attach_stv0900(struct ddb_input *input, int type)
661{
662 struct i2c_adapter *i2c = &input->port->i2c->adap;
663 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
664
665 input->fe=dvb_attach(stv090x_attach, feconf, i2c,
666 (input->nr & 1) ? STV090x_DEMODULATOR_1
667 : STV090x_DEMODULATOR_0);
668 if (!input->fe) {
669 printk("No STV0900 found!\n");
670 return -ENODEV;
671 }
672 if (!dvb_attach(lnbh24_attach, input->fe, i2c, 0,
673 0, (input->nr & 1) ?
674 (0x09 - type) : (0x0b - type))) {
675 printk("No LNBH24 found!\n");
676 return -ENODEV;
677 }
678 return 0;
679}
680
681static int tuner_attach_stv6110(struct ddb_input *input, int type)
682{
683 struct i2c_adapter *i2c = &input->port->i2c->adap;
684 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
685 struct stv6110x_config *tunerconf = (input->nr & 1) ?
686 &stv6110b : &stv6110a;
687 struct stv6110x_devctl *ctl;
688
689 ctl = dvb_attach(stv6110x_attach, input->fe, tunerconf, i2c);
690 if (!ctl) {
691 printk("No STV6110X found!\n");
692 return -ENODEV;
693 }
694 printk("attach tuner input %d adr %02x\n", input->nr, tunerconf->addr);
695
696 feconf->tuner_init = ctl->tuner_init;
697 feconf->tuner_sleep = ctl->tuner_sleep;
698 feconf->tuner_set_mode = ctl->tuner_set_mode;
699 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
700 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
701 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
702 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
703 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
704 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
705 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
706 feconf->tuner_get_status = ctl->tuner_get_status;
707
708 return 0;
709}
710
711int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
712 int (*start_feed)(struct dvb_demux_feed *),
713 int (*stop_feed)(struct dvb_demux_feed *),
714 void *priv)
715{
716 dvbdemux->priv = priv;
717
718 dvbdemux->filternum = 256;
719 dvbdemux->feednum = 256;
720 dvbdemux->start_feed = start_feed;
721 dvbdemux->stop_feed = stop_feed;
722 dvbdemux->write_to_decoder = NULL;
723 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
724 DMX_SECTION_FILTERING |
725 DMX_MEMORY_BASED_FILTERING);
726 return dvb_dmx_init(dvbdemux);
727}
728
729int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
730 struct dvb_demux *dvbdemux,
731 struct dmx_frontend *hw_frontend,
732 struct dmx_frontend *mem_frontend,
733 struct dvb_adapter *dvb_adapter)
734{
735 int ret;
736
737 dmxdev->filternum = 256;
738 dmxdev->demux = &dvbdemux->dmx;
739 dmxdev->capabilities = 0;
740 ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
741 if (ret < 0)
742 return ret;
743
744 hw_frontend->source = DMX_FRONTEND_0;
745 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
746 mem_frontend->source = DMX_MEMORY_FE;
747 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
748 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
749}
750
751static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
752{
753 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
754 struct ddb_input *input = dvbdmx->priv;
755
756 if (!input->users)
757 ddb_input_start(input);
758
759 return ++input->users;
760}
761
762static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
763{
764 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
765 struct ddb_input *input = dvbdmx->priv;
766
767 if (--input->users)
768 return input->users;
769
770 ddb_input_stop(input);
771 return 0;
772}
773
774
775static void dvb_input_detach(struct ddb_input *input)
776{
777 struct dvb_adapter *adap = &input->adap;
778 struct dvb_demux *dvbdemux = &input->demux;
779
780 switch (input->attached) {
781 case 5:
782 if (input->fe2)
783 dvb_unregister_frontend(input->fe2);
784 if (input->fe) {
785 dvb_unregister_frontend(input->fe);
786 dvb_frontend_detach(input->fe);
787 input->fe = NULL;
788 }
789 case 4:
790 dvb_net_release(&input->dvbnet);
791
792 case 3:
793 dvbdemux->dmx.close(&dvbdemux->dmx);
794 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
795 &input->hw_frontend);
796 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
797 &input->mem_frontend);
798 dvb_dmxdev_release(&input->dmxdev);
799
800 case 2:
801 dvb_dmx_release(&input->demux);
802
803 case 1:
804 dvb_unregister_adapter(adap);
805 }
806 input->attached = 0;
807}
808
809static int dvb_input_attach(struct ddb_input *input)
810{
811 int ret;
812 struct ddb_port *port = input->port;
813 struct dvb_adapter *adap = &input->adap;
814 struct dvb_demux *dvbdemux = &input->demux;
815
816 ret=dvb_register_adapter(adap, "DDBridge",THIS_MODULE,
817 &input->port->dev->pdev->dev,
818 adapter_nr);
819 if (ret < 0) {
820 printk("ddbridge: Could not register adapter."
821 "Check if you enabled enough adapters in dvb-core!\n");
822 return ret;
823 }
824 input->attached = 1;
825
826 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
827 start_feed,
828 stop_feed, input);
829 if (ret < 0)
830 return ret;
831 input->attached = 2;
832
833 ret = my_dvb_dmxdev_ts_card_init(&input->dmxdev, &input->demux,
834 &input->hw_frontend,
835 &input->mem_frontend, adap);
836 if (ret < 0)
837 return ret;
838 input->attached = 3;
839
840 ret = dvb_net_init(adap, &input->dvbnet, input->dmxdev.demux);
841 if (ret < 0)
842 return ret;
843 input->attached = 4;
844
845 input->fe = 0;
846 switch (port->type) {
847 case DDB_TUNER_DVBS_ST:
848 if (demod_attach_stv0900(input, 0) < 0)
849 return -ENODEV;
850 if (tuner_attach_stv6110(input, 0) < 0)
851 return -ENODEV;
852 if (input->fe) {
853 if (dvb_register_frontend(adap, input->fe) < 0)
854 return -ENODEV;
855 }
856 break;
857 case DDB_TUNER_DVBS_ST_AA:
858 if (demod_attach_stv0900(input, 1) < 0)
859 return -ENODEV;
860 if (tuner_attach_stv6110(input, 1) < 0)
861 return -ENODEV;
862 if (input->fe) {
863 if (dvb_register_frontend(adap, input->fe) < 0)
864 return -ENODEV;
865 }
866 break;
867 case DDB_TUNER_DVBCT_TR:
868 if (demod_attach_drxk(input) < 0)
869 return -ENODEV;
870 if (tuner_attach_tda18271(input) < 0)
871 return -ENODEV;
872 if (input->fe) {
873 if (dvb_register_frontend(adap, input->fe) < 0)
874 return -ENODEV;
875 }
876 if (input->fe2) {
877 if (dvb_register_frontend(adap, input->fe2) < 0)
878 return -ENODEV;
879 input->fe2->tuner_priv=input->fe->tuner_priv;
880 memcpy(&input->fe2->ops.tuner_ops,
881 &input->fe->ops.tuner_ops,
882 sizeof(struct dvb_tuner_ops));
883 }
884 break;
885 }
886 input->attached = 5;
887 return 0;
888}
889
890/****************************************************************************/
891/****************************************************************************/
892
893static ssize_t ts_write(struct file *file, const char *buf,
894 size_t count, loff_t *ppos)
895{
896 struct dvb_device *dvbdev = file->private_data;
897 struct ddb_output *output = dvbdev->priv;
898 size_t left = count;
899 int stat;
900
901 while (left) {
902 if (ddb_output_free(output) < 188) {
903 if (file->f_flags & O_NONBLOCK)
904 break;
905 if (wait_event_interruptible(
906 output->wq, ddb_output_free(output) >= 188) < 0)
907 break;
908 }
909 stat = ddb_output_write(output, buf, left);
910 if (stat < 0)
911 break;
912 buf += stat;
913 left -= stat;
914 }
915 return (left == count) ? -EAGAIN : (count - left);
916}
917
918static ssize_t ts_read(struct file *file, char *buf,
919 size_t count, loff_t *ppos)
920{
921 struct dvb_device *dvbdev = file->private_data;
922 struct ddb_output *output = dvbdev->priv;
923 struct ddb_input *input = output->port->input[0];
924 int left, read;
925
926 count -= count % 188;
927 left = count;
928 while (left) {
929 if (ddb_input_avail(input) < 188) {
930 if (file->f_flags & O_NONBLOCK)
931 break;
932 if (wait_event_interruptible(
933 input->wq, ddb_input_avail(input) >= 188) < 0)
934 break;
935 }
936 read = ddb_input_read(input, buf, left);
937 left -= read;
938 buf += read;
939 }
940 return (left == count) ? -EAGAIN : (count - left);
941}
942
943static unsigned int ts_poll(struct file *file, poll_table *wait)
944{
945 struct dvb_device *dvbdev = file->private_data;
946 struct ddb_output *output = dvbdev->priv;
947 struct ddb_input *input = output->port->input[0];
948 unsigned int mask = 0;
949
950#if 0
951 if (data_avail_to_read)
952 mask |= POLLIN | POLLRDNORM;
953 if (data_avail_to_write)
954 mask |= POLLOUT | POLLWRNORM;
955
956 poll_wait(file, &read_queue, wait);
957 poll_wait(file, &write_queue, wait);
958#endif
959 return mask;
960}
961
962static struct file_operations ci_fops = {
963 .owner = THIS_MODULE,
964 .read = ts_read,
965 .write = ts_write,
966 .open = dvb_generic_open,
967 .release = dvb_generic_release,
968 .poll = ts_poll,
969 .mmap = 0,
970};
971
972static struct dvb_device dvbdev_ci = {
973 .priv = 0,
974 .readers = -1,
975 .writers = -1,
976 .users = -1,
977 .fops = &ci_fops,
978};
979
980/****************************************************************************/
981/****************************************************************************/
982/****************************************************************************/
983
984static void input_tasklet(unsigned long data)
985{
986 struct ddb_input *input = (struct ddb_input *) data;
987 struct ddb *dev = input->port->dev;
988
989 spin_lock(&input->lock);
990 if (!input->running) {
991 spin_unlock(&input->lock);
992 return;
993 }
994 input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
995
996 if (input->port->class == DDB_PORT_TUNER) {
997 if (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))
998 printk("Overflow input %d\n", input->nr);
999 while (input->cbuf != ((input->stat >> 11) & 0x1f)
1000 || (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))) {
1001 dvb_dmx_swfilter_packets(&input->demux,
1002 input->vbuf[input->cbuf],
1003 input->dma_buf_size / 188);
1004
1005 input->cbuf = (input->cbuf + 1) % input->dma_buf_num;
1006 ddbwritel((input->cbuf << 11),
1007 DMA_BUFFER_ACK(input->nr));
1008 input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
1009 }
1010 }
1011 if (input->port->class == DDB_PORT_CI)
1012 wake_up(&input->wq);
1013 spin_unlock(&input->lock);
1014}
1015
1016static void output_tasklet(unsigned long data)
1017{
1018 struct ddb_output *output = (struct ddb_output *) data;
1019 struct ddb *dev = output->port->dev;
1020
1021 spin_lock(&output->lock);
1022 if (!output->running) {
1023 spin_unlock(&output->lock);
1024 return;
1025 }
1026 output->stat = ddbreadl(DMA_BUFFER_CURRENT(output->nr + 8));
1027 wake_up(&output->wq);
1028 spin_unlock(&output->lock);
1029}
1030
1031
1032struct cxd2099_cfg cxd_cfg = {
1033 .bitrate = 62000,
1034 .adr = 0x40,
1035 .polarity = 1,
1036 .clock_mode = 1,
1037};
1038
1039static int ddb_ci_attach(struct ddb_port *port)
1040{
1041 int ret;
1042
1043 ret = dvb_register_adapter(&port->output->adap,
1044 "DDBridge",
1045 THIS_MODULE,
1046 &port->dev->pdev->dev,
1047 adapter_nr);
1048 if (ret < 0)
1049 return ret;
1050 port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
1051 if (!port->en) {
1052 dvb_unregister_adapter(&port->output->adap);
1053 return -ENODEV;
1054 }
1055 ddb_input_start(port->input[0]);
1056 ddb_output_start(port->output);
1057 dvb_ca_en50221_init(&port->output->adap,
1058 port->en, 0, 1);
1059 ret=dvb_register_device(&port->output->adap, &port->output->dev,
1060 &dvbdev_ci, (void *) port->output,
1061 DVB_DEVICE_SEC);
1062 return ret;
1063}
1064
1065static int ddb_port_attach(struct ddb_port *port)
1066{
1067 int ret = 0;
1068
1069 switch (port->class) {
1070 case DDB_PORT_TUNER:
1071 ret = dvb_input_attach(port->input[0]);
1072 if (ret<0)
1073 break;
1074 ret = dvb_input_attach(port->input[1]);
1075 break;
1076 case DDB_PORT_CI:
1077 ret = ddb_ci_attach(port);
1078 break;
1079 default:
1080 break;
1081 }
1082 if (ret < 0)
1083 printk("port_attach on port %d failed\n", port->nr);
1084 return ret;
1085}
1086
1087static int ddb_ports_attach(struct ddb *dev)
1088{
1089 int i, ret = 0;
1090 struct ddb_port *port;
1091
1092 for (i = 0; i < dev->info->port_num; i++) {
1093 port = &dev->port[i];
1094 ret = ddb_port_attach(port);
1095 if (ret < 0)
1096 break;
1097 }
1098 return ret;
1099}
1100
1101static void ddb_ports_detach(struct ddb *dev)
1102{
1103 int i;
1104 struct ddb_port *port;
1105
1106 for (i = 0; i < dev->info->port_num; i++) {
1107 port = &dev->port[i];
1108 switch (port->class) {
1109 case DDB_PORT_TUNER:
1110 dvb_input_detach(port->input[0]);
1111 dvb_input_detach(port->input[1]);
1112 break;
1113 case DDB_PORT_CI:
1114 if (port->output->dev)
1115 dvb_unregister_device(port->output->dev);
1116 if (port->en) {
1117 ddb_input_stop(port->input[0]);
1118 ddb_output_stop(port->output);
1119 dvb_ca_en50221_release(port->en);
1120 kfree(port->en);
1121 port->en = 0;
1122 dvb_unregister_adapter(&port->output->adap);
1123 }
1124 break;
1125 }
1126 }
1127}
1128
1129/****************************************************************************/
1130/****************************************************************************/
1131
1132static int port_has_ci(struct ddb_port *port)
1133{
1134 u8 val;
1135 return (i2c_read_reg(&port->i2c->adap, 0x40, 0, &val) ? 0 : 1);
1136}
1137
1138static int port_has_stv0900(struct ddb_port *port)
1139{
1140 u8 val;
1141 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1142 return 0;
1143 return 1;
1144}
1145
1146static int port_has_stv0900_aa(struct ddb_port *port)
1147{
1148 u8 val;
1149 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, &val) < 0)
1150 return 0;
1151 return 1;
1152}
1153
1154static int port_has_drxks(struct ddb_port *port)
1155{
1156 u8 val;
1157 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1158 return 0;
1159 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1160 return 0;
1161 return 1;
1162}
1163
1164static void ddb_port_probe(struct ddb_port *port)
1165{
1166 struct ddb *dev = port->dev;
1167 char *modname = "NO MODULE";
1168
1169 port->class = DDB_PORT_NONE;
1170
1171 if (port_has_ci(port)) {
1172 modname = "CI";
1173 port->class = DDB_PORT_CI;
1174 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1175 } else if (port_has_stv0900(port)) {
1176 modname = "DUAL DVB-S2";
1177 port->class = DDB_PORT_TUNER;
1178 port->type = DDB_TUNER_DVBS_ST;
1179 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1180 } else if (port_has_stv0900_aa(port)) {
1181 modname = "DUAL DVB-S2";
1182 port->class = DDB_PORT_TUNER;
1183 port->type = DDB_TUNER_DVBS_ST_AA;
1184 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1185 } else if (port_has_drxks(port)) {
1186 modname = "DUAL DVB-C/T";
1187 port->class = DDB_PORT_TUNER;
1188 port->type = DDB_TUNER_DVBCT_TR;
1189 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1190 }
1191 printk("Port %d (TAB %d): %s\n", port->nr, port->nr+1, modname);
1192}
1193
1194static void ddb_input_init(struct ddb_port *port, int nr)
1195{
1196 struct ddb *dev = port->dev;
1197 struct ddb_input *input = &dev->input[nr];
1198
1199 input->nr = nr;
1200 input->port = port;
1201 input->dma_buf_num = INPUT_DMA_BUFS;
1202 input->dma_buf_size = INPUT_DMA_SIZE;
1203 ddbwritel(0, TS_INPUT_CONTROL(nr));
1204 ddbwritel(2, TS_INPUT_CONTROL(nr));
1205 ddbwritel(0, TS_INPUT_CONTROL(nr));
1206 ddbwritel(0, DMA_BUFFER_ACK(nr));
1207 tasklet_init(&input->tasklet, input_tasklet, (unsigned long) input);
1208 spin_lock_init(&input->lock);
1209 init_waitqueue_head(&input->wq);
1210}
1211
1212static void ddb_output_init(struct ddb_port *port, int nr)
1213{
1214 struct ddb *dev = port->dev;
1215 struct ddb_output *output = &dev->output[nr];
1216 output->nr = nr;
1217 output->port = port;
1218 output->dma_buf_num = OUTPUT_DMA_BUFS;
1219 output->dma_buf_size = OUTPUT_DMA_SIZE;
1220
1221 ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1222 ddbwritel(2, TS_OUTPUT_CONTROL(nr));
1223 ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1224 tasklet_init(&output->tasklet, output_tasklet, (unsigned long) output);
1225 init_waitqueue_head(&output->wq);
1226}
1227
1228static void ddb_ports_init(struct ddb *dev)
1229{
1230 int i;
1231 struct ddb_port *port;
1232
1233 for (i = 0; i < dev->info->port_num; i++) {
1234 port = &dev->port[i];
1235 port->dev = dev;
1236 port->nr = i;
1237 port->i2c = &dev->i2c[i];
1238 port->input[0] = &dev->input[2 * i];
1239 port->input[1] = &dev->input[2 * i + 1];
1240 port->output = &dev->output[i];
1241
1242 mutex_init(&port->i2c_gate_lock);
1243 ddb_port_probe(port);
1244 ddb_input_init(port, 2 * i);
1245 ddb_input_init(port, 2 * i + 1);
1246 ddb_output_init(port, i);
1247 }
1248}
1249
1250static void ddb_ports_release(struct ddb *dev)
1251{
1252 int i;
1253 struct ddb_port *port;
1254
1255 for (i = 0; i < dev->info->port_num; i++) {
1256 port = &dev->port[i];
1257 port->dev = dev;
1258 tasklet_kill(&port->input[0]->tasklet);
1259 tasklet_kill(&port->input[1]->tasklet);
1260 tasklet_kill(&port->output->tasklet);
1261 }
1262}
1263
1264/****************************************************************************/
1265/****************************************************************************/
1266/****************************************************************************/
1267
1268static void irq_handle_i2c(struct ddb *dev, int n)
1269{
1270 struct ddb_i2c *i2c = &dev->i2c[n];
1271
1272 i2c->done = 1;
1273 wake_up(&i2c->wq);
1274}
1275
1276static irqreturn_t irq_handler(int irq, void *dev_id)
1277{
1278 struct ddb *dev = (struct ddb *) dev_id;
1279 u32 s = ddbreadl(INTERRUPT_STATUS);
1280
1281 if (!s)
1282 return IRQ_NONE;
1283
1284 do {
1285 ddbwritel(s, INTERRUPT_ACK);
1286
1287 if (s & 0x00000001) irq_handle_i2c(dev, 0);
1288 if (s & 0x00000002) irq_handle_i2c(dev, 1);
1289 if (s & 0x00000004) irq_handle_i2c(dev, 2);
1290 if (s & 0x00000008) irq_handle_i2c(dev, 3);
1291
1292 if (s & 0x00000100) tasklet_schedule(&dev->input[0].tasklet);
1293 if (s & 0x00000200) tasklet_schedule(&dev->input[1].tasklet);
1294 if (s & 0x00000400) tasklet_schedule(&dev->input[2].tasklet);
1295 if (s & 0x00000800) tasklet_schedule(&dev->input[3].tasklet);
1296 if (s & 0x00001000) tasklet_schedule(&dev->input[4].tasklet);
1297 if (s & 0x00002000) tasklet_schedule(&dev->input[5].tasklet);
1298 if (s & 0x00004000) tasklet_schedule(&dev->input[6].tasklet);
1299 if (s & 0x00008000) tasklet_schedule(&dev->input[7].tasklet);
1300
1301 if (s & 0x00010000) tasklet_schedule(&dev->output[0].tasklet);
1302 if (s & 0x00020000) tasklet_schedule(&dev->output[1].tasklet);
1303 if (s & 0x00040000) tasklet_schedule(&dev->output[2].tasklet);
1304 if (s & 0x00080000) tasklet_schedule(&dev->output[3].tasklet);
1305
1306 /* if (s & 0x000f0000) printk("%08x\n", istat); */
1307 } while ((s = ddbreadl(INTERRUPT_STATUS)));
1308
1309 return IRQ_HANDLED;
1310}
1311
1312/******************************************************************************/
1313/******************************************************************************/
1314/******************************************************************************/
1315
1316static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
1317{
1318 u32 data, shift;
1319
1320 if (wlen > 4)
1321 ddbwritel(1, SPI_CONTROL);
1322 while (wlen > 4) {
1323 /* FIXME: check for big-endian */
1324 data = swab32(*(u32 *)wbuf);
1325 wbuf += 4;
1326 wlen -= 4;
1327 ddbwritel(data, SPI_DATA);
1328 while (ddbreadl(SPI_CONTROL) & 0x0004);
1329 }
1330
1331 if (rlen)
1332 ddbwritel(0x0001 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1333 else
1334 ddbwritel(0x0003 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1335
1336 data=0;
1337 shift = ((4 - wlen) * 8);
1338 while (wlen) {
1339 data <<= 8;
1340 data |= *wbuf;
1341 wlen--;
1342 wbuf++;
1343 }
1344 if (shift)
1345 data <<= shift;
1346 ddbwritel(data, SPI_DATA);
1347 while (ddbreadl(SPI_CONTROL) & 0x0004);
1348
1349 if (!rlen) {
1350 ddbwritel(0, SPI_CONTROL);
1351 return 0;
1352 }
1353 if (rlen > 4)
1354 ddbwritel(1, SPI_CONTROL);
1355
1356 while (rlen > 4) {
1357 ddbwritel(0xffffffff, SPI_DATA);
1358 while (ddbreadl(SPI_CONTROL) & 0x0004);
1359 data = ddbreadl(SPI_DATA);
1360 *(u32 *) rbuf = swab32(data);
1361 rbuf += 4;
1362 rlen -= 4;
1363 }
1364 ddbwritel(0x0003 | ((rlen << (8 + 3)) & 0x1F00), SPI_CONTROL);
1365 ddbwritel(0xffffffff, SPI_DATA);
1366 while (ddbreadl(SPI_CONTROL) & 0x0004);
1367
1368 data = ddbreadl(SPI_DATA);
1369 ddbwritel(0, SPI_CONTROL);
1370
1371 if (rlen < 4)
1372 data <<= ((4 - rlen) * 8);
1373
1374 while (rlen > 0) {
1375 *rbuf = ((data >> 24) & 0xff);
1376 data <<= 8;
1377 rbuf++;
1378 rlen--;
1379 }
1380 return 0;
1381}
1382
1383#define DDB_MAGIC 'd'
1384
1385struct ddb_flashio {
1386 __u8 *write_buf;
1387 __u32 write_len;
1388 __u8 *read_buf;
1389 __u32 read_len;
1390};
1391
1392#define IOCTL_DDB_FLASHIO _IOWR(DDB_MAGIC, 0x00, struct ddb_flashio)
1393
1394#define DDB_NAME "ddbridge"
1395
1396static u32 ddb_num;
1397static struct ddb *ddbs[32];
1398static struct class *ddb_class;
1399static int ddb_major;
1400
1401static int ddb_open(struct inode *inode, struct file *file)
1402{
1403 struct ddb *dev = ddbs[iminor(inode)];
1404
1405 file->private_data = dev;
1406 return 0;
1407}
1408
1409static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1410{
1411 struct ddb *dev = file->private_data;
1412 void *parg = (void *)arg;
1413 int res = -EFAULT;
1414
1415 switch (cmd) {
1416 case IOCTL_DDB_FLASHIO:
1417 {
1418 struct ddb_flashio fio;
1419 u8 *rbuf, *wbuf;
1420
1421 if (copy_from_user(&fio, parg, sizeof(fio)))
1422 break;
1423 if (fio.write_len + fio.read_len > 1028) {
1424 printk("IOBUF too small\n");
1425 return -ENOMEM;
1426 }
1427 wbuf = &dev->iobuf[0];
1428 if (!wbuf)
1429 return -ENOMEM;
1430 rbuf = wbuf + fio.write_len;
1431 if (copy_from_user(wbuf, fio.write_buf, fio.write_len)) {
1432 vfree(wbuf);
1433 break;
1434 }
1435 res = flashio(dev, wbuf, fio.write_len,
1436 rbuf, fio.read_len);
1437 if (copy_to_user(fio.read_buf, rbuf, fio.read_len))
1438 res = -EFAULT;
1439 break;
1440 }
1441 default:
1442 break;
1443 }
1444 return res;
1445}
1446
1447static struct file_operations ddb_fops={
1448 .unlocked_ioctl = ddb_ioctl,
1449 .open = ddb_open,
1450};
1451
1452static char *ddb_devnode(struct device *device, mode_t *mode)
1453{
1454 struct ddb *dev = dev_get_drvdata(device);
1455
1456 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
1457}
1458
1459static int ddb_class_create(void)
1460{
1461 if ((ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops))<0)
1462 return ddb_major;
1463
1464 ddb_class = class_create(THIS_MODULE, DDB_NAME);
1465 if (IS_ERR(ddb_class)) {
1466 unregister_chrdev(ddb_major, DDB_NAME);
1467 return -1;
1468 }
1469 ddb_class->devnode = ddb_devnode;
1470 return 0;
1471}
1472
1473static void ddb_class_destroy(void)
1474{
1475 class_destroy(ddb_class);
1476 unregister_chrdev(ddb_major, DDB_NAME);
1477}
1478
1479static int ddb_device_create(struct ddb *dev)
1480{
1481 dev->nr = ddb_num++;
1482 dev->ddb_dev = device_create(ddb_class, NULL,
1483 MKDEV(ddb_major, dev->nr),
1484 dev, "ddbridge%d", dev->nr);
1485 ddbs[dev->nr] = dev;
1486 if (IS_ERR(dev->ddb_dev))
1487 return -1;
1488 return 0;
1489}
1490
1491static void ddb_device_destroy(struct ddb *dev)
1492{
1493 ddb_num--;
1494 if (IS_ERR(dev->ddb_dev))
1495 return;
1496 device_destroy(ddb_class, MKDEV(ddb_major, 0));
1497}
1498
1499
1500/****************************************************************************/
1501/****************************************************************************/
1502/****************************************************************************/
1503
1504static void ddb_unmap(struct ddb *dev)
1505{
1506 if (dev->regs)
1507 iounmap(dev->regs);
1508 vfree(dev);
1509}
1510
1511
1512static void __devexit ddb_remove(struct pci_dev *pdev)
1513{
1514 struct ddb *dev = (struct ddb *) pci_get_drvdata(pdev);
1515
1516 ddb_ports_detach(dev);
1517 ddb_i2c_release(dev);
1518
1519 ddbwritel(0, INTERRUPT_ENABLE);
1520 free_irq(dev->pdev->irq, dev);
1521#ifdef CONFIG_PCI_MSI
1522 if (dev->msi)
1523 pci_disable_msi(dev->pdev);
1524#endif
1525 ddb_ports_release(dev);
1526 ddb_buffers_free(dev);
1527 ddb_device_destroy(dev);
1528
1529 ddb_unmap(dev);
1530 pci_set_drvdata(pdev, 0);
1531 pci_disable_device(pdev);
1532}
1533
1534
1535static int __devinit ddb_probe(struct pci_dev *pdev,
1536 const struct pci_device_id *id)
1537{
1538 struct ddb *dev;
1539 int stat=0;
1540 int irq_flag = IRQF_SHARED;
1541
1542 if (pci_enable_device(pdev)<0)
1543 return -ENODEV;
1544
1545 dev = vmalloc(sizeof(struct ddb));
1546 if (dev == NULL)
1547 return -ENOMEM;
1548 memset(dev, 0, sizeof(struct ddb));
1549
1550 dev->pdev = pdev;
1551 pci_set_drvdata(pdev, dev);
1552 dev->info = (struct ddb_info *) id->driver_data;
1553 printk("DDBridge driver detected: %s\n", dev->info->name);
1554
1555 dev->regs = ioremap(pci_resource_start(dev->pdev,0),
1556 pci_resource_len(dev->pdev,0));
1557 if (!dev->regs) {
1558 stat = -ENOMEM;
1559 goto fail;
1560 }
1561 printk("HW %08x FW %08x\n", ddbreadl(0), ddbreadl(4));
1562
1563#ifdef CONFIG_PCI_MSI
1564 if (pci_msi_enabled())
1565 stat = pci_enable_msi(dev->pdev);
1566 if (stat) {
1567 printk(KERN_INFO ": MSI not available.\n");
1568 } else {
1569 irq_flag = 0;
1570 dev->msi = 1;
1571 }
1572#endif
1573 if ((stat = request_irq(dev->pdev->irq, irq_handler,
1574 irq_flag, "DDBridge",
1575 (void *) dev))<0)
1576 goto fail1;
1577 ddbwritel(0, DMA_BASE_WRITE);
1578 ddbwritel(0, DMA_BASE_READ);
1579 ddbwritel(0xffffffff, INTERRUPT_ACK);
1580 ddbwritel(0xfff0f, INTERRUPT_ENABLE);
1581 ddbwritel(0, MSI1_ENABLE);
1582
1583 if (ddb_i2c_init(dev) < 0)
1584 goto fail1;
1585 ddb_ports_init(dev);
1586 if (ddb_buffers_alloc(dev) < 0) {
1587 printk(KERN_INFO ": Could not allocate buffer memory\n");
1588 goto fail2;
1589 }
1590 if (ddb_ports_attach(dev) < 0)
1591 goto fail3;
1592 ddb_device_create(dev);
1593 return 0;
1594
1595fail3:
1596 ddb_ports_detach(dev);
1597 printk("fail3\n");
1598 ddb_ports_release(dev);
1599fail2:
1600 printk("fail2\n");
1601 ddb_buffers_free(dev);
1602fail1:
1603 printk("fail1\n");
1604 if (dev->msi)
1605 pci_disable_msi(dev->pdev);
1606 free_irq(dev->pdev->irq, dev);
1607fail:
1608 printk("fail\n");
1609 ddb_unmap(dev);
1610 pci_set_drvdata(pdev, 0);
1611 pci_disable_device(pdev);
1612 return -1;
1613}
1614
1615/******************************************************************************/
1616/******************************************************************************/
1617/******************************************************************************/
1618
1619static struct ddb_info ddb_none = {
1620 .type = DDB_NONE,
1621 .name = "Digital Devices PCIe bridge",
1622};
1623
1624static struct ddb_info ddb_octopus = {
1625 .type = DDB_OCTOPUS,
1626 .name = "Digital Devices Octopus DVB adapter",
1627 .port_num = 4,
1628};
1629
1630static struct ddb_info ddb_octopus_le = {
1631 .type = DDB_OCTOPUS,
1632 .name = "Digital Devices Octopus LE DVB adapter",
1633 .port_num = 2,
1634};
1635
1636static struct ddb_info ddb_v6 = {
1637 .type = DDB_OCTOPUS,
1638 .name = "Digital Devices Cine S2 V6 DVB adapter",
1639 .port_num = 3,
1640};
1641
1642#define DDVID 0xdd01 /* Digital Devices Vendor ID */
1643
1644#define DDB_ID(_vend, _dev, _subvend,_subdev,_driverdata) { \
1645 .vendor = _vend, .device = _dev, \
1646 .subvendor = _subvend, .subdevice = _subdev, \
1647 .driver_data = (unsigned long)&_driverdata }
1648
1649static const struct pci_device_id ddb_id_tbl[] __devinitdata = {
1650 DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus),
1651 DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus),
1652 DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le),
1653 DDB_ID(DDVID, 0x0003, DDVID, 0x0010, ddb_octopus),
1654 DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6),
1655 /* in case sub-ids got deleted in flash */
1656 DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
1657 {0}
1658};
1659MODULE_DEVICE_TABLE(pci, ddb_id_tbl);
1660
1661
1662static struct pci_driver ddb_pci_driver = {
1663 .name = "DDBridge",
1664 .id_table = ddb_id_tbl,
1665 .probe = ddb_probe,
1666 .remove = ddb_remove,
1667};
1668
1669static __init int module_init_ddbridge(void)
1670{
1671 printk("Digital Devices PCIE bridge driver, "
1672 "Copyright (C) 2010-11 Digital Devices GmbH\n");
1673 if (ddb_class_create())
1674 return -1;
1675 return pci_register_driver(&ddb_pci_driver);
1676}
1677
1678static __exit void module_exit_ddbridge(void)
1679{
1680 pci_unregister_driver(&ddb_pci_driver);
1681 ddb_class_destroy();
1682}
1683
1684module_init(module_init_ddbridge);
1685module_exit(module_exit_ddbridge);
1686
1687MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
1688MODULE_AUTHOR("Ralph Metzler");
1689MODULE_LICENSE("GPL");
1690MODULE_VERSION("0.5");
Linux kernel - Deliverables
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