[PATCH] fix missing includes
[deliverable/linux.git] / drivers / media / dvb / frontends / or51211.c
CommitLineData
1da177e4
LT
1/*
2 * Support for OR51211 (pcHDTV HD-2000) - VSB
3 *
4 * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
5 *
6 * Based on code from Jack Kelliher (kelliher@xmission.com)
7 * Copyright (C) 2002 & pcHDTV, inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23*/
24
25/*
26 * This driver needs external firmware. Please use the command
27 * "<kerneldir>/Documentation/dvb/get_dvb_firmware or51211" to
28 * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
29 */
30#define OR51211_DEFAULT_FIRMWARE "dvb-fe-or51211.fw"
31
32#include <linux/kernel.h>
33#include <linux/module.h>
34#include <linux/moduleparam.h>
35#include <linux/device.h>
36#include <linux/firmware.h>
4e57b681
TS
37#include <linux/string.h>
38#include <linux/slab.h>
1da177e4
LT
39#include <asm/byteorder.h>
40
41#include "dvb_frontend.h"
42#include "or51211.h"
43
44static int debug;
45#define dprintk(args...) \
46 do { \
47 if (debug) printk(KERN_DEBUG "or51211: " args); \
48 } while (0)
49
50static u8 run_buf[] = {0x7f,0x01};
51static u8 cmd_buf[] = {0x04,0x01,0x50,0x80,0x06}; // ATSC
52
53struct or51211_state {
54
55 struct i2c_adapter* i2c;
56 struct dvb_frontend_ops ops;
57
58 /* Configuration settings */
59 const struct or51211_config* config;
60
61 struct dvb_frontend frontend;
62 struct bt878* bt;
63
64 /* Demodulator private data */
65 u8 initialized:1;
66
67 /* Tuner private data */
68 u32 current_frequency;
69};
70
71static int i2c_writebytes (struct or51211_state* state, u8 reg, u8 *buf,
72 int len)
73{
74 int err;
75 struct i2c_msg msg;
76 msg.addr = reg;
77 msg.flags = 0;
78 msg.len = len;
79 msg.buf = buf;
80
81 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
82 printk(KERN_WARNING "or51211: i2c_writebytes error "
83 "(addr %02x, err == %i)\n", reg, err);
84 return -EREMOTEIO;
85 }
86
87 return 0;
88}
89
90static u8 i2c_readbytes (struct or51211_state* state, u8 reg, u8* buf, int len)
91{
92 int err;
93 struct i2c_msg msg;
94 msg.addr = reg;
95 msg.flags = I2C_M_RD;
96 msg.len = len;
97 msg.buf = buf;
98
99 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
100 printk(KERN_WARNING "or51211: i2c_readbytes error "
101 "(addr %02x, err == %i)\n", reg, err);
102 return -EREMOTEIO;
103 }
104
105 return 0;
106}
107
108static int or51211_load_firmware (struct dvb_frontend* fe,
109 const struct firmware *fw)
110{
111 struct or51211_state* state = fe->demodulator_priv;
112 u8 tudata[585];
113 int i;
114
115 dprintk("Firmware is %d bytes\n",fw->size);
116
117 /* Get eprom data */
118 tudata[0] = 17;
119 if (i2c_writebytes(state,0x50,tudata,1)) {
120 printk(KERN_WARNING "or51211:load_firmware error eprom addr\n");
121 return -1;
122 }
123 if (i2c_readbytes(state,0x50,&tudata[145],192)) {
124 printk(KERN_WARNING "or51211: load_firmware error eprom\n");
125 return -1;
126 }
127
128 /* Create firmware buffer */
129 for (i = 0; i < 145; i++)
130 tudata[i] = fw->data[i];
131
132 for (i = 0; i < 248; i++)
133 tudata[i+337] = fw->data[145+i];
134
135 state->config->reset(fe);
136
137 if (i2c_writebytes(state,state->config->demod_address,tudata,585)) {
138 printk(KERN_WARNING "or51211: load_firmware error 1\n");
139 return -1;
140 }
141 msleep(1);
142
143 if (i2c_writebytes(state,state->config->demod_address,
144 &fw->data[393],8125)) {
145 printk(KERN_WARNING "or51211: load_firmware error 2\n");
146 return -1;
147 }
148 msleep(1);
149
150 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
151 printk(KERN_WARNING "or51211: load_firmware error 3\n");
152 return -1;
153 }
154
155 /* Wait at least 5 msec */
156 msleep(10);
157 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
158 printk(KERN_WARNING "or51211: load_firmware error 4\n");
159 return -1;
160 }
161 msleep(10);
162
163 printk("or51211: Done.\n");
164 return 0;
165};
166
167static int or51211_setmode(struct dvb_frontend* fe, int mode)
168{
169 struct or51211_state* state = fe->demodulator_priv;
170 u8 rec_buf[14];
171
172 state->config->setmode(fe, mode);
173
174 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
175 printk(KERN_WARNING "or51211: setmode error 1\n");
176 return -1;
177 }
178
179 /* Wait at least 5 msec */
180 msleep(10);
181 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) {
182 printk(KERN_WARNING "or51211: setmode error 2\n");
183 return -1;
184 }
185
186 msleep(10);
187
188 /* Set operation mode in Receiver 1 register;
189 * type 1:
190 * data 0x50h Automatic sets receiver channel conditions
191 * Automatic NTSC rejection filter
192 * Enable MPEG serial data output
193 * MPEG2tr
194 * High tuner phase noise
195 * normal +/-150kHz Carrier acquisition range
196 */
197 if (i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) {
198 printk(KERN_WARNING "or51211: setmode error 3\n");
199 return -1;
200 }
201
202 rec_buf[0] = 0x04;
203 rec_buf[1] = 0x00;
204 rec_buf[2] = 0x03;
205 rec_buf[3] = 0x00;
206 msleep(20);
207 if (i2c_writebytes(state,state->config->demod_address,rec_buf,3)) {
208 printk(KERN_WARNING "or51211: setmode error 5\n");
209 }
210 msleep(3);
211 if (i2c_readbytes(state,state->config->demod_address,&rec_buf[10],2)) {
212 printk(KERN_WARNING "or51211: setmode error 6");
213 return -1;
214 }
215 dprintk("setmode rec status %02x %02x\n",rec_buf[10],rec_buf[11]);
216
217 return 0;
218}
219
220static int or51211_set_parameters(struct dvb_frontend* fe,
221 struct dvb_frontend_parameters *param)
222{
223 struct or51211_state* state = fe->demodulator_priv;
224 u32 freq = 0;
225 u16 tunerfreq = 0;
226 u8 buf[4];
227
228 /* Change only if we are actually changing the channel */
229 if (state->current_frequency != param->frequency) {
230 freq = 44000 + (param->frequency/1000);
231 tunerfreq = freq * 16/1000;
232
233 dprintk("set_parameters frequency = %d (tunerfreq = %d)\n",
234 param->frequency,tunerfreq);
235
236 buf[0] = (tunerfreq >> 8) & 0x7F;
237 buf[1] = (tunerfreq & 0xFF);
238 buf[2] = 0x8E;
239
240 if (param->frequency < 157250000) {
241 buf[3] = 0xA0;
242 dprintk("set_parameters VHF low range\n");
243 } else if (param->frequency < 454000000) {
244 buf[3] = 0x90;
245 dprintk("set_parameters VHF high range\n");
246 } else {
247 buf[3] = 0x30;
248 dprintk("set_parameters UHF range\n");
249 }
250 dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
251 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
252
253 if (i2c_writebytes(state,0xC2>>1,buf,4))
254 printk(KERN_WARNING "or51211:set_parameters error "
255 "writing to tuner\n");
256
257 /* Set to ATSC mode */
258 or51211_setmode(fe,0);
259
260 /* Update current frequency */
261 state->current_frequency = param->frequency;
262 }
263 return 0;
264}
265
266static int or51211_read_status(struct dvb_frontend* fe, fe_status_t* status)
267{
268 struct or51211_state* state = fe->demodulator_priv;
269 unsigned char rec_buf[2];
270 unsigned char snd_buf[] = {0x04,0x00,0x03,0x00};
271 *status = 0;
272
273 /* Receiver Status */
274 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
275 printk(KERN_WARNING "or51132: read_status write error\n");
276 return -1;
277 }
278 msleep(3);
279 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
280 printk(KERN_WARNING "or51132: read_status read error\n");
281 return -1;
282 }
283 dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
284
285 if (rec_buf[0] & 0x01) { /* Receiver Lock */
286 *status |= FE_HAS_SIGNAL;
287 *status |= FE_HAS_CARRIER;
288 *status |= FE_HAS_VITERBI;
289 *status |= FE_HAS_SYNC;
290 *status |= FE_HAS_LOCK;
291 }
292 return 0;
293}
294
295/* log10-1 table at .5 increments from 1 to 100.5 */
296static unsigned int i100x20log10[] = {
297 0, 352, 602, 795, 954, 1088, 1204, 1306, 1397, 1480,
298 1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
299 2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
300 2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
301 2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
302 2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
303 2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
304 3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
305 3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
306 3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
307 3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
308 3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
309 3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
310 3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
311 3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
312 3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
313 3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
314 3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
315 3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
316 3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
317};
318
319static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
320
321static unsigned int i20Log10(unsigned short val)
322{
323 unsigned int rntval = 100;
324 unsigned int tmp = val;
325 unsigned int exp = 1;
326
327 while(tmp > 100) {tmp /= 100; exp++;}
328
329 val = (2 * val)/denom[exp];
330 if (exp > 1) rntval = 2000*exp;
331
332 rntval += i100x20log10[val];
333 return rntval;
334}
335
336static int or51211_read_signal_strength(struct dvb_frontend* fe, u16* strength)
337{
338 struct or51211_state* state = fe->demodulator_priv;
339 u8 rec_buf[2];
340 u8 snd_buf[4];
341 u8 snr_equ;
342
343 /* SNR after Equalizer */
344 snd_buf[0] = 0x04;
345 snd_buf[1] = 0x00;
346 snd_buf[2] = 0x04;
347 snd_buf[3] = 0x00;
348
349 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
350 printk(KERN_WARNING "or51211: read_status write error\n");
351 return -1;
352 }
353 msleep(3);
354 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
355 printk(KERN_WARNING "or51211: read_status read error\n");
356 return -1;
357 }
358 snr_equ = rec_buf[0] & 0xff;
359
360 /* The value reported back from the frontend will be FFFF=100% 0000=0% */
361 *strength = (((5334 - i20Log10(snr_equ))/3+5)*65535)/1000;
362
363 dprintk("read_signal_strength %i\n",*strength);
364
365 return 0;
366}
367
368static int or51211_read_snr(struct dvb_frontend* fe, u16* snr)
369{
370 struct or51211_state* state = fe->demodulator_priv;
371 u8 rec_buf[2];
372 u8 snd_buf[4];
373
374 /* SNR after Equalizer */
375 snd_buf[0] = 0x04;
376 snd_buf[1] = 0x00;
377 snd_buf[2] = 0x04;
378 snd_buf[3] = 0x00;
379
380 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) {
381 printk(KERN_WARNING "or51211: read_status write error\n");
382 return -1;
383 }
384 msleep(3);
385 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
386 printk(KERN_WARNING "or51211: read_status read error\n");
387 return -1;
388 }
389 *snr = rec_buf[0] & 0xff;
390
391 dprintk("read_snr %i\n",*snr);
392
393 return 0;
394}
395
396static int or51211_read_ber(struct dvb_frontend* fe, u32* ber)
397{
398 *ber = -ENOSYS;
399 return 0;
400}
401
402static int or51211_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
403{
404 *ucblocks = -ENOSYS;
405 return 0;
406}
407
408static int or51211_sleep(struct dvb_frontend* fe)
409{
410 return 0;
411}
412
413static int or51211_init(struct dvb_frontend* fe)
414{
415 struct or51211_state* state = fe->demodulator_priv;
416 const struct or51211_config* config = state->config;
417 const struct firmware* fw;
418 unsigned char get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00};
419 unsigned char rec_buf[14];
420 int ret,i;
421
422 if (!state->initialized) {
423 /* Request the firmware, this will block until it uploads */
424 printk(KERN_INFO "or51211: Waiting for firmware upload "
425 "(%s)...\n", OR51211_DEFAULT_FIRMWARE);
426 ret = config->request_firmware(fe, &fw,
427 OR51211_DEFAULT_FIRMWARE);
428 printk(KERN_INFO "or51211:Got Hotplug firmware\n");
429 if (ret) {
430 printk(KERN_WARNING "or51211: No firmware uploaded "
431 "(timeout or file not found?)\n");
432 return ret;
433 }
434
435 ret = or51211_load_firmware(fe, fw);
436 if (ret) {
437 printk(KERN_WARNING "or51211: Writing firmware to "
438 "device failed!\n");
439 release_firmware(fw);
440 return ret;
441 }
442 printk(KERN_INFO "or51211: Firmware upload complete.\n");
443
444 /* Set operation mode in Receiver 1 register;
445 * type 1:
446 * data 0x50h Automatic sets receiver channel conditions
447 * Automatic NTSC rejection filter
448 * Enable MPEG serial data output
449 * MPEG2tr
450 * High tuner phase noise
451 * normal +/-150kHz Carrier acquisition range
452 */
453 if (i2c_writebytes(state,state->config->demod_address,
454 cmd_buf,3)) {
455 printk(KERN_WARNING "or51211: Load DVR Error 5\n");
456 return -1;
457 }
458
459 /* Read back ucode version to besure we loaded correctly */
460 /* and are really up and running */
461 rec_buf[0] = 0x04;
462 rec_buf[1] = 0x00;
463 rec_buf[2] = 0x03;
464 rec_buf[3] = 0x00;
465 msleep(30);
466 if (i2c_writebytes(state,state->config->demod_address,
467 rec_buf,3)) {
468 printk(KERN_WARNING "or51211: Load DVR Error A\n");
469 return -1;
470 }
471 msleep(3);
472 if (i2c_readbytes(state,state->config->demod_address,
473 &rec_buf[10],2)) {
474 printk(KERN_WARNING "or51211: Load DVR Error B\n");
475 return -1;
476 }
477
478 rec_buf[0] = 0x04;
479 rec_buf[1] = 0x00;
480 rec_buf[2] = 0x01;
481 rec_buf[3] = 0x00;
482 msleep(20);
483 if (i2c_writebytes(state,state->config->demod_address,
484 rec_buf,3)) {
485 printk(KERN_WARNING "or51211: Load DVR Error C\n");
486 return -1;
487 }
488 msleep(3);
489 if (i2c_readbytes(state,state->config->demod_address,
490 &rec_buf[12],2)) {
491 printk(KERN_WARNING "or51211: Load DVR Error D\n");
492 return -1;
493 }
494
495 for (i = 0; i < 8; i++)
496 rec_buf[i]=0xed;
497
498 for (i = 0; i < 5; i++) {
499 msleep(30);
500 get_ver_buf[4] = i+1;
501 if (i2c_writebytes(state,state->config->demod_address,
502 get_ver_buf,5)) {
503 printk(KERN_WARNING "or51211:Load DVR Error 6"
504 " - %d\n",i);
505 return -1;
506 }
507 msleep(3);
508
509 if (i2c_readbytes(state,state->config->demod_address,
510 &rec_buf[i*2],2)) {
511 printk(KERN_WARNING "or51211:Load DVR Error 7"
512 " - %d\n",i);
513 return -1;
514 }
515 /* If we didn't receive the right index, try again */
516 if ((int)rec_buf[i*2+1]!=i+1){
517 i--;
518 }
519 }
520 dprintk("read_fwbits %x %x %x %x %x %x %x %x %x %x\n",
521 rec_buf[0], rec_buf[1], rec_buf[2], rec_buf[3],
522 rec_buf[4], rec_buf[5], rec_buf[6], rec_buf[7],
523 rec_buf[8], rec_buf[9]);
524
525 printk(KERN_INFO "or51211: ver TU%02x%02x%02x VSB mode %02x"
526 " Status %02x\n",
527 rec_buf[2], rec_buf[4],rec_buf[6],
528 rec_buf[12],rec_buf[10]);
529
530 rec_buf[0] = 0x04;
531 rec_buf[1] = 0x00;
532 rec_buf[2] = 0x03;
533 rec_buf[3] = 0x00;
534 msleep(20);
535 if (i2c_writebytes(state,state->config->demod_address,
536 rec_buf,3)) {
537 printk(KERN_WARNING "or51211: Load DVR Error 8\n");
538 return -1;
539 }
540 msleep(20);
541 if (i2c_readbytes(state,state->config->demod_address,
542 &rec_buf[8],2)) {
543 printk(KERN_WARNING "or51211: Load DVR Error 9\n");
544 return -1;
545 }
546 state->initialized = 1;
547 }
548
549 return 0;
550}
551
552static int or51211_get_tune_settings(struct dvb_frontend* fe,
553 struct dvb_frontend_tune_settings* fesettings)
554{
555 fesettings->min_delay_ms = 500;
556 fesettings->step_size = 0;
557 fesettings->max_drift = 0;
558 return 0;
559}
560
561static void or51211_release(struct dvb_frontend* fe)
562{
563 struct or51211_state* state = fe->demodulator_priv;
564 state->config->sleep(fe);
565 kfree(state);
566}
567
568static struct dvb_frontend_ops or51211_ops;
569
570struct dvb_frontend* or51211_attach(const struct or51211_config* config,
571 struct i2c_adapter* i2c)
572{
573 struct or51211_state* state = NULL;
574
575 /* Allocate memory for the internal state */
576 state = kmalloc(sizeof(struct or51211_state), GFP_KERNEL);
577 if (state == NULL)
578 goto error;
579
580 /* Setup the state */
581 state->config = config;
582 state->i2c = i2c;
583 memcpy(&state->ops, &or51211_ops, sizeof(struct dvb_frontend_ops));
584 state->initialized = 0;
585 state->current_frequency = 0;
586
587 /* Create dvb_frontend */
588 state->frontend.ops = &state->ops;
589 state->frontend.demodulator_priv = state;
590 return &state->frontend;
591
592error:
593 kfree(state);
594 return NULL;
595}
596
597static struct dvb_frontend_ops or51211_ops = {
598
599 .info = {
600 .name = "Oren OR51211 VSB Frontend",
601 .type = FE_ATSC,
602 .frequency_min = 44000000,
603 .frequency_max = 958000000,
604 .frequency_stepsize = 166666,
605 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
606 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
607 FE_CAN_8VSB
608 },
609
610 .release = or51211_release,
611
612 .init = or51211_init,
613 .sleep = or51211_sleep,
614
615 .set_frontend = or51211_set_parameters,
616 .get_tune_settings = or51211_get_tune_settings,
617
618 .read_status = or51211_read_status,
619 .read_ber = or51211_read_ber,
620 .read_signal_strength = or51211_read_signal_strength,
621 .read_snr = or51211_read_snr,
622 .read_ucblocks = or51211_read_ucblocks,
623};
624
625module_param(debug, int, 0644);
626MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
627
628MODULE_DESCRIPTION("Oren OR51211 VSB [pcHDTV HD-2000] Demodulator Driver");
629MODULE_AUTHOR("Kirk Lapray");
630MODULE_LICENSE("GPL");
631
632EXPORT_SYMBOL(or51211_attach);
633
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