Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | Driver for ST STV0299 demodulator | |
3 | ||
4 | Copyright (C) 2001-2002 Convergence Integrated Media GmbH | |
5 | <ralph@convergence.de>, | |
6 | <holger@convergence.de>, | |
7 | <js@convergence.de> | |
8 | ||
9 | ||
10 | Philips SU1278/SH | |
11 | ||
12 | Copyright (C) 2002 by Peter Schildmann <peter.schildmann@web.de> | |
13 | ||
14 | ||
15 | LG TDQF-S001F | |
16 | ||
17 | Copyright (C) 2002 Felix Domke <tmbinc@elitedvb.net> | |
18 | & Andreas Oberritter <obi@linuxtv.org> | |
19 | ||
20 | ||
21 | Support for Samsung TBMU24112IMB used on Technisat SkyStar2 rev. 2.6B | |
22 | ||
23 | Copyright (C) 2003 Vadim Catana <skystar@moldova.cc>: | |
24 | ||
25 | Support for Philips SU1278 on Technotrend hardware | |
26 | ||
27 | Copyright (C) 2004 Andrew de Quincey <adq_dvb@lidskialf.net> | |
28 | ||
29 | This program is free software; you can redistribute it and/or modify | |
30 | it under the terms of the GNU General Public License as published by | |
31 | the Free Software Foundation; either version 2 of the License, or | |
32 | (at your option) any later version. | |
33 | ||
34 | This program is distributed in the hope that it will be useful, | |
35 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
36 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
37 | GNU General Public License for more details. | |
38 | ||
39 | You should have received a copy of the GNU General Public License | |
40 | along with this program; if not, write to the Free Software | |
41 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
42 | ||
43 | */ | |
44 | ||
45 | #include <linux/init.h> | |
46 | #include <linux/kernel.h> | |
47 | #include <linux/module.h> | |
1da177e4 LT |
48 | #include <linux/string.h> |
49 | #include <linux/slab.h> | |
4e57b681 | 50 | #include <linux/jiffies.h> |
1da177e4 LT |
51 | #include <asm/div64.h> |
52 | ||
53 | #include "dvb_frontend.h" | |
54 | #include "stv0299.h" | |
55 | ||
56 | struct stv0299_state { | |
57 | struct i2c_adapter* i2c; | |
1da177e4 LT |
58 | const struct stv0299_config* config; |
59 | struct dvb_frontend frontend; | |
60 | ||
61 | u8 initialised:1; | |
62 | u32 tuner_frequency; | |
63 | u32 symbol_rate; | |
64 | fe_code_rate_t fec_inner; | |
37650221 | 65 | int errmode; |
7876ad75 | 66 | u32 ucblocks; |
1da177e4 LT |
67 | }; |
68 | ||
37650221 AQ |
69 | #define STATUS_BER 0 |
70 | #define STATUS_UCBLOCKS 1 | |
71 | ||
1da177e4 | 72 | static int debug; |
591ad98d | 73 | static int debug_legacy_dish_switch; |
1da177e4 LT |
74 | #define dprintk(args...) \ |
75 | do { \ | |
76 | if (debug) printk(KERN_DEBUG "stv0299: " args); \ | |
77 | } while (0) | |
78 | ||
79 | ||
80 | static int stv0299_writeregI (struct stv0299_state* state, u8 reg, u8 data) | |
81 | { | |
82 | int ret; | |
83 | u8 buf [] = { reg, data }; | |
84 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | |
85 | ||
86 | ret = i2c_transfer (state->i2c, &msg, 1); | |
87 | ||
88 | if (ret != 1) | |
89 | dprintk("%s: writereg error (reg == 0x%02x, val == 0x%02x, " | |
271ddbf7 | 90 | "ret == %i)\n", __func__, reg, data, ret); |
1da177e4 LT |
91 | |
92 | return (ret != 1) ? -EREMOTEIO : 0; | |
93 | } | |
94 | ||
34630409 | 95 | static int stv0299_write(struct dvb_frontend* fe, u8 *buf, int len) |
1da177e4 | 96 | { |
9101e622 | 97 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 98 | |
c10d14d6 AQ |
99 | if (len != 2) |
100 | return -EINVAL; | |
101 | ||
102 | return stv0299_writeregI(state, buf[0], buf[1]); | |
1da177e4 LT |
103 | } |
104 | ||
105 | static u8 stv0299_readreg (struct stv0299_state* state, u8 reg) | |
106 | { | |
107 | int ret; | |
108 | u8 b0 [] = { reg }; | |
109 | u8 b1 [] = { 0 }; | |
110 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, | |
111 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; | |
112 | ||
113 | ret = i2c_transfer (state->i2c, msg, 2); | |
114 | ||
115 | if (ret != 2) | |
116 | dprintk("%s: readreg error (reg == 0x%02x, ret == %i)\n", | |
271ddbf7 | 117 | __func__, reg, ret); |
1da177e4 LT |
118 | |
119 | return b1[0]; | |
120 | } | |
121 | ||
122 | static int stv0299_readregs (struct stv0299_state* state, u8 reg1, u8 *b, u8 len) | |
123 | { | |
124 | int ret; | |
125 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®1, .len = 1 }, | |
126 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b, .len = len } }; | |
127 | ||
128 | ret = i2c_transfer (state->i2c, msg, 2); | |
129 | ||
130 | if (ret != 2) | |
271ddbf7 | 131 | dprintk("%s: readreg error (ret == %i)\n", __func__, ret); |
1da177e4 LT |
132 | |
133 | return ret == 2 ? 0 : ret; | |
134 | } | |
135 | ||
136 | static int stv0299_set_FEC (struct stv0299_state* state, fe_code_rate_t fec) | |
137 | { | |
271ddbf7 | 138 | dprintk ("%s\n", __func__); |
1da177e4 LT |
139 | |
140 | switch (fec) { | |
141 | case FEC_AUTO: | |
142 | { | |
143 | return stv0299_writeregI (state, 0x31, 0x1f); | |
144 | } | |
145 | case FEC_1_2: | |
146 | { | |
147 | return stv0299_writeregI (state, 0x31, 0x01); | |
148 | } | |
149 | case FEC_2_3: | |
150 | { | |
151 | return stv0299_writeregI (state, 0x31, 0x02); | |
152 | } | |
153 | case FEC_3_4: | |
154 | { | |
155 | return stv0299_writeregI (state, 0x31, 0x04); | |
156 | } | |
157 | case FEC_5_6: | |
158 | { | |
159 | return stv0299_writeregI (state, 0x31, 0x08); | |
160 | } | |
161 | case FEC_7_8: | |
162 | { | |
163 | return stv0299_writeregI (state, 0x31, 0x10); | |
164 | } | |
165 | default: | |
166 | { | |
167 | return -EINVAL; | |
168 | } | |
169 | } | |
170 | } | |
171 | ||
172 | static fe_code_rate_t stv0299_get_fec (struct stv0299_state* state) | |
173 | { | |
174 | static fe_code_rate_t fec_tab [] = { FEC_2_3, FEC_3_4, FEC_5_6, | |
175 | FEC_7_8, FEC_1_2 }; | |
176 | u8 index; | |
177 | ||
271ddbf7 | 178 | dprintk ("%s\n", __func__); |
1da177e4 LT |
179 | |
180 | index = stv0299_readreg (state, 0x1b); | |
181 | index &= 0x7; | |
182 | ||
183 | if (index > 4) | |
184 | return FEC_AUTO; | |
185 | ||
186 | return fec_tab [index]; | |
187 | } | |
188 | ||
189 | static int stv0299_wait_diseqc_fifo (struct stv0299_state* state, int timeout) | |
190 | { | |
191 | unsigned long start = jiffies; | |
192 | ||
271ddbf7 | 193 | dprintk ("%s\n", __func__); |
1da177e4 LT |
194 | |
195 | while (stv0299_readreg(state, 0x0a) & 1) { | |
196 | if (jiffies - start > timeout) { | |
271ddbf7 | 197 | dprintk ("%s: timeout!!\n", __func__); |
1da177e4 LT |
198 | return -ETIMEDOUT; |
199 | } | |
200 | msleep(10); | |
201 | }; | |
202 | ||
203 | return 0; | |
204 | } | |
205 | ||
206 | static int stv0299_wait_diseqc_idle (struct stv0299_state* state, int timeout) | |
207 | { | |
208 | unsigned long start = jiffies; | |
209 | ||
271ddbf7 | 210 | dprintk ("%s\n", __func__); |
1da177e4 LT |
211 | |
212 | while ((stv0299_readreg(state, 0x0a) & 3) != 2 ) { | |
213 | if (jiffies - start > timeout) { | |
271ddbf7 | 214 | dprintk ("%s: timeout!!\n", __func__); |
1da177e4 LT |
215 | return -ETIMEDOUT; |
216 | } | |
217 | msleep(10); | |
218 | }; | |
219 | ||
220 | return 0; | |
221 | } | |
222 | ||
223 | static int stv0299_set_symbolrate (struct dvb_frontend* fe, u32 srate) | |
224 | { | |
9101e622 | 225 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
226 | u64 big = srate; |
227 | u32 ratio; | |
228 | ||
229 | // check rate is within limits | |
230 | if ((srate < 1000000) || (srate > 45000000)) return -EINVAL; | |
231 | ||
232 | // calculate value to program | |
233 | big = big << 20; | |
234 | big += (state->config->mclk-1); // round correctly | |
235 | do_div(big, state->config->mclk); | |
236 | ratio = big << 4; | |
237 | ||
238 | return state->config->set_symbol_rate(fe, srate, ratio); | |
239 | } | |
240 | ||
241 | static int stv0299_get_symbolrate (struct stv0299_state* state) | |
242 | { | |
243 | u32 Mclk = state->config->mclk / 4096L; | |
244 | u32 srate; | |
245 | s32 offset; | |
246 | u8 sfr[3]; | |
247 | s8 rtf; | |
248 | ||
271ddbf7 | 249 | dprintk ("%s\n", __func__); |
1da177e4 LT |
250 | |
251 | stv0299_readregs (state, 0x1f, sfr, 3); | |
0402a6c2 | 252 | stv0299_readregs (state, 0x1a, (u8 *)&rtf, 1); |
1da177e4 LT |
253 | |
254 | srate = (sfr[0] << 8) | sfr[1]; | |
255 | srate *= Mclk; | |
256 | srate /= 16; | |
257 | srate += (sfr[2] >> 4) * Mclk / 256; | |
258 | offset = (s32) rtf * (srate / 4096L); | |
259 | offset /= 128; | |
260 | ||
271ddbf7 HH |
261 | dprintk ("%s : srate = %i\n", __func__, srate); |
262 | dprintk ("%s : ofset = %i\n", __func__, offset); | |
1da177e4 LT |
263 | |
264 | srate += offset; | |
265 | ||
266 | srate += 1000; | |
267 | srate /= 2000; | |
268 | srate *= 2000; | |
269 | ||
270 | return srate; | |
271 | } | |
272 | ||
273 | static int stv0299_send_diseqc_msg (struct dvb_frontend* fe, | |
274 | struct dvb_diseqc_master_cmd *m) | |
275 | { | |
9101e622 | 276 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
277 | u8 val; |
278 | int i; | |
279 | ||
271ddbf7 | 280 | dprintk ("%s\n", __func__); |
1da177e4 LT |
281 | |
282 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
283 | return -ETIMEDOUT; | |
284 | ||
285 | val = stv0299_readreg (state, 0x08); | |
286 | ||
287 | if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x6)) /* DiSEqC mode */ | |
288 | return -EREMOTEIO; | |
289 | ||
290 | for (i=0; i<m->msg_len; i++) { | |
291 | if (stv0299_wait_diseqc_fifo (state, 100) < 0) | |
292 | return -ETIMEDOUT; | |
293 | ||
294 | if (stv0299_writeregI (state, 0x09, m->msg[i])) | |
295 | return -EREMOTEIO; | |
296 | } | |
297 | ||
298 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
299 | return -ETIMEDOUT; | |
300 | ||
301 | return 0; | |
302 | } | |
303 | ||
304 | static int stv0299_send_diseqc_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t burst) | |
305 | { | |
9101e622 | 306 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
307 | u8 val; |
308 | ||
271ddbf7 | 309 | dprintk ("%s\n", __func__); |
1da177e4 LT |
310 | |
311 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
312 | return -ETIMEDOUT; | |
313 | ||
314 | val = stv0299_readreg (state, 0x08); | |
315 | ||
316 | if (stv0299_writeregI (state, 0x08, (val & ~0x7) | 0x2)) /* burst mode */ | |
317 | return -EREMOTEIO; | |
318 | ||
319 | if (stv0299_writeregI (state, 0x09, burst == SEC_MINI_A ? 0x00 : 0xff)) | |
320 | return -EREMOTEIO; | |
321 | ||
322 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
323 | return -ETIMEDOUT; | |
324 | ||
325 | if (stv0299_writeregI (state, 0x08, val)) | |
326 | return -EREMOTEIO; | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
331 | static int stv0299_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
332 | { | |
9101e622 | 333 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
334 | u8 val; |
335 | ||
336 | if (stv0299_wait_diseqc_idle (state, 100) < 0) | |
337 | return -ETIMEDOUT; | |
338 | ||
339 | val = stv0299_readreg (state, 0x08); | |
340 | ||
341 | switch (tone) { | |
342 | case SEC_TONE_ON: | |
343 | return stv0299_writeregI (state, 0x08, val | 0x3); | |
344 | ||
345 | case SEC_TONE_OFF: | |
346 | return stv0299_writeregI (state, 0x08, (val & ~0x3) | 0x02); | |
347 | ||
348 | default: | |
349 | return -EINVAL; | |
350 | } | |
351 | } | |
352 | ||
353 | static int stv0299_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage) | |
354 | { | |
9101e622 | 355 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
356 | u8 reg0x08; |
357 | u8 reg0x0c; | |
358 | ||
271ddbf7 | 359 | dprintk("%s: %s\n", __func__, |
1da177e4 LT |
360 | voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : |
361 | voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : "??"); | |
362 | ||
363 | reg0x08 = stv0299_readreg (state, 0x08); | |
364 | reg0x0c = stv0299_readreg (state, 0x0c); | |
365 | ||
366 | /** | |
367 | * H/V switching over OP0, OP1 and OP2 are LNB power enable bits | |
368 | */ | |
369 | reg0x0c &= 0x0f; | |
e84b133e | 370 | reg0x08 = (reg0x08 & 0x3f) | (state->config->lock_output << 6); |
1da177e4 LT |
371 | |
372 | switch (voltage) { | |
373 | case SEC_VOLTAGE_13: | |
e84b133e OE |
374 | if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0) |
375 | reg0x0c |= 0x10; /* OP1 off, OP0 on */ | |
376 | else | |
377 | reg0x0c |= 0x40; /* OP1 on, OP0 off */ | |
378 | break; | |
1da177e4 | 379 | case SEC_VOLTAGE_18: |
e84b133e OE |
380 | reg0x0c |= 0x50; /* OP1 on, OP0 on */ |
381 | break; | |
382 | case SEC_VOLTAGE_OFF: | |
383 | /* LNB power off! */ | |
384 | reg0x08 = 0x00; | |
385 | reg0x0c = 0x00; | |
386 | break; | |
1da177e4 LT |
387 | default: |
388 | return -EINVAL; | |
389 | }; | |
e84b133e OE |
390 | |
391 | if (state->config->op0_off) | |
392 | reg0x0c &= ~0x10; | |
393 | ||
394 | stv0299_writeregI(state, 0x08, reg0x08); | |
395 | return stv0299_writeregI(state, 0x0c, reg0x0c); | |
1da177e4 LT |
396 | } |
397 | ||
400b7083 | 398 | static int stv0299_send_legacy_dish_cmd (struct dvb_frontend* fe, unsigned long cmd) |
591ad98d JS |
399 | { |
400 | struct stv0299_state* state = fe->demodulator_priv; | |
401 | u8 reg0x08; | |
402 | u8 reg0x0c; | |
403 | u8 lv_mask = 0x40; | |
1da177e4 LT |
404 | u8 last = 1; |
405 | int i; | |
591ad98d JS |
406 | struct timeval nexttime; |
407 | struct timeval tv[10]; | |
1da177e4 | 408 | |
591ad98d JS |
409 | reg0x08 = stv0299_readreg (state, 0x08); |
410 | reg0x0c = stv0299_readreg (state, 0x0c); | |
411 | reg0x0c &= 0x0f; | |
412 | stv0299_writeregI (state, 0x08, (reg0x08 & 0x3f) | (state->config->lock_output << 6)); | |
413 | if (state->config->volt13_op0_op1 == STV0299_VOLT13_OP0) | |
414 | lv_mask = 0x10; | |
1da177e4 LT |
415 | |
416 | cmd = cmd << 1; | |
591ad98d | 417 | if (debug_legacy_dish_switch) |
271ddbf7 | 418 | printk ("%s switch command: 0x%04lx\n",__func__, cmd); |
591ad98d JS |
419 | |
420 | do_gettimeofday (&nexttime); | |
421 | if (debug_legacy_dish_switch) | |
422 | memcpy (&tv[0], &nexttime, sizeof (struct timeval)); | |
423 | stv0299_writeregI (state, 0x0c, reg0x0c | 0x50); /* set LNB to 18V */ | |
1da177e4 | 424 | |
83b75b04 | 425 | dvb_frontend_sleep_until(&nexttime, 32000); |
1da177e4 LT |
426 | |
427 | for (i=0; i<9; i++) { | |
591ad98d JS |
428 | if (debug_legacy_dish_switch) |
429 | do_gettimeofday (&tv[i+1]); | |
1da177e4 | 430 | if((cmd & 0x01) != last) { |
591ad98d JS |
431 | /* set voltage to (last ? 13V : 18V) */ |
432 | stv0299_writeregI (state, 0x0c, reg0x0c | (last ? lv_mask : 0x50)); | |
1da177e4 LT |
433 | last = (last) ? 0 : 1; |
434 | } | |
435 | ||
436 | cmd = cmd >> 1; | |
437 | ||
438 | if (i != 8) | |
83b75b04 | 439 | dvb_frontend_sleep_until(&nexttime, 8000); |
591ad98d JS |
440 | } |
441 | if (debug_legacy_dish_switch) { | |
442 | printk ("%s(%d): switch delay (should be 32k followed by all 8k\n", | |
271ddbf7 | 443 | __func__, fe->dvb->num); |
83b75b04 N |
444 | for (i = 1; i < 10; i++) |
445 | printk ("%d: %d\n", i, timeval_usec_diff(tv[i-1] , tv[i])); | |
1da177e4 LT |
446 | } |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
451 | static int stv0299_init (struct dvb_frontend* fe) | |
452 | { | |
9101e622 | 453 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 454 | int i; |
e84b133e OE |
455 | u8 reg; |
456 | u8 val; | |
1da177e4 LT |
457 | |
458 | dprintk("stv0299: init chip\n"); | |
459 | ||
e84b133e OE |
460 | for (i = 0; ; i += 2) { |
461 | reg = state->config->inittab[i]; | |
462 | val = state->config->inittab[i+1]; | |
463 | if (reg == 0xff && val == 0xff) | |
464 | break; | |
465 | if (reg == 0x0c && state->config->op0_off) | |
466 | val &= ~0x10; | |
467 | stv0299_writeregI(state, reg, val); | |
468 | } | |
1da177e4 | 469 | |
1da177e4 LT |
470 | return 0; |
471 | } | |
472 | ||
473 | static int stv0299_read_status(struct dvb_frontend* fe, fe_status_t* status) | |
474 | { | |
9101e622 | 475 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
476 | |
477 | u8 signal = 0xff - stv0299_readreg (state, 0x18); | |
478 | u8 sync = stv0299_readreg (state, 0x1b); | |
479 | ||
271ddbf7 | 480 | dprintk ("%s : FE_READ_STATUS : VSTATUS: 0x%02x\n", __func__, sync); |
1da177e4 LT |
481 | *status = 0; |
482 | ||
483 | if (signal > 10) | |
484 | *status |= FE_HAS_SIGNAL; | |
485 | ||
486 | if (sync & 0x80) | |
487 | *status |= FE_HAS_CARRIER; | |
488 | ||
489 | if (sync & 0x10) | |
490 | *status |= FE_HAS_VITERBI; | |
491 | ||
492 | if (sync & 0x08) | |
493 | *status |= FE_HAS_SYNC; | |
494 | ||
495 | if ((sync & 0x98) == 0x98) | |
496 | *status |= FE_HAS_LOCK; | |
497 | ||
498 | return 0; | |
499 | } | |
500 | ||
501 | static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber) | |
502 | { | |
9101e622 | 503 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 504 | |
7876ad75 OE |
505 | if (state->errmode != STATUS_BER) |
506 | return -ENOSYS; | |
507 | ||
508 | *ber = stv0299_readreg(state, 0x1e) | (stv0299_readreg(state, 0x1d) << 8); | |
1da177e4 LT |
509 | |
510 | return 0; | |
511 | } | |
512 | ||
513 | static int stv0299_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |
514 | { | |
9101e622 | 515 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
516 | |
517 | s32 signal = 0xffff - ((stv0299_readreg (state, 0x18) << 8) | |
518 | | stv0299_readreg (state, 0x19)); | |
519 | ||
271ddbf7 | 520 | dprintk ("%s : FE_READ_SIGNAL_STRENGTH : AGC2I: 0x%02x%02x, signal=0x%04x\n", __func__, |
1da177e4 LT |
521 | stv0299_readreg (state, 0x18), |
522 | stv0299_readreg (state, 0x19), (int) signal); | |
523 | ||
524 | signal = signal * 5 / 4; | |
525 | *strength = (signal > 0xffff) ? 0xffff : (signal < 0) ? 0 : signal; | |
526 | ||
527 | return 0; | |
528 | } | |
529 | ||
530 | static int stv0299_read_snr(struct dvb_frontend* fe, u16* snr) | |
531 | { | |
9101e622 | 532 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
533 | |
534 | s32 xsnr = 0xffff - ((stv0299_readreg (state, 0x24) << 8) | |
535 | | stv0299_readreg (state, 0x25)); | |
536 | xsnr = 3 * (xsnr - 0xa100); | |
537 | *snr = (xsnr > 0xffff) ? 0xffff : (xsnr < 0) ? 0 : xsnr; | |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
542 | static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
543 | { | |
9101e622 | 544 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 | 545 | |
7876ad75 OE |
546 | if (state->errmode != STATUS_UCBLOCKS) |
547 | return -ENOSYS; | |
548 | ||
549 | state->ucblocks += stv0299_readreg(state, 0x1e); | |
550 | state->ucblocks += (stv0299_readreg(state, 0x1d) << 8); | |
551 | *ucblocks = state->ucblocks; | |
1da177e4 LT |
552 | |
553 | return 0; | |
554 | } | |
555 | ||
556 | static int stv0299_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) | |
557 | { | |
9101e622 | 558 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
559 | int invval = 0; |
560 | ||
271ddbf7 | 561 | dprintk ("%s : FE_SET_FRONTEND\n", __func__); |
1da177e4 LT |
562 | |
563 | // set the inversion | |
564 | if (p->inversion == INVERSION_OFF) invval = 0; | |
565 | else if (p->inversion == INVERSION_ON) invval = 1; | |
566 | else { | |
567 | printk("stv0299 does not support auto-inversion\n"); | |
568 | return -EINVAL; | |
569 | } | |
570 | if (state->config->invert) invval = (~invval) & 1; | |
571 | stv0299_writeregI(state, 0x0c, (stv0299_readreg(state, 0x0c) & 0xfe) | invval); | |
572 | ||
dea74869 PB |
573 | if (fe->ops.tuner_ops.set_params) { |
574 | fe->ops.tuner_ops.set_params(fe, p); | |
575 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); | |
53a8ee3e | 576 | } |
3528cc4e AQ |
577 | |
578 | stv0299_set_FEC (state, p->u.qpsk.fec_inner); | |
579 | stv0299_set_symbolrate (fe, p->u.qpsk.symbol_rate); | |
580 | stv0299_writeregI(state, 0x22, 0x00); | |
581 | stv0299_writeregI(state, 0x23, 0x00); | |
1da177e4 LT |
582 | |
583 | state->tuner_frequency = p->frequency; | |
584 | state->fec_inner = p->u.qpsk.fec_inner; | |
585 | state->symbol_rate = p->u.qpsk.symbol_rate; | |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | static int stv0299_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters * p) | |
591 | { | |
9101e622 | 592 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
593 | s32 derot_freq; |
594 | int invval; | |
595 | ||
596 | derot_freq = (s32)(s16) ((stv0299_readreg (state, 0x22) << 8) | |
597 | | stv0299_readreg (state, 0x23)); | |
598 | ||
599 | derot_freq *= (state->config->mclk >> 16); | |
600 | derot_freq += 500; | |
601 | derot_freq /= 1000; | |
602 | ||
603 | p->frequency += derot_freq; | |
604 | ||
605 | invval = stv0299_readreg (state, 0x0c) & 1; | |
606 | if (state->config->invert) invval = (~invval) & 1; | |
607 | p->inversion = invval ? INVERSION_ON : INVERSION_OFF; | |
608 | ||
609 | p->u.qpsk.fec_inner = stv0299_get_fec (state); | |
610 | p->u.qpsk.symbol_rate = stv0299_get_symbolrate (state); | |
611 | ||
612 | return 0; | |
613 | } | |
614 | ||
615 | static int stv0299_sleep(struct dvb_frontend* fe) | |
616 | { | |
9101e622 | 617 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
618 | |
619 | stv0299_writeregI(state, 0x02, 0x80); | |
620 | state->initialised = 0; | |
621 | ||
622 | return 0; | |
623 | } | |
624 | ||
53a8ee3e AQ |
625 | static int stv0299_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) |
626 | { | |
627 | struct stv0299_state* state = fe->demodulator_priv; | |
628 | ||
629 | if (enable) { | |
a9686e0d | 630 | stv0299_writeregI(state, 0x05, 0xb5); |
53a8ee3e | 631 | } else { |
a9686e0d | 632 | stv0299_writeregI(state, 0x05, 0x35); |
53a8ee3e | 633 | } |
a9686e0d AQ |
634 | udelay(1); |
635 | return 0; | |
53a8ee3e AQ |
636 | } |
637 | ||
1da177e4 LT |
638 | static int stv0299_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) |
639 | { | |
9101e622 | 640 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
641 | |
642 | fesettings->min_delay_ms = state->config->min_delay_ms; | |
643 | if (fesettings->parameters.u.qpsk.symbol_rate < 10000000) { | |
644 | fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 32000; | |
645 | fesettings->max_drift = 5000; | |
646 | } else { | |
647 | fesettings->step_size = fesettings->parameters.u.qpsk.symbol_rate / 16000; | |
648 | fesettings->max_drift = fesettings->parameters.u.qpsk.symbol_rate / 2000; | |
649 | } | |
650 | return 0; | |
651 | } | |
652 | ||
653 | static void stv0299_release(struct dvb_frontend* fe) | |
654 | { | |
b8742700 | 655 | struct stv0299_state* state = fe->demodulator_priv; |
1da177e4 LT |
656 | kfree(state); |
657 | } | |
658 | ||
659 | static struct dvb_frontend_ops stv0299_ops; | |
660 | ||
661 | struct dvb_frontend* stv0299_attach(const struct stv0299_config* config, | |
662 | struct i2c_adapter* i2c) | |
663 | { | |
664 | struct stv0299_state* state = NULL; | |
665 | int id; | |
666 | ||
667 | /* allocate memory for the internal state */ | |
b8742700 | 668 | state = kmalloc(sizeof(struct stv0299_state), GFP_KERNEL); |
1da177e4 LT |
669 | if (state == NULL) goto error; |
670 | ||
671 | /* setup the state */ | |
672 | state->config = config; | |
673 | state->i2c = i2c; | |
1da177e4 LT |
674 | state->initialised = 0; |
675 | state->tuner_frequency = 0; | |
676 | state->symbol_rate = 0; | |
677 | state->fec_inner = 0; | |
37650221 | 678 | state->errmode = STATUS_BER; |
1da177e4 LT |
679 | |
680 | /* check if the demod is there */ | |
681 | stv0299_writeregI(state, 0x02, 0x34); /* standby off */ | |
682 | msleep(200); | |
683 | id = stv0299_readreg(state, 0x00); | |
684 | ||
685 | /* register 0x00 contains 0xa1 for STV0299 and STV0299B */ | |
686 | /* register 0x00 might contain 0x80 when returning from standby */ | |
687 | if (id != 0xa1 && id != 0x80) goto error; | |
688 | ||
689 | /* create dvb_frontend */ | |
dea74869 | 690 | memcpy(&state->frontend.ops, &stv0299_ops, sizeof(struct dvb_frontend_ops)); |
9101e622 | 691 | state->frontend.demodulator_priv = state; |
1da177e4 LT |
692 | return &state->frontend; |
693 | ||
694 | error: | |
695 | kfree(state); | |
696 | return NULL; | |
697 | } | |
698 | ||
699 | static struct dvb_frontend_ops stv0299_ops = { | |
700 | ||
701 | .info = { | |
702 | .name = "ST STV0299 DVB-S", | |
703 | .type = FE_QPSK, | |
704 | .frequency_min = 950000, | |
705 | .frequency_max = 2150000, | |
706 | .frequency_stepsize = 125, /* kHz for QPSK frontends */ | |
707 | .frequency_tolerance = 0, | |
708 | .symbol_rate_min = 1000000, | |
709 | .symbol_rate_max = 45000000, | |
710 | .symbol_rate_tolerance = 500, /* ppm */ | |
711 | .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
712 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | | |
713 | FE_CAN_QPSK | | |
714 | FE_CAN_FEC_AUTO | |
715 | }, | |
716 | ||
717 | .release = stv0299_release, | |
718 | ||
719 | .init = stv0299_init, | |
720 | .sleep = stv0299_sleep, | |
c10d14d6 | 721 | .write = stv0299_write, |
53a8ee3e | 722 | .i2c_gate_ctrl = stv0299_i2c_gate_ctrl, |
1da177e4 LT |
723 | |
724 | .set_frontend = stv0299_set_frontend, | |
725 | .get_frontend = stv0299_get_frontend, | |
726 | .get_tune_settings = stv0299_get_tune_settings, | |
727 | ||
728 | .read_status = stv0299_read_status, | |
729 | .read_ber = stv0299_read_ber, | |
730 | .read_signal_strength = stv0299_read_signal_strength, | |
731 | .read_snr = stv0299_read_snr, | |
732 | .read_ucblocks = stv0299_read_ucblocks, | |
733 | ||
734 | .diseqc_send_master_cmd = stv0299_send_diseqc_msg, | |
735 | .diseqc_send_burst = stv0299_send_diseqc_burst, | |
736 | .set_tone = stv0299_set_tone, | |
737 | .set_voltage = stv0299_set_voltage, | |
738 | .dishnetwork_send_legacy_command = stv0299_send_legacy_dish_cmd, | |
739 | }; | |
740 | ||
591ad98d JS |
741 | module_param(debug_legacy_dish_switch, int, 0444); |
742 | MODULE_PARM_DESC(debug_legacy_dish_switch, "Enable timing analysis for Dish Network legacy switches"); | |
743 | ||
1da177e4 LT |
744 | module_param(debug, int, 0644); |
745 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
746 | ||
747 | MODULE_DESCRIPTION("ST STV0299 DVB Demodulator driver"); | |
748 | MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Peter Schildmann, Felix Domke, " | |
53a8ee3e | 749 | "Andreas Oberritter, Andrew de Quincey, Kenneth Aafly"); |
1da177e4 LT |
750 | MODULE_LICENSE("GPL"); |
751 | ||
1da177e4 | 752 | EXPORT_SYMBOL(stv0299_attach); |