[deliverable/linux.git] / drivers / media / dvb / mantis / mantis_hif.c

/*
	Mantis PCI bridge driver

	Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)

	This program is free software; you can redistribute it and/or modify
	it under the terms of the GNU General Public License as published by
	the Free Software Foundation; either version 2 of the License, or
	(at your option) any later version.

	This program is distributed in the hope that it will be useful,
	but WITHOUT ANY WARRANTY; without even the implied warranty of
	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
	GNU General Public License for more details.

	You should have received a copy of the GNU General Public License
	along with this program; if not, write to the Free Software
	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include "mantis_common.h"
#include "mantis_hif.h"
#include "mantis_link.h" /* temporary due to physical layer stuff */

static int mantis_hif_data_available(struct mantis_ca *ca)
{
	struct mantis_pci *mantis = ca->ca_priv;
	int rc = 0;

	if (wait_event_interruptible_timeout(ca->hif_data_wq,
					     ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
					     msecs_to_jiffies(500)) == -ERESTARTSYS) {

		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
		rc = -EREMOTEIO;
	}
	ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
	udelay(2);
	return rc;
}

static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
{
	struct mantis_pci *mantis = ca->ca_priv;
	int rc = 0;

	if (wait_event_interruptible_timeout(ca->hif_opdone_wq,
					     ca->hif_event & MANTIS_SBUF_OPDONE,
					     msecs_to_jiffies(500)) == -ERESTARTSYS) {

		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
		rc = -EREMOTEIO;
	}
	ca->hif_event &= ~MANTIS_SBUF_OPDONE;
	udelay(5);
	return rc;
}


int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 hif_addr = 0, data, count = 4;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
	hif_addr |=  MANTIS_GPIF_HIFRDWRN;
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	hif_addr |=  addr;

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_BRADDR);
	mmwrite(count, MANTIS_GPIF_BRBYTES);

	udelay(20);

	mmwrite(hif_addr, MANTIS_GPIF_ADDR);
	if (mantis_hif_data_available(ca) != 0) {
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer burst read failed", mantis->num);
		return -EREMOTEIO;
	}
	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	data = mmread(MANTIS_GPIF_DIN);

	return (data >> 24) & 0xff;
}

int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
{
	struct mantis_slot *slot = ca->slot;
	struct mantis_pci *mantis = ca->ca_priv;
	u32 hif_addr = 0;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	hif_addr |= addr;

	mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
	mmwrite(data, MANTIS_GPIF_DOUT);
	ca->hif_job_queue = MANTIS_HIF_MEMWR;

	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
	return 0;
}

int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 data, hif_addr = 0;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr |=  MANTIS_GPIF_HIFRDWRN;
	hif_addr |=  MANTIS_GPIF_PCMCIAIOM;
	hif_addr |=  addr;

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
	ca->hif_job_queue = MANTIS_HIF_IOMRD;

	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	udelay(50);
	ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
	data = mmread(MANTIS_GPIF_DIN);
	hif_addr |= MANTIS_GPIF_PCMCIAREG;
	mmwrite(hif_addr, MANTIS_GPIF_ADDR);

	return data;
}

int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 hif_addr = 0;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	hif_addr |=  MANTIS_GPIF_PCMCIAIOM;
	hif_addr |=  addr;

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
	mmwrite(data, MANTIS_GPIF_DOUT);

	ca->hif_job_queue = MANTIS_HIF_IOMWR;
	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	udelay(50);
	ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
	hif_addr |= MANTIS_GPIF_PCMCIAREG;
	mmwrite(hif_addr, MANTIS_GPIF_ADDR);

	return 0;
}

int mantis_hif_init(struct mantis_ca *ca)
{
	struct mantis_slot *slot = ca->slot;
	struct mantis_pci *mantis = ca->ca_priv;
	u32 irqcfg;

	slot[0].slave_cfg = 0x70773028;
	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
	init_waitqueue_head(&ca->hif_data_wq);
	init_waitqueue_head(&ca->hif_opdone_wq);

	irqcfg  = mmread(MANTIS_GPIF_IRQCFG);
	irqcfg |= MANTIS_MASK_BRRDY;
	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);

	return 0;
}

void mantis_hif_exit(struct mantis_ca *ca)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 irqcfg;

	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	irqcfg &= ~MANTIS_MASK_BRRDY;
	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
}
Commit	Line	Data
d8b14f8a MA	1	/*
	2	Mantis PCI bridge driver
	3
	4	Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
	18	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	*/
	20
	21	#include "mantis_common.h"
	22	#include "mantis_hif.h"
	23	#include "mantis_link.h" /* temporary due to physical layer stuff */
	24
	25	static int mantis_hif_data_available(struct mantis_ca *ca)
	26	{
	27	struct mantis_pci *mantis = ca->ca_priv;
	28	int rc = 0;
	29
	30	if (wait_event_interruptible_timeout(ca->hif_data_wq,
	31	ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
	32	msecs_to_jiffies(500)) == -ERESTARTSYS) {
	33
	34	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
	35	rc = -EREMOTEIO;
	36	}
	37	ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
	38	udelay(2);
	39	return rc;
	40	}
	41
	42	static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
	43	{
	44	struct mantis_pci *mantis = ca->ca_priv;
	45	int rc = 0;
	46
	47	if (wait_event_interruptible_timeout(ca->hif_opdone_wq,
	48	ca->hif_event & MANTIS_SBUF_OPDONE,
	49	msecs_to_jiffies(500)) == -ERESTARTSYS) {
	50
	51	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
	52	rc = -EREMOTEIO;
	53	}
	54	ca->hif_event &= ~MANTIS_SBUF_OPDONE;
	55	udelay(5);
	56	return rc;
	57	}
	58
b2d8f5ea	59
d8b14f8a MA	60	int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
	61	{
	62	struct mantis_pci *mantis = ca->ca_priv;
	63	u32 hif_addr = 0, data, count = 4;
	64
2133ffbf	65	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
d8b14f8a MA	66	hif_addr \|= MANTIS_GPIF_HIFRDWRN;
	67	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	68	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	69	hif_addr \|= addr;
	70
b2d8f5ea	71	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_BRADDR);
d8b14f8a MA	72	mmwrite(count, MANTIS_GPIF_BRBYTES);
	73
	74	udelay(20);
	75
a0c59063	76	mmwrite(hif_addr, MANTIS_GPIF_ADDR);
d8b14f8a MA	77	if (mantis_hif_data_available(ca) != 0) {
	78	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer burst read failed", mantis->num);
	79	return -EREMOTEIO;
	80	}
	81	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
	82	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
	83	return -EREMOTEIO;
	84	}
a0c59063	85	data = mmread(MANTIS_GPIF_DIN);
d8b14f8a MA	86
	87	return (data >> 24) & 0xff;
	88	}
	89
	90	int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
	91	{
	92	struct mantis_slot *slot = ca->slot;
	93	struct mantis_pci *mantis = ca->ca_priv;
	94	u32 hif_addr = 0;
	95
2133ffbf	96	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
d8b14f8a MA	97	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	98	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	99	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	100	hif_addr \|= addr;
	101
	102	mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
	103
b2d8f5ea	104	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
a0c59063	105	mmwrite(data, MANTIS_GPIF_DOUT);
d8b14f8a MA	106	ca->hif_job_queue = MANTIS_HIF_MEMWR;
	107
	108	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
	109	ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
	110	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
	111	return -EREMOTEIO;
	112	}
	113	ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
	114	return 0;
	115	}
	116
6053240f	117	int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
c9a750c9 MA	118	{
c9a750c9 MA	119	struct mantis_pci *mantis = ca->ca_priv;
6053240f	120	u32 data, hif_addr = 0;
c9a750c9	121
2133ffbf	122	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
c9a750c9 MA	123	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	124	hif_addr \|= MANTIS_GPIF_HIFRDWRN;
	125	hif_addr \|= MANTIS_GPIF_PCMCIAIOM;
	126	hif_addr \|= addr;
	127
b2d8f5ea	128	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
c9a750c9 MA	129	ca->hif_job_queue = MANTIS_HIF_IOMRD;
	130
	131	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
	132	ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
	133	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
	134	return -EREMOTEIO;
	135	}
	136	udelay(50);
	137	ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
a0c59063	138	data = mmread(MANTIS_GPIF_DIN);
c9a750c9	139	hif_addr \|= MANTIS_GPIF_PCMCIAREG;
a0c59063	140	mmwrite(hif_addr, MANTIS_GPIF_ADDR);
c9a750c9	141
6053240f	142	return data;
c9a750c9 MA	143	}
c9a750c9 MA	144
6053240f	145	int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
c9a750c9 MA	146	{
	147	struct mantis_pci *mantis = ca->ca_priv;
	148	u32 hif_addr = 0;
	149
2133ffbf	150	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
c9a750c9 MA	151	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	152	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	153	hif_addr \|= MANTIS_GPIF_PCMCIAIOM;
	154	hif_addr \|= addr;
	155
b2d8f5ea	156	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
a0c59063	157	mmwrite(data, MANTIS_GPIF_DOUT);
c9a750c9 MA	158
	159	ca->hif_job_queue = MANTIS_HIF_IOMWR;
	160	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
	161	ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
	162	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
	163	return -EREMOTEIO;
	164	}
	165	udelay(50);
	166	ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
	167	hif_addr \|= MANTIS_GPIF_PCMCIAREG;
a0c59063	168	mmwrite(hif_addr, MANTIS_GPIF_ADDR);
c9a750c9 MA	169
	170	return 0;
	171	}
	172
d8b14f8a MA	173	int mantis_hif_init(struct mantis_ca *ca)
d8b14f8a MA	174	{
ac23f4c8	175	struct mantis_slot *slot = ca->slot;
d8b14f8a MA	176	struct mantis_pci *mantis = ca->ca_priv;
	177	u32 irqcfg;
	178
ac23f4c8	179	slot[0].slave_cfg = 0x70773028;
d8b14f8a MA	180	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
	181	init_waitqueue_head(&ca->hif_data_wq);
	182	init_waitqueue_head(&ca->hif_opdone_wq);
	183
	184	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	185	irqcfg \|= MANTIS_MASK_BRRDY;
	186	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
	187
	188	return 0;
	189	}
	190
	191	void mantis_hif_exit(struct mantis_ca *ca)
	192	{
	193	struct mantis_pci *mantis = ca->ca_priv;
	194	u32 irqcfg;
	195
	196	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
	197	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	198	irqcfg &= ~MANTIS_MASK_BRRDY;
	199	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
	200	}