[deliverable/linux.git] / drivers / media / dvb / mantis / mantis_hif.c

/*
	Mantis PCI bridge driver

	Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)

	This program is free software; you can redistribute it and/or modify
	it under the terms of the GNU General Public License as published by
	the Free Software Foundation; either version 2 of the License, or
	(at your option) any later version.

	This program is distributed in the hope that it will be useful,
	but WITHOUT ANY WARRANTY; without even the implied warranty of
	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
	GNU General Public License for more details.

	You should have received a copy of the GNU General Public License
	along with this program; if not, write to the Free Software
	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include "mantis_common.h"
#include "mantis_hif.h"
#include "mantis_link.h" /* temporary due to physical layer stuff */

static int mantis_hif_data_available(struct mantis_ca *ca)
{
	struct mantis_pci *mantis = ca->ca_priv;
	int rc = 0;

	if (wait_event_interruptible_timeout(ca->hif_data_wq,
					     ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
					     msecs_to_jiffies(500)) == -ERESTARTSYS) {

		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
		rc = -EREMOTEIO;
	}
	ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
	udelay(2);
	return rc;
}

static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
{
	struct mantis_pci *mantis = ca->ca_priv;
	int rc = 0;

	if (wait_event_interruptible_timeout(ca->hif_opdone_wq,
					     ca->hif_event & MANTIS_SBUF_OPDONE,
					     msecs_to_jiffies(500)) == -ERESTARTSYS) {

		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
		rc = -EREMOTEIO;
	}
	dprintk(verbose, MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
	ca->hif_event &= ~MANTIS_SBUF_OPDONE;
	udelay(5);
	return rc;
}


int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 hif_addr = 0, data, count = 4;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
	hif_addr |=  MANTIS_GPIF_HIFRDWRN;
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	hif_addr |=  addr;

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_BRADDR);
	mmwrite(count, MANTIS_GPIF_BRBYTES);

	udelay(20);

	mmwrite(hif_addr, MANTIS_GPIF_ADDR);
	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	data = mmread(MANTIS_GPIF_DIN);
	dprintk(verbose, MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
	return (data >> 24) & 0xff;
}

int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
{
	struct mantis_slot *slot = ca->slot;
	struct mantis_pci *mantis = ca->ca_priv;
	u32 hif_addr = 0;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	hif_addr |= addr;

	mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
	mmwrite(data, MANTIS_GPIF_DOUT);

	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	dprintk(verbose, MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);

	return 0;
}

int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 data, hif_addr = 0;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr |=  MANTIS_GPIF_HIFRDWRN;
	hif_addr |=  MANTIS_GPIF_PCMCIAIOM;
	hif_addr |=  addr;

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);

	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	data = mmread(MANTIS_GPIF_DIN);
	dprintk(verbose, MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
	udelay(50);

	return (u8) data;
}

int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 hif_addr = 0;

	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	hif_addr |=  MANTIS_GPIF_PCMCIAIOM;
	hif_addr |=  addr;

	mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
	mmwrite(data, MANTIS_GPIF_DOUT);

	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
		dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
		return -EREMOTEIO;
	}
	dprintk(verbose, MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
	udelay(50);

	return 0;
}

int mantis_hif_init(struct mantis_ca *ca)
{
	struct mantis_slot *slot = ca->slot;
	struct mantis_pci *mantis = ca->ca_priv;
	u32 irqcfg;

	slot[0].slave_cfg = 0x70773028;
	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
	init_waitqueue_head(&ca->hif_data_wq);
	init_waitqueue_head(&ca->hif_opdone_wq);

	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	irqcfg = MANTIS_MASK_BRRDY	|
		 MANTIS_MASK_WRACK	|
		 MANTIS_MASK_EXTIRQ	|
		 MANTIS_MASK_WSTO	|
		 MANTIS_MASK_OTHERR	|
		 MANTIS_MASK_OVFLW;

	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);

	return 0;
}

void mantis_hif_exit(struct mantis_ca *ca)
{
	struct mantis_pci *mantis = ca->ca_priv;
	u32 irqcfg;

	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	irqcfg &= ~MANTIS_MASK_BRRDY;
	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
}
Commit	Line	Data
d8b14f8a MA	1	/*
	2	Mantis PCI bridge driver
	3
	4	Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
	18	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	19	*/
	20
	21	#include "mantis_common.h"
	22	#include "mantis_hif.h"
	23	#include "mantis_link.h" /* temporary due to physical layer stuff */
	24
	25	static int mantis_hif_data_available(struct mantis_ca *ca)
	26	{
	27	struct mantis_pci *mantis = ca->ca_priv;
	28	int rc = 0;
	29
	30	if (wait_event_interruptible_timeout(ca->hif_data_wq,
	31	ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
	32	msecs_to_jiffies(500)) == -ERESTARTSYS) {
	33
	34	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
	35	rc = -EREMOTEIO;
	36	}
	37	ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
	38	udelay(2);
	39	return rc;
	40	}
	41
	42	static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
	43	{
	44	struct mantis_pci *mantis = ca->ca_priv;
	45	int rc = 0;
	46
	47	if (wait_event_interruptible_timeout(ca->hif_opdone_wq,
	48	ca->hif_event & MANTIS_SBUF_OPDONE,
	49	msecs_to_jiffies(500)) == -ERESTARTSYS) {
	50
	51	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
	52	rc = -EREMOTEIO;
	53	}
8b9c385f	54	dprintk(verbose, MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
d8b14f8a MA	55	ca->hif_event &= ~MANTIS_SBUF_OPDONE;
	56	udelay(5);
	57	return rc;
	58	}
	59
b2d8f5ea	60
d8b14f8a MA	61	int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
	62	{
	63	struct mantis_pci *mantis = ca->ca_priv;
	64	u32 hif_addr = 0, data, count = 4;
	65
2133ffbf	66	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
d8b14f8a MA	67	hif_addr \|= MANTIS_GPIF_HIFRDWRN;
	68	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	69	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	70	hif_addr \|= addr;
	71
b2d8f5ea	72	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_BRADDR);
d8b14f8a MA	73	mmwrite(count, MANTIS_GPIF_BRBYTES);
	74
	75	udelay(20);
	76
a0c59063	77	mmwrite(hif_addr, MANTIS_GPIF_ADDR);
d8b14f8a MA	78	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
	79	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
	80	return -EREMOTEIO;
	81	}
a0c59063	82	data = mmread(MANTIS_GPIF_DIN);
8b9c385f	83	dprintk(verbose, MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
d8b14f8a MA	84	return (data >> 24) & 0xff;
	85	}
	86
	87	int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
	88	{
	89	struct mantis_slot *slot = ca->slot;
	90	struct mantis_pci *mantis = ca->ca_priv;
	91	u32 hif_addr = 0;
	92
2133ffbf	93	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
d8b14f8a MA	94	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	95	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	96	hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
	97	hif_addr \|= addr;
	98
	99	mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
b2d8f5ea	100	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
a0c59063	101	mmwrite(data, MANTIS_GPIF_DOUT);
d8b14f8a MA	102
d8b14f8a MA	103	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
d8b14f8a MA	104	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
	105	return -EREMOTEIO;
	106	}
8b9c385f MA	107	dprintk(verbose, MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
8b9c385f MA	108
d8b14f8a MA	109	return 0;
	110	}
	111
6053240f	112	int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
c9a750c9 MA	113	{
c9a750c9 MA	114	struct mantis_pci *mantis = ca->ca_priv;
6053240f	115	u32 data, hif_addr = 0;
c9a750c9	116
2133ffbf	117	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
c9a750c9 MA	118	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	119	hif_addr \|= MANTIS_GPIF_HIFRDWRN;
	120	hif_addr \|= MANTIS_GPIF_PCMCIAIOM;
	121	hif_addr \|= addr;
	122
b2d8f5ea	123	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
c9a750c9 MA	124
c9a750c9 MA	125	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
c9a750c9 MA	126	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
	127	return -EREMOTEIO;
	128	}
a0c59063	129	data = mmread(MANTIS_GPIF_DIN);
8b9c385f	130	dprintk(verbose, MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
8e0d58ec	131	udelay(50);
c9a750c9	132
9c867955	133	return (u8) data;
c9a750c9 MA	134	}
c9a750c9 MA	135
6053240f	136	int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
c9a750c9 MA	137	{
	138	struct mantis_pci *mantis = ca->ca_priv;
	139	u32 hif_addr = 0;
	140
2133ffbf	141	dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
c9a750c9 MA	142	hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
	143	hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
	144	hif_addr \|= MANTIS_GPIF_PCMCIAIOM;
	145	hif_addr \|= addr;
	146
b2d8f5ea	147	mmwrite(hif_addr \| MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
a0c59063	148	mmwrite(data, MANTIS_GPIF_DOUT);
c9a750c9	149
c9a750c9	150	if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
c9a750c9 MA	151	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
	152	return -EREMOTEIO;
	153	}
8b9c385f	154	dprintk(verbose, MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
8e0d58ec	155	udelay(50);
c9a750c9 MA	156
	157	return 0;
	158	}
	159
d8b14f8a MA	160	int mantis_hif_init(struct mantis_ca *ca)
d8b14f8a MA	161	{
ac23f4c8	162	struct mantis_slot *slot = ca->slot;
d8b14f8a MA	163	struct mantis_pci *mantis = ca->ca_priv;
	164	u32 irqcfg;
	165
ac23f4c8	166	slot[0].slave_cfg = 0x70773028;
d8b14f8a MA	167	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
	168	init_waitqueue_head(&ca->hif_data_wq);
	169	init_waitqueue_head(&ca->hif_opdone_wq);
	170
c90d345f MA	171	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	172	irqcfg = MANTIS_MASK_BRRDY \|
	173	MANTIS_MASK_WRACK \|
	174	MANTIS_MASK_EXTIRQ \|
	175	MANTIS_MASK_WSTO \|
	176	MANTIS_MASK_OTHERR \|
	177	MANTIS_MASK_OVFLW;
	178
d8b14f8a MA	179	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
	180
	181	return 0;
	182	}
	183
	184	void mantis_hif_exit(struct mantis_ca *ca)
	185	{
	186	struct mantis_pci *mantis = ca->ca_priv;
	187	u32 irqcfg;
	188
	189	dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
	190	irqcfg = mmread(MANTIS_GPIF_IRQCFG);
	191	irqcfg &= ~MANTIS_MASK_BRRDY;
	192	mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
	193	}