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DVB (2432): LNB power can now be switched off for Activy Budget-S rev GR/AL.
[deliverable/linux.git] / drivers / media / dvb / ttpci / av7110.c
CommitLineData
1da177e4
LT		 1/*
2 * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
3 * av7110.c: initialization and demux stuff
4 *
5 * Copyright (C) 1999-2002 Ralph Metzler
6 * & Marcus Metzler for convergence integrated media GmbH
7 *
8 * originally based on code by:
9 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
27 *
28 *
29 * the project's page is at http://www.linuxtv.org/dvb/
30 */
31
32
33#include <linux/config.h>
34#include <linux/module.h>
35#include <linux/kmod.h>
36#include <linux/delay.h>
37#include <linux/fs.h>
38#include <linux/timer.h>
39#include <linux/poll.h>
40#include <linux/byteorder/swabb.h>
41#include <linux/smp_lock.h>
42
43#include <linux/kernel.h>
44#include <linux/moduleparam.h>
45#include <linux/sched.h>
46#include <linux/types.h>
47#include <linux/fcntl.h>
48#include <linux/interrupt.h>
49#include <linux/string.h>
50#include <linux/pci.h>
51#include <linux/vmalloc.h>
52#include <linux/firmware.h>
53#include <linux/crc32.h>
54#include <linux/i2c.h>
55
56#include <asm/system.h>
57#include <asm/semaphore.h>
58
59#include <linux/dvb/frontend.h>
60
61#include "dvb_frontend.h"
62
63#include "ttpci-eeprom.h"
64#include "av7110.h"
65#include "av7110_hw.h"
66#include "av7110_av.h"
67#include "av7110_ca.h"
68#include "av7110_ipack.h"
69
70#define TS_WIDTH 376
71#define TS_HEIGHT 512
72#define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
73#define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
74
75
76int av7110_debug;
77
78static int vidmode = CVBS_RGB_OUT;
79static int pids_off;
80static int adac = DVB_ADAC_TI;
81static int hw_sections;
82static int rgb_on;
83static int volume = 255;
84static int budgetpatch = 0;
85
86module_param_named(debug, av7110_debug, int, 0644);
87MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
88module_param(vidmode, int, 0444);
89MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
90module_param(pids_off, int, 0444);
91MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
92module_param(adac, int, 0444);
93MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
94module_param(hw_sections, int, 0444);
95MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
96module_param(rgb_on, int, 0444);
97MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control"
98 " signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
99module_param(volume, int, 0444);
100MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
101module_param(budgetpatch, int, 0444);
102MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
103
104static void restart_feeds(struct av7110 *av7110);
105
106static int av7110_num = 0;
107
108#define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
109{\
110 if (fe_func != NULL) { \
111 av7110_copy = fe_func; \
112 fe_func = av7110_func; \
113 } \
114}
115
116
117static void init_av7110_av(struct av7110 *av7110)
118{
ce18a223 119 int ret;
1da177e4
LT		 120 struct saa7146_dev *dev = av7110->dev;
121
122 /* set internal volume control to maximum */
123 av7110->adac_type = DVB_ADAC_TI;
ce18a223 124 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 125 if (ret < 0)
ce18a223 126 printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
1da177e4 127
ce18a223 128 ret = av7710_set_video_mode(av7110, vidmode);
7a2fa90f 129 if (ret < 0)
ce18a223 130 printk("dvb-ttpci:cannot set video mode:%d\n",ret);
1da177e4
LT		 131
132 /* handle different card types */
133 /* remaining inits according to card and frontend type */
134 av7110->analog_tuner_flags = 0;
135 av7110->current_input = 0;
136 if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
137 printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
fdc53a6d 138 av7110->dvb_adapter.num);
1da177e4
LT		 139 av7110->adac_type = DVB_ADAC_CRYSTAL;
140 i2c_writereg(av7110, 0x20, 0x01, 0xd2);
141 i2c_writereg(av7110, 0x20, 0x02, 0x49);
142 i2c_writereg(av7110, 0x20, 0x03, 0x00);
143 i2c_writereg(av7110, 0x20, 0x04, 0x00);
144
145 /**
146 * some special handling for the Siemens DVB-C cards...
147 */
148 } else if (0 == av7110_init_analog_module(av7110)) {
149 /* done. */
150 }
151 else if (dev->pci->subsystem_vendor == 0x110a) {
152 printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
fdc53a6d 153 av7110->dvb_adapter.num);
1da177e4
LT		 154 av7110->adac_type = DVB_ADAC_NONE;
155 }
156 else {
157 av7110->adac_type = adac;
158 printk("dvb-ttpci: adac type set to %d @ card %d\n",
fdc53a6d 159 av7110->dvb_adapter.num, av7110->adac_type);
1da177e4
LT		 160 }
161
162 if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP) {
163 // switch DVB SCART on
ce18a223 164 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
7a2fa90f 165 if (ret < 0)
ce18a223
WR		 166 printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
167 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
7a2fa90f 168 if (ret < 0)
ce18a223 169 printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
1da177e4 170 if (rgb_on &&
6af4ee10
KH		 171 ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
172 (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
173 (av7110->dev->pci->subsystem_device == 0x0000)) {
1da177e4
LT		 174 saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
175 //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
176 }
177 }
178
60edb137
OE		 179 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
180 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
181
ce18a223 182 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 183 if (ret < 0)
ce18a223 184 printk("dvb-ttpci:cannot set volume :%d\n",ret);
1da177e4
LT		 185}
186
187static void recover_arm(struct av7110 *av7110)
188{
189 dprintk(4, "%p\n",av7110);
190
191 av7110_bootarm(av7110);
192 msleep(100);
193 restart_feeds(av7110);
194 av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, av7110->ir_config);
195}
196
197static void arm_error(struct av7110 *av7110)
198{
199 dprintk(4, "%p\n",av7110);
200
201 av7110->arm_errors++;
202 av7110->arm_ready = 0;
203 recover_arm(av7110);
204}
205
206static void av7110_arm_sync(struct av7110 *av7110)
207{
208 av7110->arm_rmmod = 1;
209 wake_up_interruptible(&av7110->arm_wait);
210
211 while (av7110->arm_thread)
212 msleep(1);
213}
214
215static int arm_thread(void *data)
216{
217 struct av7110 *av7110 = data;
218 u16 newloops = 0;
219 int timeout;
220
221 dprintk(4, "%p\n",av7110);
222
9101e622
MCC		 223 lock_kernel();
224 daemonize("arm_mon");
225 sigfillset(&current->blocked);
226 unlock_kernel();
1da177e4
LT		 227
228 av7110->arm_thread = current;
229
230 for (;;) {
231 timeout = wait_event_interruptible_timeout(av7110->arm_wait,
232 av7110->arm_rmmod, 5 * HZ);
233 if (-ERESTARTSYS == timeout || av7110->arm_rmmod) {
234 /* got signal or told to quit*/
235 break;
236 }
237
238 if (!av7110->arm_ready)
239 continue;
240
241 if (down_interruptible(&av7110->dcomlock))
242 break;
243
244 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
245 up(&av7110->dcomlock);
246
247 if (newloops == av7110->arm_loops) {
248 printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
fdc53a6d 249 av7110->dvb_adapter.num);
1da177e4
LT		 250
251 arm_error(av7110);
252 av7710_set_video_mode(av7110, vidmode);
253
254 init_av7110_av(av7110);
255
256 if (down_interruptible(&av7110->dcomlock))
257 break;
258
259 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
260 up(&av7110->dcomlock);
261 }
262 av7110->arm_loops = newloops;
263 }
264
265 av7110->arm_thread = NULL;
266 return 0;
267}
268
269
1da177e4
LT		 270/****************************************************************************
271 * IRQ handling
272 ****************************************************************************/
273
274static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
275 u8 *buffer2, size_t buffer2_len,
276 struct dvb_demux_filter *dvbdmxfilter,
277 enum dmx_success success,
278 struct av7110 *av7110)
279{
280 if (!dvbdmxfilter->feed->demux->dmx.frontend)
281 return 0;
282 if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
283 return 0;
284
285 switch (dvbdmxfilter->type) {
286 case DMX_TYPE_SEC:
287 if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
288 return 0;
289 if (dvbdmxfilter->doneq) {
290 struct dmx_section_filter *filter = &dvbdmxfilter->filter;
291 int i;
292 u8 xor, neq = 0;
293
294 for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
295 xor = filter->filter_value[i] ^ buffer1[i];
296 neq |= dvbdmxfilter->maskandnotmode[i] & xor;
297 }
298 if (!neq)
299 return 0;
300 }
301 return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
302 buffer2, buffer2_len,
303 &dvbdmxfilter->filter,
304 DMX_OK);
305 case DMX_TYPE_TS:
306 if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
307 return 0;
308 if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
309 return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
310 buffer2, buffer2_len,
311 &dvbdmxfilter->feed->feed.ts,
312 DMX_OK);
313 else
314 av7110_p2t_write(buffer1, buffer1_len,
315 dvbdmxfilter->feed->pid,
316 &av7110->p2t_filter[dvbdmxfilter->index]);
317 default:
318 return 0;
319 }
320}
321
322
323//#define DEBUG_TIMING
324static inline void print_time(char *s)
325{
326#ifdef DEBUG_TIMING
327 struct timeval tv;
328 do_gettimeofday(&tv);
329 printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
330#endif
331}
332
333#define DEBI_READ 0
334#define DEBI_WRITE 1
335static inline void start_debi_dma(struct av7110 *av7110, int dir,
336 unsigned long addr, unsigned int len)
337{
338 dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
339 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
340 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
341 return;
342 }
343
344 SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
345 SAA7146_IER_ENABLE(av7110->dev, MASK_19);
346 if (len < 5)
347 len = 5; /* we want a real DEBI DMA */
348 if (dir == DEBI_WRITE)
349 iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
350 else
351 irdebi(av7110, DEBISWAB, addr, 0, len);
352}
353
354static void debiirq(unsigned long data)
355{
356 struct av7110 *av7110 = (struct av7110 *) data;
357 int type = av7110->debitype;
358 int handle = (type >> 8) & 0x1f;
359 unsigned int xfer = 0;
360
361 print_time("debi");
362 dprintk(4, "type 0x%04x\n", type);
363
364 if (type == -1) {
365 printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
366 jiffies, saa7146_read(av7110->dev, PSR),
367 saa7146_read(av7110->dev, SSR));
368 goto debi_done;
369 }
370 av7110->debitype = -1;
371
372 switch (type & 0xff) {
373
374 case DATA_TS_RECORD:
375 dvb_dmx_swfilter_packets(&av7110->demux,
376 (const u8 *) av7110->debi_virt,
377 av7110->debilen / 188);
378 xfer = RX_BUFF;
379 break;
380
381 case DATA_PES_RECORD:
382 if (av7110->demux.recording)
383 av7110_record_cb(&av7110->p2t[handle],
384 (u8 *) av7110->debi_virt,
385 av7110->debilen);
386 xfer = RX_BUFF;
387 break;
388
389 case DATA_IPMPE:
390 case DATA_FSECTION:
391 case DATA_PIPING:
392 if (av7110->handle2filter[handle])
393 DvbDmxFilterCallback((u8 *)av7110->debi_virt,
394 av7110->debilen, NULL, 0,
395 av7110->handle2filter[handle],
396 DMX_OK, av7110);
397 xfer = RX_BUFF;
398 break;
399
400 case DATA_CI_GET:
401 {
402 u8 *data = av7110->debi_virt;
403
404 if ((data[0] < 2) && data[2] == 0xff) {
405 int flags = 0;
406 if (data[5] > 0)
407 flags |= CA_CI_MODULE_PRESENT;
408 if (data[5] > 5)
409 flags |= CA_CI_MODULE_READY;
410 av7110->ci_slot[data[0]].flags = flags;
411 } else
412 ci_get_data(&av7110->ci_rbuffer,
413 av7110->debi_virt,
414 av7110->debilen);
415 xfer = RX_BUFF;
416 break;
417 }
418
419 case DATA_COMMON_INTERFACE:
420 CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
421#if 0
422 {
423 int i;
424
425 printk("av7110%d: ", av7110->num);
426 printk("%02x ", *(u8 *)av7110->debi_virt);
427 printk("%02x ", *(1+(u8 *)av7110->debi_virt));
428 for (i = 2; i < av7110->debilen; i++)
429 printk("%02x ", (*(i+(unsigned char *)av7110->debi_virt)));
430 for (i = 2; i < av7110->debilen; i++)
431 printk("%c", chtrans(*(i+(unsigned char *)av7110->debi_virt)));
432
433 printk("\n");
434 }
435#endif
436 xfer = RX_BUFF;
437 break;
438
439 case DATA_DEBUG_MESSAGE:
440 ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
441 printk("%s\n", (s8 *) av7110->debi_virt);
442 xfer = RX_BUFF;
443 break;
444
445 case DATA_CI_PUT:
446 dprintk(4, "debi DATA_CI_PUT\n");
447 case DATA_MPEG_PLAY:
448 dprintk(4, "debi DATA_MPEG_PLAY\n");
449 case DATA_BMP_LOAD:
450 dprintk(4, "debi DATA_BMP_LOAD\n");
451 xfer = TX_BUFF;
452 break;
453 default:
454 break;
455 }
456debi_done:
457 spin_lock(&av7110->debilock);
458 if (xfer)
459 iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
460 ARM_ClearMailBox(av7110);
461 spin_unlock(&av7110->debilock);
462}
463
464/* irq from av7110 firmware writing the mailbox register in the DPRAM */
465static void gpioirq(unsigned long data)
466{
467 struct av7110 *av7110 = (struct av7110 *) data;
468 u32 rxbuf, txbuf;
469 int len;
470
471 if (av7110->debitype != -1)
472 /* we shouldn't get any irq while a debi xfer is running */
473 printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
474 jiffies, saa7146_read(av7110->dev, PSR),
475 saa7146_read(av7110->dev, SSR));
476
477 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
478 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __FUNCTION__);
479 BUG(); /* maybe we should try resetting the debi? */
480 }
481
482 spin_lock(&av7110->debilock);
483 ARM_ClearIrq(av7110);
484
485 /* see what the av7110 wants */
486 av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
487 av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
488 rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
489 txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
490 len = (av7110->debilen + 3) & ~3;
491
492 print_time("gpio");
493 dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
494
495 switch (av7110->debitype & 0xff) {
496
497 case DATA_TS_PLAY:
498 case DATA_PES_PLAY:
499 break;
500
501 case DATA_MPEG_VIDEO_EVENT:
502 {
503 u32 h_ar;
504 struct video_event event;
505
506 av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
507 h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
508
509 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
510 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
511
512 av7110->video_size.h = h_ar & 0xfff;
513 dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
514 av7110->video_size.w,
515 av7110->video_size.h,
516 av7110->video_size.aspect_ratio);
517
518 event.type = VIDEO_EVENT_SIZE_CHANGED;
519 event.u.size.w = av7110->video_size.w;
520 event.u.size.h = av7110->video_size.h;
521 switch ((h_ar >> 12) & 0xf)
522 {
523 case 3:
524 av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
525 event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
526 av7110->videostate.video_format = VIDEO_FORMAT_16_9;
527 break;
528 case 4:
529 av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
530 event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
531 av7110->videostate.video_format = VIDEO_FORMAT_221_1;
532 break;
533 default:
534 av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
535 event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
536 av7110->videostate.video_format = VIDEO_FORMAT_4_3;
537 }
538 dvb_video_add_event(av7110, &event);
539 break;
540 }
541
542 case DATA_CI_PUT:
543 {
544 int avail;
545 struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
546
547 avail = dvb_ringbuffer_avail(cibuf);
548 if (avail <= 2) {
549 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
550 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
551 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
552 break;
553 }
554 len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
555 len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
556 if (avail < len + 2) {
557 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
558 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
559 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
560 break;
561 }
562 DVB_RINGBUFFER_SKIP(cibuf, 2);
563
564 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len, 0);
565
566 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
567 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
568 dprintk(8, "DMA: CI\n");
569 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
570 spin_unlock(&av7110->debilock);
571 wake_up(&cibuf->queue);
572 return;
573 }
574
575 case DATA_MPEG_PLAY:
576 if (!av7110->playing) {
577 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
578 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
579 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
580 break;
581 }
582 len = 0;
583 if (av7110->debitype & 0x100) {
584 spin_lock(&av7110->aout.lock);
585 len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
586 spin_unlock(&av7110->aout.lock);
587 }
588 if (len <= 0 && (av7110->debitype & 0x200)
589 &&av7110->videostate.play_state != VIDEO_FREEZED) {
590 spin_lock(&av7110->avout.lock);
591 len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
592 spin_unlock(&av7110->avout.lock);
593 }
594 if (len <= 0) {
595 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
596 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
597 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
598 break;
599 }
600 dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
601 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
602 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
603 dprintk(8, "DMA: MPEG_PLAY\n");
604 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
605 spin_unlock(&av7110->debilock);
606 return;
607
608 case DATA_BMP_LOAD:
609 len = av7110->debilen;
610 dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
611 if (!len) {
612 av7110->bmp_state = BMP_LOADED;
613 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
614 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
615 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
616 wake_up(&av7110->bmpq);
617 dprintk(8, "gpio DATA_BMP_LOAD done\n");
618 break;
619 }
620 if (len > av7110->bmplen)
621 len = av7110->bmplen;
622 if (len > 2 * 1024)
623 len = 2 * 1024;
624 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
625 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
626 memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
627 av7110->bmpp += len;
628 av7110->bmplen -= len;
629 dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
630 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
631 spin_unlock(&av7110->debilock);
632 return;
633
634 case DATA_CI_GET:
635 case DATA_COMMON_INTERFACE:
636 case DATA_FSECTION:
637 case DATA_IPMPE:
638 case DATA_PIPING:
639 if (!len || len > 4 * 1024) {
640 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
641 break;
642 }
643 /* fall through */
644
645 case DATA_TS_RECORD:
646 case DATA_PES_RECORD:
647 dprintk(8, "DMA: TS_REC etc.\n");
648 start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
649 spin_unlock(&av7110->debilock);
650 return;
651
652 case DATA_DEBUG_MESSAGE:
653 if (!len || len > 0xff) {
654 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
655 break;
656 }
657 start_debi_dma(av7110, DEBI_READ, Reserved, len);
658 spin_unlock(&av7110->debilock);
659 return;
660
661 case DATA_IRCOMMAND:
03388ae3
OE		 662 if (av7110->ir_handler)
663 av7110->ir_handler(av7110,
664 swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
1da177e4
LT		 665 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
666 break;
667
668 default:
669 printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
670 av7110->debitype, av7110->debilen);
671 break;
672 }
673 av7110->debitype = -1;
674 ARM_ClearMailBox(av7110);
675 spin_unlock(&av7110->debilock);
676}
677
678
679#ifdef CONFIG_DVB_AV7110_OSD
680static int dvb_osd_ioctl(struct inode *inode, struct file *file,
681 unsigned int cmd, void *parg)
682{
683 struct dvb_device *dvbdev = (struct dvb_device *) file->private_data;
684 struct av7110 *av7110 = (struct av7110 *) dvbdev->priv;
685
686 dprintk(4, "%p\n", av7110);
687
688 if (cmd == OSD_SEND_CMD)
689 return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
690 if (cmd == OSD_GET_CAPABILITY)
691 return av7110_osd_capability(av7110, (osd_cap_t *) parg);
692
693 return -EINVAL;
694}
695
696
697static struct file_operations dvb_osd_fops = {
698 .owner = THIS_MODULE,
699 .ioctl = dvb_generic_ioctl,
700 .open = dvb_generic_open,
701 .release = dvb_generic_release,
702};
703
704static struct dvb_device dvbdev_osd = {
705 .priv = NULL,
706 .users = 1,
707 .writers = 1,
708 .fops = &dvb_osd_fops,
709 .kernel_ioctl = dvb_osd_ioctl,
710};
711#endif /* CONFIG_DVB_AV7110_OSD */
712
713
714static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
715 u16 subpid, u16 pcrpid)
716{
717 dprintk(4, "%p\n", av7110);
718
719 if (vpid == 0x1fff || apid == 0x1fff ||
720 ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
721 vpid = apid = ttpid = subpid = pcrpid = 0;
722 av7110->pids[DMX_PES_VIDEO] = 0;
723 av7110->pids[DMX_PES_AUDIO] = 0;
724 av7110->pids[DMX_PES_TELETEXT] = 0;
725 av7110->pids[DMX_PES_PCR] = 0;
726 }
727
728 return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 5,
729 pcrpid, vpid, apid, ttpid, subpid);
730}
731
ce18a223 732int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
1da177e4
LT		 733 u16 subpid, u16 pcrpid)
734{
ce18a223 735 int ret = 0;
1da177e4
LT		 736 dprintk(4, "%p\n", av7110);
737
738 if (down_interruptible(&av7110->pid_mutex))
ce18a223 739 return -ERESTARTSYS;
1da177e4
LT		 740
741 if (!(vpid & 0x8000))
742 av7110->pids[DMX_PES_VIDEO] = vpid;
743 if (!(apid & 0x8000))
744 av7110->pids[DMX_PES_AUDIO] = apid;
745 if (!(ttpid & 0x8000))
746 av7110->pids[DMX_PES_TELETEXT] = ttpid;
747 if (!(pcrpid & 0x8000))
748 av7110->pids[DMX_PES_PCR] = pcrpid;
749
750 av7110->pids[DMX_PES_SUBTITLE] = 0;
751
752 if (av7110->fe_synced) {
753 pcrpid = av7110->pids[DMX_PES_PCR];
ce18a223 754 ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
1da177e4
LT		 755 }
756
757 up(&av7110->pid_mutex);
ce18a223 758 return ret;
1da177e4
LT		 759}
760
761
762/******************************************************************************
763 * hardware filter functions
764 ******************************************************************************/
765
766static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
767{
768 struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
769 struct av7110 *av7110 = (struct av7110 *) dvbdmxfeed->demux->priv;
770 u16 buf[20];
771 int ret, i;
772 u16 handle;
773// u16 mode = 0x0320;
774 u16 mode = 0xb96a;
775
776 dprintk(4, "%p\n", av7110);
777
778 if (dvbdmxfilter->type == DMX_TYPE_SEC) {
779 if (hw_sections) {
780 buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
781 dvbdmxfilter->maskandmode[0];
782 for (i = 3; i < 18; i++)
783 buf[i + 4 - 2] =
784 (dvbdmxfilter->filter.filter_value[i] << 8) |
785 dvbdmxfilter->maskandmode[i];
786 mode = 4;
787 }
788 } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
789 !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
790 av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
791 }
792
793 buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
794 buf[1] = 16;
795 buf[2] = dvbdmxfeed->pid;
796 buf[3] = mode;
797
798 ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
799 if (ret != 0 || handle >= 32) {
800 printk("dvb-ttpci: %s error buf %04x %04x %04x %04x "
ce18a223 801 "ret %d handle %04x\n",
1da177e4
LT		 802 __FUNCTION__, buf[0], buf[1], buf[2], buf[3],
803 ret, handle);
804 dvbdmxfilter->hw_handle = 0xffff;
ce18a223
WR		 805 if (!ret)
806 ret = -1;
807 return ret;
1da177e4
LT		 808 }
809
810 av7110->handle2filter[handle] = dvbdmxfilter;
811 dvbdmxfilter->hw_handle = handle;
812
813 return ret;
814}
815
816static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
817{
818 struct av7110 *av7110 = (struct av7110 *) dvbdmxfilter->feed->demux->priv;
819 u16 buf[3];
820 u16 answ[2];
821 int ret;
822 u16 handle;
823
824 dprintk(4, "%p\n", av7110);
825
826 handle = dvbdmxfilter->hw_handle;
827 if (handle >= 32) {
828 printk("%s tried to stop invalid filter %04x, filter type = %x\n",
829 __FUNCTION__, handle, dvbdmxfilter->type);
ce18a223 830 return -EINVAL;
1da177e4
LT		 831 }
832
833 av7110->handle2filter[handle] = NULL;
834
835 buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
836 buf[1] = 1;
837 buf[2] = handle;
838 ret = av7110_fw_request(av7110, buf, 3, answ, 2);
839 if (ret != 0 || answ[1] != handle) {
840 printk("dvb-ttpci: %s error cmd %04x %04x %04x ret %x "
841 "resp %04x %04x pid %d\n",
842 __FUNCTION__, buf[0], buf[1], buf[2], ret,
843 answ[0], answ[1], dvbdmxfilter->feed->pid);
ce18a223
WR		 844 if (!ret)
845 ret = -1;
1da177e4
LT		 846 }
847 return ret;
848}
849
850
ce18a223 851static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT		 852{
853 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
854 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
855 u16 *pid = dvbdmx->pids, npids[5];
856 int i;
ce18a223 857 int ret = 0;
1da177e4
LT		 858
859 dprintk(4, "%p\n", av7110);
860
861 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
862 i = dvbdmxfeed->pes_type;
863 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
864 if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
865 npids[i] = 0;
ce18a223
WR		 866 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
867 if (!ret)
868 ret = StartHWFilter(dvbdmxfeed->filter);
869 return ret;
870 }
871 if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
872 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
873 if (ret)
874 return ret;
1da177e4 875 }
1da177e4
LT		 876
877 if (dvbdmxfeed->pes_type < 2 && npids[0])
878 if (av7110->fe_synced)
ce18a223
WR		 879 {
880 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
881 if (ret)
882 return ret;
883 }
1da177e4
LT		 884
885 if ((dvbdmxfeed->ts_type & TS_PACKET)) {
886 if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
ce18a223 887 ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
1da177e4 888 if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
ce18a223 889 ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
1da177e4 890 }
ce18a223 891 return ret;
1da177e4
LT		 892}
893
ce18a223 894static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT		 895{
896 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
897 struct av7110 *av7110 = (struct av7110 *) dvbdmx->priv;
898 u16 *pid = dvbdmx->pids, npids[5];
899 int i;
900
ce18a223
WR		 901 int ret = 0;
902
1da177e4
LT		 903 dprintk(4, "%p\n", av7110);
904
905 if (dvbdmxfeed->pes_type <= 1) {
ce18a223
WR		 906 ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
907 if (ret)
908 return ret;
1da177e4
LT		 909 if (!av7110->rec_mode)
910 dvbdmx->recording = 0;
911 if (!av7110->playing)
912 dvbdmx->playing = 0;
913 }
914 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
915 i = dvbdmxfeed->pes_type;
916 switch (i) {
917 case 2: //teletext
918 if (dvbdmxfeed->ts_type & TS_PACKET)
ce18a223 919 ret = StopHWFilter(dvbdmxfeed->filter);
1da177e4
LT		 920 npids[2] = 0;
921 break;
922 case 0:
923 case 1:
924 case 4:
925 if (!pids_off)
ce18a223 926 return 0;
1da177e4
LT		 927 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
928 break;
929 }
ce18a223
WR		 930 if (!ret)
931 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
932 return ret;
1da177e4
LT		 933}
934
935static int av7110_start_feed(struct dvb_demux_feed *feed)
936{
937 struct dvb_demux *demux = feed->demux;
938 struct av7110 *av7110 = demux->priv;
ce18a223 939 int ret = 0;
1da177e4
LT		 940
941 dprintk(4, "%p\n", av7110);
942
943 if (!demux->dmx.frontend)
944 return -EINVAL;
945
946 if (feed->pid > 0x1fff)
947 return -EINVAL;
948
949 if (feed->type == DMX_TYPE_TS) {
950 if ((feed->ts_type & TS_DECODER) &&
951 (feed->pes_type < DMX_TS_PES_OTHER)) {
952 switch (demux->dmx.frontend->source) {
953 case DMX_MEMORY_FE:
954 if (feed->ts_type & TS_DECODER)
955 if (feed->pes_type < 2 &&
956 !(demux->pids[0] & 0x8000) &&
957 !(demux->pids[1] & 0x8000)) {
958 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
959 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
ce18a223
WR		 960 ret = av7110_av_start_play(av7110,RP_AV);
961 if (!ret)
962 demux->playing = 1;
1da177e4
LT		 963 }
964 break;
965 default:
ce18a223 966 ret = dvb_feed_start_pid(feed);
1da177e4
LT		 967 break;
968 }
969 } else if ((feed->ts_type & TS_PACKET) &&
970 (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
ce18a223 971 ret = StartHWFilter(feed->filter);
1da177e4
LT		 972 }
973 }
974
ce18a223 975 else if (feed->type == DMX_TYPE_SEC) {
1da177e4
LT		 976 int i;
977
978 for (i = 0; i < demux->filternum; i++) {
979 if (demux->filter[i].state != DMX_STATE_READY)
980 continue;
981 if (demux->filter[i].type != DMX_TYPE_SEC)
982 continue;
983 if (demux->filter[i].filter.parent != &feed->feed.sec)
984 continue;
985 demux->filter[i].state = DMX_STATE_GO;
ce18a223
WR		 986 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
987 ret = StartHWFilter(&demux->filter[i]);
988 if (ret)
989 break;
990 }
1da177e4
LT		 991 }
992 }
993
ce18a223 994 return ret;
1da177e4
LT		 995}
996
997
998static int av7110_stop_feed(struct dvb_demux_feed *feed)
999{
1000 struct dvb_demux *demux = feed->demux;
1001 struct av7110 *av7110 = demux->priv;
12ba0504 1002 int i, rc, ret = 0;
1da177e4
LT		 1003 dprintk(4, "%p\n", av7110);
1004
1005 if (feed->type == DMX_TYPE_TS) {
1006 if (feed->ts_type & TS_DECODER) {
1007 if (feed->pes_type >= DMX_TS_PES_OTHER ||
1008 !demux->pesfilter[feed->pes_type])
1009 return -EINVAL;
1010 demux->pids[feed->pes_type] |= 0x8000;
1011 demux->pesfilter[feed->pes_type] = NULL;
1012 }
1013 if (feed->ts_type & TS_DECODER &&
1014 feed->pes_type < DMX_TS_PES_OTHER) {
ce18a223 1015 ret = dvb_feed_stop_pid(feed);
1da177e4
LT		 1016 } else
1017 if ((feed->ts_type & TS_PACKET) &&
1018 (demux->dmx.frontend->source != DMX_MEMORY_FE))
ce18a223 1019 ret = StopHWFilter(feed->filter);
1da177e4
LT		 1020 }
1021
ce18a223 1022 if (!ret && feed->type == DMX_TYPE_SEC) {
12ba0504 1023 for (i = 0; i<demux->filternum; i++) {
1da177e4
LT		 1024 if (demux->filter[i].state == DMX_STATE_GO &&
1025 demux->filter[i].filter.parent == &feed->feed.sec) {
1026 demux->filter[i].state = DMX_STATE_READY;
ce18a223 1027 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
12ba0504
JS		 1028 rc = StopHWFilter(&demux->filter[i]);
1029 if (!ret)
1030 ret = rc;
1031 /* keep going, stop as many filters as possible */
ce18a223 1032 }
12ba0504 1033 }
1da177e4
LT		 1034 }
1035 }
1036
ce18a223 1037 return ret;
1da177e4
LT		 1038}
1039
1040
1041static void restart_feeds(struct av7110 *av7110)
1042{
1043 struct dvb_demux *dvbdmx = &av7110->demux;
1044 struct dvb_demux_feed *feed;
1045 int mode;
1046 int i;
1047
1048 dprintk(4, "%p\n", av7110);
1049
1050 mode = av7110->playing;
1051 av7110->playing = 0;
1052 av7110->rec_mode = 0;
1053
1054 for (i = 0; i < dvbdmx->filternum; i++) {
1055 feed = &dvbdmx->feed[i];
1056 if (feed->state == DMX_STATE_GO)
1057 av7110_start_feed(feed);
1058 }
1059
1060 if (mode)
1061 av7110_av_start_play(av7110, mode);
1062}
1063
1064static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
1065 uint64_t *stc, unsigned int *base)
1066{
1067 int ret;
1068 u16 fwstc[4];
1069 u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
1070 struct dvb_demux *dvbdemux;
1071 struct av7110 *av7110;
1072
1073 /* pointer casting paranoia... */
1074 if (!demux)
1075 BUG();
1076 dvbdemux = (struct dvb_demux *) demux->priv;
1077 if (!dvbdemux)
1078 BUG();
1079 av7110 = (struct av7110 *) dvbdemux->priv;
1080
1081 dprintk(4, "%p\n", av7110);
1082
1083 if (num != 0)
1084 return -EINVAL;
1085
1086 ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
1087 if (ret) {
1088 printk(KERN_ERR "%s: av7110_fw_request error\n", __FUNCTION__);
ce18a223 1089 return ret;
1da177e4
LT		 1090 }
1091 dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
1092 fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
1093
1094 *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
1095 (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
1096 *base = 1;
1097
1098 dprintk(4, "stc = %lu\n", (unsigned long)*stc);
1099
1100 return 0;
1101}
1102
1103
1104/******************************************************************************
1105 * SEC device file operations
1106 ******************************************************************************/
1107
1108
1109static int av7110_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
1110{
1111 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1112
1113 switch (tone) {
1114 case SEC_TONE_ON:
ce18a223 1115 return Set22K(av7110, 1);
1da177e4
LT		 1116
1117 case SEC_TONE_OFF:
ce18a223 1118 return Set22K(av7110, 0);
1da177e4
LT		 1119
1120 default:
1121 return -EINVAL;
1122 }
1da177e4
LT		 1123}
1124
1125static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
1126 struct dvb_diseqc_master_cmd* cmd)
1127{
1128 struct av7110* av7110 = fe->dvb->priv;
1129
ce18a223 1130 return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
1da177e4
LT		 1131}
1132
1133static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
1134 fe_sec_mini_cmd_t minicmd)
1135{
1136 struct av7110* av7110 = fe->dvb->priv;
1137
ce18a223 1138 return av7110_diseqc_send(av7110, 0, NULL, minicmd);
1da177e4
LT		 1139}
1140
1141/* simplified code from budget-core.c */
1142static int stop_ts_capture(struct av7110 *budget)
1143{
1144 dprintk(2, "budget: %p\n", budget);
1145
1146 if (--budget->feeding1)
1147 return budget->feeding1;
1148 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
1149 SAA7146_IER_DISABLE(budget->dev, MASK_10);
1150 SAA7146_ISR_CLEAR(budget->dev, MASK_10);
1151 return 0;
1152}
1153
1154static int start_ts_capture(struct av7110 *budget)
1155{
1156 dprintk(2, "budget: %p\n", budget);
1157
1158 if (budget->feeding1)
1159 return ++budget->feeding1;
1160 memset(budget->grabbing, 0x00, TS_HEIGHT * TS_WIDTH);
1161 budget->tsf = 0xff;
1162 budget->ttbp = 0;
1163 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1164 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
1165 return ++budget->feeding1;
1166}
1167
1168static int budget_start_feed(struct dvb_demux_feed *feed)
1169{
1170 struct dvb_demux *demux = feed->demux;
1171 struct av7110 *budget = (struct av7110 *) demux->priv;
1172 int status;
1173
1174 dprintk(2, "av7110: %p\n", budget);
1175
1176 spin_lock(&budget->feedlock1);
1177 feed->pusi_seen = 0; /* have a clean section start */
1178 status = start_ts_capture(budget);
1179 spin_unlock(&budget->feedlock1);
1180 return status;
1181}
1182
1183static int budget_stop_feed(struct dvb_demux_feed *feed)
1184{
1185 struct dvb_demux *demux = feed->demux;
1186 struct av7110 *budget = (struct av7110 *) demux->priv;
1187 int status;
1188
1189 dprintk(2, "budget: %p\n", budget);
1190
1191 spin_lock(&budget->feedlock1);
1192 status = stop_ts_capture(budget);
1193 spin_unlock(&budget->feedlock1);
1194 return status;
1195}
1196
1197static void vpeirq(unsigned long data)
1198{
1199 struct av7110 *budget = (struct av7110 *) data;
1200 u8 *mem = (u8 *) (budget->grabbing);
1201 u32 olddma = budget->ttbp;
1202 u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
1203
1204 if (!budgetpatch) {
1205 printk("av7110.c: vpeirq() called while budgetpatch disabled!"
1206 " check saa7146 IER register\n");
1207 BUG();
1208 }
1209 /* nearest lower position divisible by 188 */
1210 newdma -= newdma % 188;
1211
1212 if (newdma >= TS_BUFLEN)
1213 return;
1214
1215 budget->ttbp = newdma;
1216
1217 if (!budget->feeding1 || (newdma == olddma))
1218 return;
1219
1220#if 0
1221 /* track rps1 activity */
1222 printk("vpeirq: %02x Event Counter 1 0x%04x\n",
1223 mem[olddma],
1224 saa7146_read(budget->dev, EC1R) & 0x3fff);
1225#endif
1226
1227 if (newdma > olddma)
1228 /* no wraparound, dump olddma..newdma */
1229 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (newdma - olddma) / 188);
1230 else {
1231 /* wraparound, dump olddma..buflen and 0..newdma */
1232 dvb_dmx_swfilter_packets(&budget->demux1, mem + olddma, (TS_BUFLEN - olddma) / 188);
1233 dvb_dmx_swfilter_packets(&budget->demux1, mem, newdma / 188);
1234 }
1235}
1236
1237static int av7110_register(struct av7110 *av7110)
1238{
1239 int ret, i;
1240 struct dvb_demux *dvbdemux = &av7110->demux;
1241 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1242
1243 dprintk(4, "%p\n", av7110);
1244
1245 if (av7110->registered)
1246 return -1;
1247
1248 av7110->registered = 1;
1249
1250 dvbdemux->priv = (void *) av7110;
1251
1252 for (i = 0; i < 32; i++)
1253 av7110->handle2filter[i] = NULL;
1254
1255 dvbdemux->filternum = 32;
1256 dvbdemux->feednum = 32;
1257 dvbdemux->start_feed = av7110_start_feed;
1258 dvbdemux->stop_feed = av7110_stop_feed;
1259 dvbdemux->write_to_decoder = av7110_write_to_decoder;
1260 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1261 DMX_MEMORY_BASED_FILTERING);
1262
1263 dvb_dmx_init(&av7110->demux);
1264 av7110->demux.dmx.get_stc = dvb_get_stc;
1265
1266 av7110->dmxdev.filternum = 32;
1267 av7110->dmxdev.demux = &dvbdemux->dmx;
1268 av7110->dmxdev.capabilities = 0;
1269
fdc53a6d 1270 dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
1da177e4
LT		 1271
1272 av7110->hw_frontend.source = DMX_FRONTEND_0;
1273
1274 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1275
1276 if (ret < 0)
1277 return ret;
1278
1279 av7110->mem_frontend.source = DMX_MEMORY_FE;
1280
1281 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1282
1283 if (ret < 0)
1284 return ret;
1285
1286 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
1287 &av7110->hw_frontend);
1288 if (ret < 0)
1289 return ret;
1290
1291 av7110_av_register(av7110);
1292 av7110_ca_register(av7110);
1293
1294#ifdef CONFIG_DVB_AV7110_OSD
fdc53a6d 1295 dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
1da177e4
LT		 1296 &dvbdev_osd, av7110, DVB_DEVICE_OSD);
1297#endif
1298
fdc53a6d 1299 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
1da177e4
LT		 1300
1301 if (budgetpatch) {
1302 /* initialize software demux1 without its own frontend
1303 * demux1 hardware is connected to frontend0 of demux0
1304 */
1305 dvbdemux1->priv = (void *) av7110;
1306
1307 dvbdemux1->filternum = 256;
1308 dvbdemux1->feednum = 256;
1309 dvbdemux1->start_feed = budget_start_feed;
1310 dvbdemux1->stop_feed = budget_stop_feed;
1311 dvbdemux1->write_to_decoder = NULL;
1312
1313 dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1314 DMX_MEMORY_BASED_FILTERING);
1315
1316 dvb_dmx_init(&av7110->demux1);
1317
1318 av7110->dmxdev1.filternum = 256;
1319 av7110->dmxdev1.demux = &dvbdemux1->dmx;
1320 av7110->dmxdev1.capabilities = 0;
1321
fdc53a6d 1322 dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
1da177e4 1323
fdc53a6d 1324 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
1da177e4
LT		 1325 printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
1326 }
1327 return 0;
1328}
1329
1330
1331static void dvb_unregister(struct av7110 *av7110)
1332{
1333 struct dvb_demux *dvbdemux = &av7110->demux;
1334 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1335
1336 dprintk(4, "%p\n", av7110);
1337
1338 if (!av7110->registered)
1339 return;
1340
1341 if (budgetpatch) {
1342 dvb_net_release(&av7110->dvb_net1);
1343 dvbdemux->dmx.close(&dvbdemux1->dmx);
1344 dvb_dmxdev_release(&av7110->dmxdev1);
1345 dvb_dmx_release(&av7110->demux1);
1346 }
1347
1348 dvb_net_release(&av7110->dvb_net);
1349
1350 dvbdemux->dmx.close(&dvbdemux->dmx);
1351 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1352 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1353
1354 dvb_dmxdev_release(&av7110->dmxdev);
1355 dvb_dmx_release(&av7110->demux);
1356
1357 if (av7110->fe != NULL)
1358 dvb_unregister_frontend(av7110->fe);
1359 dvb_unregister_device(av7110->osd_dev);
1360 av7110_av_unregister(av7110);
1361 av7110_ca_unregister(av7110);
1362}
1363
1364
1365/****************************************************************************
1366 * I2C client commands
1367 ****************************************************************************/
1368
1369int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
1370{
1371 u8 msg[2] = { reg, val };
1372 struct i2c_msg msgs;
1373
1374 msgs.flags = 0;
1375 msgs.addr = id / 2;
1376 msgs.len = 2;
1377 msgs.buf = msg;
1378 return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
1379}
1380
1381#if 0
1382u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
1383{
1384 u8 mm1[] = {0x00};
1385 u8 mm2[] = {0x00};
1386 struct i2c_msg msgs[2];
1387
1388 msgs[0].flags = 0;
1389 msgs[1].flags = I2C_M_RD;
1390 msgs[0].addr = msgs[1].addr = id / 2;
1391 mm1[0] = reg;
1392 msgs[0].len = 1; msgs[1].len = 1;
1393 msgs[0].buf = mm1; msgs[1].buf = mm2;
1394 i2c_transfer(&av7110->i2c_adap, msgs, 2);
1395
1396 return mm2[0];
1397}
1398#endif
1399
1400/****************************************************************************
1401 * INITIALIZATION
1402 ****************************************************************************/
1403
1404
1405static int check_firmware(struct av7110* av7110)
1406{
1407 u32 crc = 0, len = 0;
1408 unsigned char *ptr;
1409
1410 /* check for firmware magic */
1411 ptr = av7110->bin_fw;
1412 if (ptr[0] != 'A' || ptr[1] != 'V' ||
1413 ptr[2] != 'F' || ptr[3] != 'W') {
1414 printk("dvb-ttpci: this is not an av7110 firmware\n");
1415 return -EINVAL;
1416 }
1417 ptr += 4;
1418
1419 /* check dpram file */
1420 crc = ntohl(*(u32*) ptr);
1421 ptr += 4;
1422 len = ntohl(*(u32*) ptr);
1423 ptr += 4;
1424 if (len >= 512) {
1425 printk("dvb-ttpci: dpram file is way to big.\n");
1426 return -EINVAL;
1427 }
1428 if (crc != crc32_le(0, ptr, len)) {
1429 printk("dvb-ttpci: crc32 of dpram file does not match.\n");
1430 return -EINVAL;
1431 }
1432 av7110->bin_dpram = ptr;
1433 av7110->size_dpram = len;
1434 ptr += len;
1435
1436 /* check root file */
1437 crc = ntohl(*(u32*) ptr);
1438 ptr += 4;
1439 len = ntohl(*(u32*) ptr);
1440 ptr += 4;
1441
1442 if (len <= 200000 || len >= 300000 ||
1443 len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
1444 printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
1445 return -EINVAL;
1446 }
1447 if( crc != crc32_le(0, ptr, len)) {
1448 printk("dvb-ttpci: crc32 of root file does not match.\n");
1449 return -EINVAL;
1450 }
1451 av7110->bin_root = ptr;
1452 av7110->size_root = len;
1453 return 0;
1454}
1455
1456#ifdef CONFIG_DVB_AV7110_FIRMWARE_FILE
1457#include "av7110_firm.h"
1458static void put_firmware(struct av7110* av7110)
1459{
1460 av7110->bin_fw = NULL;
1461}
1462
1463static inline int get_firmware(struct av7110* av7110)
1464{
1465 av7110->bin_fw = dvb_ttpci_fw;
1466 av7110->size_fw = sizeof(dvb_ttpci_fw);
1467 return check_firmware(av7110);
1468}
1469#else
1470static void put_firmware(struct av7110* av7110)
1471{
1472 vfree(av7110->bin_fw);
1473}
1474
1475static int get_firmware(struct av7110* av7110)
1476{
1477 int ret;
1478 const struct firmware *fw;
1479
1480 /* request the av7110 firmware, this will block until someone uploads it */
1481 ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
1482 if (ret) {
1483 if (ret == -ENOENT) {
1484 printk(KERN_ERR "dvb-ttpci: could not load firmware,"
1485 " file not found: dvb-ttpci-01.fw\n");
1486 printk(KERN_ERR "dvb-ttpci: usually this should be in"
1487 " /usr/lib/hotplug/firmware\n");
1488 printk(KERN_ERR "dvb-ttpci: and can be downloaded here"
1489 " http://www.linuxtv.org/download/dvb/firmware/\n");
1490 } else
1491 printk(KERN_ERR "dvb-ttpci: cannot request firmware"
1492 " (error %i)\n", ret);
1493 return -EINVAL;
1494 }
1495
1496 if (fw->size <= 200000) {
1497 printk("dvb-ttpci: this firmware is way too small.\n");
1498 release_firmware(fw);
1499 return -EINVAL;
1500 }
1501
1502 /* check if the firmware is available */
1503 av7110->bin_fw = (unsigned char *) vmalloc(fw->size);
1504 if (NULL == av7110->bin_fw) {
1505 dprintk(1, "out of memory\n");
1506 release_firmware(fw);
1507 return -ENOMEM;
1508 }
1509
1510 memcpy(av7110->bin_fw, fw->data, fw->size);
1511 av7110->size_fw = fw->size;
1512 if ((ret = check_firmware(av7110)))
1513 vfree(av7110->bin_fw);
1514
1515 release_firmware(fw);
1516 return ret;
1517}
1518#endif
1519
1520
1521static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1522{
1523 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1524 u8 pwr = 0;
1525 u8 buf[4];
1526 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
1527 u32 div = (params->frequency + 479500) / 125;
1528
1529 if (params->frequency > 2000000) pwr = 3;
1530 else if (params->frequency > 1800000) pwr = 2;
1531 else if (params->frequency > 1600000) pwr = 1;
1532 else if (params->frequency > 1200000) pwr = 0;
1533 else if (params->frequency >= 1100000) pwr = 1;
1534 else pwr = 2;
1535
1536 buf[0] = (div >> 8) & 0x7f;
1537 buf[1] = div & 0xff;
1538 buf[2] = ((div & 0x18000) >> 10) | 0x95;
1539 buf[3] = (pwr << 6) | 0x30;
1540
9101e622 1541 // NOTE: since we're using a prescaler of 2, we set the
1da177e4
LT		 1542 // divisor frequency to 62.5kHz and divide by 125 above
1543
1544 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
1545 return -EIO;
1546 return 0;
1547}
1548
1549static struct ves1x93_config alps_bsrv2_config = {
1550 .demod_address = 0x08,
1551 .xin = 90100000UL,
1552 .invert_pwm = 0,
1553 .pll_set = alps_bsrv2_pll_set,
1554};
1555
1556
1557static u8 alps_bsru6_inittab[] = {
1558 0x01, 0x15,
1559 0x02, 0x30,
1560 0x03, 0x00,
1561 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1562 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1563 0x06, 0x40, /* DAC not used, set to high impendance mode */
1564 0x07, 0x00, /* DAC LSB */
1565 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1566 0x09, 0x00, /* FIFO */
1567 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1568 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1569 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1570 0x10, 0x3f, // AGC2 0x3d
1571 0x11, 0x84,
ff29d06a 1572 0x12, 0xb9,
1da177e4
LT		 1573 0x15, 0xc9, // lock detector threshold
1574 0x16, 0x00,
1575 0x17, 0x00,
1576 0x18, 0x00,
1577 0x19, 0x00,
1578 0x1a, 0x00,
1579 0x1f, 0x50,
1580 0x20, 0x00,
1581 0x21, 0x00,
1582 0x22, 0x00,
1583 0x23, 0x00,
1584 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1585 0x29, 0x1e, // 1/2 threshold
1586 0x2a, 0x14, // 2/3 threshold
1587 0x2b, 0x0f, // 3/4 threshold
1588 0x2c, 0x09, // 5/6 threshold
1589 0x2d, 0x05, // 7/8 threshold
1590 0x2e, 0x01,
1591 0x31, 0x1f, // test all FECs
1592 0x32, 0x19, // viterbi and synchro search
1593 0x33, 0xfc, // rs control
1594 0x34, 0x93, // error control
1595 0x0f, 0x52,
1596 0xff, 0xff
1597};
1598
1599static int alps_bsru6_set_symbol_rate(struct dvb_frontend* fe, u32 srate, u32 ratio)
1600{
1601 u8 aclk = 0;
1602 u8 bclk = 0;
1603
1604 if (srate < 1500000) { aclk = 0xb7; bclk = 0x47; }
1605 else if (srate < 3000000) { aclk = 0xb7; bclk = 0x4b; }
1606 else if (srate < 7000000) { aclk = 0xb7; bclk = 0x4f; }
1607 else if (srate < 14000000) { aclk = 0xb7; bclk = 0x53; }
1608 else if (srate < 30000000) { aclk = 0xb6; bclk = 0x53; }
1609 else if (srate < 45000000) { aclk = 0xb4; bclk = 0x51; }
1610
1611 stv0299_writereg(fe, 0x13, aclk);
1612 stv0299_writereg(fe, 0x14, bclk);
1613 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
1614 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
1615 stv0299_writereg(fe, 0x21, (ratio ) & 0xf0);
1616
1617 return 0;
1618}
1619
cfbfce15 1620static int alps_bsru6_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
1da177e4 1621{
1da177e4
LT		 1622 int ret;
1623 u8 data[4];
1624 u32 div;
1625 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1626
1627 if ((params->frequency < 950000) || (params->frequency > 2150000))
1628 return -EINVAL;
1629
1630 div = (params->frequency + (125 - 1)) / 125; // round correctly
1631 data[0] = (div >> 8) & 0x7f;
1632 data[1] = div & 0xff;
1633 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1634 data[3] = 0xC4;
1635
1636 if (params->frequency > 1530000) data[3] = 0xc0;
1637
cfbfce15 1638 ret = i2c_transfer(i2c, &msg, 1);
1da177e4
LT		 1639 if (ret != 1)
1640 return -EIO;
1641 return 0;
1642}
1643
1644static struct stv0299_config alps_bsru6_config = {
1645
1646 .demod_address = 0x68,
1647 .inittab = alps_bsru6_inittab,
1648 .mclk = 88000000UL,
1649 .invert = 1,
1da177e4
LT		 1650 .skip_reinit = 0,
1651 .lock_output = STV0229_LOCKOUTPUT_1,
1652 .volt13_op0_op1 = STV0299_VOLT13_OP1,
1653 .min_delay_ms = 100,
1654 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1655 .pll_set = alps_bsru6_pll_set,
1656};
1657
1658
3dfaebda
JS		 1659static u8 alps_bsbe1_inittab[] = {
1660 0x01, 0x15,
1661 0x02, 0x30,
1662 0x03, 0x00,
1663 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
1664 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
1665 0x06, 0x40, /* DAC not used, set to high impendance mode */
1666 0x07, 0x00, /* DAC LSB */
1667 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
1668 0x09, 0x00, /* FIFO */
1669 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
1670 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
1671 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
1672 0x10, 0x3f, // AGC2 0x3d
1673 0x11, 0x84,
ff29d06a 1674 0x12, 0xb9,
3dfaebda
JS		 1675 0x15, 0xc9, // lock detector threshold
1676 0x16, 0x00,
1677 0x17, 0x00,
1678 0x18, 0x00,
1679 0x19, 0x00,
1680 0x1a, 0x00,
1681 0x1f, 0x50,
1682 0x20, 0x00,
1683 0x21, 0x00,
1684 0x22, 0x00,
1685 0x23, 0x00,
1686 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0
1687 0x29, 0x1e, // 1/2 threshold
1688 0x2a, 0x14, // 2/3 threshold
1689 0x2b, 0x0f, // 3/4 threshold
1690 0x2c, 0x09, // 5/6 threshold
1691 0x2d, 0x05, // 7/8 threshold
1692 0x2e, 0x01,
1693 0x31, 0x1f, // test all FECs
1694 0x32, 0x19, // viterbi and synchro search
1695 0x33, 0xfc, // rs control
1696 0x34, 0x93, // error control
1697 0x0f, 0x92,
1698 0xff, 0xff
1699};
1700
cfbfce15 1701static int alps_bsbe1_pll_set(struct dvb_frontend* fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters* params)
3dfaebda 1702{
3dfaebda
JS		 1703 int ret;
1704 u8 data[4];
1705 u32 div;
1706 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1707
1708 if ((params->frequency < 950000) || (params->frequency > 2150000))
1709 return -EINVAL;
1710
1711 div = (params->frequency + (125 - 1)) / 125; // round correctly
1712 data[0] = (div >> 8) & 0x7f;
1713 data[1] = div & 0xff;
1714 data[2] = 0x80 | ((div & 0x18000) >> 10) | 4;
1715 data[3] = (params->frequency > 1530000) ? 0xE0 : 0xE4;
1716
cfbfce15 1717 ret = i2c_transfer(i2c, &msg, 1);
3dfaebda
JS		 1718 return (ret != 1) ? -EIO : 0;
1719}
1720
1721static struct stv0299_config alps_bsbe1_config = {
1722 .demod_address = 0x68,
1723 .inittab = alps_bsbe1_inittab,
1724 .mclk = 88000000UL,
1725 .invert = 1,
3dfaebda
JS		 1726 .skip_reinit = 0,
1727 .min_delay_ms = 100,
1728 .set_symbol_rate = alps_bsru6_set_symbol_rate,
1729 .pll_set = alps_bsbe1_pll_set,
1730};
1731
1732static int lnbp21_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
1733{
1734 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1735 int ret;
1736 u8 data[1];
1737 struct i2c_msg msg = { .addr = 0x08, .flags = 0, .buf = data, .len = sizeof(data) };
1738
1739 switch(voltage) {
1740 case SEC_VOLTAGE_OFF:
1741 data[0] = 0x00;
1742 break;
1743 case SEC_VOLTAGE_13:
1744 data[0] = 0x44;
1745 break;
1746 case SEC_VOLTAGE_18:
1747 data[0] = 0x4c;
1748 break;
1749 default:
1750 return -EINVAL;
1751 };
1752
1753 ret = i2c_transfer(&av7110->i2c_adap, &msg, 1);
1754 return (ret != 1) ? -EIO : 0;
1755}
1756
1da177e4
LT		 1757
1758static int alps_tdbe2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1759{
1760 struct av7110* av7110 = fe->dvb->priv;
1761 u32 div;
1762 u8 data[4];
1763 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1764
1765 div = (params->frequency + 35937500 + 31250) / 62500;
1766
1767 data[0] = (div >> 8) & 0x7f;
1768 data[1] = div & 0xff;
1769 data[2] = 0x85 | ((div >> 10) & 0x60);
1770 data[3] = (params->frequency < 174000000 ? 0x88 : params->frequency < 470000000 ? 0x84 : 0x81);
1771
1772 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1773 return -EIO;
1774 return 0;
1775}
1776
1777static struct ves1820_config alps_tdbe2_config = {
1778 .demod_address = 0x09,
1779 .xin = 57840000UL,
1780 .invert = 1,
1781 .selagc = VES1820_SELAGC_SIGNAMPERR,
1782 .pll_set = alps_tdbe2_pll_set,
1783};
1784
1785
1786
1787
1788static int grundig_29504_451_pll_set(struct dvb_frontend* fe,
1789 struct dvb_frontend_parameters* params)
1790{
1791 struct av7110* av7110 = fe->dvb->priv;
1792 u32 div;
1793 u8 data[4];
1794 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1795
1796 div = params->frequency / 125;
1797 data[0] = (div >> 8) & 0x7f;
1798 data[1] = div & 0xff;
1799 data[2] = 0x8e;
1800 data[3] = 0x00;
1801
1802 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1803 return -EIO;
1804 return 0;
1805}
1806
1807static struct tda8083_config grundig_29504_451_config = {
1808 .demod_address = 0x68,
1809 .pll_set = grundig_29504_451_pll_set,
1810};
1811
1812
1813
1814static int philips_cd1516_pll_set(struct dvb_frontend* fe,
1815 struct dvb_frontend_parameters* params)
1816{
9101e622 1817 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 1818 u32 div;
1819 u32 f = params->frequency;
1820 u8 data[4];
1821 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1822
1823 div = (f + 36125000 + 31250) / 62500;
1824
1825 data[0] = (div >> 8) & 0x7f;
1826 data[1] = div & 0xff;
1827 data[2] = 0x8e;
1828 data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
1829
1830 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1831 return -EIO;
1832 return 0;
1833}
1834
1835static struct ves1820_config philips_cd1516_config = {
1836 .demod_address = 0x09,
1837 .xin = 57840000UL,
1838 .invert = 1,
1839 .selagc = VES1820_SELAGC_SIGNAMPERR,
1840 .pll_set = philips_cd1516_pll_set,
1841};
1842
1843
1844
1845static int alps_tdlb7_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1846{
1847 struct av7110* av7110 = fe->dvb->priv;
1848 u32 div, pwr;
1849 u8 data[4];
1850 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1851
1852 div = (params->frequency + 36200000) / 166666;
1853
1854 if (params->frequency <= 782000000)
1855 pwr = 1;
1856 else
1857 pwr = 2;
1858
1859 data[0] = (div >> 8) & 0x7f;
1860 data[1] = div & 0xff;
1861 data[2] = 0x85;
1862 data[3] = pwr << 6;
1863
1864 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1865 return -EIO;
1866 return 0;
1867}
1868
1869static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
1870{
1871 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
1872
1873 return request_firmware(fw, name, &av7110->dev->pci->dev);
1874}
1875
1876static struct sp8870_config alps_tdlb7_config = {
1877
1878 .demod_address = 0x71,
1879 .pll_set = alps_tdlb7_pll_set,
1880 .request_firmware = alps_tdlb7_request_firmware,
1881};
1882
1883
dc27a169
AQ		 1884static u8 nexusca_stv0297_inittab[] = {
1885 0x80, 0x01,
1886 0x80, 0x00,
1887 0x81, 0x01,
1888 0x81, 0x00,
1889 0x00, 0x09,
1890 0x01, 0x69,
1891 0x03, 0x00,
1892 0x04, 0x00,
1893 0x07, 0x00,
1894 0x08, 0x00,
1895 0x20, 0x00,
1896 0x21, 0x40,
1897 0x22, 0x00,
1898 0x23, 0x00,
1899 0x24, 0x40,
1900 0x25, 0x88,
1901 0x30, 0xff,
1902 0x31, 0x00,
1903 0x32, 0xff,
1904 0x33, 0x00,
1905 0x34, 0x50,
1906 0x35, 0x7f,
1907 0x36, 0x00,
1908 0x37, 0x20,
1909 0x38, 0x00,
1910 0x40, 0x1c,
1911 0x41, 0xff,
1912 0x42, 0x29,
1913 0x43, 0x00,
1914 0x44, 0xff,
1915 0x45, 0x00,
1916 0x46, 0x00,
1917 0x49, 0x04,
1918 0x4a, 0x00,
1919 0x4b, 0x7b,
1920 0x52, 0x30,
1921 0x55, 0xae,
1922 0x56, 0x47,
1923 0x57, 0xe1,
1924 0x58, 0x3a,
1925 0x5a, 0x1e,
1926 0x5b, 0x34,
1927 0x60, 0x00,
1928 0x63, 0x00,
1929 0x64, 0x00,
1930 0x65, 0x00,
1931 0x66, 0x00,
1932 0x67, 0x00,
1933 0x68, 0x00,
1934 0x69, 0x00,
1935 0x6a, 0x02,
1936 0x6b, 0x00,
1937 0x70, 0xff,
1938 0x71, 0x00,
1939 0x72, 0x00,
1940 0x73, 0x00,
1941 0x74, 0x0c,
1942 0x80, 0x00,
1943 0x81, 0x00,
1944 0x82, 0x00,
1945 0x83, 0x00,
1946 0x84, 0x04,
1947 0x85, 0x80,
1948 0x86, 0x24,
1949 0x87, 0x78,
1950 0x88, 0x10,
1951 0x89, 0x00,
1952 0x90, 0x01,
1953 0x91, 0x01,
1954 0xa0, 0x04,
1955 0xa1, 0x00,
1956 0xa2, 0x00,
1957 0xb0, 0x91,
1958 0xb1, 0x0b,
1959 0xc0, 0x53,
1960 0xc1, 0x70,
1961 0xc2, 0x12,
1962 0xd0, 0x00,
1963 0xd1, 0x00,
1964 0xd2, 0x00,
1965 0xd3, 0x00,
1966 0xd4, 0x00,
1967 0xd5, 0x00,
1968 0xde, 0x00,
1969 0xdf, 0x00,
1970 0x61, 0x49,
1971 0x62, 0x0b,
1972 0x53, 0x08,
1973 0x59, 0x08,
1974 0xff, 0xff,
1975};
1da177e4
LT		 1976
1977static int nexusca_stv0297_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1978{
1979 struct av7110* av7110 = fe->dvb->priv;
1980 u32 div;
1981 u8 data[4];
1982 struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
1983 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1984 int i;
1985
1986 div = (params->frequency + 36150000 + 31250) / 62500;
1987
1988 data[0] = (div >> 8) & 0x7f;
1989 data[1] = div & 0xff;
1990 data[2] = 0xce;
1991
1992 if (params->frequency < 45000000)
1993 return -EINVAL;
1994 else if (params->frequency < 137000000)
1995 data[3] = 0x01;
1996 else if (params->frequency < 403000000)
1997 data[3] = 0x02;
1998 else if (params->frequency < 860000000)
1999 data[3] = 0x04;
2000 else
2001 return -EINVAL;
2002
2003 stv0297_enable_plli2c(fe);
2004 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
2005 printk("nexusca: pll transfer failed!\n");
2006 return -EIO;
2007 }
2008
2009 // wait for PLL lock
2010 for(i = 0; i < 20; i++) {
2011
2012 stv0297_enable_plli2c(fe);
2013 if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
2014 if (data[0] & 0x40) break;
2015 msleep(10);
2016 }
2017
2018 return 0;
2019}
2020
2021static struct stv0297_config nexusca_stv0297_config = {
2022
2023 .demod_address = 0x1C,
dc27a169 2024 .inittab = nexusca_stv0297_inittab,
1da177e4
LT		 2025 .invert = 1,
2026 .pll_set = nexusca_stv0297_pll_set,
2027};
2028
2029
2030
2031static int grundig_29504_401_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2032{
2033 struct av7110* av7110 = (struct av7110*) fe->dvb->priv;
2034 u32 div;
2035 u8 cfg, cpump, band_select;
2036 u8 data[4];
2037 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
2038
2039 div = (36125000 + params->frequency) / 166666;
2040
2041 cfg = 0x88;
2042
2043 if (params->frequency < 175000000) cpump = 2;
2044 else if (params->frequency < 390000000) cpump = 1;
2045 else if (params->frequency < 470000000) cpump = 2;
2046 else if (params->frequency < 750000000) cpump = 1;
2047 else cpump = 3;
2048
2049 if (params->frequency < 175000000) band_select = 0x0e;
2050 else if (params->frequency < 470000000) band_select = 0x05;
2051 else band_select = 0x03;
2052
2053 data[0] = (div >> 8) & 0x7f;
2054 data[1] = div & 0xff;
2055 data[2] = ((div >> 10) & 0x60) | cfg;
2056 data[3] = (cpump << 6) | band_select;
2057
2058 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
2059 return 0;
2060}
2061
2062static struct l64781_config grundig_29504_401_config = {
2063 .demod_address = 0x55,
2064 .pll_set = grundig_29504_401_pll_set,
2065};
2066
2067
2068
ce18a223 2069static int av7110_fe_lock_fix(struct av7110* av7110, fe_status_t status)
1da177e4 2070{
ce18a223 2071 int ret = 0;
1da177e4
LT		 2072 int synced = (status & FE_HAS_LOCK) ? 1 : 0;
2073
2074 av7110->fe_status = status;
2075
2076 if (av7110->fe_synced == synced)
ce18a223 2077 return 0;
1da177e4 2078
1da177e4 2079 if (av7110->playing)
ce18a223 2080 return 0;
1da177e4
LT		 2081
2082 if (down_interruptible(&av7110->pid_mutex))
ce18a223 2083 return -ERESTARTSYS;
1da177e4 2084
34612157 2085 if (synced) {
ce18a223 2086 ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
1da177e4
LT		 2087 av7110->pids[DMX_PES_AUDIO],
2088 av7110->pids[DMX_PES_TELETEXT], 0,
2089 av7110->pids[DMX_PES_PCR]);
ce18a223
WR		 2090 if (!ret)
2091 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
1da177e4 2092 } else {
ce18a223
WR		 2093 ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
2094 if (!ret) {
2095 ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
2096 if (!ret)
2097 ret = av7110_wait_msgstate(av7110, GPMQBusy);
2098 }
1da177e4
LT		 2099 }
2100
34612157
OE		 2101 if (!ret)
2102 av7110->fe_synced = synced;
2103
1da177e4 2104 up(&av7110->pid_mutex);
ce18a223 2105 return ret;
1da177e4
LT		 2106}
2107
2108static int av7110_fe_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
2109{
2110 struct av7110* av7110 = fe->dvb->priv;
ce18a223
WR		 2111
2112 int ret = av7110_fe_lock_fix(av7110, 0);
2113 if (!ret)
2114 ret = av7110->fe_set_frontend(fe, params);
2115 return ret;
1da177e4
LT		 2116}
2117
2118static int av7110_fe_init(struct dvb_frontend* fe)
2119{
2120 struct av7110* av7110 = fe->dvb->priv;
2121
ce18a223
WR		 2122 int ret = av7110_fe_lock_fix(av7110, 0);
2123 if (!ret)
2124 ret = av7110->fe_init(fe);
2125 return ret;
1da177e4
LT		 2126}
2127
2128static int av7110_fe_read_status(struct dvb_frontend* fe, fe_status_t* status)
2129{
2130 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 2131
2132 /* call the real implementation */
ce18a223
WR		 2133 int ret = av7110->fe_read_status(fe, status);
2134 if (!ret)
2135 if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
2136 ret = av7110_fe_lock_fix(av7110, *status);
2137 return ret;
1da177e4
LT		 2138}
2139
2140static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
2141{
2142 struct av7110* av7110 = fe->dvb->priv;
2143
ce18a223
WR		 2144 int ret = av7110_fe_lock_fix(av7110, 0);
2145 if (!ret)
2146 ret = av7110->fe_diseqc_reset_overload(fe);
2147 return ret;
1da177e4
LT		 2148}
2149
2150static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
2151 struct dvb_diseqc_master_cmd* cmd)
2152{
2153 struct av7110* av7110 = fe->dvb->priv;
2154
ce18a223
WR		 2155 int ret = av7110_fe_lock_fix(av7110, 0);
2156 if (!ret)
2157 ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
2158 return ret;
1da177e4
LT		 2159}
2160
2161static int av7110_fe_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
2162{
2163 struct av7110* av7110 = fe->dvb->priv;
2164
ce18a223
WR		 2165 int ret = av7110_fe_lock_fix(av7110, 0);
2166 if (!ret)
2167 ret = av7110->fe_diseqc_send_burst(fe, minicmd);
2168 return ret;
1da177e4
LT		 2169}
2170
2171static int av7110_fe_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
2172{
2173 struct av7110* av7110 = fe->dvb->priv;
2174
ce18a223
WR		 2175 int ret = av7110_fe_lock_fix(av7110, 0);
2176 if (!ret)
2177 ret = av7110->fe_set_tone(fe, tone);
2178 return ret;
1da177e4
LT		 2179}
2180
2181static int av7110_fe_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
2182{
2183 struct av7110* av7110 = fe->dvb->priv;
2184
ce18a223
WR		 2185 int ret = av7110_fe_lock_fix(av7110, 0);
2186 if (!ret)
2187 ret = av7110->fe_set_voltage(fe, voltage);
2188 return ret;
1da177e4
LT		 2189}
2190
2191static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned int cmd)
2192{
2193 struct av7110* av7110 = fe->dvb->priv;
2194
ce18a223
WR		 2195 int ret = av7110_fe_lock_fix(av7110, 0);
2196 if (!ret)
2197 ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
2198 return ret;
1da177e4
LT		 2199}
2200
2201static u8 read_pwm(struct av7110* av7110)
2202{
2203 u8 b = 0xff;
2204 u8 pwm;
2205 struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
2206 { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
2207
9101e622 2208 if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
1da177e4
LT		 2209 pwm = 0x48;
2210
2211 return pwm;
2212}
2213
2214static int frontend_init(struct av7110 *av7110)
2215{
2216 int ret;
2217
2218 if (av7110->dev->pci->subsystem_vendor == 0x110a) {
2219 switch(av7110->dev->pci->subsystem_device) {
2220 case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
2221 av7110->fe = ves1820_attach(&philips_cd1516_config,
2222 &av7110->i2c_adap, read_pwm(av7110));
2223 break;
2224 }
2225
2226 } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
2227 switch(av7110->dev->pci->subsystem_device) {
2228 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
2229 case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
2230 case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
2231
2232 // try the ALPS BSRV2 first of all
2233 av7110->fe = ves1x93_attach(&alps_bsrv2_config, &av7110->i2c_adap);
2234 if (av7110->fe) {
2235 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2236 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2237 av7110->fe->ops->set_tone = av7110_set_tone;
2238 break;
2239 }
2240
2241 // try the ALPS BSRU6 now
2242 av7110->fe = stv0299_attach(&alps_bsru6_config, &av7110->i2c_adap);
2243 if (av7110->fe) {
2244 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2245 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2246 av7110->fe->ops->set_tone = av7110_set_tone;
2247 break;
2248 }
2249
2250 // Try the grundig 29504-451
9101e622 2251 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
1da177e4
LT		 2252 if (av7110->fe) {
2253 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2254 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2255 av7110->fe->ops->set_tone = av7110_set_tone;
2256 break;
2257 }
2258
2259 /* Try DVB-C cards */
2260 switch(av7110->dev->pci->subsystem_device) {
2261 case 0x0000:
2262 /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
2263 av7110->fe = ves1820_attach(&philips_cd1516_config, &av7110->i2c_adap,
2264 read_pwm(av7110));
2265 break;
2266 case 0x0003:
2267 /* Haupauge DVB-C 2.1 VES1820/ALPS TDBE2 */
2268 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap,
2269 read_pwm(av7110));
2270 break;
2271 }
2272 break;
2273
2274 case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
2275
2276 // ALPS TDLB7
9101e622 2277 av7110->fe = sp8870_attach(&alps_tdlb7_config, &av7110->i2c_adap);
1da177e4
LT		 2278 break;
2279
2280 case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
2281
9101e622 2282 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
1da177e4
LT		 2283 break;
2284
2285 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
2286 /* Grundig 29504-451 */
2287 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap);
2288 if (av7110->fe) {
2289 av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2290 av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst;
2291 av7110->fe->ops->set_tone = av7110_set_tone;
2292 }
2293 break;
2294
2295 case 0x0008: // Hauppauge/TT DVB-T
2296
2297 av7110->fe = l64781_attach(&grundig_29504_401_config, &av7110->i2c_adap);
2298 break;
2299
2300 case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
2301
dc27a169 2302 av7110->fe = stv0297_attach(&nexusca_stv0297_config, &av7110->i2c_adap);
1da177e4
LT		 2303 if (av7110->fe) {
2304 /* set TDA9819 into DVB mode */
2305 saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9198 pin9(STD)
2306 saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9198 pin30(VIF)
2307
2308 /* tuner on this needs a slower i2c bus speed */
2309 av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
2310 break;
2311 }
3dfaebda
JS		 2312 break;
2313
2314 case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
2315 /* ALPS BSBE1 */
2316 av7110->fe = stv0299_attach(&alps_bsbe1_config, &av7110->i2c_adap);
eb3daf3c 2317 if (av7110->fe) {
3dfaebda 2318 av7110->fe->ops->set_voltage = lnbp21_set_voltage;
eb3daf3c
OE		 2319 av7110->fe->ops->dishnetwork_send_legacy_command = NULL;
2320 }
3dfaebda 2321 break;
1da177e4
LT		 2322 }
2323 }
2324
2325 if (!av7110->fe) {
2326 /* FIXME: propagate the failure code from the lower layers */
2327 ret = -ENOMEM;
2328 printk("dvb-ttpci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
2329 av7110->dev->pci->vendor,
2330 av7110->dev->pci->device,
2331 av7110->dev->pci->subsystem_vendor,
2332 av7110->dev->pci->subsystem_device);
2333 } else {
2334 FE_FUNC_OVERRIDE(av7110->fe->ops->init, av7110->fe_init, av7110_fe_init);
2335 FE_FUNC_OVERRIDE(av7110->fe->ops->read_status, av7110->fe_read_status, av7110_fe_read_status);
2336 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
2337 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
2338 FE_FUNC_OVERRIDE(av7110->fe->ops->diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
2339 FE_FUNC_OVERRIDE(av7110->fe->ops->set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
2340 FE_FUNC_OVERRIDE(av7110->fe->ops->set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage;)
2341 FE_FUNC_OVERRIDE(av7110->fe->ops->dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
2342 FE_FUNC_OVERRIDE(av7110->fe->ops->set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
2343
fdc53a6d 2344 ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
1da177e4
LT		 2345 if (ret < 0) {
2346 printk("av7110: Frontend registration failed!\n");
2347 if (av7110->fe->ops->release)
2348 av7110->fe->ops->release(av7110->fe);
2349 av7110->fe = NULL;
2350 }
2351 }
2352 return ret;
2353}
2354
2355/* Budgetpatch note:
2356 * Original hardware design by Roberto Deza:
2357 * There is a DVB_Wiki at
2358 * http://212.227.36.83/linuxtv/wiki/index.php/Main_Page
2359 * where is described this 'DVB TT Budget Patch', on Card Modding:
2360 * http://212.227.36.83/linuxtv/wiki/index.php/DVB_TT_Budget_Patch
2361 * On the short description there is also a link to a external file,
2362 * with more details:
2363 * http://perso.wanadoo.es/jesussolano/Ttf_tsc1.zip
2364 *
2365 * New software triggering design by Emard that works on
2366 * original Roberto Deza's hardware:
2367 *
2368 * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
2369 * GPIO3 is in budget-patch hardware connectd to port B VSYNC
2370 * HS is an internal event of 7146, accessible with RPS
2371 * and temporarily raised high every n lines
2372 * (n in defined in the RPS_THRESH1 counter threshold)
2373 * I think HS is raised high on the beginning of the n-th line
2374 * and remains high until this n-th line that triggered
2375 * it is completely received. When the receiption of n-th line
2376 * ends, HS is lowered.
2377 *
2378 * To transmit data over DMA, 7146 needs changing state at
2379 * port B VSYNC pin. Any changing of port B VSYNC will
2380 * cause some DMA data transfer, with more or less packets loss.
2381 * It depends on the phase and frequency of VSYNC and
2382 * the way of 7146 is instructed to trigger on port B (defined
2383 * in DD1_INIT register, 3rd nibble from the right valid
2384 * numbers are 0-7, see datasheet)
2385 *
2386 * The correct triggering can minimize packet loss,
2387 * dvbtraffic should give this stable bandwidths:
2388 * 22k transponder = 33814 kbit/s
2389 * 27.5k transponder = 38045 kbit/s
2390 * by experiment it is found that the best results
2391 * (stable bandwidths and almost no packet loss)
2392 * are obtained using DD1_INIT triggering number 2
2393 * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
2394 * and a VSYNC phase that occurs in the middle of DMA transfer
2395 * (about byte 188*512=96256 in the DMA window).
2396 *
2397 * Phase of HS is still not clear to me how to control,
2398 * It just happens to be so. It can be seen if one enables
2399 * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
2400 * time RPS_INTERRUPT is called, the Event Counter 1 will
2401 * increment. That's how the 7146 is programmed to do event
2402 * counting in this budget-patch.c
2403 * I *think* HPS setting has something to do with the phase
2404 * of HS but I cant be 100% sure in that.
2405 *
2406 * hardware debug note: a working budget card (including budget patch)
2407 * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
2408 * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
2409 * and that means 3*25=75 Hz of interrupt freqency, as seen by
2410 * watch cat /proc/interrupts
2411 *
2412 * If this frequency is 3x lower (and data received in the DMA
2413 * buffer don't start with 0x47, but in the middle of packets,
2414 * whose lengths appear to be like 188 292 188 104 etc.
2415 * this means VSYNC line is not connected in the hardware.
2416 * (check soldering pcb and pins)
2417 * The same behaviour of missing VSYNC can be duplicated on budget
2418 * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
2419 */
2420static int av7110_attach(struct saa7146_dev* dev, struct saa7146_pci_extension_data *pci_ext)
2421{
2422 const int length = TS_WIDTH * TS_HEIGHT;
2423 struct pci_dev *pdev = dev->pci;
2424 struct av7110 *av7110;
2425 int ret, count = 0;
2426
2427 dprintk(4, "dev: %p\n", dev);
2428
9101e622
MCC		 2429 /* Set RPS_IRQ to 1 to track rps1 activity.
2430 * Enabling this won't send any interrupt to PC CPU.
2431 */
1da177e4
LT		 2432#define RPS_IRQ 0
2433
2434 if (budgetpatch == 1) {
2435 budgetpatch = 0;
2436 /* autodetect the presence of budget patch
2437 * this only works if saa7146 has been recently
2438 * reset with with MASK_31 to MC1
2439 *
2440 * will wait for VBI_B event (vertical blank at port B)
2441 * and will reset GPIO3 after VBI_B is detected.
2442 * (GPIO3 should be raised high by CPU to
2443 * test if GPIO3 will generate vertical blank signal
2444 * in budget patch GPIO3 is connected to VSYNC_B
2445 */
2446
2447 /* RESET SAA7146 */
2448 saa7146_write(dev, MC1, MASK_31);
2449 /* autodetection success seems to be time-dependend after reset */
2450
2451 /* Fix VSYNC level */
2452 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2453 /* set vsync_b triggering */
2454 saa7146_write(dev, DD1_STREAM_B, 0);
2455 /* port B VSYNC at rising edge */
2456 saa7146_write(dev, DD1_INIT, 0x00000200);
2457 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
2458 saa7146_write(dev, MC2,
2459 1 * (MASK_08 | MASK_24) | // BRS control
2460 0 * (MASK_09 | MASK_25) | // a
2461 1 * (MASK_10 | MASK_26) | // b
2462 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
2463 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
2464 0 * (MASK_01 | MASK_15) // DEBI
2465 );
2466
2467 /* start writing RPS1 code from beginning */
2468 count = 0;
2469 /* Disable RPS1 */
2470 saa7146_write(dev, MC1, MASK_29);
2471 /* RPS1 timeout disable */
2472 saa7146_write(dev, RPS_TOV1, 0);
2473 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B));
2474 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2475 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2476 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2477#if RPS_IRQ
2478 /* issue RPS1 interrupt to increment counter */
2479 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2480#endif
2481 WRITE_RPS1(cpu_to_le32(CMD_STOP));
2482 /* Jump to begin of RPS program as safety measure (p37) */
2483 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2484 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2485
2486#if RPS_IRQ
2487 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2488 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2489 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2490 */
2491 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2492 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2493 saa7146_write(dev, ECT1R, 0x3fff );
2494#endif
2495 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2496 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2497 /* Enable RPS1, (rFC p33) */
2498 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
2499
2500 mdelay(10);
2501 /* now send VSYNC_B to rps1 by rising GPIO3 */
2502 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
2503 mdelay(10);
2504 /* if rps1 responded by lowering the GPIO3,
2505 * then we have budgetpatch hardware
2506 */
2507 if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
2508 budgetpatch = 1;
2509 printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
2510 }
2511 /* Disable RPS1 */
2512 saa7146_write(dev, MC1, ( MASK_29 ));
2513#if RPS_IRQ
2514 printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
2515#endif
2516 }
2517
2518 /* prepare the av7110 device struct */
2519 av7110 = kmalloc(sizeof(struct av7110), GFP_KERNEL);
2520 if (!av7110) {
2521 dprintk(1, "out of memory\n");
2522 return -ENOMEM;
2523 }
2524
2525 memset(av7110, 0, sizeof(struct av7110));
2526
2527 av7110->card_name = (char*) pci_ext->ext_priv;
2528 av7110->dev = dev;
2529 dev->ext_priv = av7110;
2530
2531 ret = get_firmware(av7110);
2532 if (ret < 0)
2533 goto err_kfree_0;
2534
2535 ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
2536 THIS_MODULE);
2537 if (ret < 0)
2538 goto err_put_firmware_1;
2539
2540 /* the Siemens DVB needs this if you want to have the i2c chips
2541 get recognized before the main driver is fully loaded */
2542 saa7146_write(dev, GPIO_CTRL, 0x500000);
2543
2544#ifdef I2C_ADAP_CLASS_TV_DIGITAL
2545 av7110->i2c_adap.class = I2C_ADAP_CLASS_TV_DIGITAL;
2546#else
2547 av7110->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
2548#endif
2549 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
2550
2551 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
2552
2553 ret = i2c_add_adapter(&av7110->i2c_adap);
2554 if (ret < 0)
2555 goto err_dvb_unregister_adapter_2;
2556
2557 ttpci_eeprom_parse_mac(&av7110->i2c_adap,
fdc53a6d 2558 av7110->dvb_adapter.proposed_mac);
1da177e4
LT		 2559 ret = -ENOMEM;
2560
2561 if (budgetpatch) {
2562 spin_lock_init(&av7110->feedlock1);
2563 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2564 &av7110->pt);
2565 if (!av7110->grabbing)
2566 goto err_i2c_del_3;
2567
2568 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
2569 saa7146_write(dev, BCS_CTRL, 0x80400040);
2570 /* set dd1 stream a & b */
2571 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2572 saa7146_write(dev, DD1_INIT, 0x03000200);
2573 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2574 saa7146_write(dev, BRS_CTRL, 0x60000000);
2575 saa7146_write(dev, BASE_ODD3, 0);
2576 saa7146_write(dev, BASE_EVEN3, 0);
2577 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2578 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2579
2580 saa7146_write(dev, PITCH3, TS_WIDTH);
2581 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2582
2583 /* upload all */
2584 saa7146_write(dev, MC2, 0x077c077c);
2585 saa7146_write(dev, GPIO_CTRL, 0x000000);
2586#if RPS_IRQ
2587 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2588 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2589 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2590 */
2591 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
2592 /* set event counter 1 treshold to maximum allowed value (rEC p55) */
2593 saa7146_write(dev, ECT1R, 0x3fff );
2594#endif
2595 /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
2596 count = 0;
2597
2598 /* Wait Source Line Counter Threshold (p36) */
2599 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS));
2600 /* Set GPIO3=1 (p42) */
2601 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2602 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2603 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24));
2604#if RPS_IRQ
2605 /* issue RPS1 interrupt */
2606 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2607#endif
2608 /* Wait reset Source Line Counter Threshold (p36) */
2609 WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS));
2610 /* Set GPIO3=0 (p42) */
2611 WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2)));
2612 WRITE_RPS1(cpu_to_le32(GPIO3_MSK));
2613 WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24));
2614#if RPS_IRQ
2615 /* issue RPS1 interrupt */
2616 WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT));
2617#endif
2618 /* Jump to begin of RPS program (p37) */
2619 WRITE_RPS1(cpu_to_le32(CMD_JUMP));
2620 WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle));
2621
2622 /* Fix VSYNC level */
2623 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2624 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2625 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2626 /* Set Source Line Counter Threshold, using BRS (rCC p43)
2627 * It generates HS event every TS_HEIGHT lines
2628 * this is related to TS_WIDTH set in register
2629 * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
2630 * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
2631 * then RPS_THRESH1 should be set to trigger
2632 * every TS_HEIGHT (512) lines.
2633 */
2634 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
2635
2636 /* Enable RPS1 (rFC p33) */
2637 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2638
2639 /* end of budgetpatch register initialization */
2640 tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
2641 } else {
2642 saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
2643 saa7146_write(dev, BCS_CTRL, 0x80400040);
2644
2645 /* set dd1 stream a & b */
2646 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2647 saa7146_write(dev, DD1_INIT, 0x03000000);
2648 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2649
2650 /* upload all */
2651 saa7146_write(dev, MC2, 0x077c077c);
2652 saa7146_write(dev, GPIO_CTRL, 0x000000);
2653 }
2654
2655 tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
2656 tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
2657
2658 sema_init(&av7110->pid_mutex, 1);
2659
2660 /* locks for data transfers from/to AV7110 */
2661 spin_lock_init(&av7110->debilock);
2662 sema_init(&av7110->dcomlock, 1);
2663 av7110->debitype = -1;
2664
2665 /* default OSD window */
2666 av7110->osdwin = 1;
2667 sema_init(&av7110->osd_sema, 1);
2668
2669 /* ARM "watchdog" */
2670 init_waitqueue_head(&av7110->arm_wait);
2671 av7110->arm_thread = NULL;
2672
2673 /* allocate and init buffers */
2674 av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
2675 if (!av7110->debi_virt)
2676 goto err_saa71466_vfree_4;
2677
2678
2679 av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
2680 if (!av7110->iobuf)
2681 goto err_pci_free_5;
2682
2683 ret = av7110_av_init(av7110);
2684 if (ret < 0)
2685 goto err_iobuf_vfree_6;
2686
2687 /* init BMP buffer */
2688 av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
2689 init_waitqueue_head(&av7110->bmpq);
2690
2691 ret = av7110_ca_init(av7110);
2692 if (ret < 0)
2693 goto err_av7110_av_exit_7;
2694
2695 /* load firmware into AV7110 cards */
2696 ret = av7110_bootarm(av7110);
2697 if (ret < 0)
2698 goto err_av7110_ca_exit_8;
2699
2700 ret = av7110_firmversion(av7110);
2701 if (ret < 0)
2702 goto err_stop_arm_9;
2703
2704 if (FW_VERSION(av7110->arm_app)<0x2501)
2705 printk ("dvb-ttpci: Warning, firmware version 0x%04x is too old. "
2706 "System might be unstable!\n", FW_VERSION(av7110->arm_app));
2707
2708 ret = kernel_thread(arm_thread, (void *) av7110, 0);
2709 if (ret < 0)
2710 goto err_stop_arm_9;
2711
2712 /* set initial volume in mixer struct */
2713 av7110->mixer.volume_left = volume;
2714 av7110->mixer.volume_right = volume;
2715
2716 init_av7110_av(av7110);
2717
2718 ret = av7110_register(av7110);
2719 if (ret < 0)
2720 goto err_arm_thread_stop_10;
2721
2722 /* special case DVB-C: these cards have an analog tuner
2723 plus need some special handling, so we have separate
2724 saa7146_ext_vv data for these... */
2725 ret = av7110_init_v4l(av7110);
2726 if (ret < 0)
2727 goto err_av7110_unregister_11;
2728
fdc53a6d 2729 av7110->dvb_adapter.priv = av7110;
1da177e4
LT		 2730 ret = frontend_init(av7110);
2731 if (ret < 0)
2732 goto err_av7110_exit_v4l_12;
2733
2734#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
03388ae3 2735 av7110_ir_init(av7110);
1da177e4
LT		 2736#endif
2737 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
2738 av7110_num++;
2739out:
2740 return ret;
2741
2742err_av7110_exit_v4l_12:
2743 av7110_exit_v4l(av7110);
2744err_av7110_unregister_11:
2745 dvb_unregister(av7110);
2746err_arm_thread_stop_10:
2747 av7110_arm_sync(av7110);
2748err_stop_arm_9:
2749 /* Nothing to do. Rejoice. */
2750err_av7110_ca_exit_8:
2751 av7110_ca_exit(av7110);
2752err_av7110_av_exit_7:
2753 av7110_av_exit(av7110);
2754err_iobuf_vfree_6:
2755 vfree(av7110->iobuf);
2756err_pci_free_5:
2757 pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
2758err_saa71466_vfree_4:
2759 if (!av7110->grabbing)
2760 saa7146_pgtable_free(pdev, &av7110->pt);
2761err_i2c_del_3:
2762 i2c_del_adapter(&av7110->i2c_adap);
2763err_dvb_unregister_adapter_2:
fdc53a6d 2764 dvb_unregister_adapter(&av7110->dvb_adapter);
1da177e4
LT		 2765err_put_firmware_1:
2766 put_firmware(av7110);
2767err_kfree_0:
2768 kfree(av7110);
2769 goto out;
2770}
2771
2772static int av7110_detach(struct saa7146_dev* saa)
2773{
2774 struct av7110 *av7110 = saa->ext_priv;
2775 dprintk(4, "%p\n", av7110);
2776
03388ae3
OE		 2777#if defined(CONFIG_INPUT_EVDEV) || defined(CONFIG_INPUT_EVDEV_MODULE)
2778 av7110_ir_exit(av7110);
2779#endif
1da177e4
LT		 2780 if (budgetpatch) {
2781 /* Disable RPS1 */
2782 saa7146_write(saa, MC1, MASK_29);
2783 /* VSYNC LOW (inactive) */
2784 saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
2785 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
2786 SAA7146_IER_DISABLE(saa, MASK_10);
2787 SAA7146_ISR_CLEAR(saa, MASK_10);
2788 msleep(50);
2789 tasklet_kill(&av7110->vpe_tasklet);
2790 saa7146_pgtable_free(saa->pci, &av7110->pt);
2791 }
2792 av7110_exit_v4l(av7110);
2793
2794 av7110_arm_sync(av7110);
2795
2796 tasklet_kill(&av7110->debi_tasklet);
2797 tasklet_kill(&av7110->gpio_tasklet);
2798
2799 dvb_unregister(av7110);
2800
2801 SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
2802 SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
2803
2804 av7110_ca_exit(av7110);
2805 av7110_av_exit(av7110);
2806
2807 vfree(av7110->iobuf);
2808 pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
2809 av7110->debi_bus);
2810
2811 i2c_del_adapter(&av7110->i2c_adap);
2812
fdc53a6d 2813 dvb_unregister_adapter (&av7110->dvb_adapter);
1da177e4
LT		 2814
2815 av7110_num--;
2816
2817 put_firmware(av7110);
2818
2819 kfree(av7110);
2820
2821 saa->ext_priv = NULL;
2822
2823 return 0;
2824}
2825
2826
2827static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
2828{
2829 struct av7110 *av7110 = dev->ext_priv;
2830
2831 //print_time("av7110_irq");
2832
2833 /* Note: Don't try to handle the DEBI error irq (MASK_18), in
2834 * intel mode the timeout is asserted all the time...
2835 */
2836
2837 if (*isr & MASK_19) {
2838 //printk("av7110_irq: DEBI\n");
2839 /* Note 1: The DEBI irq is level triggered: We must enable it
2840 * only after we started a DMA xfer, and disable it here
2841 * immediately, or it will be signalled all the time while
2842 * DEBI is idle.
2843 * Note 2: You would think that an irq which is masked is
2844 * not signalled by the hardware. Not so for the SAA7146:
2845 * An irq is signalled as long as the corresponding bit
2846 * in the ISR is set, and disabling irqs just prevents the
2847 * hardware from setting the ISR bit. This means a) that we
2848 * must clear the ISR *after* disabling the irq (which is why
2849 * we must do it here even though saa7146_core did it already),
2850 * and b) that if we were to disable an edge triggered irq
2851 * (like the gpio irqs sadly are) temporarily we would likely
2852 * loose some. This sucks :-(
2853 */
2854 SAA7146_IER_DISABLE(av7110->dev, MASK_19);
2855 SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
2856 tasklet_schedule(&av7110->debi_tasklet);
2857 }
2858
2859 if (*isr & MASK_03) {
2860 //printk("av7110_irq: GPIO\n");
2861 tasklet_schedule(&av7110->gpio_tasklet);
2862 }
2863
2864 if ((*isr & MASK_10) && budgetpatch)
2865 tasklet_schedule(&av7110->vpe_tasklet);
2866}
2867
2868
2869static struct saa7146_extension av7110_extension;
2870
2871#define MAKE_AV7110_INFO(x_var,x_name) \
2872static struct saa7146_pci_extension_data x_var = { \
2873 .ext_priv = x_name, \
2874 .ext = &av7110_extension }
2875
6af4ee10 2876MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
1da177e4
LT		 2877MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
2878MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
2879MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
2880MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
3dfaebda 2881MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
1da177e4
LT		 2882MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
2883MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
2884MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
2885MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
2886
2887static struct pci_device_id pci_tbl[] = {
6af4ee10
KH		 2888 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
2889 MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
2890 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
2891 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
2892 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
2893 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
2894 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
2895 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
2896 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
2897 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
1da177e4
LT		 2898
2899/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0004), UNDEFINED CARD */ // Galaxis DVB PC-Sat-Carte
2900/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
2901/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
2902
2903 {
2904 .vendor = 0,
2905 }
2906};
2907
2908MODULE_DEVICE_TABLE(pci, pci_tbl);
2909
2910
2911static struct saa7146_extension av7110_extension = {
2912 .name = "dvb\0",
2913 .flags = SAA7146_I2C_SHORT_DELAY,
2914
2915 .module = THIS_MODULE,
2916 .pci_tbl = &pci_tbl[0],
2917 .attach = av7110_attach,
2918 .detach = av7110_detach,
2919
2920 .irq_mask = MASK_19 | MASK_03 | MASK_10,
2921 .irq_func = av7110_irq,
2922};
2923
2924
2925static int __init av7110_init(void)
2926{
2927 int retval;
2928 retval = saa7146_register_extension(&av7110_extension);
2929 return retval;
2930}
2931
2932
2933static void __exit av7110_exit(void)
2934{
1da177e4
LT		 2935 saa7146_unregister_extension(&av7110_extension);
2936}
2937
2938module_init(av7110_init);
2939module_exit(av7110_exit);
2940
2941MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by "
2942 "Siemens, Technotrend, Hauppauge");
2943MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
2944MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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