[deliverable/linux.git] / drivers / media / dvb-frontends / cxd2820r_t2.c

/*
 * Sony CXD2820R demodulator driver
 *
 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License along
 *    with this program; if not, write to the Free Software Foundation, Inc.,
 *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 */


#include "cxd2820r_priv.h"

int cxd2820r_set_frontend_t2(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret, i, bw_i;
	u32 if_freq, if_ctl;
	u64 num;
	u8 buf[3], bw_param;
	u8 bw_params1[][5] = {
		{ 0x1c, 0xb3, 0x33, 0x33, 0x33 }, /* 5 MHz */
		{ 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
		{ 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
		{ 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
	};
	struct reg_val_mask tab[] = {
		{ 0x00080, 0x02, 0xff },
		{ 0x00081, 0x20, 0xff },
		{ 0x00085, 0x07, 0xff },
		{ 0x00088, 0x01, 0xff },
		{ 0x02069, 0x01, 0xff },

		{ 0x0207f, 0x2a, 0xff },
		{ 0x02082, 0x0a, 0xff },
		{ 0x02083, 0x0a, 0xff },
		{ 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 },
		{ 0x02070, priv->cfg.ts_mode, 0xff },
		{ 0x020b5, priv->cfg.spec_inv << 4, 0x10 },
		{ 0x02567, 0x07, 0x0f },
		{ 0x02569, 0x03, 0x03 },
		{ 0x02595, 0x1a, 0xff },
		{ 0x02596, 0x50, 0xff },
		{ 0x02a8c, 0x00, 0xff },
		{ 0x02a8d, 0x34, 0xff },
		{ 0x02a45, 0x06, 0x07 },
		{ 0x03f10, 0x0d, 0xff },
		{ 0x03f11, 0x02, 0xff },
		{ 0x03f12, 0x01, 0xff },
		{ 0x03f23, 0x2c, 0xff },
		{ 0x03f51, 0x13, 0xff },
		{ 0x03f52, 0x01, 0xff },
		{ 0x03f53, 0x00, 0xff },
		{ 0x027e6, 0x14, 0xff },
		{ 0x02786, 0x02, 0x07 },
		{ 0x02787, 0x40, 0xe0 },
		{ 0x027ef, 0x10, 0x18 },
	};

	dev_dbg(&priv->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n", __func__,
			c->frequency, c->bandwidth_hz);

	switch (c->bandwidth_hz) {
	case 5000000:
		bw_i = 0;
		bw_param = 3;
		break;
	case 6000000:
		bw_i = 1;
		bw_param = 2;
		break;
	case 7000000:
		bw_i = 2;
		bw_param = 1;
		break;
	case 8000000:
		bw_i = 3;
		bw_param = 0;
		break;
	default:
		return -EINVAL;
	}

	/* program tuner */
	if (fe->ops.tuner_ops.set_params)
		fe->ops.tuner_ops.set_params(fe);

	if (priv->delivery_system != SYS_DVBT2) {
		for (i = 0; i < ARRAY_SIZE(tab); i++) {
			ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
				tab[i].val, tab[i].mask);
			if (ret)
				goto error;
		}
	}

	priv->delivery_system = SYS_DVBT2;

	/* program IF frequency */
	if (fe->ops.tuner_ops.get_if_frequency) {
		ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
		if (ret)
			goto error;
	} else
		if_freq = 0;

	dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);

	num = if_freq / 1000; /* Hz => kHz */
	num *= 0x1000000;
	if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
	buf[0] = ((if_ctl >> 16) & 0xff);
	buf[1] = ((if_ctl >>  8) & 0xff);
	buf[2] = ((if_ctl >>  0) & 0xff);

	ret = cxd2820r_wr_regs(priv, 0x020b6, buf, 3);
	if (ret)
		goto error;

	ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[bw_i], 5);
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg_mask(priv, 0x020d7, bw_param << 6, 0xc0);
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
	if (ret)
		goto error;

	ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
	if (ret)
		goto error;

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;

}

int cxd2820r_get_frontend_t2(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	int ret;
	u8 buf[2];

	ret = cxd2820r_rd_regs(priv, 0x0205c, buf, 2);
	if (ret)
		goto error;

	switch ((buf[0] >> 0) & 0x07) {
	case 0:
		c->transmission_mode = TRANSMISSION_MODE_2K;
		break;
	case 1:
		c->transmission_mode = TRANSMISSION_MODE_8K;
		break;
	case 2:
		c->transmission_mode = TRANSMISSION_MODE_4K;
		break;
	case 3:
		c->transmission_mode = TRANSMISSION_MODE_1K;
		break;
	case 4:
		c->transmission_mode = TRANSMISSION_MODE_16K;
		break;
	case 5:
		c->transmission_mode = TRANSMISSION_MODE_32K;
		break;
	}

	switch ((buf[1] >> 4) & 0x07) {
	case 0:
		c->guard_interval = GUARD_INTERVAL_1_32;
		break;
	case 1:
		c->guard_interval = GUARD_INTERVAL_1_16;
		break;
	case 2:
		c->guard_interval = GUARD_INTERVAL_1_8;
		break;
	case 3:
		c->guard_interval = GUARD_INTERVAL_1_4;
		break;
	case 4:
		c->guard_interval = GUARD_INTERVAL_1_128;
		break;
	case 5:
		c->guard_interval = GUARD_INTERVAL_19_128;
		break;
	case 6:
		c->guard_interval = GUARD_INTERVAL_19_256;
		break;
	}

	ret = cxd2820r_rd_regs(priv, 0x0225b, buf, 2);
	if (ret)
		goto error;

	switch ((buf[0] >> 0) & 0x07) {
	case 0:
		c->fec_inner = FEC_1_2;
		break;
	case 1:
		c->fec_inner = FEC_3_5;
		break;
	case 2:
		c->fec_inner = FEC_2_3;
		break;
	case 3:
		c->fec_inner = FEC_3_4;
		break;
	case 4:
		c->fec_inner = FEC_4_5;
		break;
	case 5:
		c->fec_inner = FEC_5_6;
		break;
	}

	switch ((buf[1] >> 0) & 0x07) {
	case 0:
		c->modulation = QPSK;
		break;
	case 1:
		c->modulation = QAM_16;
		break;
	case 2:
		c->modulation = QAM_64;
		break;
	case 3:
		c->modulation = QAM_256;
		break;
	}

	ret = cxd2820r_rd_reg(priv, 0x020b5, &buf[0]);
	if (ret)
		goto error;

	switch ((buf[0] >> 4) & 0x01) {
	case 0:
		c->inversion = INVERSION_OFF;
		break;
	case 1:
		c->inversion = INVERSION_ON;
		break;
	}

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_status_t2(struct dvb_frontend *fe, fe_status_t *status)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[1];
	*status = 0;

	ret = cxd2820r_rd_reg(priv, 0x02010 , &buf[0]);
	if (ret)
		goto error;

	if ((buf[0] & 0x07) == 6) {
		if (((buf[0] >> 5) & 0x01) == 1) {
			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
		} else {
			*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
				FE_HAS_VITERBI | FE_HAS_SYNC;
		}
	}

	dev_dbg(&priv->i2c->dev, "%s: lock=%02x\n", __func__, buf[0]);

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_ber_t2(struct dvb_frontend *fe, u32 *ber)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[4];
	unsigned int errbits;
	*ber = 0;
	/* FIXME: correct calculation */

	ret = cxd2820r_rd_regs(priv, 0x02039, buf, sizeof(buf));
	if (ret)
		goto error;

	if ((buf[0] >> 4) & 0x01) {
		errbits = (buf[0] & 0x0f) << 24 | buf[1] << 16 |
			buf[2] << 8 | buf[3];

		if (errbits)
			*ber = errbits * 64 / 16588800;
	}

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe,
	u16 *strength)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[2];
	u16 tmp;

	ret = cxd2820r_rd_regs(priv, 0x02026, buf, sizeof(buf));
	if (ret)
		goto error;

	tmp = (buf[0] & 0x0f) << 8 | buf[1];
	tmp = ~tmp & 0x0fff;

	/* scale value to 0x0000-0xffff from 0x0000-0x0fff */
	*strength = tmp * 0xffff / 0x0fff;

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_snr_t2(struct dvb_frontend *fe, u16 *snr)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret;
	u8 buf[2];
	u16 tmp;
	/* report SNR in dB * 10 */

	ret = cxd2820r_rd_regs(priv, 0x02028, buf, sizeof(buf));
	if (ret)
		goto error;

	tmp = (buf[0] & 0x0f) << 8 | buf[1];
	#define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
	if (tmp)
		*snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
			/ 100);
	else
		*snr = 0;

	dev_dbg(&priv->i2c->dev, "%s: dBx10=%d val=%04x\n", __func__, *snr,
			tmp);

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_read_ucblocks_t2(struct dvb_frontend *fe, u32 *ucblocks)
{
	*ucblocks = 0;
	/* no way to read ? */
	return 0;
}

int cxd2820r_sleep_t2(struct dvb_frontend *fe)
{
	struct cxd2820r_priv *priv = fe->demodulator_priv;
	int ret, i;
	struct reg_val_mask tab[] = {
		{ 0x000ff, 0x1f, 0xff },
		{ 0x00085, 0x00, 0xff },
		{ 0x00088, 0x01, 0xff },
		{ 0x02069, 0x00, 0xff },
		{ 0x00081, 0x00, 0xff },
		{ 0x00080, 0x00, 0xff },
	};

	dev_dbg(&priv->i2c->dev, "%s\n", __func__);

	for (i = 0; i < ARRAY_SIZE(tab); i++) {
		ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
			tab[i].mask);
		if (ret)
			goto error;
	}

	priv->delivery_system = SYS_UNDEFINED;

	return ret;
error:
	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
	return ret;
}

int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe,
	struct dvb_frontend_tune_settings *s)
{
	s->min_delay_ms = 1500;
	s->step_size = fe->ops.info.frequency_stepsize * 2;
	s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;

	return 0;
}
Commit	Line	Data
27cfc85e AP	1	/*
	2	* Sony CXD2820R demodulator driver
	3	*
	4	* Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along
	17	* with this program; if not, write to the Free Software Foundation, Inc.,
	18	* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
	19	*/
	20
	21
9ac51c5e SK	22	#include "cxd2820r_priv.h"
9ac51c5e SK	23
f311f68a	24	int cxd2820r_set_frontend_t2(struct dvb_frontend *fe)
27cfc85e AP	25	{
	26	struct cxd2820r_priv *priv = fe->demodulator_priv;
	27	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
13d723ba	28	int ret, i, bw_i;
fda23faa	29	u32 if_freq, if_ctl;
27cfc85e AP	30	u64 num;
	31	u8 buf[3], bw_param;
	32	u8 bw_params1[][5] = {
	33	{ 0x1c, 0xb3, 0x33, 0x33, 0x33 }, /* 5 MHz */
	34	{ 0x17, 0xea, 0xaa, 0xaa, 0xaa }, /* 6 MHz */
	35	{ 0x14, 0x80, 0x00, 0x00, 0x00 }, /* 7 MHz */
	36	{ 0x11, 0xf0, 0x00, 0x00, 0x00 }, /* 8 MHz */
	37	};
	38	struct reg_val_mask tab[] = {
	39	{ 0x00080, 0x02, 0xff },
	40	{ 0x00081, 0x20, 0xff },
	41	{ 0x00085, 0x07, 0xff },
	42	{ 0x00088, 0x01, 0xff },
	43	{ 0x02069, 0x01, 0xff },
	44
	45	{ 0x0207f, 0x2a, 0xff },
	46	{ 0x02082, 0x0a, 0xff },
	47	{ 0x02083, 0x0a, 0xff },
	48	{ 0x020cb, priv->cfg.if_agc_polarity << 6, 0x40 },
	49	{ 0x02070, priv->cfg.ts_mode, 0xff },
	50	{ 0x020b5, priv->cfg.spec_inv << 4, 0x10 },
	51	{ 0x02567, 0x07, 0x0f },
	52	{ 0x02569, 0x03, 0x03 },
	53	{ 0x02595, 0x1a, 0xff },
	54	{ 0x02596, 0x50, 0xff },
	55	{ 0x02a8c, 0x00, 0xff },
	56	{ 0x02a8d, 0x34, 0xff },
	57	{ 0x02a45, 0x06, 0x07 },
	58	{ 0x03f10, 0x0d, 0xff },
	59	{ 0x03f11, 0x02, 0xff },
	60	{ 0x03f12, 0x01, 0xff },
	61	{ 0x03f23, 0x2c, 0xff },
	62	{ 0x03f51, 0x13, 0xff },
	63	{ 0x03f52, 0x01, 0xff },
	64	{ 0x03f53, 0x00, 0xff },
	65	{ 0x027e6, 0x14, 0xff },
	66	{ 0x02786, 0x02, 0x07 },
	67	{ 0x02787, 0x40, 0xe0 },
	68	{ 0x027ef, 0x10, 0x18 },
	69	};
	70
75aeafc9 AP	71	dev_dbg(&priv->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n", __func__,
75aeafc9 AP	72	c->frequency, c->bandwidth_hz);
27cfc85e	73
13d723ba AP	74	switch (c->bandwidth_hz) {
	75	case 5000000:
	76	bw_i = 0;
	77	bw_param = 3;
	78	break;
	79	case 6000000:
	80	bw_i = 1;
	81	bw_param = 2;
	82	break;
	83	case 7000000:
	84	bw_i = 2;
	85	bw_param = 1;
	86	break;
	87	case 8000000:
	88	bw_i = 3;
	89	bw_param = 0;
	90	break;
	91	default:
	92	return -EINVAL;
	93	}
	94
27cfc85e AP	95	/* program tuner */
27cfc85e AP	96	if (fe->ops.tuner_ops.set_params)
14d24d14	97	fe->ops.tuner_ops.set_params(fe);
27cfc85e AP	98
	99	if (priv->delivery_system != SYS_DVBT2) {
	100	for (i = 0; i < ARRAY_SIZE(tab); i++) {
	101	ret = cxd2820r_wr_reg_mask(priv, tab[i].reg,
	102	tab[i].val, tab[i].mask);
	103	if (ret)
	104	goto error;
	105	}
	106	}
	107
	108	priv->delivery_system = SYS_DVBT2;
	109
fda23faa AP	110	/* program IF frequency */
	111	if (fe->ops.tuner_ops.get_if_frequency) {
	112	ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_freq);
	113	if (ret)
	114	goto error;
	115	} else
	116	if_freq = 0;
	117
75aeafc9	118	dev_dbg(&priv->i2c->dev, "%s: if_freq=%d\n", __func__, if_freq);
fda23faa AP	119
fda23faa AP	120	num = if_freq / 1000; /* Hz => kHz */
27cfc85e AP	121	num *= 0x1000000;
	122	if_ctl = cxd2820r_div_u64_round_closest(num, 41000);
	123	buf[0] = ((if_ctl >> 16) & 0xff);
	124	buf[1] = ((if_ctl >> 8) & 0xff);
	125	buf[2] = ((if_ctl >> 0) & 0xff);
	126
	127	ret = cxd2820r_wr_regs(priv, 0x020b6, buf, 3);
	128	if (ret)
	129	goto error;
	130
13d723ba	131	ret = cxd2820r_wr_regs(priv, 0x0209f, bw_params1[bw_i], 5);
27cfc85e AP	132	if (ret)
	133	goto error;
	134
	135	ret = cxd2820r_wr_reg_mask(priv, 0x020d7, bw_param << 6, 0xc0);
	136	if (ret)
	137	goto error;
	138
	139	ret = cxd2820r_wr_reg(priv, 0x000ff, 0x08);
	140	if (ret)
	141	goto error;
	142
	143	ret = cxd2820r_wr_reg(priv, 0x000fe, 0x01);
	144	if (ret)
	145	goto error;
	146
	147	return ret;
	148	error:
75aeafc9	149	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	150	return ret;
	151
	152	}
	153
f311f68a	154	int cxd2820r_get_frontend_t2(struct dvb_frontend *fe)
27cfc85e AP	155	{
	156	struct cxd2820r_priv *priv = fe->demodulator_priv;
	157	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
	158	int ret;
	159	u8 buf[2];
	160
	161	ret = cxd2820r_rd_regs(priv, 0x0205c, buf, 2);
	162	if (ret)
	163	goto error;
	164
	165	switch ((buf[0] >> 0) & 0x07) {
	166	case 0:
	167	c->transmission_mode = TRANSMISSION_MODE_2K;
	168	break;
	169	case 1:
	170	c->transmission_mode = TRANSMISSION_MODE_8K;
	171	break;
	172	case 2:
	173	c->transmission_mode = TRANSMISSION_MODE_4K;
	174	break;
	175	case 3:
	176	c->transmission_mode = TRANSMISSION_MODE_1K;
	177	break;
	178	case 4:
	179	c->transmission_mode = TRANSMISSION_MODE_16K;
	180	break;
	181	case 5:
	182	c->transmission_mode = TRANSMISSION_MODE_32K;
	183	break;
	184	}
	185
	186	switch ((buf[1] >> 4) & 0x07) {
	187	case 0:
	188	c->guard_interval = GUARD_INTERVAL_1_32;
	189	break;
	190	case 1:
	191	c->guard_interval = GUARD_INTERVAL_1_16;
	192	break;
	193	case 2:
	194	c->guard_interval = GUARD_INTERVAL_1_8;
	195	break;
	196	case 3:
	197	c->guard_interval = GUARD_INTERVAL_1_4;
	198	break;
	199	case 4:
	200	c->guard_interval = GUARD_INTERVAL_1_128;
	201	break;
	202	case 5:
	203	c->guard_interval = GUARD_INTERVAL_19_128;
	204	break;
	205	case 6:
	206	c->guard_interval = GUARD_INTERVAL_19_256;
	207	break;
	208	}
	209
	210	ret = cxd2820r_rd_regs(priv, 0x0225b, buf, 2);
	211	if (ret)
	212	goto error;
	213
	214	switch ((buf[0] >> 0) & 0x07) {
	215	case 0:
	216	c->fec_inner = FEC_1_2;
	217	break;
	218	case 1:
219	c->fec_inner = FEC_3_5;
220	break;
221	case 2:
222	c->fec_inner = FEC_2_3;
223	break;
224	case 3:
225	c->fec_inner = FEC_3_4;
226	break;
227	case 4:
228	c->fec_inner = FEC_4_5;
229	break;
230	case 5:
231	c->fec_inner = FEC_5_6;
232	break;
233	}
234
235	switch ((buf[1] >> 0) & 0x07) {
236	case 0:
237	c->modulation = QPSK;
238	break;
239	case 1:
240	c->modulation = QAM_16;
241	break;
242	case 2:
243	c->modulation = QAM_64;
244	break;
245	case 3:
246	c->modulation = QAM_256;
247	break;
248	}
249
250	ret = cxd2820r_rd_reg(priv, 0x020b5, &buf[0]);
251	if (ret)
252	goto error;
253
254	switch ((buf[0] >> 4) & 0x01) {
255	case 0:
256	c->inversion = INVERSION_OFF;
257	break;
258	case 1:
259	c->inversion = INVERSION_ON;
260	break;
261	}
262
263	return ret;
264	error:
75aeafc9	265	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	266	return ret;
	267	}
	268
9ac51c5e	269	int cxd2820r_read_status_t2(struct dvb_frontend fe, fe_status_t status)
27cfc85e AP	270	{
	271	struct cxd2820r_priv *priv = fe->demodulator_priv;
	272	int ret;
	273	u8 buf[1];
	274	*status = 0;
	275
	276	ret = cxd2820r_rd_reg(priv, 0x02010 , &buf[0]);
	277	if (ret)
	278	goto error;
	279
	280	if ((buf[0] & 0x07) == 6) {
	281	if (((buf[0] >> 5) & 0x01) == 1) {
	282	*status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER \|
	283	FE_HAS_VITERBI \| FE_HAS_SYNC \| FE_HAS_LOCK;
	284	} else {
	285	*status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER \|
	286	FE_HAS_VITERBI \| FE_HAS_SYNC;
	287	}
	288	}
	289
75aeafc9	290	dev_dbg(&priv->i2c->dev, "%s: lock=%02x\n", __func__, buf[0]);
27cfc85e AP	291
	292	return ret;
	293	error:
75aeafc9	294	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	295	return ret;
	296	}
	297
9ac51c5e	298	int cxd2820r_read_ber_t2(struct dvb_frontend fe, u32 ber)
27cfc85e AP	299	{
	300	struct cxd2820r_priv *priv = fe->demodulator_priv;
	301	int ret;
	302	u8 buf[4];
	303	unsigned int errbits;
	304	*ber = 0;
	305	/* FIXME: correct calculation */
	306
	307	ret = cxd2820r_rd_regs(priv, 0x02039, buf, sizeof(buf));
	308	if (ret)
	309	goto error;
	310
	311	if ((buf[0] >> 4) & 0x01) {
	312	errbits = (buf[0] & 0x0f) << 24 \| buf[1] << 16 \|
	313	buf[2] << 8 \| buf[3];
	314
	315	if (errbits)
	316	ber = errbits 64 / 16588800;
	317	}
	318
	319	return ret;
	320	error:
75aeafc9	321	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	322	return ret;
	323	}
	324
9ac51c5e	325	int cxd2820r_read_signal_strength_t2(struct dvb_frontend *fe,
27cfc85e AP	326	u16 *strength)
	327	{
	328	struct cxd2820r_priv *priv = fe->demodulator_priv;
	329	int ret;
	330	u8 buf[2];
	331	u16 tmp;
	332
	333	ret = cxd2820r_rd_regs(priv, 0x02026, buf, sizeof(buf));
	334	if (ret)
	335	goto error;
	336
	337	tmp = (buf[0] & 0x0f) << 8 \| buf[1];
	338	tmp = ~tmp & 0x0fff;
	339
	340	/* scale value to 0x0000-0xffff from 0x0000-0x0fff */
	341	strength = tmp 0xffff / 0x0fff;
	342
	343	return ret;
	344	error:
75aeafc9	345	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	346	return ret;
	347	}
	348
9ac51c5e	349	int cxd2820r_read_snr_t2(struct dvb_frontend fe, u16 snr)
27cfc85e AP	350	{
	351	struct cxd2820r_priv *priv = fe->demodulator_priv;
	352	int ret;
	353	u8 buf[2];
	354	u16 tmp;
	355	/* report SNR in dB * 10 */
	356
	357	ret = cxd2820r_rd_regs(priv, 0x02028, buf, sizeof(buf));
	358	if (ret)
	359	goto error;
	360
	361	tmp = (buf[0] & 0x0f) << 8 \| buf[1];
	362	#define CXD2820R_LOG10_8_24 15151336 /* log10(8) << 24 */
	363	if (tmp)
	364	*snr = (intlog10(tmp) - CXD2820R_LOG10_8_24) / ((1 << 24)
	365	/ 100);
	366	else
	367	*snr = 0;
	368
75aeafc9 AP	369	dev_dbg(&priv->i2c->dev, "%s: dBx10=%d val=%04x\n", __func__, *snr,
75aeafc9 AP	370	tmp);
27cfc85e AP	371
	372	return ret;
	373	error:
75aeafc9	374	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	375	return ret;
	376	}
	377
9ac51c5e	378	int cxd2820r_read_ucblocks_t2(struct dvb_frontend fe, u32 ucblocks)
27cfc85e AP	379	{
	380	*ucblocks = 0;
	381	/* no way to read ? */
	382	return 0;
	383	}
	384
9ac51c5e	385	int cxd2820r_sleep_t2(struct dvb_frontend *fe)
27cfc85e AP	386	{
	387	struct cxd2820r_priv *priv = fe->demodulator_priv;
	388	int ret, i;
	389	struct reg_val_mask tab[] = {
	390	{ 0x000ff, 0x1f, 0xff },
	391	{ 0x00085, 0x00, 0xff },
	392	{ 0x00088, 0x01, 0xff },
	393	{ 0x02069, 0x00, 0xff },
	394	{ 0x00081, 0x00, 0xff },
	395	{ 0x00080, 0x00, 0xff },
	396	};
	397
75aeafc9	398	dev_dbg(&priv->i2c->dev, "%s\n", __func__);
27cfc85e AP	399
	400	for (i = 0; i < ARRAY_SIZE(tab); i++) {
	401	ret = cxd2820r_wr_reg_mask(priv, tab[i].reg, tab[i].val,
	402	tab[i].mask);
	403	if (ret)
	404	goto error;
	405	}
	406
	407	priv->delivery_system = SYS_UNDEFINED;
	408
	409	return ret;
	410	error:
75aeafc9	411	dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
27cfc85e AP	412	return ret;
	413	}
	414
9ac51c5e	415	int cxd2820r_get_tune_settings_t2(struct dvb_frontend *fe,
27cfc85e AP	416	struct dvb_frontend_tune_settings *s)
	417	{
	418	s->min_delay_ms = 1500;
	419	s->step_size = fe->ops.info.frequency_stepsize * 2;
	420	s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
	421
	422	return 0;
	423	}