projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[media] rtl2830: rename 'priv' to 'dev'
[deliverable/linux.git] / drivers / media / dvb-frontends / rtl2830.c
CommitLineData
c0adca73
AP		 1/*
2 * Realtek RTL2830 DVB-T demodulator driver
3 *
4 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21
22/*
23 * Driver implements own I2C-adapter for tuner I2C access. That's since chip
24 * have unusual I2C-gate control which closes gate automatically after each
25 * I2C transfer. Using own I2C adapter we can workaround that.
26 */
27
28#include "rtl2830_priv.h"
29
37ebaf68
MCC		 30/* Max transfer size done by I2C transfer functions */
31#define MAX_XFER_SIZE 64
32
0485a708 33/* write multiple hardware registers */
f544f100 34static int rtl2830_wr(struct rtl2830_dev *dev, u8 reg, const u8 *val, int len)
c0adca73
AP		 35{
36 int ret;
37ebaf68 37 u8 buf[MAX_XFER_SIZE];
c0adca73
AP		 38 struct i2c_msg msg[1] = {
39 {
f544f100 40 .addr = dev->cfg.i2c_addr,
c0adca73 41 .flags = 0,
37ebaf68 42 .len = 1 + len,
c0adca73
AP		 43 .buf = buf,
44 }
45 };
46
37ebaf68 47 if (1 + len > sizeof(buf)) {
f544f100 48 dev_warn(&dev->i2c->dev,
37ebaf68
MCC		 49 "%s: i2c wr reg=%04x: len=%d is too big!\n",
50 KBUILD_MODNAME, reg, len);
51 return -EINVAL;
52 }
53
0485a708
AP		 54 buf[0] = reg;
55 memcpy(&buf[1], val, len);
c0adca73 56
f544f100 57 ret = i2c_transfer(dev->i2c, msg, 1);
c0adca73
AP		 58 if (ret == 1) {
59 ret = 0;
60 } else {
f544f100 61 dev_warn(&dev->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
86ad0f1d 62 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
c0adca73
AP		 63 ret = -EREMOTEIO;
64 }
65 return ret;
66}
67
0485a708 68/* read multiple hardware registers */
f544f100 69static int rtl2830_rd(struct rtl2830_dev *dev, u8 reg, u8 *val, int len)
c0adca73
AP		 70{
71 int ret;
c0adca73
AP		 72 struct i2c_msg msg[2] = {
73 {
f544f100 74 .addr = dev->cfg.i2c_addr,
c0adca73 75 .flags = 0,
0485a708
AP		 76 .len = 1,
77 .buf = &reg,
c0adca73 78 }, {
f544f100 79 .addr = dev->cfg.i2c_addr,
c0adca73
AP		 80 .flags = I2C_M_RD,
81 .len = len,
82 .buf = val,
83 }
84 };
85
f544f100 86 ret = i2c_transfer(dev->i2c, msg, 2);
c0adca73
AP		 87 if (ret == 2) {
88 ret = 0;
89 } else {
f544f100 90 dev_warn(&dev->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
86ad0f1d 91 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
c0adca73
AP		 92 ret = -EREMOTEIO;
93 }
94 return ret;
95}
96
0485a708 97/* write multiple registers */
f544f100 98static int rtl2830_wr_regs(struct rtl2830_dev *dev, u16 reg, const u8 *val,
3a2fca26 99 int len)
0485a708
AP		 100{
101 int ret;
102 u8 reg2 = (reg >> 0) & 0xff;
103 u8 page = (reg >> 8) & 0xff;
104
105 /* switch bank if needed */
f544f100
AP		 106 if (page != dev->page) {
107 ret = rtl2830_wr(dev, 0x00, &page, 1);
0485a708
AP		 108 if (ret)
109 return ret;
110
f544f100 111 dev->page = page;
0485a708
AP		 112 }
113
f544f100 114 return rtl2830_wr(dev, reg2, val, len);
0485a708
AP		 115}
116
117/* read multiple registers */
f544f100 118static int rtl2830_rd_regs(struct rtl2830_dev *dev, u16 reg, u8 *val, int len)
0485a708
AP		 119{
120 int ret;
121 u8 reg2 = (reg >> 0) & 0xff;
122 u8 page = (reg >> 8) & 0xff;
123
124 /* switch bank if needed */
f544f100
AP		 125 if (page != dev->page) {
126 ret = rtl2830_wr(dev, 0x00, &page, 1);
0485a708
AP		 127 if (ret)
128 return ret;
129
f544f100 130 dev->page = page;
0485a708
AP		 131 }
132
f544f100 133 return rtl2830_rd(dev, reg2, val, len);
0485a708
AP		 134}
135
c0adca73 136/* read single register */
f544f100 137static int rtl2830_rd_reg(struct rtl2830_dev *dev, u16 reg, u8 *val)
c0adca73 138{
f544f100 139 return rtl2830_rd_regs(dev, reg, val, 1);
c0adca73
AP		 140}
141
142/* write single register with mask */
f544f100 143static int rtl2830_wr_reg_mask(struct rtl2830_dev *dev, u16 reg, u8 val, u8 mask)
c0adca73
AP		 144{
145 int ret;
146 u8 tmp;
147
148 /* no need for read if whole reg is written */
149 if (mask != 0xff) {
f544f100 150 ret = rtl2830_rd_regs(dev, reg, &tmp, 1);
c0adca73
AP		 151 if (ret)
152 return ret;
153
154 val &= mask;
155 tmp &= ~mask;
156 val |= tmp;
157 }
158
f544f100 159 return rtl2830_wr_regs(dev, reg, &val, 1);
c0adca73
AP		 160}
161
162/* read single register with mask */
f544f100 163static int rtl2830_rd_reg_mask(struct rtl2830_dev *dev, u16 reg, u8 *val, u8 mask)
c0adca73
AP		 164{
165 int ret, i;
166 u8 tmp;
167
f544f100 168 ret = rtl2830_rd_regs(dev, reg, &tmp, 1);
c0adca73
AP		 169 if (ret)
170 return ret;
171
172 tmp &= mask;
173
174 /* find position of the first bit */
175 for (i = 0; i < 8; i++) {
176 if ((mask >> i) & 0x01)
177 break;
178 }
179 *val = tmp >> i;
180
181 return 0;
182}
183
184static int rtl2830_init(struct dvb_frontend *fe)
185{
f544f100 186 struct rtl2830_dev *dev = fe->demodulator_priv;
c0adca73 187 int ret, i;
c0adca73
AP		 188 struct rtl2830_reg_val_mask tab[] = {
189 { 0x00d, 0x01, 0x03 },
190 { 0x00d, 0x10, 0x10 },
191 { 0x104, 0x00, 0x1e },
192 { 0x105, 0x80, 0x80 },
193 { 0x110, 0x02, 0x03 },
194 { 0x110, 0x08, 0x0c },
195 { 0x17b, 0x00, 0x40 },
196 { 0x17d, 0x05, 0x0f },
197 { 0x17d, 0x50, 0xf0 },
198 { 0x18c, 0x08, 0x0f },
199 { 0x18d, 0x00, 0xc0 },
200 { 0x188, 0x05, 0x0f },
201 { 0x189, 0x00, 0xfc },
202 { 0x2d5, 0x02, 0x02 },
203 { 0x2f1, 0x02, 0x06 },
204 { 0x2f1, 0x20, 0xf8 },
205 { 0x16d, 0x00, 0x01 },
206 { 0x1a6, 0x00, 0x80 },
f544f100
AP		 207 { 0x106, dev->cfg.vtop, 0x3f },
208 { 0x107, dev->cfg.krf, 0x3f },
c0adca73 209 { 0x112, 0x28, 0xff },
f544f100 210 { 0x103, dev->cfg.agc_targ_val, 0xff },
c0adca73
AP		 211 { 0x00a, 0x02, 0x07 },
212 { 0x140, 0x0c, 0x3c },
213 { 0x140, 0x40, 0xc0 },
214 { 0x15b, 0x05, 0x07 },
215 { 0x15b, 0x28, 0x38 },
216 { 0x15c, 0x05, 0x07 },
217 { 0x15c, 0x28, 0x38 },
f544f100 218 { 0x115, dev->cfg.spec_inv, 0x01 },
c0adca73
AP		 219 { 0x16f, 0x01, 0x07 },
220 { 0x170, 0x18, 0x38 },
221 { 0x172, 0x0f, 0x0f },
222 { 0x173, 0x08, 0x38 },
223 { 0x175, 0x01, 0x07 },
224 { 0x176, 0x00, 0xc0 },
225 };
226
227 for (i = 0; i < ARRAY_SIZE(tab); i++) {
f544f100 228 ret = rtl2830_wr_reg_mask(dev, tab[i].reg, tab[i].val,
c0adca73
AP		 229 tab[i].mask);
230 if (ret)
231 goto err;
232 }
233
f544f100 234 ret = rtl2830_wr_regs(dev, 0x18f, "\x28\x00", 2);
c0adca73
AP		 235 if (ret)
236 goto err;
237
f544f100 238 ret = rtl2830_wr_regs(dev, 0x195,
c0adca73
AP		 239 "\x04\x06\x0a\x12\x0a\x12\x1e\x28", 8);
240 if (ret)
241 goto err;
242
c0adca73
AP		 243 /* TODO: spec init */
244
245 /* soft reset */
f544f100 246 ret = rtl2830_wr_reg_mask(dev, 0x101, 0x04, 0x04);
c0adca73
AP		 247 if (ret)
248 goto err;
249
f544f100 250 ret = rtl2830_wr_reg_mask(dev, 0x101, 0x00, 0x04);
c0adca73
AP		 251 if (ret)
252 goto err;
253
f544f100 254 dev->sleeping = false;
a8567cf2 255
c0adca73
AP		 256 return ret;
257err:
f544f100 258 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
c0adca73
AP		 259 return ret;
260}
261
a8567cf2
AP		 262static int rtl2830_sleep(struct dvb_frontend *fe)
263{
f544f100
AP		 264 struct rtl2830_dev *dev = fe->demodulator_priv;
265 dev->sleeping = true;
a8567cf2
AP		 266 return 0;
267}
268
a17ff2ee 269static int rtl2830_get_tune_settings(struct dvb_frontend *fe,
c0adca73
AP		 270 struct dvb_frontend_tune_settings *s)
271{
272 s->min_delay_ms = 500;
273 s->step_size = fe->ops.info.frequency_stepsize * 2;
274 s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
275
276 return 0;
277}
278
279static int rtl2830_set_frontend(struct dvb_frontend *fe)
280{
f544f100 281 struct rtl2830_dev *dev = fe->demodulator_priv;
c0adca73
AP		 282 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
283 int ret, i;
66b3c4de
AP		 284 u64 num;
285 u8 buf[3], tmp;
286 u32 if_ctl, if_frequency;
3a2fca26 287 static const u8 bw_params1[3][34] = {
c0adca73
AP		 288 {
289 0x1f, 0xf0, 0x1f, 0xf0, 0x1f, 0xfa, 0x00, 0x17, 0x00, 0x41,
290 0x00, 0x64, 0x00, 0x67, 0x00, 0x38, 0x1f, 0xde, 0x1f, 0x7a,
291 0x1f, 0x47, 0x1f, 0x7c, 0x00, 0x30, 0x01, 0x4b, 0x02, 0x82,
292 0x03, 0x73, 0x03, 0xcf, /* 6 MHz */
293 }, {
294 0x1f, 0xfa, 0x1f, 0xda, 0x1f, 0xc1, 0x1f, 0xb3, 0x1f, 0xca,
295 0x00, 0x07, 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x40, 0x1f, 0xca,
296 0x1f, 0x4d, 0x1f, 0x2a, 0x1f, 0xb2, 0x00, 0xec, 0x02, 0x7e,
297 0x03, 0xd0, 0x04, 0x53, /* 7 MHz */
298 }, {
299 0x00, 0x10, 0x00, 0x0e, 0x1f, 0xf7, 0x1f, 0xc9, 0x1f, 0xa0,
300 0x1f, 0xa6, 0x1f, 0xec, 0x00, 0x4e, 0x00, 0x7d, 0x00, 0x3a,
301 0x1f, 0x98, 0x1f, 0x10, 0x1f, 0x40, 0x00, 0x75, 0x02, 0x5f,
302 0x04, 0x24, 0x04, 0xdb, /* 8 MHz */
303 },
304 };
3a2fca26
AP		 305 static const u8 bw_params2[3][6] = {
306 {0xc3, 0x0c, 0x44, 0x33, 0x33, 0x30}, /* 6 MHz */
307 {0xb8, 0xe3, 0x93, 0x99, 0x99, 0x98}, /* 7 MHz */
308 {0xae, 0xba, 0xf3, 0x26, 0x66, 0x64}, /* 8 MHz */
c0adca73
AP		 309 };
310
f544f100 311 dev_dbg(&dev->i2c->dev,
86ad0f1d
AP		 312 "%s: frequency=%d bandwidth_hz=%d inversion=%d\n",
313 __func__, c->frequency, c->bandwidth_hz, c->inversion);
c0adca73
AP		 314
315 /* program tuner */
316 if (fe->ops.tuner_ops.set_params)
317 fe->ops.tuner_ops.set_params(fe);
318
319 switch (c->bandwidth_hz) {
320 case 6000000:
321 i = 0;
322 break;
323 case 7000000:
324 i = 1;
325 break;
326 case 8000000:
327 i = 2;
328 break;
329 default:
f544f100 330 dev_dbg(&dev->i2c->dev, "%s: invalid bandwidth\n", __func__);
c0adca73
AP		 331 return -EINVAL;
332 }
333
f544f100 334 ret = rtl2830_wr_reg_mask(dev, 0x008, i << 1, 0x06);
c0adca73
AP		 335 if (ret)
336 goto err;
337
66b3c4de
AP		 338 /* program if frequency */
339 if (fe->ops.tuner_ops.get_if_frequency)
340 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
341 else
342 ret = -EINVAL;
343
344 if (ret < 0)
345 goto err;
346
f544f100 347 num = if_frequency % dev->cfg.xtal;
66b3c4de 348 num *= 0x400000;
f544f100 349 num = div_u64(num, dev->cfg.xtal);
66b3c4de
AP		 350 num = -num;
351 if_ctl = num & 0x3fffff;
f544f100 352 dev_dbg(&dev->i2c->dev, "%s: if_frequency=%d if_ctl=%08x\n",
66b3c4de
AP		 353 __func__, if_frequency, if_ctl);
354
f544f100 355 ret = rtl2830_rd_reg_mask(dev, 0x119, &tmp, 0xc0); /* b[7:6] */
66b3c4de
AP		 356 if (ret)
357 goto err;
358
359 buf[0] = tmp << 6;
360 buf[0] |= (if_ctl >> 16) & 0x3f;
361 buf[1] = (if_ctl >> 8) & 0xff;
362 buf[2] = (if_ctl >> 0) & 0xff;
363
f544f100 364 ret = rtl2830_wr_regs(dev, 0x119, buf, 3);
66b3c4de
AP		 365 if (ret)
366 goto err;
367
c0adca73 368 /* 1/2 split I2C write */
f544f100 369 ret = rtl2830_wr_regs(dev, 0x11c, &bw_params1[i][0], 17);
c0adca73
AP		 370 if (ret)
371 goto err;
372
373 /* 2/2 split I2C write */
f544f100 374 ret = rtl2830_wr_regs(dev, 0x12d, &bw_params1[i][17], 17);
c0adca73
AP		 375 if (ret)
376 goto err;
377
f544f100 378 ret = rtl2830_wr_regs(dev, 0x19d, bw_params2[i], 6);
c0adca73
AP		 379 if (ret)
380 goto err;
381
382 return ret;
383err:
f544f100 384 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
c0adca73
AP		 385 return ret;
386}
387
631a2b61
AP		 388static int rtl2830_get_frontend(struct dvb_frontend *fe)
389{
f544f100 390 struct rtl2830_dev *dev = fe->demodulator_priv;
631a2b61
AP		 391 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
392 int ret;
393 u8 buf[3];
394
f544f100 395 if (dev->sleeping)
c188637d
AP		 396 return 0;
397
f544f100 398 ret = rtl2830_rd_regs(dev, 0x33c, buf, 2);
631a2b61
AP		 399 if (ret)
400 goto err;
401
f544f100 402 ret = rtl2830_rd_reg(dev, 0x351, &buf[2]);
631a2b61
AP		 403 if (ret)
404 goto err;
405
f544f100 406 dev_dbg(&dev->i2c->dev, "%s: TPS=%*ph\n", __func__, 3, buf);
631a2b61
AP		 407
408 switch ((buf[0] >> 2) & 3) {
409 case 0:
410 c->modulation = QPSK;
411 break;
412 case 1:
413 c->modulation = QAM_16;
414 break;
415 case 2:
416 c->modulation = QAM_64;
417 break;
418 }
419
420 switch ((buf[2] >> 2) & 1) {
421 case 0:
422 c->transmission_mode = TRANSMISSION_MODE_2K;
423 break;
424 case 1:
425 c->transmission_mode = TRANSMISSION_MODE_8K;
426 }
427
428 switch ((buf[2] >> 0) & 3) {
429 case 0:
430 c->guard_interval = GUARD_INTERVAL_1_32;
431 break;
432 case 1:
433 c->guard_interval = GUARD_INTERVAL_1_16;
434 break;
435 case 2:
436 c->guard_interval = GUARD_INTERVAL_1_8;
437 break;
438 case 3:
439 c->guard_interval = GUARD_INTERVAL_1_4;
440 break;
441 }
442
443 switch ((buf[0] >> 4) & 7) {
444 case 0:
445 c->hierarchy = HIERARCHY_NONE;
446 break;
447 case 1:
448 c->hierarchy = HIERARCHY_1;
449 break;
450 case 2:
451 c->hierarchy = HIERARCHY_2;
452 break;
453 case 3:
454 c->hierarchy = HIERARCHY_4;
455 break;
456 }
457
458 switch ((buf[1] >> 3) & 7) {
459 case 0:
460 c->code_rate_HP = FEC_1_2;
461 break;
462 case 1:
463 c->code_rate_HP = FEC_2_3;
464 break;
465 case 2:
466 c->code_rate_HP = FEC_3_4;
467 break;
468 case 3:
469 c->code_rate_HP = FEC_5_6;
470 break;
471 case 4:
472 c->code_rate_HP = FEC_7_8;
473 break;
474 }
475
476 switch ((buf[1] >> 0) & 7) {
477 case 0:
478 c->code_rate_LP = FEC_1_2;
479 break;
480 case 1:
481 c->code_rate_LP = FEC_2_3;
482 break;
483 case 2:
484 c->code_rate_LP = FEC_3_4;
485 break;
486 case 3:
487 c->code_rate_LP = FEC_5_6;
488 break;
489 case 4:
490 c->code_rate_LP = FEC_7_8;
491 break;
492 }
493
494 return 0;
495err:
f544f100 496 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
631a2b61
AP		 497 return ret;
498}
499
c0adca73
AP		 500static int rtl2830_read_status(struct dvb_frontend *fe, fe_status_t *status)
501{
f544f100 502 struct rtl2830_dev *dev = fe->demodulator_priv;
c0adca73
AP		 503 int ret;
504 u8 tmp;
505 *status = 0;
506
f544f100 507 if (dev->sleeping)
a8567cf2
AP		 508 return 0;
509
f544f100 510 ret = rtl2830_rd_reg_mask(dev, 0x351, &tmp, 0x78); /* [6:3] */
c0adca73
AP		 511 if (ret)
512 goto err;
513
514 if (tmp == 11) {
515 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
516 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
517 } else if (tmp == 10) {
518 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
519 FE_HAS_VITERBI;
520 }
521
522 return ret;
523err:
f544f100 524 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
c0adca73
AP		 525 return ret;
526}
527
528static int rtl2830_read_snr(struct dvb_frontend *fe, u16 *snr)
529{
f544f100 530 struct rtl2830_dev *dev = fe->demodulator_priv;
eba672a0
AP		 531 int ret, hierarchy, constellation;
532 u8 buf[2], tmp;
533 u16 tmp16;
534#define CONSTELLATION_NUM 3
535#define HIERARCHY_NUM 4
536 static const u32 snr_constant[CONSTELLATION_NUM][HIERARCHY_NUM] = {
537 { 70705899, 70705899, 70705899, 70705899 },
538 { 82433173, 82433173, 87483115, 94445660 },
539 { 92888734, 92888734, 95487525, 99770748 },
540 };
541
f544f100 542 if (dev->sleeping)
c188637d
AP		 543 return 0;
544
eba672a0
AP		 545 /* reports SNR in resolution of 0.1 dB */
546
f544f100 547 ret = rtl2830_rd_reg(dev, 0x33c, &tmp);
eba672a0
AP		 548 if (ret)
549 goto err;
550
551 constellation = (tmp >> 2) & 0x03; /* [3:2] */
552 if (constellation > CONSTELLATION_NUM - 1)
553 goto err;
554
555 hierarchy = (tmp >> 4) & 0x07; /* [6:4] */
556 if (hierarchy > HIERARCHY_NUM - 1)
557 goto err;
558
f544f100 559 ret = rtl2830_rd_regs(dev, 0x40c, buf, 2);
eba672a0
AP		 560 if (ret)
561 goto err;
562
563 tmp16 = buf[0] << 8 | buf[1];
564
565 if (tmp16)
566 *snr = (snr_constant[constellation][hierarchy] -
567 intlog10(tmp16)) / ((1 << 24) / 100);
568 else
569 *snr = 0;
570
c0adca73 571 return 0;
eba672a0 572err:
f544f100 573 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
eba672a0 574 return ret;
c0adca73
AP		 575}
576
577static int rtl2830_read_ber(struct dvb_frontend *fe, u32 *ber)
578{
f544f100 579 struct rtl2830_dev *dev = fe->demodulator_priv;
525ffc19
AP		 580 int ret;
581 u8 buf[2];
582
f544f100 583 if (dev->sleeping)
c188637d
AP		 584 return 0;
585
f544f100 586 ret = rtl2830_rd_regs(dev, 0x34e, buf, 2);
525ffc19
AP		 587 if (ret)
588 goto err;
589
590 *ber = buf[0] << 8 | buf[1];
591
c0adca73 592 return 0;
525ffc19 593err:
f544f100 594 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
525ffc19 595 return ret;
c0adca73
AP		 596}
597
598static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
599{
600 *ucblocks = 0;
601 return 0;
602}
603
604static int rtl2830_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
605{
f544f100 606 struct rtl2830_dev *dev = fe->demodulator_priv;
78e75075
AP		 607 int ret;
608 u8 buf[2];
609 u16 if_agc_raw, if_agc;
610
f544f100 611 if (dev->sleeping)
c188637d
AP		 612 return 0;
613
f544f100 614 ret = rtl2830_rd_regs(dev, 0x359, buf, 2);
78e75075
AP		 615 if (ret)
616 goto err;
617
618 if_agc_raw = (buf[0] << 8 | buf[1]) & 0x3fff;
619
620 if (if_agc_raw & (1 << 9))
621 if_agc = -(~(if_agc_raw - 1) & 0x1ff);
622 else
623 if_agc = if_agc_raw;
624
625 *strength = (u8) (55 - if_agc / 182);
626 *strength |= *strength << 8;
627
c0adca73 628 return 0;
78e75075 629err:
f544f100 630 dev_dbg(&dev->i2c->dev, "%s: failed=%d\n", __func__, ret);
78e75075 631 return ret;
c0adca73
AP		 632}
633
c0adca73
AP		 634static struct dvb_frontend_ops rtl2830_ops = {
635 .delsys = { SYS_DVBT },
636 .info = {
637 .name = "Realtek RTL2830 (DVB-T)",
638 .caps = FE_CAN_FEC_1_2 |
639 FE_CAN_FEC_2_3 |
640 FE_CAN_FEC_3_4 |
641 FE_CAN_FEC_5_6 |
642 FE_CAN_FEC_7_8 |
643 FE_CAN_FEC_AUTO |
644 FE_CAN_QPSK |
645 FE_CAN_QAM_16 |
646 FE_CAN_QAM_64 |
647 FE_CAN_QAM_AUTO |
648 FE_CAN_TRANSMISSION_MODE_AUTO |
649 FE_CAN_GUARD_INTERVAL_AUTO |
650 FE_CAN_HIERARCHY_AUTO |
651 FE_CAN_RECOVER |
652 FE_CAN_MUTE_TS
653 },
654
c0adca73 655 .init = rtl2830_init,
a8567cf2 656 .sleep = rtl2830_sleep,
c0adca73
AP		 657
658 .get_tune_settings = rtl2830_get_tune_settings,
659
660 .set_frontend = rtl2830_set_frontend,
631a2b61 661 .get_frontend = rtl2830_get_frontend,
c0adca73
AP		 662
663 .read_status = rtl2830_read_status,
664 .read_snr = rtl2830_read_snr,
665 .read_ber = rtl2830_read_ber,
666 .read_ucblocks = rtl2830_read_ucblocks,
667 .read_signal_strength = rtl2830_read_signal_strength,
668};
669
28c08799
AP		 670/*
671 * I2C gate/repeater logic
672 * We must use unlocked i2c_transfer() here because I2C lock is already taken
673 * by tuner driver. Gate is closed automatically after single I2C xfer.
674 */
675static int rtl2830_select(struct i2c_adapter *adap, void *mux_priv, u32 chan_id)
676{
677 struct i2c_client *client = mux_priv;
f544f100 678 struct rtl2830_dev *dev = i2c_get_clientdata(client);
28c08799
AP		 679 struct i2c_msg select_reg_page_msg[1] = {
680 {
f544f100 681 .addr = dev->cfg.i2c_addr,
28c08799
AP		 682 .flags = 0,
683 .len = 2,
684 .buf = "\x00\x01",
685 }
686 };
687 struct i2c_msg gate_open_msg[1] = {
688 {
f544f100 689 .addr = dev->cfg.i2c_addr,
28c08799
AP		 690 .flags = 0,
691 .len = 2,
692 .buf = "\x01\x08",
693 }
694 };
695 int ret;
696
697 /* select register page */
698 ret = __i2c_transfer(adap, select_reg_page_msg, 1);
699 if (ret != 1) {
700 dev_warn(&client->dev, "i2c write failed %d\n", ret);
701 if (ret >= 0)
702 ret = -EREMOTEIO;
703 goto err;
704 }
705
f544f100 706 dev->page = 1;
28c08799
AP		 707
708 /* open tuner I2C repeater for 1 xfer, closes automatically */
709 ret = __i2c_transfer(adap, gate_open_msg, 1);
710 if (ret != 1) {
711 dev_warn(&client->dev, "i2c write failed %d\n", ret);
712 if (ret >= 0)
713 ret = -EREMOTEIO;
714 goto err;
715 }
716
717 return 0;
718
719err:
720 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret);
721 return ret;
722}
723
724static struct dvb_frontend *rtl2830_get_dvb_frontend(struct i2c_client *client)
725{
f544f100 726 struct rtl2830_dev *dev = i2c_get_clientdata(client);
28c08799
AP		 727
728 dev_dbg(&client->dev, "\n");
729
f544f100 730 return &dev->fe;
28c08799
AP		 731}
732
733static struct i2c_adapter *rtl2830_get_i2c_adapter(struct i2c_client *client)
734{
f544f100 735 struct rtl2830_dev *dev = i2c_get_clientdata(client);
28c08799
AP		 736
737 dev_dbg(&client->dev, "\n");
738
f544f100 739 return dev->adapter;
28c08799
AP		 740}
741
742static int rtl2830_probe(struct i2c_client *client,
743 const struct i2c_device_id *id)
744{
745 struct rtl2830_platform_data *pdata = client->dev.platform_data;
746 struct i2c_adapter *i2c = client->adapter;
f544f100 747 struct rtl2830_dev *dev;
28c08799
AP		 748 int ret;
749 u8 u8tmp;
750
751 dev_dbg(&client->dev, "\n");
752
753 if (pdata == NULL) {
754 ret = -EINVAL;
755 goto err;
756 }
757
758 /* allocate memory for the internal state */
f544f100
AP		 759 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
760 if (dev == NULL) {
28c08799
AP		 761 ret = -ENOMEM;
762 goto err;
763 }
764
765 /* setup the state */
f544f100
AP		 766 i2c_set_clientdata(client, dev);
767 dev->i2c = i2c;
768 dev->sleeping = true;
769 dev->cfg.i2c_addr = client->addr;
770 dev->cfg.xtal = pdata->clk;
771 dev->cfg.spec_inv = pdata->spec_inv;
772 dev->cfg.vtop = pdata->vtop;
773 dev->cfg.krf = pdata->krf;
774 dev->cfg.agc_targ_val = pdata->agc_targ_val;
28c08799
AP		 775
776 /* check if the demod is there */
f544f100 777 ret = rtl2830_rd_reg(dev, 0x000, &u8tmp);
28c08799
AP		 778 if (ret)
779 goto err_kfree;
780
781 /* create muxed i2c adapter for tuner */
f544f100 782 dev->adapter = i2c_add_mux_adapter(client->adapter, &client->dev,
28c08799 783 client, 0, 0, 0, rtl2830_select, NULL);
f544f100 784 if (dev->adapter == NULL) {
28c08799
AP		 785 ret = -ENODEV;
786 goto err_kfree;
787 }
788
789 /* create dvb frontend */
f544f100
AP		 790 memcpy(&dev->fe.ops, &rtl2830_ops, sizeof(dev->fe.ops));
791 dev->fe.demodulator_priv = dev;
28c08799
AP		 792
793 /* setup callbacks */
794 pdata->get_dvb_frontend = rtl2830_get_dvb_frontend;
795 pdata->get_i2c_adapter = rtl2830_get_i2c_adapter;
796
797 dev_info(&client->dev, "Realtek RTL2830 successfully attached\n");
798 return 0;
799
800err_kfree:
f544f100 801 kfree(dev);
28c08799
AP		 802err:
803 dev_dbg(&client->dev, "failed=%d\n", ret);
804 return ret;
805}
806
807static int rtl2830_remove(struct i2c_client *client)
808{
f544f100 809 struct rtl2830_dev *dev = i2c_get_clientdata(client);
28c08799
AP		 810
811 dev_dbg(&client->dev, "\n");
812
f544f100
AP		 813 i2c_del_mux_adapter(dev->adapter);
814 kfree(dev);
28c08799
AP		 815 return 0;
816}
817
818static const struct i2c_device_id rtl2830_id_table[] = {
819 {"rtl2830", 0},
820 {}
821};
822MODULE_DEVICE_TABLE(i2c, rtl2830_id_table);
823
824static struct i2c_driver rtl2830_driver = {
825 .driver = {
826 .owner = THIS_MODULE,
827 .name = "rtl2830",
828 },
829 .probe = rtl2830_probe,
830 .remove = rtl2830_remove,
831 .id_table = rtl2830_id_table,
832};
833
834module_i2c_driver(rtl2830_driver);
835
c0adca73
AP		 836MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
837MODULE_DESCRIPTION("Realtek RTL2830 DVB-T demodulator driver");
838MODULE_LICENSE("GPL");
Linux kernel - Deliverables
This page took 0.211325 seconds and 5 git commands to generate.