Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | TDA10021 - Single Chip Cable Channel Receiver driver module | |
59c51591 | 3 | used on the Siemens DVB-C cards |
1da177e4 LT |
4 | |
5 | Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de> | |
6 | Copyright (C) 2004 Markus Schulz <msc@antzsystem.de> | |
9101e622 | 7 | Support for TDA10021 |
1da177e4 LT |
8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
1da177e4 LT |
24 | #include <linux/delay.h> |
25 | #include <linux/errno.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/string.h> | |
30 | #include <linux/slab.h> | |
31 | ||
32 | #include "dvb_frontend.h" | |
aa323ac8 | 33 | #include "tda1002x.h" |
1da177e4 LT |
34 | |
35 | ||
36 | struct tda10021_state { | |
37 | struct i2c_adapter* i2c; | |
1da177e4 | 38 | /* configuration settings */ |
aa323ac8 | 39 | const struct tda1002x_config* config; |
1da177e4 LT |
40 | struct dvb_frontend frontend; |
41 | ||
42 | u8 pwm; | |
43 | u8 reg0; | |
44 | }; | |
45 | ||
46 | ||
47 | #if 0 | |
48 | #define dprintk(x...) printk(x) | |
49 | #else | |
50 | #define dprintk(x...) | |
51 | #endif | |
52 | ||
53 | static int verbose; | |
54 | ||
55 | #define XIN 57840000UL | |
1da177e4 LT |
56 | |
57 | #define FIN (XIN >> 4) | |
58 | ||
59 | static int tda10021_inittab_size = 0x40; | |
60 | static u8 tda10021_inittab[0x40]= | |
61 | { | |
62 | 0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a, | |
63 | 0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40, | |
fd9c66e2 | 64 | 0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff, |
1da177e4 LT |
65 | 0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00, |
66 | 0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00, | |
67 | 0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58, | |
68 | 0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00, | |
69 | 0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00, | |
70 | }; | |
71 | ||
c10d14d6 | 72 | static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data) |
1da177e4 | 73 | { |
9101e622 | 74 | u8 buf[] = { reg, data }; |
1da177e4 | 75 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; |
9101e622 | 76 | int ret; |
1da177e4 LT |
77 | |
78 | ret = i2c_transfer (state->i2c, &msg, 1); | |
79 | if (ret != 1) | |
80 | printk("DVB: TDA10021(%d): %s, writereg error " | |
81 | "(reg == 0x%02x, val == 0x%02x, ret == %i)\n", | |
271ddbf7 | 82 | state->frontend.dvb->num, __func__, reg, data, ret); |
1da177e4 LT |
83 | |
84 | msleep(10); | |
85 | return (ret != 1) ? -EREMOTEIO : 0; | |
86 | } | |
87 | ||
88 | static u8 tda10021_readreg (struct tda10021_state* state, u8 reg) | |
89 | { | |
90 | u8 b0 [] = { reg }; | |
91 | u8 b1 [] = { 0 }; | |
92 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, | |
50c25fff | 93 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } }; |
1da177e4 LT |
94 | int ret; |
95 | ||
96 | ret = i2c_transfer (state->i2c, msg, 2); | |
dc120b07 HB |
97 | // Don't print an error message if the id is read. |
98 | if (ret != 2 && reg != 0x1a) | |
88bdcc5d | 99 | printk("DVB: TDA10021: %s: readreg error (ret == %i)\n", |
271ddbf7 | 100 | __func__, ret); |
1da177e4 LT |
101 | return b1[0]; |
102 | } | |
103 | ||
104 | //get access to tuner | |
105 | static int lock_tuner(struct tda10021_state* state) | |
106 | { | |
107 | u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 }; | |
108 | struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2}; | |
109 | ||
110 | if(i2c_transfer(state->i2c, &msg, 1) != 1) | |
111 | { | |
112 | printk("tda10021: lock tuner fails\n"); | |
113 | return -EREMOTEIO; | |
114 | } | |
115 | return 0; | |
116 | } | |
117 | ||
118 | //release access from tuner | |
119 | static int unlock_tuner(struct tda10021_state* state) | |
120 | { | |
121 | u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f }; | |
122 | struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2}; | |
123 | ||
124 | if(i2c_transfer(state->i2c, &msg_post, 1) != 1) | |
125 | { | |
126 | printk("tda10021: unlock tuner fails\n"); | |
127 | return -EREMOTEIO; | |
128 | } | |
129 | return 0; | |
130 | } | |
131 | ||
0df289a2 MCC |
132 | static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0, |
133 | enum fe_spectral_inversion inversion) | |
1da177e4 LT |
134 | { |
135 | reg0 |= state->reg0 & 0x63; | |
136 | ||
dc120b07 HB |
137 | if ((INVERSION_ON == inversion) ^ (state->config->invert == 0)) |
138 | reg0 &= ~0x20; | |
139 | else | |
140 | reg0 |= 0x20; | |
1da177e4 | 141 | |
c10d14d6 AQ |
142 | _tda10021_writereg (state, 0x00, reg0 & 0xfe); |
143 | _tda10021_writereg (state, 0x00, reg0 | 0x01); | |
1da177e4 LT |
144 | |
145 | state->reg0 = reg0; | |
146 | return 0; | |
147 | } | |
148 | ||
149 | static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate) | |
150 | { | |
151 | s32 BDR; | |
152 | s32 BDRI; | |
153 | s16 SFIL=0; | |
154 | u16 NDEC = 0; | |
155 | u32 tmp, ratio; | |
156 | ||
157 | if (symbolrate > XIN/2) | |
158 | symbolrate = XIN/2; | |
159 | if (symbolrate < 500000) | |
160 | symbolrate = 500000; | |
161 | ||
162 | if (symbolrate < XIN/16) NDEC = 1; | |
163 | if (symbolrate < XIN/32) NDEC = 2; | |
164 | if (symbolrate < XIN/64) NDEC = 3; | |
165 | ||
166 | if (symbolrate < (u32)(XIN/12.3)) SFIL = 1; | |
167 | if (symbolrate < (u32)(XIN/16)) SFIL = 0; | |
168 | if (symbolrate < (u32)(XIN/24.6)) SFIL = 1; | |
169 | if (symbolrate < (u32)(XIN/32)) SFIL = 0; | |
170 | if (symbolrate < (u32)(XIN/49.2)) SFIL = 1; | |
171 | if (symbolrate < (u32)(XIN/64)) SFIL = 0; | |
172 | if (symbolrate < (u32)(XIN/98.4)) SFIL = 1; | |
173 | ||
174 | symbolrate <<= NDEC; | |
175 | ratio = (symbolrate << 4) / FIN; | |
176 | tmp = ((symbolrate << 4) % FIN) << 8; | |
177 | ratio = (ratio << 8) + tmp / FIN; | |
178 | tmp = (tmp % FIN) << 8; | |
75b697f7 | 179 | ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN); |
1da177e4 LT |
180 | |
181 | BDR = ratio; | |
182 | BDRI = (((XIN << 5) / symbolrate) + 1) / 2; | |
183 | ||
184 | if (BDRI > 0xFF) | |
185 | BDRI = 0xFF; | |
186 | ||
187 | SFIL = (SFIL << 4) | tda10021_inittab[0x0E]; | |
188 | ||
189 | NDEC = (NDEC << 6) | tda10021_inittab[0x03]; | |
190 | ||
c10d14d6 AQ |
191 | _tda10021_writereg (state, 0x03, NDEC); |
192 | _tda10021_writereg (state, 0x0a, BDR&0xff); | |
193 | _tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff); | |
194 | _tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f); | |
1da177e4 | 195 | |
c10d14d6 AQ |
196 | _tda10021_writereg (state, 0x0d, BDRI); |
197 | _tda10021_writereg (state, 0x0e, SFIL); | |
1da177e4 LT |
198 | |
199 | return 0; | |
200 | } | |
201 | ||
202 | static int tda10021_init (struct dvb_frontend *fe) | |
203 | { | |
b8742700 | 204 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
205 | int i; |
206 | ||
207 | dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num); | |
208 | ||
c10d14d6 | 209 | //_tda10021_writereg (fe, 0, 0); |
1da177e4 LT |
210 | |
211 | for (i=0; i<tda10021_inittab_size; i++) | |
c10d14d6 | 212 | _tda10021_writereg (state, i, tda10021_inittab[i]); |
1da177e4 | 213 | |
c10d14d6 | 214 | _tda10021_writereg (state, 0x34, state->pwm); |
1da177e4 LT |
215 | |
216 | //Comment by markus | |
217 | //0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0) | |
218 | //0x2A[4] == BYPPLL -> Power down mode (default 1) | |
219 | //0x2A[5] == LCK -> PLL Lock Flag | |
220 | //0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0) | |
221 | ||
222 | //Activate PLL | |
c10d14d6 | 223 | _tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef); |
1da177e4 LT |
224 | return 0; |
225 | } | |
226 | ||
27d9a5e9 MCC |
227 | struct qam_params { |
228 | u8 conf, agcref, lthr, mseth, aref; | |
229 | }; | |
230 | ||
7826bcd5 | 231 | static int tda10021_set_parameters(struct dvb_frontend *fe) |
1da177e4 | 232 | { |
1a5cd296 MCC |
233 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; |
234 | u32 delsys = c->delivery_system; | |
235 | unsigned qam = c->modulation; | |
236 | bool is_annex_c; | |
237 | u32 reg0x3d; | |
b8742700 | 238 | struct tda10021_state* state = fe->demodulator_priv; |
27d9a5e9 MCC |
239 | static const struct qam_params qam_params[] = { |
240 | /* Modulation Conf AGCref LTHR MSETH AREF */ | |
241 | [QPSK] = { 0x14, 0x78, 0x78, 0x8c, 0x96 }, | |
242 | [QAM_16] = { 0x00, 0x8c, 0x87, 0xa2, 0x91 }, | |
243 | [QAM_32] = { 0x04, 0x8c, 0x64, 0x74, 0x96 }, | |
244 | [QAM_64] = { 0x08, 0x6a, 0x46, 0x43, 0x6a }, | |
245 | [QAM_128] = { 0x0c, 0x78, 0x36, 0x34, 0x7e }, | |
246 | [QAM_256] = { 0x10, 0x5c, 0x26, 0x23, 0x6b }, | |
247 | }; | |
1a5cd296 MCC |
248 | |
249 | switch (delsys) { | |
250 | case SYS_DVBC_ANNEX_A: | |
251 | is_annex_c = false; | |
252 | break; | |
253 | case SYS_DVBC_ANNEX_C: | |
254 | is_annex_c = true; | |
255 | break; | |
256 | default: | |
257 | return -EINVAL; | |
258 | } | |
1da177e4 | 259 | |
27d9a5e9 | 260 | /* |
5a13e40b | 261 | * gcc optimizes the code below the same way as it would code: |
27d9a5e9 MCC |
262 | * "if (qam > 5) return -EINVAL;" |
263 | * Yet, the code is clearer, as it shows what QAM standards are | |
264 | * supported by the driver, and avoids the usage of magic numbers on | |
265 | * it. | |
266 | */ | |
267 | switch (qam) { | |
268 | case QPSK: | |
269 | case QAM_16: | |
270 | case QAM_32: | |
271 | case QAM_64: | |
272 | case QAM_128: | |
273 | case QAM_256: | |
274 | break; | |
275 | default: | |
1da177e4 | 276 | return -EINVAL; |
27d9a5e9 | 277 | } |
1da177e4 | 278 | |
1a5cd296 | 279 | if (c->inversion != INVERSION_ON && c->inversion != INVERSION_OFF) |
dc120b07 HB |
280 | return -EINVAL; |
281 | ||
7826bcd5 | 282 | /*printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->symbol_rate);*/ |
1da177e4 | 283 | |
dea74869 | 284 | if (fe->ops.tuner_ops.set_params) { |
14d24d14 | 285 | fe->ops.tuner_ops.set_params(fe); |
dea74869 | 286 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); |
f1e80919 | 287 | } |
1da177e4 | 288 | |
1a5cd296 | 289 | tda10021_set_symbolrate(state, c->symbol_rate); |
27d9a5e9 | 290 | _tda10021_writereg(state, 0x34, state->pwm); |
1da177e4 | 291 | |
27d9a5e9 MCC |
292 | _tda10021_writereg(state, 0x01, qam_params[qam].agcref); |
293 | _tda10021_writereg(state, 0x05, qam_params[qam].lthr); | |
294 | _tda10021_writereg(state, 0x08, qam_params[qam].mseth); | |
295 | _tda10021_writereg(state, 0x09, qam_params[qam].aref); | |
1a5cd296 MCC |
296 | |
297 | /* | |
298 | * Bit 0 == 0 means roll-off = 0.15 (Annex A) | |
299 | * == 1 means roll-off = 0.13 (Annex C) | |
300 | */ | |
301 | reg0x3d = tda10021_readreg (state, 0x3d); | |
302 | if (is_annex_c) | |
303 | _tda10021_writereg (state, 0x3d, 0x01 | reg0x3d); | |
304 | else | |
305 | _tda10021_writereg (state, 0x3d, 0xfe & reg0x3d); | |
306 | tda10021_setup_reg0(state, qam_params[qam].conf, c->inversion); | |
1da177e4 LT |
307 | |
308 | return 0; | |
309 | } | |
310 | ||
0df289a2 MCC |
311 | static int tda10021_read_status(struct dvb_frontend *fe, |
312 | enum fe_status *status) | |
1da177e4 | 313 | { |
b8742700 | 314 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
315 | int sync; |
316 | ||
317 | *status = 0; | |
318 | //0x11[0] == EQALGO -> Equalizer algorithms state | |
319 | //0x11[1] == CARLOCK -> Carrier locked | |
320 | //0x11[2] == FSYNC -> Frame synchronisation | |
321 | //0x11[3] == FEL -> Front End locked | |
322 | //0x11[6] == NODVB -> DVB Mode Information | |
323 | sync = tda10021_readreg (state, 0x11); | |
324 | ||
325 | if (sync & 2) | |
326 | *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER; | |
327 | ||
328 | if (sync & 4) | |
329 | *status |= FE_HAS_SYNC|FE_HAS_VITERBI; | |
330 | ||
331 | if (sync & 8) | |
332 | *status |= FE_HAS_LOCK; | |
333 | ||
334 | return 0; | |
335 | } | |
336 | ||
337 | static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber) | |
338 | { | |
b8742700 | 339 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
340 | |
341 | u32 _ber = tda10021_readreg(state, 0x14) | | |
342 | (tda10021_readreg(state, 0x15) << 8) | | |
343 | ((tda10021_readreg(state, 0x16) & 0x0f) << 16); | |
3de0e18b HB |
344 | _tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0) |
345 | | (tda10021_inittab[0x10] & 0xc0)); | |
1da177e4 LT |
346 | *ber = 10 * _ber; |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
351 | static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength) | |
352 | { | |
b8742700 | 353 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 | 354 | |
7cccccc3 | 355 | u8 config = tda10021_readreg(state, 0x02); |
1da177e4 | 356 | u8 gain = tda10021_readreg(state, 0x17); |
7cccccc3 HB |
357 | if (config & 0x02) |
358 | /* the agc value is inverted */ | |
359 | gain = ~gain; | |
1da177e4 LT |
360 | *strength = (gain << 8) | gain; |
361 | ||
362 | return 0; | |
363 | } | |
364 | ||
365 | static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr) | |
366 | { | |
b8742700 | 367 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
368 | |
369 | u8 quality = ~tda10021_readreg(state, 0x18); | |
370 | *snr = (quality << 8) | quality; | |
371 | ||
372 | return 0; | |
373 | } | |
374 | ||
375 | static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
376 | { | |
b8742700 | 377 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
378 | |
379 | *ucblocks = tda10021_readreg (state, 0x13) & 0x7f; | |
380 | if (*ucblocks == 0x7f) | |
381 | *ucblocks = 0xffffffff; | |
382 | ||
383 | /* reset uncorrected block counter */ | |
c10d14d6 AQ |
384 | _tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf); |
385 | _tda10021_writereg (state, 0x10, tda10021_inittab[0x10]); | |
1da177e4 LT |
386 | |
387 | return 0; | |
388 | } | |
389 | ||
7e3e68bc MCC |
390 | static int tda10021_get_frontend(struct dvb_frontend *fe, |
391 | struct dtv_frontend_properties *p) | |
1da177e4 | 392 | { |
b8742700 | 393 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
394 | int sync; |
395 | s8 afc = 0; | |
396 | ||
397 | sync = tda10021_readreg(state, 0x11); | |
398 | afc = tda10021_readreg(state, 0x19); | |
399 | if (verbose) { | |
400 | /* AFC only valid when carrier has been recovered */ | |
401 | printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" : | |
402 | "DVB: TDA10021(%d): [AFC (%d) %dHz]\n", | |
403 | state->frontend.dvb->num, afc, | |
7826bcd5 | 404 | -((s32)p->symbol_rate * afc) >> 10); |
1da177e4 LT |
405 | } |
406 | ||
dc120b07 | 407 | p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF; |
7826bcd5 | 408 | p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; |
1da177e4 | 409 | |
7826bcd5 | 410 | p->fec_inner = FEC_NONE; |
1da177e4 LT |
411 | p->frequency = ((p->frequency + 31250) / 62500) * 62500; |
412 | ||
413 | if (sync & 2) | |
7826bcd5 | 414 | p->frequency -= ((s32)p->symbol_rate * afc) >> 10; |
1da177e4 LT |
415 | |
416 | return 0; | |
417 | } | |
418 | ||
f1e80919 AQ |
419 | static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) |
420 | { | |
421 | struct tda10021_state* state = fe->demodulator_priv; | |
422 | ||
423 | if (enable) { | |
424 | lock_tuner(state); | |
425 | } else { | |
426 | unlock_tuner(state); | |
427 | } | |
428 | return 0; | |
429 | } | |
430 | ||
1da177e4 LT |
431 | static int tda10021_sleep(struct dvb_frontend* fe) |
432 | { | |
b8742700 | 433 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 | 434 | |
c10d14d6 AQ |
435 | _tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */ |
436 | _tda10021_writereg (state, 0x00, 0x80); /* standby */ | |
1da177e4 LT |
437 | |
438 | return 0; | |
439 | } | |
440 | ||
441 | static void tda10021_release(struct dvb_frontend* fe) | |
442 | { | |
b8742700 | 443 | struct tda10021_state* state = fe->demodulator_priv; |
1da177e4 LT |
444 | kfree(state); |
445 | } | |
446 | ||
447 | static struct dvb_frontend_ops tda10021_ops; | |
448 | ||
aa323ac8 | 449 | struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config, |
1da177e4 LT |
450 | struct i2c_adapter* i2c, |
451 | u8 pwm) | |
452 | { | |
453 | struct tda10021_state* state = NULL; | |
dc120b07 | 454 | u8 id; |
1da177e4 LT |
455 | |
456 | /* allocate memory for the internal state */ | |
084e24ac | 457 | state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL); |
1da177e4 LT |
458 | if (state == NULL) goto error; |
459 | ||
460 | /* setup the state */ | |
461 | state->config = config; | |
462 | state->i2c = i2c; | |
1da177e4 LT |
463 | state->pwm = pwm; |
464 | state->reg0 = tda10021_inittab[0]; | |
465 | ||
466 | /* check if the demod is there */ | |
dc120b07 HB |
467 | id = tda10021_readreg(state, 0x1a); |
468 | if ((id & 0xf0) != 0x70) goto error; | |
469 | ||
4af699c1 NE |
470 | /* Don't claim TDA10023 */ |
471 | if (id == 0x7d) | |
472 | goto error; | |
473 | ||
dc120b07 HB |
474 | printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n", |
475 | state->config->demod_address, id); | |
1da177e4 LT |
476 | |
477 | /* create dvb_frontend */ | |
dea74869 | 478 | memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops)); |
1da177e4 LT |
479 | state->frontend.demodulator_priv = state; |
480 | return &state->frontend; | |
481 | ||
482 | error: | |
483 | kfree(state); | |
484 | return NULL; | |
485 | } | |
486 | ||
487 | static struct dvb_frontend_ops tda10021_ops = { | |
7826bcd5 | 488 | .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C }, |
1da177e4 LT |
489 | .info = { |
490 | .name = "Philips TDA10021 DVB-C", | |
1da177e4 | 491 | .frequency_stepsize = 62500, |
a18255be HB |
492 | .frequency_min = 47000000, |
493 | .frequency_max = 862000000, | |
1da177e4 LT |
494 | .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */ |
495 | .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */ | |
acf28212 | 496 | #if 0 |
1da177e4 LT |
497 | .frequency_tolerance = ???, |
498 | .symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */ | |
499 | #endif | |
500 | .caps = 0x400 | //FE_CAN_QAM_4 | |
501 | FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | | |
502 | FE_CAN_QAM_128 | FE_CAN_QAM_256 | | |
503 | FE_CAN_FEC_AUTO | |
504 | }, | |
505 | ||
506 | .release = tda10021_release, | |
507 | ||
508 | .init = tda10021_init, | |
509 | .sleep = tda10021_sleep, | |
f1e80919 | 510 | .i2c_gate_ctrl = tda10021_i2c_gate_ctrl, |
1da177e4 | 511 | |
7826bcd5 MCC |
512 | .set_frontend = tda10021_set_parameters, |
513 | .get_frontend = tda10021_get_frontend, | |
1da177e4 LT |
514 | |
515 | .read_status = tda10021_read_status, | |
516 | .read_ber = tda10021_read_ber, | |
517 | .read_signal_strength = tda10021_read_signal_strength, | |
518 | .read_snr = tda10021_read_snr, | |
519 | .read_ucblocks = tda10021_read_ucblocks, | |
520 | }; | |
521 | ||
522 | module_param(verbose, int, 0644); | |
523 | MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting"); | |
524 | ||
525 | MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver"); | |
526 | MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz"); | |
527 | MODULE_LICENSE("GPL"); | |
528 | ||
529 | EXPORT_SYMBOL(tda10021_attach); |