[media] adv7180: Do not request the IRQ again during resume
[deliverable/linux.git] / drivers / media / i2c / adv7180.c
CommitLineData
6789cb52
RR
1/*
2 * adv7180.c Analog Devices ADV7180 video decoder driver
3 * Copyright (c) 2009 Intel Corporation
cccb83f7
VB
4 * Copyright (C) 2013 Cogent Embedded, Inc.
5 * Copyright (C) 2013 Renesas Solutions Corp.
6789cb52
RR
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/interrupt.h>
26#include <linux/i2c.h>
5a0e3ad6 27#include <linux/slab.h>
6789cb52
RR
28#include <media/v4l2-ioctl.h>
29#include <linux/videodev2.h>
30#include <media/v4l2-device.h>
c9fbeddd 31#include <media/v4l2-ctrls.h>
42752f7a 32#include <linux/mutex.h>
6789cb52 33
d3124294
RR
34#define ADV7180_INPUT_CONTROL_REG 0x00
35#define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM 0x00
36#define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM_PED 0x10
37#define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_J_SECAM 0x20
38#define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_M_SECAM 0x30
39#define ADV7180_INPUT_CONTROL_NTSC_J 0x40
40#define ADV7180_INPUT_CONTROL_NTSC_M 0x50
41#define ADV7180_INPUT_CONTROL_PAL60 0x60
42#define ADV7180_INPUT_CONTROL_NTSC_443 0x70
43#define ADV7180_INPUT_CONTROL_PAL_BG 0x80
44#define ADV7180_INPUT_CONTROL_PAL_N 0x90
45#define ADV7180_INPUT_CONTROL_PAL_M 0xa0
46#define ADV7180_INPUT_CONTROL_PAL_M_PED 0xb0
47#define ADV7180_INPUT_CONTROL_PAL_COMB_N 0xc0
48#define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED 0xd0
49#define ADV7180_INPUT_CONTROL_PAL_SECAM 0xe0
50#define ADV7180_INPUT_CONTROL_PAL_SECAM_PED 0xf0
bca7ad1a 51#define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
d3124294 52
42752f7a
RR
53#define ADV7180_EXTENDED_OUTPUT_CONTROL_REG 0x04
54#define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
6789cb52 55
42752f7a
RR
56#define ADV7180_AUTODETECT_ENABLE_REG 0x07
57#define ADV7180_AUTODETECT_DEFAULT 0x7f
c9fbeddd 58/* Contrast */
bca7ad1a 59#define ADV7180_CON_REG 0x08 /*Unsigned */
c9fbeddd
FV
60#define ADV7180_CON_MIN 0
61#define ADV7180_CON_DEF 128
62#define ADV7180_CON_MAX 255
63/* Brightness*/
bca7ad1a 64#define ADV7180_BRI_REG 0x0a /*Signed */
c9fbeddd
FV
65#define ADV7180_BRI_MIN -128
66#define ADV7180_BRI_DEF 0
67#define ADV7180_BRI_MAX 127
68/* Hue */
bca7ad1a 69#define ADV7180_HUE_REG 0x0b /*Signed, inverted */
c9fbeddd
FV
70#define ADV7180_HUE_MIN -127
71#define ADV7180_HUE_DEF 0
72#define ADV7180_HUE_MAX 128
bca7ad1a 73
42752f7a
RR
74#define ADV7180_ADI_CTRL_REG 0x0e
75#define ADV7180_ADI_CTRL_IRQ_SPACE 0x20
6789cb52 76
bca7ad1a
FV
77#define ADV7180_PWR_MAN_REG 0x0f
78#define ADV7180_PWR_MAN_ON 0x04
79#define ADV7180_PWR_MAN_OFF 0x24
80#define ADV7180_PWR_MAN_RES 0x80
81
d3124294
RR
82#define ADV7180_STATUS1_REG 0x10
83#define ADV7180_STATUS1_IN_LOCK 0x01
84#define ADV7180_STATUS1_AUTOD_MASK 0x70
6789cb52
RR
85#define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
86#define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
87#define ADV7180_STATUS1_AUTOD_PAL_M 0x20
88#define ADV7180_STATUS1_AUTOD_PAL_60 0x30
89#define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
90#define ADV7180_STATUS1_AUTOD_SECAM 0x50
91#define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
92#define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
93
94#define ADV7180_IDENT_REG 0x11
95#define ADV7180_ID_7180 0x18
96
42752f7a
RR
97#define ADV7180_ICONF1_ADI 0x40
98#define ADV7180_ICONF1_ACTIVE_LOW 0x01
99#define ADV7180_ICONF1_PSYNC_ONLY 0x10
100#define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
c9fbeddd 101/* Saturation */
bca7ad1a
FV
102#define ADV7180_SD_SAT_CB_REG 0xe3 /*Unsigned */
103#define ADV7180_SD_SAT_CR_REG 0xe4 /*Unsigned */
c9fbeddd
FV
104#define ADV7180_SAT_MIN 0
105#define ADV7180_SAT_DEF 128
106#define ADV7180_SAT_MAX 255
bca7ad1a 107
42752f7a
RR
108#define ADV7180_IRQ1_LOCK 0x01
109#define ADV7180_IRQ1_UNLOCK 0x02
110#define ADV7180_ISR1_ADI 0x42
111#define ADV7180_ICR1_ADI 0x43
112#define ADV7180_IMR1_ADI 0x44
113#define ADV7180_IMR2_ADI 0x48
114#define ADV7180_IRQ3_AD_CHANGE 0x08
115#define ADV7180_ISR3_ADI 0x4A
116#define ADV7180_ICR3_ADI 0x4B
117#define ADV7180_IMR3_ADI 0x4C
118#define ADV7180_IMR4_ADI 0x50
6789cb52 119
bca7ad1a
FV
120#define ADV7180_NTSC_V_BIT_END_REG 0xE6
121#define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
122
6789cb52 123struct adv7180_state {
c9fbeddd 124 struct v4l2_ctrl_handler ctrl_hdl;
c277b60a 125 struct v4l2_subdev sd;
42752f7a
RR
126 struct mutex mutex; /* mutual excl. when accessing chip */
127 int irq;
c277b60a
RR
128 v4l2_std_id curr_norm;
129 bool autodetect;
e246c333 130 bool powered;
bca7ad1a 131 u8 input;
6789cb52 132};
c9fbeddd
FV
133#define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
134 struct adv7180_state, \
135 ctrl_hdl)->sd)
6789cb52 136
d3124294 137static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
6789cb52 138{
b294a192
VB
139 /* in case V4L2_IN_ST_NO_SIGNAL */
140 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
141 return V4L2_STD_UNKNOWN;
142
6789cb52
RR
143 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
144 case ADV7180_STATUS1_AUTOD_NTSM_M_J:
d3124294 145 return V4L2_STD_NTSC;
6789cb52
RR
146 case ADV7180_STATUS1_AUTOD_NTSC_4_43:
147 return V4L2_STD_NTSC_443;
148 case ADV7180_STATUS1_AUTOD_PAL_M:
149 return V4L2_STD_PAL_M;
150 case ADV7180_STATUS1_AUTOD_PAL_60:
151 return V4L2_STD_PAL_60;
152 case ADV7180_STATUS1_AUTOD_PAL_B_G:
153 return V4L2_STD_PAL;
154 case ADV7180_STATUS1_AUTOD_SECAM:
155 return V4L2_STD_SECAM;
156 case ADV7180_STATUS1_AUTOD_PAL_COMB:
157 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
158 case ADV7180_STATUS1_AUTOD_SECAM_525:
159 return V4L2_STD_SECAM;
160 default:
161 return V4L2_STD_UNKNOWN;
162 }
163}
164
c277b60a
RR
165static int v4l2_std_to_adv7180(v4l2_std_id std)
166{
167 if (std == V4L2_STD_PAL_60)
168 return ADV7180_INPUT_CONTROL_PAL60;
169 if (std == V4L2_STD_NTSC_443)
170 return ADV7180_INPUT_CONTROL_NTSC_443;
171 if (std == V4L2_STD_PAL_N)
172 return ADV7180_INPUT_CONTROL_PAL_N;
173 if (std == V4L2_STD_PAL_M)
174 return ADV7180_INPUT_CONTROL_PAL_M;
175 if (std == V4L2_STD_PAL_Nc)
176 return ADV7180_INPUT_CONTROL_PAL_COMB_N;
177
178 if (std & V4L2_STD_PAL)
179 return ADV7180_INPUT_CONTROL_PAL_BG;
180 if (std & V4L2_STD_NTSC)
181 return ADV7180_INPUT_CONTROL_NTSC_M;
182 if (std & V4L2_STD_SECAM)
183 return ADV7180_INPUT_CONTROL_PAL_SECAM;
184
185 return -EINVAL;
186}
187
d3124294
RR
188static u32 adv7180_status_to_v4l2(u8 status1)
189{
190 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
191 return V4L2_IN_ST_NO_SIGNAL;
192
193 return 0;
194}
195
196static int __adv7180_status(struct i2c_client *client, u32 *status,
bca7ad1a 197 v4l2_std_id *std)
d3124294
RR
198{
199 int status1 = i2c_smbus_read_byte_data(client, ADV7180_STATUS1_REG);
200
201 if (status1 < 0)
202 return status1;
203
204 if (status)
205 *status = adv7180_status_to_v4l2(status1);
206 if (std)
207 *std = adv7180_std_to_v4l2(status1);
208
209 return 0;
210}
211
6789cb52
RR
212static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
213{
214 return container_of(sd, struct adv7180_state, sd);
215}
216
217static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
218{
c277b60a 219 struct adv7180_state *state = to_state(sd);
42752f7a
RR
220 int err = mutex_lock_interruptible(&state->mutex);
221 if (err)
222 return err;
c277b60a 223
42752f7a
RR
224 /* when we are interrupt driven we know the state */
225 if (!state->autodetect || state->irq > 0)
c277b60a
RR
226 *std = state->curr_norm;
227 else
228 err = __adv7180_status(v4l2_get_subdevdata(sd), NULL, std);
229
42752f7a 230 mutex_unlock(&state->mutex);
c277b60a 231 return err;
d3124294 232}
6789cb52 233
bca7ad1a
FV
234static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
235 u32 output, u32 config)
236{
237 struct adv7180_state *state = to_state(sd);
238 int ret = mutex_lock_interruptible(&state->mutex);
239 struct i2c_client *client = v4l2_get_subdevdata(sd);
240
241 if (ret)
242 return ret;
243
c9fbeddd 244 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
bca7ad1a
FV
245 * all inputs and let the card driver take care of validation
246 */
247 if ((input & ADV7180_INPUT_CONTROL_INSEL_MASK) != input)
248 goto out;
249
250 ret = i2c_smbus_read_byte_data(client, ADV7180_INPUT_CONTROL_REG);
251
252 if (ret < 0)
253 goto out;
254
255 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
256 ret = i2c_smbus_write_byte_data(client,
257 ADV7180_INPUT_CONTROL_REG, ret | input);
258 state->input = input;
259out:
260 mutex_unlock(&state->mutex);
261 return ret;
262}
263
d3124294
RR
264static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
265{
42752f7a
RR
266 struct adv7180_state *state = to_state(sd);
267 int ret = mutex_lock_interruptible(&state->mutex);
268 if (ret)
269 return ret;
270
271 ret = __adv7180_status(v4l2_get_subdevdata(sd), status, NULL);
272 mutex_unlock(&state->mutex);
273 return ret;
6789cb52
RR
274}
275
c277b60a
RR
276static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
277{
278 struct adv7180_state *state = to_state(sd);
279 struct i2c_client *client = v4l2_get_subdevdata(sd);
42752f7a
RR
280 int ret = mutex_lock_interruptible(&state->mutex);
281 if (ret)
282 return ret;
c277b60a
RR
283
284 /* all standards -> autodetect */
285 if (std == V4L2_STD_ALL) {
bca7ad1a
FV
286 ret =
287 i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
288 ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
289 | state->input);
c277b60a
RR
290 if (ret < 0)
291 goto out;
292
42752f7a 293 __adv7180_status(client, NULL, &state->curr_norm);
c277b60a
RR
294 state->autodetect = true;
295 } else {
296 ret = v4l2_std_to_adv7180(std);
297 if (ret < 0)
298 goto out;
299
300 ret = i2c_smbus_write_byte_data(client,
bca7ad1a
FV
301 ADV7180_INPUT_CONTROL_REG,
302 ret | state->input);
c277b60a
RR
303 if (ret < 0)
304 goto out;
305
306 state->curr_norm = std;
307 state->autodetect = false;
308 }
309 ret = 0;
310out:
42752f7a 311 mutex_unlock(&state->mutex);
c277b60a
RR
312 return ret;
313}
314
e246c333
LPC
315static int adv7180_set_power(struct adv7180_state *state,
316 struct i2c_client *client, bool on)
317{
318 u8 val;
319
320 if (on)
321 val = ADV7180_PWR_MAN_ON;
322 else
323 val = ADV7180_PWR_MAN_OFF;
324
325 return i2c_smbus_write_byte_data(client, ADV7180_PWR_MAN_REG, val);
326}
327
328static int adv7180_s_power(struct v4l2_subdev *sd, int on)
329{
330 struct adv7180_state *state = to_state(sd);
331 struct i2c_client *client = v4l2_get_subdevdata(sd);
332 int ret;
333
334 ret = mutex_lock_interruptible(&state->mutex);
335 if (ret)
336 return ret;
337
338 ret = adv7180_set_power(state, client, on);
339 if (ret == 0)
340 state->powered = on;
341
342 mutex_unlock(&state->mutex);
343 return ret;
344}
345
c9fbeddd 346static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
bca7ad1a 347{
c9fbeddd 348 struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
bca7ad1a
FV
349 struct adv7180_state *state = to_state(sd);
350 struct i2c_client *client = v4l2_get_subdevdata(sd);
351 int ret = mutex_lock_interruptible(&state->mutex);
c9fbeddd
FV
352 int val;
353
bca7ad1a
FV
354 if (ret)
355 return ret;
c9fbeddd 356 val = ctrl->val;
bca7ad1a
FV
357 switch (ctrl->id) {
358 case V4L2_CID_BRIGHTNESS:
c9fbeddd 359 ret = i2c_smbus_write_byte_data(client, ADV7180_BRI_REG, val);
bca7ad1a
FV
360 break;
361 case V4L2_CID_HUE:
bca7ad1a 362 /*Hue is inverted according to HSL chart */
c9fbeddd 363 ret = i2c_smbus_write_byte_data(client, ADV7180_HUE_REG, -val);
bca7ad1a
FV
364 break;
365 case V4L2_CID_CONTRAST:
c9fbeddd 366 ret = i2c_smbus_write_byte_data(client, ADV7180_CON_REG, val);
bca7ad1a
FV
367 break;
368 case V4L2_CID_SATURATION:
bca7ad1a
FV
369 /*
370 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
371 *Let's not confuse the user, everybody understands saturation
372 */
c9fbeddd
FV
373 ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CB_REG,
374 val);
bca7ad1a
FV
375 if (ret < 0)
376 break;
c9fbeddd
FV
377 ret = i2c_smbus_write_byte_data(client, ADV7180_SD_SAT_CR_REG,
378 val);
bca7ad1a
FV
379 break;
380 default:
381 ret = -EINVAL;
382 }
383
384 mutex_unlock(&state->mutex);
385 return ret;
386}
387
c9fbeddd
FV
388static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
389 .s_ctrl = adv7180_s_ctrl,
390};
391
392static int adv7180_init_controls(struct adv7180_state *state)
393{
394 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
395
396 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
397 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
398 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
399 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
400 V4L2_CID_CONTRAST, ADV7180_CON_MIN,
401 ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
402 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
403 V4L2_CID_SATURATION, ADV7180_SAT_MIN,
404 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
405 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
406 V4L2_CID_HUE, ADV7180_HUE_MIN,
407 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
408 state->sd.ctrl_handler = &state->ctrl_hdl;
409 if (state->ctrl_hdl.error) {
410 int err = state->ctrl_hdl.error;
411
412 v4l2_ctrl_handler_free(&state->ctrl_hdl);
413 return err;
414 }
415 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
416
417 return 0;
418}
419static void adv7180_exit_controls(struct adv7180_state *state)
420{
421 v4l2_ctrl_handler_free(&state->ctrl_hdl);
422}
423
cccb83f7 424static int adv7180_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
f5fe58fd 425 u32 *code)
cccb83f7
VB
426{
427 if (index > 0)
428 return -EINVAL;
429
f5fe58fd 430 *code = MEDIA_BUS_FMT_YUYV8_2X8;
cccb83f7
VB
431
432 return 0;
433}
434
435static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
436 struct v4l2_mbus_framefmt *fmt)
437{
438 struct adv7180_state *state = to_state(sd);
439
f5fe58fd 440 fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
cccb83f7
VB
441 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
442 fmt->field = V4L2_FIELD_INTERLACED;
443 fmt->width = 720;
444 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
445
446 return 0;
447}
448
449static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
450 struct v4l2_mbus_config *cfg)
451{
452 /*
453 * The ADV7180 sensor supports BT.601/656 output modes.
454 * The BT.656 is default and not yet configurable by s/w.
455 */
456 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
457 V4L2_MBUS_DATA_ACTIVE_HIGH;
458 cfg->type = V4L2_MBUS_BT656;
459
460 return 0;
461}
462
6789cb52 463static const struct v4l2_subdev_video_ops adv7180_video_ops = {
8774bed9 464 .s_std = adv7180_s_std,
6789cb52 465 .querystd = adv7180_querystd,
d3124294 466 .g_input_status = adv7180_g_input_status,
bca7ad1a 467 .s_routing = adv7180_s_routing,
cccb83f7
VB
468 .enum_mbus_fmt = adv7180_enum_mbus_fmt,
469 .try_mbus_fmt = adv7180_mbus_fmt,
470 .g_mbus_fmt = adv7180_mbus_fmt,
471 .s_mbus_fmt = adv7180_mbus_fmt,
472 .g_mbus_config = adv7180_g_mbus_config,
6789cb52
RR
473};
474
475static const struct v4l2_subdev_core_ops adv7180_core_ops = {
e246c333 476 .s_power = adv7180_s_power,
6789cb52
RR
477};
478
479static const struct v4l2_subdev_ops adv7180_ops = {
480 .core = &adv7180_core_ops,
481 .video = &adv7180_video_ops,
482};
483
0c25534d 484static irqreturn_t adv7180_irq(int irq, void *devid)
42752f7a 485{
0c25534d 486 struct adv7180_state *state = devid;
42752f7a
RR
487 struct i2c_client *client = v4l2_get_subdevdata(&state->sd);
488 u8 isr3;
489
490 mutex_lock(&state->mutex);
491 i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
bca7ad1a 492 ADV7180_ADI_CTRL_IRQ_SPACE);
42752f7a
RR
493 isr3 = i2c_smbus_read_byte_data(client, ADV7180_ISR3_ADI);
494 /* clear */
495 i2c_smbus_write_byte_data(client, ADV7180_ICR3_ADI, isr3);
496 i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG, 0);
497
498 if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
499 __adv7180_status(client, NULL, &state->curr_norm);
500 mutex_unlock(&state->mutex);
501
42752f7a
RR
502 return IRQ_HANDLED;
503}
504
bca7ad1a 505static int init_device(struct i2c_client *client, struct adv7180_state *state)
6789cb52 506{
6789cb52
RR
507 int ret;
508
6789cb52 509 /* Initialize adv7180 */
42752f7a 510 /* Enable autodetection */
bca7ad1a
FV
511 if (state->autodetect) {
512 ret =
513 i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
514 ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
515 | state->input);
516 if (ret < 0)
517 return ret;
42752f7a 518
bca7ad1a
FV
519 ret =
520 i2c_smbus_write_byte_data(client,
521 ADV7180_AUTODETECT_ENABLE_REG,
522 ADV7180_AUTODETECT_DEFAULT);
523 if (ret < 0)
524 return ret;
525 } else {
526 ret = v4l2_std_to_adv7180(state->curr_norm);
527 if (ret < 0)
528 return ret;
42752f7a 529
bca7ad1a
FV
530 ret =
531 i2c_smbus_write_byte_data(client, ADV7180_INPUT_CONTROL_REG,
532 ret | state->input);
533 if (ret < 0)
534 return ret;
535
536 }
42752f7a
RR
537 /* ITU-R BT.656-4 compatible */
538 ret = i2c_smbus_write_byte_data(client,
bca7ad1a
FV
539 ADV7180_EXTENDED_OUTPUT_CONTROL_REG,
540 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
42752f7a 541 if (ret < 0)
bca7ad1a
FV
542 return ret;
543
544 /* Manually set V bit end position in NTSC mode */
545 ret = i2c_smbus_write_byte_data(client,
546 ADV7180_NTSC_V_BIT_END_REG,
547 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
548 if (ret < 0)
549 return ret;
42752f7a
RR
550
551 /* read current norm */
552 __adv7180_status(client, NULL, &state->curr_norm);
553
554 /* register for interrupts */
555 if (state->irq > 0) {
42752f7a 556 ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
bca7ad1a 557 ADV7180_ADI_CTRL_IRQ_SPACE);
42752f7a 558 if (ret < 0)
df065b37 559 goto err;
42752f7a
RR
560
561 /* config the Interrupt pin to be active low */
562 ret = i2c_smbus_write_byte_data(client, ADV7180_ICONF1_ADI,
bca7ad1a
FV
563 ADV7180_ICONF1_ACTIVE_LOW |
564 ADV7180_ICONF1_PSYNC_ONLY);
42752f7a 565 if (ret < 0)
df065b37 566 goto err;
42752f7a
RR
567
568 ret = i2c_smbus_write_byte_data(client, ADV7180_IMR1_ADI, 0);
569 if (ret < 0)
df065b37 570 goto err;
42752f7a
RR
571
572 ret = i2c_smbus_write_byte_data(client, ADV7180_IMR2_ADI, 0);
573 if (ret < 0)
df065b37 574 goto err;
42752f7a
RR
575
576 /* enable AD change interrupts interrupts */
577 ret = i2c_smbus_write_byte_data(client, ADV7180_IMR3_ADI,
bca7ad1a 578 ADV7180_IRQ3_AD_CHANGE);
42752f7a 579 if (ret < 0)
df065b37 580 goto err;
42752f7a
RR
581
582 ret = i2c_smbus_write_byte_data(client, ADV7180_IMR4_ADI, 0);
583 if (ret < 0)
df065b37 584 goto err;
42752f7a
RR
585
586 ret = i2c_smbus_write_byte_data(client, ADV7180_ADI_CTRL_REG,
bca7ad1a 587 0);
42752f7a 588 if (ret < 0)
df065b37 589 goto err;
6789cb52
RR
590 }
591
bca7ad1a 592 return 0;
df065b37
AK
593
594err:
df065b37 595 return ret;
bca7ad1a
FV
596}
597
4c62e976
GKH
598static int adv7180_probe(struct i2c_client *client,
599 const struct i2c_device_id *id)
bca7ad1a
FV
600{
601 struct adv7180_state *state;
602 struct v4l2_subdev *sd;
603 int ret;
604
605 /* Check if the adapter supports the needed features */
606 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
607 return -EIO;
608
609 v4l_info(client, "chip found @ 0x%02x (%s)\n",
610 client->addr, client->adapter->name);
611
c02b211d 612 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
7657e064
FE
613 if (state == NULL)
614 return -ENOMEM;
bca7ad1a
FV
615
616 state->irq = client->irq;
bca7ad1a
FV
617 mutex_init(&state->mutex);
618 state->autodetect = true;
e246c333 619 state->powered = true;
bca7ad1a
FV
620 state->input = 0;
621 sd = &state->sd;
622 v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
623
c9fbeddd
FV
624 ret = adv7180_init_controls(state);
625 if (ret)
bca7ad1a 626 goto err_unreg_subdev;
c9fbeddd
FV
627 ret = init_device(client, state);
628 if (ret)
629 goto err_free_ctrl;
fa5b7945 630
fa5721d1
LPC
631 if (state->irq) {
632 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
633 IRQF_ONESHOT, KBUILD_MODNAME, state);
634 if (ret)
635 goto err_free_ctrl;
636 }
637
fa5b7945
LPC
638 ret = v4l2_async_register_subdev(sd);
639 if (ret)
640 goto err_free_irq;
641
6789cb52 642 return 0;
42752f7a 643
fa5b7945
LPC
644err_free_irq:
645 if (state->irq > 0)
646 free_irq(client->irq, state);
c9fbeddd
FV
647err_free_ctrl:
648 adv7180_exit_controls(state);
42752f7a 649err_unreg_subdev:
297a0ae3 650 mutex_destroy(&state->mutex);
42752f7a 651 return ret;
6789cb52
RR
652}
653
4c62e976 654static int adv7180_remove(struct i2c_client *client)
6789cb52
RR
655{
656 struct v4l2_subdev *sd = i2c_get_clientdata(client);
42752f7a
RR
657 struct adv7180_state *state = to_state(sd);
658
fa5b7945
LPC
659 v4l2_async_unregister_subdev(sd);
660
0c25534d 661 if (state->irq > 0)
42752f7a 662 free_irq(client->irq, state);
6789cb52 663
b13f4af2 664 adv7180_exit_controls(state);
297a0ae3 665 mutex_destroy(&state->mutex);
6789cb52
RR
666 return 0;
667}
668
669static const struct i2c_device_id adv7180_id[] = {
c9fbeddd 670 {KBUILD_MODNAME, 0},
6789cb52
RR
671 {},
672};
673
cc1088dc
LPC
674#ifdef CONFIG_PM_SLEEP
675static int adv7180_suspend(struct device *dev)
bca7ad1a 676{
cc1088dc 677 struct i2c_client *client = to_i2c_client(dev);
e246c333
LPC
678 struct v4l2_subdev *sd = i2c_get_clientdata(client);
679 struct adv7180_state *state = to_state(sd);
bca7ad1a 680
e246c333 681 return adv7180_set_power(state, client, false);
bca7ad1a
FV
682}
683
cc1088dc 684static int adv7180_resume(struct device *dev)
bca7ad1a 685{
cc1088dc 686 struct i2c_client *client = to_i2c_client(dev);
bca7ad1a
FV
687 struct v4l2_subdev *sd = i2c_get_clientdata(client);
688 struct adv7180_state *state = to_state(sd);
689 int ret;
690
e246c333
LPC
691 if (state->powered) {
692 ret = adv7180_set_power(state, client, true);
693 if (ret)
694 return ret;
695 }
bca7ad1a
FV
696 ret = init_device(client, state);
697 if (ret < 0)
698 return ret;
699 return 0;
700}
cc1088dc
LPC
701
702static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
703#define ADV7180_PM_OPS (&adv7180_pm_ops)
704
705#else
706#define ADV7180_PM_OPS NULL
bca7ad1a
FV
707#endif
708
6789cb52
RR
709MODULE_DEVICE_TABLE(i2c, adv7180_id);
710
711static struct i2c_driver adv7180_driver = {
712 .driver = {
bca7ad1a 713 .owner = THIS_MODULE,
c9fbeddd 714 .name = KBUILD_MODNAME,
cc1088dc 715 .pm = ADV7180_PM_OPS,
bca7ad1a
FV
716 },
717 .probe = adv7180_probe,
4c62e976 718 .remove = adv7180_remove,
bca7ad1a 719 .id_table = adv7180_id,
6789cb52
RR
720};
721
c6e8d86f 722module_i2c_driver(adv7180_driver);
6789cb52
RR
723
724MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
725MODULE_AUTHOR("Mocean Laboratories");
726MODULE_LICENSE("GPL v2");
This page took 0.391509 seconds and 5 git commands to generate.