[media] adv7180: Consolidate video mode setting
[deliverable/linux.git] / drivers / media / i2c / adv7180.c
CommitLineData
6789cb52
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1/*
2 * adv7180.c Analog Devices ADV7180 video decoder driver
3 * Copyright (c) 2009 Intel Corporation
cccb83f7
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4 * Copyright (C) 2013 Cogent Embedded, Inc.
5 * Copyright (C) 2013 Renesas Solutions Corp.
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6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/interrupt.h>
26#include <linux/i2c.h>
5a0e3ad6 27#include <linux/slab.h>
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28#include <media/v4l2-ioctl.h>
29#include <linux/videodev2.h>
30#include <media/v4l2-device.h>
c9fbeddd 31#include <media/v4l2-ctrls.h>
42752f7a 32#include <linux/mutex.h>
c18818e9 33#include <linux/delay.h>
6789cb52 34
3999e5d0 35#define ADV7180_REG_INPUT_CONTROL 0x0000
d3124294
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36#define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM 0x00
37#define ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM_PED 0x10
38#define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_J_SECAM 0x20
39#define ADV7180_INPUT_CONTROL_AD_PAL_N_NTSC_M_SECAM 0x30
40#define ADV7180_INPUT_CONTROL_NTSC_J 0x40
41#define ADV7180_INPUT_CONTROL_NTSC_M 0x50
42#define ADV7180_INPUT_CONTROL_PAL60 0x60
43#define ADV7180_INPUT_CONTROL_NTSC_443 0x70
44#define ADV7180_INPUT_CONTROL_PAL_BG 0x80
45#define ADV7180_INPUT_CONTROL_PAL_N 0x90
46#define ADV7180_INPUT_CONTROL_PAL_M 0xa0
47#define ADV7180_INPUT_CONTROL_PAL_M_PED 0xb0
48#define ADV7180_INPUT_CONTROL_PAL_COMB_N 0xc0
49#define ADV7180_INPUT_CONTROL_PAL_COMB_N_PED 0xd0
50#define ADV7180_INPUT_CONTROL_PAL_SECAM 0xe0
51#define ADV7180_INPUT_CONTROL_PAL_SECAM_PED 0xf0
bca7ad1a 52#define ADV7180_INPUT_CONTROL_INSEL_MASK 0x0f
d3124294 53
3999e5d0 54#define ADV7180_REG_EXTENDED_OUTPUT_CONTROL 0x0004
42752f7a 55#define ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS 0xC5
6789cb52 56
029d6177 57#define ADV7180_REG_AUTODETECT_ENABLE 0x07
42752f7a 58#define ADV7180_AUTODETECT_DEFAULT 0x7f
c9fbeddd 59/* Contrast */
3999e5d0 60#define ADV7180_REG_CON 0x0008 /*Unsigned */
c9fbeddd
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61#define ADV7180_CON_MIN 0
62#define ADV7180_CON_DEF 128
63#define ADV7180_CON_MAX 255
64/* Brightness*/
3999e5d0 65#define ADV7180_REG_BRI 0x000a /*Signed */
c9fbeddd
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66#define ADV7180_BRI_MIN -128
67#define ADV7180_BRI_DEF 0
68#define ADV7180_BRI_MAX 127
69/* Hue */
3999e5d0 70#define ADV7180_REG_HUE 0x000b /*Signed, inverted */
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71#define ADV7180_HUE_MIN -127
72#define ADV7180_HUE_DEF 0
73#define ADV7180_HUE_MAX 128
bca7ad1a 74
3999e5d0 75#define ADV7180_REG_CTRL 0x000e
029d6177 76#define ADV7180_CTRL_IRQ_SPACE 0x20
6789cb52 77
029d6177 78#define ADV7180_REG_PWR_MAN 0x0f
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79#define ADV7180_PWR_MAN_ON 0x04
80#define ADV7180_PWR_MAN_OFF 0x24
81#define ADV7180_PWR_MAN_RES 0x80
82
3999e5d0 83#define ADV7180_REG_STATUS1 0x0010
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84#define ADV7180_STATUS1_IN_LOCK 0x01
85#define ADV7180_STATUS1_AUTOD_MASK 0x70
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86#define ADV7180_STATUS1_AUTOD_NTSM_M_J 0x00
87#define ADV7180_STATUS1_AUTOD_NTSC_4_43 0x10
88#define ADV7180_STATUS1_AUTOD_PAL_M 0x20
89#define ADV7180_STATUS1_AUTOD_PAL_60 0x30
90#define ADV7180_STATUS1_AUTOD_PAL_B_G 0x40
91#define ADV7180_STATUS1_AUTOD_SECAM 0x50
92#define ADV7180_STATUS1_AUTOD_PAL_COMB 0x60
93#define ADV7180_STATUS1_AUTOD_SECAM_525 0x70
94
3999e5d0 95#define ADV7180_REG_IDENT 0x0011
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96#define ADV7180_ID_7180 0x18
97
3999e5d0 98#define ADV7180_REG_ICONF1 0x0040
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99#define ADV7180_ICONF1_ACTIVE_LOW 0x01
100#define ADV7180_ICONF1_PSYNC_ONLY 0x10
101#define ADV7180_ICONF1_ACTIVE_TO_CLR 0xC0
c9fbeddd 102/* Saturation */
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103#define ADV7180_REG_SD_SAT_CB 0x00e3 /*Unsigned */
104#define ADV7180_REG_SD_SAT_CR 0x00e4 /*Unsigned */
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105#define ADV7180_SAT_MIN 0
106#define ADV7180_SAT_DEF 128
107#define ADV7180_SAT_MAX 255
bca7ad1a 108
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109#define ADV7180_IRQ1_LOCK 0x01
110#define ADV7180_IRQ1_UNLOCK 0x02
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111#define ADV7180_REG_ISR1 0x0042
112#define ADV7180_REG_ICR1 0x0043
113#define ADV7180_REG_IMR1 0x0044
114#define ADV7180_REG_IMR2 0x0048
42752f7a 115#define ADV7180_IRQ3_AD_CHANGE 0x08
3999e5d0
LPC
116#define ADV7180_REG_ISR3 0x004A
117#define ADV7180_REG_ICR3 0x004B
118#define ADV7180_REG_IMR3 0x004C
029d6177 119#define ADV7180_REG_IMR4 0x50
6789cb52 120
3999e5d0 121#define ADV7180_REG_NTSC_V_BIT_END 0x00E6
bca7ad1a
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122#define ADV7180_NTSC_V_BIT_END_MANUAL_NVEND 0x4F
123
6789cb52 124struct adv7180_state {
c9fbeddd 125 struct v4l2_ctrl_handler ctrl_hdl;
c277b60a 126 struct v4l2_subdev sd;
d5d51a82 127 struct media_pad pad;
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128 struct mutex mutex; /* mutual excl. when accessing chip */
129 int irq;
c277b60a
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130 v4l2_std_id curr_norm;
131 bool autodetect;
e246c333 132 bool powered;
bca7ad1a 133 u8 input;
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134
135 struct i2c_client *client;
136 unsigned int register_page;
6789cb52 137};
c9fbeddd
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138#define to_adv7180_sd(_ctrl) (&container_of(_ctrl->handler, \
139 struct adv7180_state, \
140 ctrl_hdl)->sd)
6789cb52 141
3999e5d0
LPC
142static int adv7180_select_page(struct adv7180_state *state, unsigned int page)
143{
144 if (state->register_page != page) {
145 i2c_smbus_write_byte_data(state->client, ADV7180_REG_CTRL,
146 page);
147 state->register_page = page;
148 }
149
150 return 0;
151}
152
153static int adv7180_write(struct adv7180_state *state, unsigned int reg,
154 unsigned int value)
155{
156 lockdep_assert_held(&state->mutex);
157 adv7180_select_page(state, reg >> 8);
158 return i2c_smbus_write_byte_data(state->client, reg & 0xff, value);
159}
160
161static int adv7180_read(struct adv7180_state *state, unsigned int reg)
162{
163 lockdep_assert_held(&state->mutex);
164 adv7180_select_page(state, reg >> 8);
165 return i2c_smbus_read_byte_data(state->client, reg & 0xff);
166}
167
168
d3124294 169static v4l2_std_id adv7180_std_to_v4l2(u8 status1)
6789cb52 170{
b294a192
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171 /* in case V4L2_IN_ST_NO_SIGNAL */
172 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
173 return V4L2_STD_UNKNOWN;
174
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175 switch (status1 & ADV7180_STATUS1_AUTOD_MASK) {
176 case ADV7180_STATUS1_AUTOD_NTSM_M_J:
d3124294 177 return V4L2_STD_NTSC;
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178 case ADV7180_STATUS1_AUTOD_NTSC_4_43:
179 return V4L2_STD_NTSC_443;
180 case ADV7180_STATUS1_AUTOD_PAL_M:
181 return V4L2_STD_PAL_M;
182 case ADV7180_STATUS1_AUTOD_PAL_60:
183 return V4L2_STD_PAL_60;
184 case ADV7180_STATUS1_AUTOD_PAL_B_G:
185 return V4L2_STD_PAL;
186 case ADV7180_STATUS1_AUTOD_SECAM:
187 return V4L2_STD_SECAM;
188 case ADV7180_STATUS1_AUTOD_PAL_COMB:
189 return V4L2_STD_PAL_Nc | V4L2_STD_PAL_N;
190 case ADV7180_STATUS1_AUTOD_SECAM_525:
191 return V4L2_STD_SECAM;
192 default:
193 return V4L2_STD_UNKNOWN;
194 }
195}
196
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197static int v4l2_std_to_adv7180(v4l2_std_id std)
198{
199 if (std == V4L2_STD_PAL_60)
200 return ADV7180_INPUT_CONTROL_PAL60;
201 if (std == V4L2_STD_NTSC_443)
202 return ADV7180_INPUT_CONTROL_NTSC_443;
203 if (std == V4L2_STD_PAL_N)
204 return ADV7180_INPUT_CONTROL_PAL_N;
205 if (std == V4L2_STD_PAL_M)
206 return ADV7180_INPUT_CONTROL_PAL_M;
207 if (std == V4L2_STD_PAL_Nc)
208 return ADV7180_INPUT_CONTROL_PAL_COMB_N;
209
210 if (std & V4L2_STD_PAL)
211 return ADV7180_INPUT_CONTROL_PAL_BG;
212 if (std & V4L2_STD_NTSC)
213 return ADV7180_INPUT_CONTROL_NTSC_M;
214 if (std & V4L2_STD_SECAM)
215 return ADV7180_INPUT_CONTROL_PAL_SECAM;
216
217 return -EINVAL;
218}
219
d3124294
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220static u32 adv7180_status_to_v4l2(u8 status1)
221{
222 if (!(status1 & ADV7180_STATUS1_IN_LOCK))
223 return V4L2_IN_ST_NO_SIGNAL;
224
225 return 0;
226}
227
3999e5d0 228static int __adv7180_status(struct adv7180_state *state, u32 *status,
bca7ad1a 229 v4l2_std_id *std)
d3124294 230{
3999e5d0 231 int status1 = adv7180_read(state, ADV7180_REG_STATUS1);
d3124294
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232
233 if (status1 < 0)
234 return status1;
235
236 if (status)
237 *status = adv7180_status_to_v4l2(status1);
238 if (std)
239 *std = adv7180_std_to_v4l2(status1);
240
241 return 0;
242}
243
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244static inline struct adv7180_state *to_state(struct v4l2_subdev *sd)
245{
246 return container_of(sd, struct adv7180_state, sd);
247}
248
249static int adv7180_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
250{
c277b60a 251 struct adv7180_state *state = to_state(sd);
42752f7a
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252 int err = mutex_lock_interruptible(&state->mutex);
253 if (err)
254 return err;
c277b60a 255
42752f7a
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256 /* when we are interrupt driven we know the state */
257 if (!state->autodetect || state->irq > 0)
c277b60a
RR
258 *std = state->curr_norm;
259 else
3999e5d0 260 err = __adv7180_status(state, NULL, std);
c277b60a 261
42752f7a 262 mutex_unlock(&state->mutex);
c277b60a 263 return err;
d3124294 264}
6789cb52 265
bca7ad1a
FV
266static int adv7180_s_routing(struct v4l2_subdev *sd, u32 input,
267 u32 output, u32 config)
268{
269 struct adv7180_state *state = to_state(sd);
270 int ret = mutex_lock_interruptible(&state->mutex);
bca7ad1a
FV
271
272 if (ret)
273 return ret;
274
c9fbeddd 275 /* We cannot discriminate between LQFP and 40-pin LFCSP, so accept
bca7ad1a
FV
276 * all inputs and let the card driver take care of validation
277 */
278 if ((input & ADV7180_INPUT_CONTROL_INSEL_MASK) != input)
279 goto out;
280
3999e5d0 281 ret = adv7180_read(state, ADV7180_REG_INPUT_CONTROL);
bca7ad1a
FV
282 if (ret < 0)
283 goto out;
284
285 ret &= ~ADV7180_INPUT_CONTROL_INSEL_MASK;
3999e5d0 286 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL, ret | input);
bca7ad1a
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287 state->input = input;
288out:
289 mutex_unlock(&state->mutex);
290 return ret;
291}
292
d3124294
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293static int adv7180_g_input_status(struct v4l2_subdev *sd, u32 *status)
294{
42752f7a
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295 struct adv7180_state *state = to_state(sd);
296 int ret = mutex_lock_interruptible(&state->mutex);
297 if (ret)
298 return ret;
299
3999e5d0 300 ret = __adv7180_status(state, status, NULL);
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301 mutex_unlock(&state->mutex);
302 return ret;
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303}
304
3e35e33c 305static int adv7180_program_std(struct adv7180_state *state)
c277b60a 306{
3e35e33c 307 int ret;
c277b60a 308
3e35e33c 309 if (state->autodetect) {
3999e5d0
LPC
310 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
311 ADV7180_INPUT_CONTROL_AD_PAL_BG_NTSC_J_SECAM
312 | state->input);
c277b60a 313 if (ret < 0)
3e35e33c 314 return ret;
c277b60a 315
3999e5d0 316 __adv7180_status(state, NULL, &state->curr_norm);
c277b60a 317 } else {
3e35e33c 318 ret = v4l2_std_to_adv7180(state->curr_norm);
c277b60a 319 if (ret < 0)
3e35e33c 320 return ret;
c277b60a 321
3999e5d0
LPC
322 ret = adv7180_write(state, ADV7180_REG_INPUT_CONTROL,
323 ret | state->input);
3e35e33c
LPC
324 if (ret < 0)
325 return ret;
326 }
327
328 return 0;
329}
330
331static int adv7180_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
332{
333 struct adv7180_state *state = to_state(sd);
334 int ret = mutex_lock_interruptible(&state->mutex);
335
336 if (ret)
337 return ret;
338
339 /* all standards -> autodetect */
340 if (std == V4L2_STD_ALL) {
341 state->autodetect = true;
342 } else {
343 /* Make sure we can support this std */
344 ret = v4l2_std_to_adv7180(std);
c277b60a
RR
345 if (ret < 0)
346 goto out;
347
348 state->curr_norm = std;
349 state->autodetect = false;
350 }
3e35e33c
LPC
351
352 ret = adv7180_program_std(state);
c277b60a 353out:
42752f7a 354 mutex_unlock(&state->mutex);
c277b60a
RR
355 return ret;
356}
357
3999e5d0 358static int adv7180_set_power(struct adv7180_state *state, bool on)
e246c333
LPC
359{
360 u8 val;
361
362 if (on)
363 val = ADV7180_PWR_MAN_ON;
364 else
365 val = ADV7180_PWR_MAN_OFF;
366
3999e5d0 367 return adv7180_write(state, ADV7180_REG_PWR_MAN, val);
e246c333
LPC
368}
369
370static int adv7180_s_power(struct v4l2_subdev *sd, int on)
371{
372 struct adv7180_state *state = to_state(sd);
e246c333
LPC
373 int ret;
374
375 ret = mutex_lock_interruptible(&state->mutex);
376 if (ret)
377 return ret;
378
3999e5d0 379 ret = adv7180_set_power(state, on);
e246c333
LPC
380 if (ret == 0)
381 state->powered = on;
382
383 mutex_unlock(&state->mutex);
384 return ret;
385}
386
c9fbeddd 387static int adv7180_s_ctrl(struct v4l2_ctrl *ctrl)
bca7ad1a 388{
c9fbeddd 389 struct v4l2_subdev *sd = to_adv7180_sd(ctrl);
bca7ad1a 390 struct adv7180_state *state = to_state(sd);
bca7ad1a 391 int ret = mutex_lock_interruptible(&state->mutex);
c9fbeddd
FV
392 int val;
393
bca7ad1a
FV
394 if (ret)
395 return ret;
c9fbeddd 396 val = ctrl->val;
bca7ad1a
FV
397 switch (ctrl->id) {
398 case V4L2_CID_BRIGHTNESS:
3999e5d0 399 ret = adv7180_write(state, ADV7180_REG_BRI, val);
bca7ad1a
FV
400 break;
401 case V4L2_CID_HUE:
bca7ad1a 402 /*Hue is inverted according to HSL chart */
3999e5d0 403 ret = adv7180_write(state, ADV7180_REG_HUE, -val);
bca7ad1a
FV
404 break;
405 case V4L2_CID_CONTRAST:
3999e5d0 406 ret = adv7180_write(state, ADV7180_REG_CON, val);
bca7ad1a
FV
407 break;
408 case V4L2_CID_SATURATION:
bca7ad1a
FV
409 /*
410 *This could be V4L2_CID_BLUE_BALANCE/V4L2_CID_RED_BALANCE
411 *Let's not confuse the user, everybody understands saturation
412 */
3999e5d0 413 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CB, val);
bca7ad1a
FV
414 if (ret < 0)
415 break;
3999e5d0 416 ret = adv7180_write(state, ADV7180_REG_SD_SAT_CR, val);
bca7ad1a
FV
417 break;
418 default:
419 ret = -EINVAL;
420 }
421
422 mutex_unlock(&state->mutex);
423 return ret;
424}
425
c9fbeddd
FV
426static const struct v4l2_ctrl_ops adv7180_ctrl_ops = {
427 .s_ctrl = adv7180_s_ctrl,
428};
429
430static int adv7180_init_controls(struct adv7180_state *state)
431{
432 v4l2_ctrl_handler_init(&state->ctrl_hdl, 4);
433
434 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
435 V4L2_CID_BRIGHTNESS, ADV7180_BRI_MIN,
436 ADV7180_BRI_MAX, 1, ADV7180_BRI_DEF);
437 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
438 V4L2_CID_CONTRAST, ADV7180_CON_MIN,
439 ADV7180_CON_MAX, 1, ADV7180_CON_DEF);
440 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
441 V4L2_CID_SATURATION, ADV7180_SAT_MIN,
442 ADV7180_SAT_MAX, 1, ADV7180_SAT_DEF);
443 v4l2_ctrl_new_std(&state->ctrl_hdl, &adv7180_ctrl_ops,
444 V4L2_CID_HUE, ADV7180_HUE_MIN,
445 ADV7180_HUE_MAX, 1, ADV7180_HUE_DEF);
446 state->sd.ctrl_handler = &state->ctrl_hdl;
447 if (state->ctrl_hdl.error) {
448 int err = state->ctrl_hdl.error;
449
450 v4l2_ctrl_handler_free(&state->ctrl_hdl);
451 return err;
452 }
453 v4l2_ctrl_handler_setup(&state->ctrl_hdl);
454
455 return 0;
456}
457static void adv7180_exit_controls(struct adv7180_state *state)
458{
459 v4l2_ctrl_handler_free(&state->ctrl_hdl);
460}
461
d5d51a82
LPC
462static int adv7180_enum_mbus_code(struct v4l2_subdev *sd,
463 struct v4l2_subdev_fh *fh,
464 struct v4l2_subdev_mbus_code_enum *code)
cccb83f7 465{
d5d51a82 466 if (code->index != 0)
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VB
467 return -EINVAL;
468
d5d51a82 469 code->code = MEDIA_BUS_FMT_YUYV8_2X8;
cccb83f7
VB
470
471 return 0;
472}
473
474static int adv7180_mbus_fmt(struct v4l2_subdev *sd,
475 struct v4l2_mbus_framefmt *fmt)
476{
477 struct adv7180_state *state = to_state(sd);
478
f5fe58fd 479 fmt->code = MEDIA_BUS_FMT_YUYV8_2X8;
cccb83f7
VB
480 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
481 fmt->field = V4L2_FIELD_INTERLACED;
482 fmt->width = 720;
483 fmt->height = state->curr_norm & V4L2_STD_525_60 ? 480 : 576;
484
485 return 0;
486}
487
d5d51a82
LPC
488static int adv7180_get_pad_format(struct v4l2_subdev *sd,
489 struct v4l2_subdev_fh *fh,
490 struct v4l2_subdev_format *format)
491{
492 return adv7180_mbus_fmt(sd, &format->format);
493}
494
495static int adv7180_set_pad_format(struct v4l2_subdev *sd,
496 struct v4l2_subdev_fh *fh,
497 struct v4l2_subdev_format *format)
498{
499 return adv7180_mbus_fmt(sd, &format->format);
500}
501
cccb83f7
VB
502static int adv7180_g_mbus_config(struct v4l2_subdev *sd,
503 struct v4l2_mbus_config *cfg)
504{
505 /*
506 * The ADV7180 sensor supports BT.601/656 output modes.
507 * The BT.656 is default and not yet configurable by s/w.
508 */
509 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
510 V4L2_MBUS_DATA_ACTIVE_HIGH;
511 cfg->type = V4L2_MBUS_BT656;
512
513 return 0;
514}
515
6789cb52 516static const struct v4l2_subdev_video_ops adv7180_video_ops = {
8774bed9 517 .s_std = adv7180_s_std,
6789cb52 518 .querystd = adv7180_querystd,
d3124294 519 .g_input_status = adv7180_g_input_status,
bca7ad1a 520 .s_routing = adv7180_s_routing,
cccb83f7 521 .g_mbus_config = adv7180_g_mbus_config,
6789cb52
RR
522};
523
524static const struct v4l2_subdev_core_ops adv7180_core_ops = {
e246c333 525 .s_power = adv7180_s_power,
6789cb52
RR
526};
527
d5d51a82
LPC
528static const struct v4l2_subdev_pad_ops adv7180_pad_ops = {
529 .enum_mbus_code = adv7180_enum_mbus_code,
530 .set_fmt = adv7180_set_pad_format,
531 .get_fmt = adv7180_get_pad_format,
532};
533
6789cb52
RR
534static const struct v4l2_subdev_ops adv7180_ops = {
535 .core = &adv7180_core_ops,
536 .video = &adv7180_video_ops,
d5d51a82 537 .pad = &adv7180_pad_ops,
6789cb52
RR
538};
539
0c25534d 540static irqreturn_t adv7180_irq(int irq, void *devid)
42752f7a 541{
0c25534d 542 struct adv7180_state *state = devid;
42752f7a
RR
543 u8 isr3;
544
545 mutex_lock(&state->mutex);
3999e5d0 546 isr3 = adv7180_read(state, ADV7180_REG_ISR3);
42752f7a 547 /* clear */
3999e5d0 548 adv7180_write(state, ADV7180_REG_ICR3, isr3);
42752f7a
RR
549
550 if (isr3 & ADV7180_IRQ3_AD_CHANGE && state->autodetect)
3999e5d0 551 __adv7180_status(state, NULL, &state->curr_norm);
42752f7a
RR
552 mutex_unlock(&state->mutex);
553
42752f7a
RR
554 return IRQ_HANDLED;
555}
556
3999e5d0 557static int init_device(struct adv7180_state *state)
6789cb52 558{
6789cb52
RR
559 int ret;
560
3999e5d0
LPC
561 mutex_lock(&state->mutex);
562
c18818e9
LPC
563 adv7180_write(state, ADV7180_REG_PWR_MAN, ADV7180_PWR_MAN_RES);
564 usleep_range(2000, 10000);
565
3e35e33c
LPC
566 ret = adv7180_program_std(state);
567 if (ret)
568 goto out_unlock;
bca7ad1a 569
42752f7a 570 /* ITU-R BT.656-4 compatible */
3999e5d0 571 ret = adv7180_write(state, ADV7180_REG_EXTENDED_OUTPUT_CONTROL,
bca7ad1a 572 ADV7180_EXTENDED_OUTPUT_CONTROL_NTSCDIS);
42752f7a 573 if (ret < 0)
3999e5d0 574 goto out_unlock;
bca7ad1a
FV
575
576 /* Manually set V bit end position in NTSC mode */
3999e5d0 577 ret = adv7180_write(state, ADV7180_REG_NTSC_V_BIT_END,
bca7ad1a
FV
578 ADV7180_NTSC_V_BIT_END_MANUAL_NVEND);
579 if (ret < 0)
3999e5d0 580 goto out_unlock;
42752f7a
RR
581
582 /* read current norm */
3999e5d0 583 __adv7180_status(state, NULL, &state->curr_norm);
42752f7a
RR
584
585 /* register for interrupts */
586 if (state->irq > 0) {
42752f7a 587 /* config the Interrupt pin to be active low */
3999e5d0 588 ret = adv7180_write(state, ADV7180_REG_ICONF1,
bca7ad1a
FV
589 ADV7180_ICONF1_ACTIVE_LOW |
590 ADV7180_ICONF1_PSYNC_ONLY);
42752f7a 591 if (ret < 0)
3999e5d0 592 goto out_unlock;
42752f7a 593
3999e5d0 594 ret = adv7180_write(state, ADV7180_REG_IMR1, 0);
42752f7a 595 if (ret < 0)
3999e5d0 596 goto out_unlock;
42752f7a 597
3999e5d0 598 ret = adv7180_write(state, ADV7180_REG_IMR2, 0);
42752f7a 599 if (ret < 0)
3999e5d0 600 goto out_unlock;
42752f7a
RR
601
602 /* enable AD change interrupts interrupts */
3999e5d0 603 ret = adv7180_write(state, ADV7180_REG_IMR3,
bca7ad1a 604 ADV7180_IRQ3_AD_CHANGE);
42752f7a 605 if (ret < 0)
3999e5d0 606 goto out_unlock;
42752f7a 607
3999e5d0 608 ret = adv7180_write(state, ADV7180_REG_IMR4, 0);
42752f7a 609 if (ret < 0)
3999e5d0 610 goto out_unlock;
6789cb52
RR
611 }
612
3999e5d0
LPC
613out_unlock:
614 mutex_unlock(&state->mutex);
df065b37 615
df065b37 616 return ret;
bca7ad1a
FV
617}
618
4c62e976
GKH
619static int adv7180_probe(struct i2c_client *client,
620 const struct i2c_device_id *id)
bca7ad1a
FV
621{
622 struct adv7180_state *state;
623 struct v4l2_subdev *sd;
624 int ret;
625
626 /* Check if the adapter supports the needed features */
627 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
628 return -EIO;
629
630 v4l_info(client, "chip found @ 0x%02x (%s)\n",
631 client->addr, client->adapter->name);
632
c02b211d 633 state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
7657e064
FE
634 if (state == NULL)
635 return -ENOMEM;
bca7ad1a 636
3999e5d0
LPC
637 state->client = client;
638
bca7ad1a 639 state->irq = client->irq;
bca7ad1a
FV
640 mutex_init(&state->mutex);
641 state->autodetect = true;
e246c333 642 state->powered = true;
bca7ad1a
FV
643 state->input = 0;
644 sd = &state->sd;
645 v4l2_i2c_subdev_init(sd, client, &adv7180_ops);
d5d51a82 646 sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
bca7ad1a 647
c9fbeddd
FV
648 ret = adv7180_init_controls(state);
649 if (ret)
bca7ad1a 650 goto err_unreg_subdev;
d5d51a82
LPC
651
652 state->pad.flags = MEDIA_PAD_FL_SOURCE;
653 sd->entity.flags |= MEDIA_ENT_T_V4L2_SUBDEV_DECODER;
654 ret = media_entity_init(&sd->entity, 1, &state->pad, 0);
c9fbeddd
FV
655 if (ret)
656 goto err_free_ctrl;
fa5b7945 657
d5d51a82
LPC
658 ret = init_device(state);
659 if (ret)
660 goto err_media_entity_cleanup;
661
fa5721d1
LPC
662 if (state->irq) {
663 ret = request_threaded_irq(client->irq, NULL, adv7180_irq,
f3e991d4
LPC
664 IRQF_ONESHOT | IRQF_TRIGGER_FALLING,
665 KBUILD_MODNAME, state);
fa5721d1 666 if (ret)
d5d51a82 667 goto err_media_entity_cleanup;
fa5721d1
LPC
668 }
669
fa5b7945
LPC
670 ret = v4l2_async_register_subdev(sd);
671 if (ret)
672 goto err_free_irq;
673
6789cb52 674 return 0;
42752f7a 675
fa5b7945
LPC
676err_free_irq:
677 if (state->irq > 0)
678 free_irq(client->irq, state);
d5d51a82
LPC
679err_media_entity_cleanup:
680 media_entity_cleanup(&sd->entity);
c9fbeddd
FV
681err_free_ctrl:
682 adv7180_exit_controls(state);
42752f7a 683err_unreg_subdev:
297a0ae3 684 mutex_destroy(&state->mutex);
42752f7a 685 return ret;
6789cb52
RR
686}
687
4c62e976 688static int adv7180_remove(struct i2c_client *client)
6789cb52
RR
689{
690 struct v4l2_subdev *sd = i2c_get_clientdata(client);
42752f7a
RR
691 struct adv7180_state *state = to_state(sd);
692
fa5b7945
LPC
693 v4l2_async_unregister_subdev(sd);
694
0c25534d 695 if (state->irq > 0)
42752f7a 696 free_irq(client->irq, state);
6789cb52 697
d5d51a82 698 media_entity_cleanup(&sd->entity);
b13f4af2 699 adv7180_exit_controls(state);
297a0ae3 700 mutex_destroy(&state->mutex);
6789cb52
RR
701 return 0;
702}
703
704static const struct i2c_device_id adv7180_id[] = {
c9fbeddd 705 {KBUILD_MODNAME, 0},
6789cb52
RR
706 {},
707};
708
cc1088dc
LPC
709#ifdef CONFIG_PM_SLEEP
710static int adv7180_suspend(struct device *dev)
bca7ad1a 711{
cc1088dc 712 struct i2c_client *client = to_i2c_client(dev);
e246c333
LPC
713 struct v4l2_subdev *sd = i2c_get_clientdata(client);
714 struct adv7180_state *state = to_state(sd);
bca7ad1a 715
3999e5d0 716 return adv7180_set_power(state, false);
bca7ad1a
FV
717}
718
cc1088dc 719static int adv7180_resume(struct device *dev)
bca7ad1a 720{
cc1088dc 721 struct i2c_client *client = to_i2c_client(dev);
bca7ad1a
FV
722 struct v4l2_subdev *sd = i2c_get_clientdata(client);
723 struct adv7180_state *state = to_state(sd);
724 int ret;
725
3999e5d0 726 ret = init_device(state);
bca7ad1a
FV
727 if (ret < 0)
728 return ret;
c18818e9
LPC
729
730 ret = adv7180_set_power(state, state->powered);
731 if (ret)
732 return ret;
733
bca7ad1a
FV
734 return 0;
735}
cc1088dc
LPC
736
737static SIMPLE_DEV_PM_OPS(adv7180_pm_ops, adv7180_suspend, adv7180_resume);
738#define ADV7180_PM_OPS (&adv7180_pm_ops)
739
740#else
741#define ADV7180_PM_OPS NULL
bca7ad1a
FV
742#endif
743
6789cb52
RR
744MODULE_DEVICE_TABLE(i2c, adv7180_id);
745
746static struct i2c_driver adv7180_driver = {
747 .driver = {
bca7ad1a 748 .owner = THIS_MODULE,
c9fbeddd 749 .name = KBUILD_MODNAME,
cc1088dc 750 .pm = ADV7180_PM_OPS,
bca7ad1a
FV
751 },
752 .probe = adv7180_probe,
4c62e976 753 .remove = adv7180_remove,
bca7ad1a 754 .id_table = adv7180_id,
6789cb52
RR
755};
756
c6e8d86f 757module_i2c_driver(adv7180_driver);
6789cb52
RR
758
759MODULE_DESCRIPTION("Analog Devices ADV7180 video decoder driver");
760MODULE_AUTHOR("Mocean Laboratories");
761MODULE_LICENSE("GPL v2");
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