[deliverable/linux.git] / drivers / media / i2c / adv7343.c

/*
 * adv7343 - ADV7343 Video Encoder Driver
 *
 * The encoder hardware does not support SECAM.
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed .as is. WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/ctype.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/videodev2.h>
#include <linux/uaccess.h>

#include <media/adv7343.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>

#include "adv7343_regs.h"

MODULE_DESCRIPTION("ADV7343 video encoder driver");
MODULE_LICENSE("GPL");

static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Debug level 0-1");

struct adv7343_state {
	struct v4l2_subdev sd;
	struct v4l2_ctrl_handler hdl;
	const struct adv7343_platform_data *pdata;
	u8 reg00;
	u8 reg01;
	u8 reg02;
	u8 reg35;
	u8 reg80;
	u8 reg82;
	u32 output;
	v4l2_std_id std;
};

static inline struct adv7343_state *to_state(struct v4l2_subdev *sd)
{
	return container_of(sd, struct adv7343_state, sd);
}

static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
{
	return &container_of(ctrl->handler, struct adv7343_state, hdl)->sd;
}

static inline int adv7343_write(struct v4l2_subdev *sd, u8 reg, u8 value)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	return i2c_smbus_write_byte_data(client, reg, value);
}

static const u8 adv7343_init_reg_val[] = {
	ADV7343_SOFT_RESET, ADV7343_SOFT_RESET_DEFAULT,
	ADV7343_POWER_MODE_REG, ADV7343_POWER_MODE_REG_DEFAULT,

	ADV7343_HD_MODE_REG1, ADV7343_HD_MODE_REG1_DEFAULT,
	ADV7343_HD_MODE_REG2, ADV7343_HD_MODE_REG2_DEFAULT,
	ADV7343_HD_MODE_REG3, ADV7343_HD_MODE_REG3_DEFAULT,
	ADV7343_HD_MODE_REG4, ADV7343_HD_MODE_REG4_DEFAULT,
	ADV7343_HD_MODE_REG5, ADV7343_HD_MODE_REG5_DEFAULT,
	ADV7343_HD_MODE_REG6, ADV7343_HD_MODE_REG6_DEFAULT,
	ADV7343_HD_MODE_REG7, ADV7343_HD_MODE_REG7_DEFAULT,

	ADV7343_SD_MODE_REG1, ADV7343_SD_MODE_REG1_DEFAULT,
	ADV7343_SD_MODE_REG2, ADV7343_SD_MODE_REG2_DEFAULT,
	ADV7343_SD_MODE_REG3, ADV7343_SD_MODE_REG3_DEFAULT,
	ADV7343_SD_MODE_REG4, ADV7343_SD_MODE_REG4_DEFAULT,
	ADV7343_SD_MODE_REG5, ADV7343_SD_MODE_REG5_DEFAULT,
	ADV7343_SD_MODE_REG6, ADV7343_SD_MODE_REG6_DEFAULT,
	ADV7343_SD_MODE_REG7, ADV7343_SD_MODE_REG7_DEFAULT,
	ADV7343_SD_MODE_REG8, ADV7343_SD_MODE_REG8_DEFAULT,

	ADV7343_SD_HUE_REG, ADV7343_SD_HUE_REG_DEFAULT,
	ADV7343_SD_CGMS_WSS0, ADV7343_SD_CGMS_WSS0_DEFAULT,
	ADV7343_SD_BRIGHTNESS_WSS, ADV7343_SD_BRIGHTNESS_WSS_DEFAULT,
};

/*
 * 			    2^32
 * FSC(reg) =  FSC (HZ) * --------
 *			  27000000
 */
static const struct adv7343_std_info stdinfo[] = {
	{
		/* FSC(Hz) = 3,579,545.45 Hz */
		SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
	}, {
		/* FSC(Hz) = 3,575,611.00 Hz */
		SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
	}, {
		/* FSC(Hz) = 3,582,056.00 */
		SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
	}, {
		/* FSC(Hz) = 4,433,618.75 Hz */
		SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
	},
};

static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
{
	struct adv7343_state *state = to_state(sd);
	struct adv7343_std_info *std_info;
	int num_std;
	char *fsc_ptr;
	u8 reg, val;
	int err = 0;
	int i = 0;

	std_info = (struct adv7343_std_info *)stdinfo;
	num_std = ARRAY_SIZE(stdinfo);

	for (i = 0; i < num_std; i++) {
		if (std_info[i].stdid & std)
			break;
	}

	if (i == num_std) {
		v4l2_dbg(1, debug, sd,
				"Invalid std or std is not supported: %llx\n",
						(unsigned long long)std);
		return -EINVAL;
	}

	/* Set the standard */
	val = state->reg80 & (~(SD_STD_MASK));
	val |= std_info[i].standard_val3;
	err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
	if (err < 0)
		goto setstd_exit;

	state->reg80 = val;

	/* Configure the input mode register */
	val = state->reg01 & (~((u8) INPUT_MODE_MASK));
	val |= SD_INPUT_MODE;
	err = adv7343_write(sd, ADV7343_MODE_SELECT_REG, val);
	if (err < 0)
		goto setstd_exit;

	state->reg01 = val;

	/* Program the sub carrier frequency registers */
	fsc_ptr = (unsigned char *)&std_info[i].fsc_val;
	reg = ADV7343_FSC_REG0;
	for (i = 0; i < 4; i++, reg++, fsc_ptr++) {
		err = adv7343_write(sd, reg, *fsc_ptr);
		if (err < 0)
			goto setstd_exit;
	}

	val = state->reg80;

	/* Filter settings */
	if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
		val &= 0x03;
	else if (std & ~V4L2_STD_SECAM)
		val |= 0x04;

	err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
	if (err < 0)
		goto setstd_exit;

	state->reg80 = val;

setstd_exit:
	if (err != 0)
		v4l2_err(sd, "Error setting std, write failed\n");

	return err;
}

static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
{
	struct adv7343_state *state = to_state(sd);
	unsigned char val;
	int err = 0;

	if (output_type > ADV7343_SVIDEO_ID) {
		v4l2_dbg(1, debug, sd,
			"Invalid output type or output type not supported:%d\n",
								output_type);
		return -EINVAL;
	}

	/* Enable Appropriate DAC */
	val = state->reg00 & 0x03;

	/* configure default configuration */
	if (!state->pdata)
		if (output_type == ADV7343_COMPOSITE_ID)
			val |= ADV7343_COMPOSITE_POWER_VALUE;
		else if (output_type == ADV7343_COMPONENT_ID)
			val |= ADV7343_COMPONENT_POWER_VALUE;
		else
			val |= ADV7343_SVIDEO_POWER_VALUE;
	else
		val = state->pdata->mode_config.sleep_mode << 0 |
		      state->pdata->mode_config.pll_control << 1 |
		      state->pdata->mode_config.dac_3 << 2 |
		      state->pdata->mode_config.dac_2 << 3 |
		      state->pdata->mode_config.dac_1 << 4 |
		      state->pdata->mode_config.dac_6 << 5 |
		      state->pdata->mode_config.dac_5 << 6 |
		      state->pdata->mode_config.dac_4 << 7;

	err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
	if (err < 0)
		goto setoutput_exit;

	state->reg00 = val;

	/* Enable YUV output */
	val = state->reg02 | YUV_OUTPUT_SELECT;
	err = adv7343_write(sd, ADV7343_MODE_REG0, val);
	if (err < 0)
		goto setoutput_exit;

	state->reg02 = val;

	/* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
	val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);

	if (state->pdata && state->pdata->sd_config.sd_dac_out1)
		val = val | (state->pdata->sd_config.sd_dac_out1 << 1);
	else if (state->pdata && !state->pdata->sd_config.sd_dac_out1)
		val = val & ~(state->pdata->sd_config.sd_dac_out1 << 1);

	if (state->pdata && state->pdata->sd_config.sd_dac_out2)
		val = val | (state->pdata->sd_config.sd_dac_out2 << 2);
	else if (state->pdata && !state->pdata->sd_config.sd_dac_out2)
		val = val & ~(state->pdata->sd_config.sd_dac_out2 << 2);

	err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
	if (err < 0)
		goto setoutput_exit;

	state->reg82 = val;

	/* configure ED/HD Color DAC Swap and ED/HD RGB Input Enable bit to
	 * zero */
	val = state->reg35 & (HD_RGB_INPUT_DI & HD_DAC_SWAP_DI);
	err = adv7343_write(sd, ADV7343_HD_MODE_REG6, val);
	if (err < 0)
		goto setoutput_exit;

	state->reg35 = val;

setoutput_exit:
	if (err != 0)
		v4l2_err(sd, "Error setting output, write failed\n");

	return err;
}

static int adv7343_log_status(struct v4l2_subdev *sd)
{
	struct adv7343_state *state = to_state(sd);

	v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
	v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
			((state->output == 1) ? "Component" : "S-Video"));
	return 0;
}

static int adv7343_s_ctrl(struct v4l2_ctrl *ctrl)
{
	struct v4l2_subdev *sd = to_sd(ctrl);

	switch (ctrl->id) {
	case V4L2_CID_BRIGHTNESS:
		return adv7343_write(sd, ADV7343_SD_BRIGHTNESS_WSS,
					ctrl->val);

	case V4L2_CID_HUE:
		return adv7343_write(sd, ADV7343_SD_HUE_REG, ctrl->val);

	case V4L2_CID_GAIN:
		return adv7343_write(sd, ADV7343_DAC2_OUTPUT_LEVEL, ctrl->val);
	}
	return -EINVAL;
}

static const struct v4l2_ctrl_ops adv7343_ctrl_ops = {
	.s_ctrl = adv7343_s_ctrl,
};

static const struct v4l2_subdev_core_ops adv7343_core_ops = {
	.log_status = adv7343_log_status,
	.g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
	.try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
	.s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
	.g_ctrl = v4l2_subdev_g_ctrl,
	.s_ctrl = v4l2_subdev_s_ctrl,
	.queryctrl = v4l2_subdev_queryctrl,
	.querymenu = v4l2_subdev_querymenu,
};

static int adv7343_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
{
	struct adv7343_state *state = to_state(sd);
	int err = 0;

	if (state->std == std)
		return 0;

	err = adv7343_setstd(sd, std);
	if (!err)
		state->std = std;

	return err;
}

static int adv7343_s_routing(struct v4l2_subdev *sd,
		u32 input, u32 output, u32 config)
{
	struct adv7343_state *state = to_state(sd);
	int err = 0;

	if (state->output == output)
		return 0;

	err = adv7343_setoutput(sd, output);
	if (!err)
		state->output = output;

	return err;
}

static const struct v4l2_subdev_video_ops adv7343_video_ops = {
	.s_std_output	= adv7343_s_std_output,
	.s_routing	= adv7343_s_routing,
};

static const struct v4l2_subdev_ops adv7343_ops = {
	.core	= &adv7343_core_ops,
	.video	= &adv7343_video_ops,
};

static int adv7343_initialize(struct v4l2_subdev *sd)
{
	struct adv7343_state *state = to_state(sd);
	int err = 0;
	int i;

	for (i = 0; i < ARRAY_SIZE(adv7343_init_reg_val); i += 2) {

		err = adv7343_write(sd, adv7343_init_reg_val[i],
					adv7343_init_reg_val[i+1]);
		if (err) {
			v4l2_err(sd, "Error initializing\n");
			return err;
		}
	}

	/* Configure for default video standard */
	err = adv7343_setoutput(sd, state->output);
	if (err < 0) {
		v4l2_err(sd, "Error setting output during init\n");
		return -EINVAL;
	}

	err = adv7343_setstd(sd, state->std);
	if (err < 0) {
		v4l2_err(sd, "Error setting std during init\n");
		return -EINVAL;
	}

	return err;
}

static int adv7343_probe(struct i2c_client *client,
				const struct i2c_device_id *id)
{
	struct adv7343_state *state;
	int err;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
		return -ENODEV;

	v4l_info(client, "chip found @ 0x%x (%s)\n",
			client->addr << 1, client->adapter->name);

	state = devm_kzalloc(&client->dev, sizeof(struct adv7343_state),
			     GFP_KERNEL);
	if (state == NULL)
		return -ENOMEM;

	/* Copy board specific information here */
	state->pdata = client->dev.platform_data;

	state->reg00	= 0x80;
	state->reg01	= 0x00;
	state->reg02	= 0x20;
	state->reg35	= 0x00;
	state->reg80	= ADV7343_SD_MODE_REG1_DEFAULT;
	state->reg82	= ADV7343_SD_MODE_REG2_DEFAULT;

	state->output = ADV7343_COMPOSITE_ID;
	state->std = V4L2_STD_NTSC;

	v4l2_i2c_subdev_init(&state->sd, client, &adv7343_ops);

	v4l2_ctrl_handler_init(&state->hdl, 2);
	v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
			V4L2_CID_BRIGHTNESS, ADV7343_BRIGHTNESS_MIN,
					     ADV7343_BRIGHTNESS_MAX, 1,
					     ADV7343_BRIGHTNESS_DEF);
	v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
			V4L2_CID_HUE, ADV7343_HUE_MIN,
				      ADV7343_HUE_MAX, 1,
				      ADV7343_HUE_DEF);
	v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
			V4L2_CID_GAIN, ADV7343_GAIN_MIN,
				       ADV7343_GAIN_MAX, 1,
				       ADV7343_GAIN_DEF);
	state->sd.ctrl_handler = &state->hdl;
	if (state->hdl.error) {
		int err = state->hdl.error;

		v4l2_ctrl_handler_free(&state->hdl);
		return err;
	}
	v4l2_ctrl_handler_setup(&state->hdl);

	err = adv7343_initialize(&state->sd);
	if (err)
		v4l2_ctrl_handler_free(&state->hdl);
	return err;
}

static int adv7343_remove(struct i2c_client *client)
{
	struct v4l2_subdev *sd = i2c_get_clientdata(client);
	struct adv7343_state *state = to_state(sd);

	v4l2_device_unregister_subdev(sd);
	v4l2_ctrl_handler_free(&state->hdl);

	return 0;
}

static const struct i2c_device_id adv7343_id[] = {
	{"adv7343", 0},
	{},
};

MODULE_DEVICE_TABLE(i2c, adv7343_id);

static struct i2c_driver adv7343_driver = {
	.driver = {
		.owner	= THIS_MODULE,
		.name	= "adv7343",
	},
	.probe		= adv7343_probe,
	.remove		= adv7343_remove,
	.id_table	= adv7343_id,
};

module_i2c_driver(adv7343_driver);
Commit	Line	Data
06e61f8d C	1	/*
	2	* adv7343 - ADV7343 Video Encoder Driver
	3	*
	4	* The encoder hardware does not support SECAM.
	5	*
	6	* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation version 2.
	11	*
	12	* This program is distributed .as is. WITHOUT ANY WARRANTY of any
	13	* kind, whether express or implied; without even the implied warranty
	14	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*/
	17
	18	#include <linux/kernel.h>
	19	#include <linux/init.h>
	20	#include <linux/ctype.h>
5a0e3ad6	21	#include <linux/slab.h>
06e61f8d C	22	#include <linux/i2c.h>
	23	#include <linux/device.h>
	24	#include <linux/delay.h>
	25	#include <linux/module.h>
	26	#include <linux/videodev2.h>
	27	#include <linux/uaccess.h>
06e61f8d C	28
	29	#include <media/adv7343.h>
	30	#include <media/v4l2-device.h>
ceed52d6	31	#include <media/v4l2-ctrls.h>
06e61f8d C	32
	33	#include "adv7343_regs.h"
	34
	35	MODULE_DESCRIPTION("ADV7343 video encoder driver");
	36	MODULE_LICENSE("GPL");
	37
	38	static int debug;
	39	module_param(debug, int, 0644);
	40	MODULE_PARM_DESC(debug, "Debug level 0-1");
	41
	42	struct adv7343_state {
	43	struct v4l2_subdev sd;
ceed52d6	44	struct v4l2_ctrl_handler hdl;
0b302d88	45	const struct adv7343_platform_data *pdata;
06e61f8d C	46	u8 reg00;
	47	u8 reg01;
	48	u8 reg02;
	49	u8 reg35;
	50	u8 reg80;
	51	u8 reg82;
06e61f8d C	52	u32 output;
	53	v4l2_std_id std;
	54	};
	55
	56	static inline struct adv7343_state to_state(struct v4l2_subdev sd)
	57	{
	58	return container_of(sd, struct adv7343_state, sd);
	59	}
	60
ceed52d6 HV	61	static inline struct v4l2_subdev to_sd(struct v4l2_ctrl ctrl)
	62	{
	63	return &container_of(ctrl->handler, struct adv7343_state, hdl)->sd;
	64	}
	65
06e61f8d C	66	static inline int adv7343_write(struct v4l2_subdev *sd, u8 reg, u8 value)
	67	{
	68	struct i2c_client *client = v4l2_get_subdevdata(sd);
	69
	70	return i2c_smbus_write_byte_data(client, reg, value);
	71	}
	72
	73	static const u8 adv7343_init_reg_val[] = {
	74	ADV7343_SOFT_RESET, ADV7343_SOFT_RESET_DEFAULT,
	75	ADV7343_POWER_MODE_REG, ADV7343_POWER_MODE_REG_DEFAULT,
	76
	77	ADV7343_HD_MODE_REG1, ADV7343_HD_MODE_REG1_DEFAULT,
	78	ADV7343_HD_MODE_REG2, ADV7343_HD_MODE_REG2_DEFAULT,
	79	ADV7343_HD_MODE_REG3, ADV7343_HD_MODE_REG3_DEFAULT,
	80	ADV7343_HD_MODE_REG4, ADV7343_HD_MODE_REG4_DEFAULT,
	81	ADV7343_HD_MODE_REG5, ADV7343_HD_MODE_REG5_DEFAULT,
	82	ADV7343_HD_MODE_REG6, ADV7343_HD_MODE_REG6_DEFAULT,
	83	ADV7343_HD_MODE_REG7, ADV7343_HD_MODE_REG7_DEFAULT,
	84
	85	ADV7343_SD_MODE_REG1, ADV7343_SD_MODE_REG1_DEFAULT,
	86	ADV7343_SD_MODE_REG2, ADV7343_SD_MODE_REG2_DEFAULT,
	87	ADV7343_SD_MODE_REG3, ADV7343_SD_MODE_REG3_DEFAULT,
	88	ADV7343_SD_MODE_REG4, ADV7343_SD_MODE_REG4_DEFAULT,
	89	ADV7343_SD_MODE_REG5, ADV7343_SD_MODE_REG5_DEFAULT,
	90	ADV7343_SD_MODE_REG6, ADV7343_SD_MODE_REG6_DEFAULT,
	91	ADV7343_SD_MODE_REG7, ADV7343_SD_MODE_REG7_DEFAULT,
	92	ADV7343_SD_MODE_REG8, ADV7343_SD_MODE_REG8_DEFAULT,
	93
	94	ADV7343_SD_HUE_REG, ADV7343_SD_HUE_REG_DEFAULT,
	95	ADV7343_SD_CGMS_WSS0, ADV7343_SD_CGMS_WSS0_DEFAULT,
	96	ADV7343_SD_BRIGHTNESS_WSS, ADV7343_SD_BRIGHTNESS_WSS_DEFAULT,
	97	};
	98
	99	/*
	100	* 2^32
	101	* FSC(reg) = FSC (HZ) * --------
	102	* 27000000
	103	*/
	104	static const struct adv7343_std_info stdinfo[] = {
	105	{
	106	/* FSC(Hz) = 3,579,545.45 Hz */
	107	SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
	108	}, {
	109	/* FSC(Hz) = 3,575,611.00 Hz */
	110	SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
	111	}, {
	112	/* FSC(Hz) = 3,582,056.00 */
	113	SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
	114	}, {
	115	/* FSC(Hz) = 4,433,618.75 Hz */
	116	SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
	117	}, {
	118	/* FSC(Hz) = 4,433,618.75 Hz */
	119	SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
	120	}, {
	121	/* FSC(Hz) = 4,433,618.75 Hz */
	122	SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
	123	}, {
	124	/* FSC(Hz) = 4,433,618.75 Hz */
	125	SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
	126	},
	127	};
	128
	129	static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
130	{
131	struct adv7343_state *state = to_state(sd);
132	struct adv7343_std_info *std_info;
8173090a	133	int num_std;
06e61f8d C	134	char *fsc_ptr;
	135	u8 reg, val;
	136	int err = 0;
	137	int i = 0;
	138
06e61f8d C	139	std_info = (struct adv7343_std_info *)stdinfo;
	140	num_std = ARRAY_SIZE(stdinfo);
	141
	142	for (i = 0; i < num_std; i++) {
	143	if (std_info[i].stdid & std)
	144	break;
	145	}
	146
	147	if (i == num_std) {
	148	v4l2_dbg(1, debug, sd,
	149	"Invalid std or std is not supported: %llx\n",
	150	(unsigned long long)std);
	151	return -EINVAL;
	152	}
	153
	154	/* Set the standard */
	155	val = state->reg80 & (~(SD_STD_MASK));
	156	val \|= std_info[i].standard_val3;
	157	err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
	158	if (err < 0)
	159	goto setstd_exit;
	160
	161	state->reg80 = val;
	162
	163	/* Configure the input mode register */
	164	val = state->reg01 & (~((u8) INPUT_MODE_MASK));
	165	val \|= SD_INPUT_MODE;
	166	err = adv7343_write(sd, ADV7343_MODE_SELECT_REG, val);
	167	if (err < 0)
	168	goto setstd_exit;
	169
	170	state->reg01 = val;
	171
	172	/* Program the sub carrier frequency registers */
	173	fsc_ptr = (unsigned char *)&std_info[i].fsc_val;
	174	reg = ADV7343_FSC_REG0;
	175	for (i = 0; i < 4; i++, reg++, fsc_ptr++) {
	176	err = adv7343_write(sd, reg, *fsc_ptr);
	177	if (err < 0)
	178	goto setstd_exit;
	179	}
	180
	181	val = state->reg80;
	182
	183	/* Filter settings */
	184	if (std & (V4L2_STD_NTSC \| V4L2_STD_NTSC_443))
	185	val &= 0x03;
	186	else if (std & ~V4L2_STD_SECAM)
	187	val \|= 0x04;
	188
	189	err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
	190	if (err < 0)
	191	goto setstd_exit;
	192
	193	state->reg80 = val;
	194
	195	setstd_exit:
	196	if (err != 0)
	197	v4l2_err(sd, "Error setting std, write failed\n");
	198
	199	return err;
	200	}
	201
	202	static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
203	{
204	struct adv7343_state *state = to_state(sd);
205	unsigned char val;
206	int err = 0;
207
208	if (output_type > ADV7343_SVIDEO_ID) {
209	v4l2_dbg(1, debug, sd,
210	"Invalid output type or output type not supported:%d\n",
211	output_type);
212	return -EINVAL;
213	}
214
215	/* Enable Appropriate DAC */
216	val = state->reg00 & 0x03;
217
0b302d88 LP	218	/* configure default configuration */
	219	if (!state->pdata)
	220	if (output_type == ADV7343_COMPOSITE_ID)
	221	val \|= ADV7343_COMPOSITE_POWER_VALUE;
	222	else if (output_type == ADV7343_COMPONENT_ID)
	223	val \|= ADV7343_COMPONENT_POWER_VALUE;
	224	else
	225	val \|= ADV7343_SVIDEO_POWER_VALUE;
06e61f8d	226	else
0b302d88 LP	227	val = state->pdata->mode_config.sleep_mode << 0 \|
	228	state->pdata->mode_config.pll_control << 1 \|
	229	state->pdata->mode_config.dac_3 << 2 \|
	230	state->pdata->mode_config.dac_2 << 3 \|
	231	state->pdata->mode_config.dac_1 << 4 \|
	232	state->pdata->mode_config.dac_6 << 5 \|
	233	state->pdata->mode_config.dac_5 << 6 \|
	234	state->pdata->mode_config.dac_4 << 7;
06e61f8d C	235
	236	err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
	237	if (err < 0)
	238	goto setoutput_exit;
	239
	240	state->reg00 = val;
	241
	242	/* Enable YUV output */
	243	val = state->reg02 \| YUV_OUTPUT_SELECT;
	244	err = adv7343_write(sd, ADV7343_MODE_REG0, val);
	245	if (err < 0)
	246	goto setoutput_exit;
	247
	248	state->reg02 = val;
	249
	250	/* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
	251	val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
0b302d88 LP	252
	253	if (state->pdata && state->pdata->sd_config.sd_dac_out1)
	254	val = val \| (state->pdata->sd_config.sd_dac_out1 << 1);
	255	else if (state->pdata && !state->pdata->sd_config.sd_dac_out1)
	256	val = val & ~(state->pdata->sd_config.sd_dac_out1 << 1);
	257
	258	if (state->pdata && state->pdata->sd_config.sd_dac_out2)
	259	val = val \| (state->pdata->sd_config.sd_dac_out2 << 2);
	260	else if (state->pdata && !state->pdata->sd_config.sd_dac_out2)
	261	val = val & ~(state->pdata->sd_config.sd_dac_out2 << 2);
	262
06e61f8d C	263	err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
	264	if (err < 0)
	265	goto setoutput_exit;
	266
	267	state->reg82 = val;
	268
	269	/* configure ED/HD Color DAC Swap and ED/HD RGB Input Enable bit to
	270	* zero */
	271	val = state->reg35 & (HD_RGB_INPUT_DI & HD_DAC_SWAP_DI);
	272	err = adv7343_write(sd, ADV7343_HD_MODE_REG6, val);
	273	if (err < 0)
	274	goto setoutput_exit;
	275
	276	state->reg35 = val;
	277
	278	setoutput_exit:
	279	if (err != 0)
	280	v4l2_err(sd, "Error setting output, write failed\n");
	281
	282	return err;
	283	}
	284
	285	static int adv7343_log_status(struct v4l2_subdev *sd)
	286	{
	287	struct adv7343_state *state = to_state(sd);
	288
	289	v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
	290	v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
	291	((state->output == 1) ? "Component" : "S-Video"));
	292	return 0;
	293	}
	294
ceed52d6	295	static int adv7343_s_ctrl(struct v4l2_ctrl *ctrl)
06e61f8d	296	{
ceed52d6	297	struct v4l2_subdev *sd = to_sd(ctrl);
06e61f8d C	298
	299	switch (ctrl->id) {
	300	case V4L2_CID_BRIGHTNESS:
ceed52d6 HV	301	return adv7343_write(sd, ADV7343_SD_BRIGHTNESS_WSS,
ceed52d6 HV	302	ctrl->val);
06e61f8d C	303
06e61f8d C	304	case V4L2_CID_HUE:
ceed52d6	305	return adv7343_write(sd, ADV7343_SD_HUE_REG, ctrl->val);
06e61f8d C	306
06e61f8d C	307	case V4L2_CID_GAIN:
ceed52d6	308	return adv7343_write(sd, ADV7343_DAC2_OUTPUT_LEVEL, ctrl->val);
06e61f8d	309	}
ceed52d6	310	return -EINVAL;
06e61f8d C	311	}
06e61f8d C	312
ceed52d6 HV	313	static const struct v4l2_ctrl_ops adv7343_ctrl_ops = {
	314	.s_ctrl = adv7343_s_ctrl,
	315	};
	316
06e61f8d	317	static const struct v4l2_subdev_core_ops adv7343_core_ops = {
ceed52d6	318	.log_status = adv7343_log_status,
ceed52d6 HV	319	.g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
	320	.try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
	321	.s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
	322	.g_ctrl = v4l2_subdev_g_ctrl,
	323	.s_ctrl = v4l2_subdev_s_ctrl,
	324	.queryctrl = v4l2_subdev_queryctrl,
	325	.querymenu = v4l2_subdev_querymenu,
06e61f8d C	326	};
	327
	328	static int adv7343_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
	329	{
	330	struct adv7343_state *state = to_state(sd);
	331	int err = 0;
	332
	333	if (state->std == std)
	334	return 0;
	335
	336	err = adv7343_setstd(sd, std);
	337	if (!err)
	338	state->std = std;
	339
	340	return err;
	341	}
	342
	343	static int adv7343_s_routing(struct v4l2_subdev *sd,
	344	u32 input, u32 output, u32 config)
	345	{
	346	struct adv7343_state *state = to_state(sd);
	347	int err = 0;
	348
	349	if (state->output == output)
	350	return 0;
	351
	352	err = adv7343_setoutput(sd, output);
	353	if (!err)
	354	state->output = output;
	355
	356	return err;
	357	}
	358
	359	static const struct v4l2_subdev_video_ops adv7343_video_ops = {
	360	.s_std_output = adv7343_s_std_output,
	361	.s_routing = adv7343_s_routing,
	362	};
	363
	364	static const struct v4l2_subdev_ops adv7343_ops = {
	365	.core = &adv7343_core_ops,
	366	.video = &adv7343_video_ops,
	367	};
	368
	369	static int adv7343_initialize(struct v4l2_subdev *sd)
	370	{
	371	struct adv7343_state *state = to_state(sd);
	372	int err = 0;
	373	int i;
	374
	375	for (i = 0; i < ARRAY_SIZE(adv7343_init_reg_val); i += 2) {
	376
	377	err = adv7343_write(sd, adv7343_init_reg_val[i],
	378	adv7343_init_reg_val[i+1]);
	379	if (err) {
	380	v4l2_err(sd, "Error initializing\n");
	381	return err;
	382	}
	383	}
	384
	385	/* Configure for default video standard */
	386	err = adv7343_setoutput(sd, state->output);
	387	if (err < 0) {
	388	v4l2_err(sd, "Error setting output during init\n");
	389	return -EINVAL;
390	}
391
392	err = adv7343_setstd(sd, state->std);
393	if (err < 0) {
394	v4l2_err(sd, "Error setting std during init\n");
395	return -EINVAL;
396	}
397
398	return err;
399	}
400
401	static int adv7343_probe(struct i2c_client *client,
402	const struct i2c_device_id *id)
403	{
404	struct adv7343_state *state;
ceed52d6	405	int err;
06e61f8d C	406
	407	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
	408	return -ENODEV;
	409
	410	v4l_info(client, "chip found @ 0x%x (%s)\n",
	411	client->addr << 1, client->adapter->name);
	412
c7a857a0 LP	413	state = devm_kzalloc(&client->dev, sizeof(struct adv7343_state),
c7a857a0 LP	414	GFP_KERNEL);
06e61f8d C	415	if (state == NULL)
	416	return -ENOMEM;
	417
0b302d88 LP	418	/* Copy board specific information here */
	419	state->pdata = client->dev.platform_data;
	420
06e61f8d C	421	state->reg00 = 0x80;
	422	state->reg01 = 0x00;
	423	state->reg02 = 0x20;
	424	state->reg35 = 0x00;
	425	state->reg80 = ADV7343_SD_MODE_REG1_DEFAULT;
	426	state->reg82 = ADV7343_SD_MODE_REG2_DEFAULT;
	427
	428	state->output = ADV7343_COMPOSITE_ID;
	429	state->std = V4L2_STD_NTSC;
	430
	431	v4l2_i2c_subdev_init(&state->sd, client, &adv7343_ops);
ceed52d6 HV	432
	433	v4l2_ctrl_handler_init(&state->hdl, 2);
	434	v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
	435	V4L2_CID_BRIGHTNESS, ADV7343_BRIGHTNESS_MIN,
	436	ADV7343_BRIGHTNESS_MAX, 1,
	437	ADV7343_BRIGHTNESS_DEF);
	438	v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
	439	V4L2_CID_HUE, ADV7343_HUE_MIN,
	440	ADV7343_HUE_MAX, 1,
	441	ADV7343_HUE_DEF);
	442	v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
	443	V4L2_CID_GAIN, ADV7343_GAIN_MIN,
	444	ADV7343_GAIN_MAX, 1,
	445	ADV7343_GAIN_DEF);
	446	state->sd.ctrl_handler = &state->hdl;
	447	if (state->hdl.error) {
	448	int err = state->hdl.error;
	449
	450	v4l2_ctrl_handler_free(&state->hdl);
ceed52d6 HV	451	return err;
	452	}
	453	v4l2_ctrl_handler_setup(&state->hdl);
	454
	455	err = adv7343_initialize(&state->sd);
c7a857a0	456	if (err)
ceed52d6	457	v4l2_ctrl_handler_free(&state->hdl);
ceed52d6	458	return err;
06e61f8d C	459	}
	460
	461	static int adv7343_remove(struct i2c_client *client)
	462	{
	463	struct v4l2_subdev *sd = i2c_get_clientdata(client);
ceed52d6	464	struct adv7343_state *state = to_state(sd);
06e61f8d C	465
06e61f8d C	466	v4l2_device_unregister_subdev(sd);
ceed52d6	467	v4l2_ctrl_handler_free(&state->hdl);
06e61f8d C	468
	469	return 0;
	470	}
	471
	472	static const struct i2c_device_id adv7343_id[] = {
	473	{"adv7343", 0},
	474	{},
	475	};
	476
	477	MODULE_DEVICE_TABLE(i2c, adv7343_id);
	478
	479	static struct i2c_driver adv7343_driver = {
	480	.driver = {
	481	.owner = THIS_MODULE,
	482	.name = "adv7343",
	483	},
	484	.probe = adv7343_probe,
	485	.remove = adv7343_remove,
	486	.id_table = adv7343_id,
	487	};
	488
c6e8d86f	489	module_i2c_driver(adv7343_driver);