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5a544cce HV |
1 | /* |
2 | * Analog Devices ADV7511 HDMI Transmitter Device Driver | |
3 | * | |
4 | * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved. | |
5 | * | |
6 | * This program is free software; you may redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; version 2 of the License. | |
9 | * | |
10 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
11 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
12 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
13 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
14 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
15 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
16 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
17 | * SOFTWARE. | |
18 | */ | |
19 | ||
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/slab.h> | |
24 | #include <linux/i2c.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/videodev2.h> | |
27 | #include <linux/gpio.h> | |
28 | #include <linux/workqueue.h> | |
1fb69bfd | 29 | #include <linux/hdmi.h> |
5a544cce HV |
30 | #include <linux/v4l2-dv-timings.h> |
31 | #include <media/v4l2-device.h> | |
32 | #include <media/v4l2-common.h> | |
33 | #include <media/v4l2-ctrls.h> | |
34 | #include <media/v4l2-dv-timings.h> | |
35 | #include <media/adv7511.h> | |
36 | ||
37 | static int debug; | |
38 | module_param(debug, int, 0644); | |
39 | MODULE_PARM_DESC(debug, "debug level (0-2)"); | |
40 | ||
41 | MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver"); | |
42 | MODULE_AUTHOR("Hans Verkuil"); | |
43 | MODULE_LICENSE("GPL"); | |
44 | ||
45 | #define MASK_ADV7511_EDID_RDY_INT 0x04 | |
46 | #define MASK_ADV7511_MSEN_INT 0x40 | |
47 | #define MASK_ADV7511_HPD_INT 0x80 | |
48 | ||
49 | #define MASK_ADV7511_HPD_DETECT 0x40 | |
50 | #define MASK_ADV7511_MSEN_DETECT 0x20 | |
51 | #define MASK_ADV7511_EDID_RDY 0x10 | |
52 | ||
53 | #define EDID_MAX_RETRIES (8) | |
54 | #define EDID_DELAY 250 | |
55 | #define EDID_MAX_SEGM 8 | |
56 | ||
57 | #define ADV7511_MAX_WIDTH 1920 | |
58 | #define ADV7511_MAX_HEIGHT 1200 | |
59 | #define ADV7511_MIN_PIXELCLOCK 20000000 | |
60 | #define ADV7511_MAX_PIXELCLOCK 225000000 | |
61 | ||
62 | /* | |
63 | ********************************************************************** | |
64 | * | |
65 | * Arrays with configuration parameters for the ADV7511 | |
66 | * | |
67 | ********************************************************************** | |
68 | */ | |
69 | ||
70 | struct i2c_reg_value { | |
71 | unsigned char reg; | |
72 | unsigned char value; | |
73 | }; | |
74 | ||
75 | struct adv7511_state_edid { | |
76 | /* total number of blocks */ | |
77 | u32 blocks; | |
78 | /* Number of segments read */ | |
79 | u32 segments; | |
80 | uint8_t data[EDID_MAX_SEGM * 256]; | |
81 | /* Number of EDID read retries left */ | |
82 | unsigned read_retries; | |
83 | bool complete; | |
84 | }; | |
85 | ||
86 | struct adv7511_state { | |
87 | struct adv7511_platform_data pdata; | |
88 | struct v4l2_subdev sd; | |
89 | struct media_pad pad; | |
90 | struct v4l2_ctrl_handler hdl; | |
91 | int chip_revision; | |
92 | uint8_t i2c_edid_addr; | |
93 | uint8_t i2c_cec_addr; | |
94 | /* Is the adv7511 powered on? */ | |
95 | bool power_on; | |
96 | /* Did we receive hotplug and rx-sense signals? */ | |
97 | bool have_monitor; | |
98 | /* timings from s_dv_timings */ | |
99 | struct v4l2_dv_timings dv_timings; | |
1fb69bfd HV |
100 | u32 fmt_code; |
101 | u32 colorspace; | |
102 | u32 ycbcr_enc; | |
103 | u32 quantization; | |
5a544cce HV |
104 | /* controls */ |
105 | struct v4l2_ctrl *hdmi_mode_ctrl; | |
106 | struct v4l2_ctrl *hotplug_ctrl; | |
107 | struct v4l2_ctrl *rx_sense_ctrl; | |
108 | struct v4l2_ctrl *have_edid0_ctrl; | |
109 | struct v4l2_ctrl *rgb_quantization_range_ctrl; | |
110 | struct i2c_client *i2c_edid; | |
111 | struct adv7511_state_edid edid; | |
112 | /* Running counter of the number of detected EDIDs (for debugging) */ | |
113 | unsigned edid_detect_counter; | |
114 | struct workqueue_struct *work_queue; | |
115 | struct delayed_work edid_handler; /* work entry */ | |
116 | }; | |
117 | ||
118 | static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd); | |
119 | static bool adv7511_check_edid_status(struct v4l2_subdev *sd); | |
120 | static void adv7511_setup(struct v4l2_subdev *sd); | |
121 | static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq); | |
122 | static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq); | |
123 | ||
124 | ||
125 | static const struct v4l2_dv_timings_cap adv7511_timings_cap = { | |
126 | .type = V4L2_DV_BT_656_1120, | |
aefd4a5a GG |
127 | /* keep this initialization for compatibility with GCC < 4.4.6 */ |
128 | .reserved = { 0 }, | |
129 | V4L2_INIT_BT_TIMINGS(0, ADV7511_MAX_WIDTH, 0, ADV7511_MAX_HEIGHT, | |
130 | ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK, | |
131 | V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | | |
5a544cce | 132 | V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT, |
aefd4a5a GG |
133 | V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING | |
134 | V4L2_DV_BT_CAP_CUSTOM) | |
5a544cce HV |
135 | }; |
136 | ||
137 | static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd) | |
138 | { | |
139 | return container_of(sd, struct adv7511_state, sd); | |
140 | } | |
141 | ||
142 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) | |
143 | { | |
144 | return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd; | |
145 | } | |
146 | ||
147 | /* ------------------------ I2C ----------------------------------------------- */ | |
148 | ||
149 | static s32 adv_smbus_read_byte_data_check(struct i2c_client *client, | |
150 | u8 command, bool check) | |
151 | { | |
152 | union i2c_smbus_data data; | |
153 | ||
154 | if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags, | |
155 | I2C_SMBUS_READ, command, | |
156 | I2C_SMBUS_BYTE_DATA, &data)) | |
157 | return data.byte; | |
158 | if (check) | |
159 | v4l_err(client, "error reading %02x, %02x\n", | |
160 | client->addr, command); | |
161 | return -1; | |
162 | } | |
163 | ||
164 | static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command) | |
165 | { | |
166 | int i; | |
167 | for (i = 0; i < 3; i++) { | |
168 | int ret = adv_smbus_read_byte_data_check(client, command, true); | |
169 | if (ret >= 0) { | |
170 | if (i) | |
171 | v4l_err(client, "read ok after %d retries\n", i); | |
172 | return ret; | |
173 | } | |
174 | } | |
175 | v4l_err(client, "read failed\n"); | |
176 | return -1; | |
177 | } | |
178 | ||
179 | static int adv7511_rd(struct v4l2_subdev *sd, u8 reg) | |
180 | { | |
181 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
182 | ||
183 | return adv_smbus_read_byte_data(client, reg); | |
184 | } | |
185 | ||
186 | static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val) | |
187 | { | |
188 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
189 | int ret; | |
190 | int i; | |
191 | ||
192 | for (i = 0; i < 3; i++) { | |
193 | ret = i2c_smbus_write_byte_data(client, reg, val); | |
194 | if (ret == 0) | |
195 | return 0; | |
196 | } | |
197 | v4l2_err(sd, "%s: i2c write error\n", __func__); | |
198 | return ret; | |
199 | } | |
200 | ||
201 | /* To set specific bits in the register, a clear-mask is given (to be AND-ed), | |
202 | and then the value-mask (to be OR-ed). */ | |
203 | static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, uint8_t clr_mask, uint8_t val_mask) | |
204 | { | |
205 | adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask); | |
206 | } | |
207 | ||
208 | static int adv_smbus_read_i2c_block_data(struct i2c_client *client, | |
209 | u8 command, unsigned length, u8 *values) | |
210 | { | |
211 | union i2c_smbus_data data; | |
212 | int ret; | |
213 | ||
214 | if (length > I2C_SMBUS_BLOCK_MAX) | |
215 | length = I2C_SMBUS_BLOCK_MAX; | |
216 | data.block[0] = length; | |
217 | ||
218 | ret = i2c_smbus_xfer(client->adapter, client->addr, client->flags, | |
219 | I2C_SMBUS_READ, command, | |
220 | I2C_SMBUS_I2C_BLOCK_DATA, &data); | |
221 | memcpy(values, data.block + 1, length); | |
222 | return ret; | |
223 | } | |
224 | ||
225 | static inline void adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf) | |
226 | { | |
227 | struct adv7511_state *state = get_adv7511_state(sd); | |
228 | int i; | |
229 | int err = 0; | |
230 | ||
231 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
232 | ||
233 | for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX) | |
234 | err = adv_smbus_read_i2c_block_data(state->i2c_edid, i, | |
235 | I2C_SMBUS_BLOCK_MAX, buf + i); | |
236 | if (err) | |
237 | v4l2_err(sd, "%s: i2c read error\n", __func__); | |
238 | } | |
239 | ||
240 | static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd) | |
241 | { | |
242 | return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT; | |
243 | } | |
244 | ||
245 | static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd) | |
246 | { | |
247 | return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT; | |
248 | } | |
249 | ||
250 | static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, uint8_t mode) | |
251 | { | |
252 | adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5); | |
253 | } | |
254 | ||
255 | static void adv7511_csc_coeff(struct v4l2_subdev *sd, | |
256 | u16 A1, u16 A2, u16 A3, u16 A4, | |
257 | u16 B1, u16 B2, u16 B3, u16 B4, | |
258 | u16 C1, u16 C2, u16 C3, u16 C4) | |
259 | { | |
260 | /* A */ | |
261 | adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8); | |
262 | adv7511_wr(sd, 0x19, A1); | |
263 | adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8); | |
264 | adv7511_wr(sd, 0x1B, A2); | |
265 | adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8); | |
266 | adv7511_wr(sd, 0x1d, A3); | |
267 | adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8); | |
268 | adv7511_wr(sd, 0x1f, A4); | |
269 | ||
270 | /* B */ | |
271 | adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8); | |
272 | adv7511_wr(sd, 0x21, B1); | |
273 | adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8); | |
274 | adv7511_wr(sd, 0x23, B2); | |
275 | adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8); | |
276 | adv7511_wr(sd, 0x25, B3); | |
277 | adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8); | |
278 | adv7511_wr(sd, 0x27, B4); | |
279 | ||
280 | /* C */ | |
281 | adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8); | |
282 | adv7511_wr(sd, 0x29, C1); | |
283 | adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8); | |
284 | adv7511_wr(sd, 0x2B, C2); | |
285 | adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8); | |
286 | adv7511_wr(sd, 0x2D, C3); | |
287 | adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8); | |
288 | adv7511_wr(sd, 0x2F, C4); | |
289 | } | |
290 | ||
291 | static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable) | |
292 | { | |
293 | if (enable) { | |
294 | uint8_t csc_mode = 0; | |
295 | adv7511_csc_conversion_mode(sd, csc_mode); | |
296 | adv7511_csc_coeff(sd, | |
297 | 4096-564, 0, 0, 256, | |
298 | 0, 4096-564, 0, 256, | |
299 | 0, 0, 4096-564, 256); | |
300 | /* enable CSC */ | |
301 | adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80); | |
302 | /* AVI infoframe: Limited range RGB (16-235) */ | |
303 | adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04); | |
304 | } else { | |
305 | /* disable CSC */ | |
306 | adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0); | |
307 | /* AVI infoframe: Full range RGB (0-255) */ | |
308 | adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08); | |
309 | } | |
310 | } | |
311 | ||
312 | static void adv7511_set_IT_content_AVI_InfoFrame(struct v4l2_subdev *sd) | |
313 | { | |
314 | struct adv7511_state *state = get_adv7511_state(sd); | |
680fee04 HV |
315 | if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { |
316 | /* CE format, not IT */ | |
5a544cce HV |
317 | adv7511_wr_and_or(sd, 0x57, 0x7f, 0x00); |
318 | } else { | |
319 | /* IT format */ | |
320 | adv7511_wr_and_or(sd, 0x57, 0x7f, 0x80); | |
321 | } | |
322 | } | |
323 | ||
324 | static int adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl) | |
325 | { | |
326 | switch (ctrl->val) { | |
327 | default: | |
328 | return -EINVAL; | |
329 | break; | |
330 | case V4L2_DV_RGB_RANGE_AUTO: { | |
331 | /* automatic */ | |
332 | struct adv7511_state *state = get_adv7511_state(sd); | |
333 | ||
680fee04 HV |
334 | if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) { |
335 | /* CE format, RGB limited range (16-235) */ | |
5a544cce HV |
336 | adv7511_csc_rgb_full2limit(sd, true); |
337 | } else { | |
680fee04 | 338 | /* not CE format, RGB full range (0-255) */ |
5a544cce HV |
339 | adv7511_csc_rgb_full2limit(sd, false); |
340 | } | |
341 | } | |
342 | break; | |
343 | case V4L2_DV_RGB_RANGE_LIMITED: | |
344 | /* RGB limited range (16-235) */ | |
345 | adv7511_csc_rgb_full2limit(sd, true); | |
346 | break; | |
347 | case V4L2_DV_RGB_RANGE_FULL: | |
348 | /* RGB full range (0-255) */ | |
349 | adv7511_csc_rgb_full2limit(sd, false); | |
350 | break; | |
351 | } | |
352 | return 0; | |
353 | } | |
354 | ||
355 | /* ------------------------------ CTRL OPS ------------------------------ */ | |
356 | ||
357 | static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl) | |
358 | { | |
359 | struct v4l2_subdev *sd = to_sd(ctrl); | |
360 | struct adv7511_state *state = get_adv7511_state(sd); | |
361 | ||
362 | v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val); | |
363 | ||
364 | if (state->hdmi_mode_ctrl == ctrl) { | |
365 | /* Set HDMI or DVI-D */ | |
366 | adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00); | |
367 | return 0; | |
368 | } | |
369 | if (state->rgb_quantization_range_ctrl == ctrl) | |
370 | return adv7511_set_rgb_quantization_mode(sd, ctrl); | |
371 | ||
372 | return -EINVAL; | |
373 | } | |
374 | ||
375 | static const struct v4l2_ctrl_ops adv7511_ctrl_ops = { | |
376 | .s_ctrl = adv7511_s_ctrl, | |
377 | }; | |
378 | ||
379 | /* ---------------------------- CORE OPS ------------------------------------------- */ | |
380 | ||
381 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
382 | static void adv7511_inv_register(struct v4l2_subdev *sd) | |
383 | { | |
384 | v4l2_info(sd, "0x000-0x0ff: Main Map\n"); | |
385 | } | |
386 | ||
387 | static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) | |
388 | { | |
389 | reg->size = 1; | |
390 | switch (reg->reg >> 8) { | |
391 | case 0: | |
392 | reg->val = adv7511_rd(sd, reg->reg & 0xff); | |
393 | break; | |
394 | default: | |
395 | v4l2_info(sd, "Register %03llx not supported\n", reg->reg); | |
396 | adv7511_inv_register(sd); | |
397 | break; | |
398 | } | |
399 | return 0; | |
400 | } | |
401 | ||
402 | static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) | |
403 | { | |
404 | switch (reg->reg >> 8) { | |
405 | case 0: | |
406 | adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff); | |
407 | break; | |
408 | default: | |
409 | v4l2_info(sd, "Register %03llx not supported\n", reg->reg); | |
410 | adv7511_inv_register(sd); | |
411 | break; | |
412 | } | |
413 | return 0; | |
414 | } | |
415 | #endif | |
416 | ||
417 | static int adv7511_log_status(struct v4l2_subdev *sd) | |
418 | { | |
419 | struct adv7511_state *state = get_adv7511_state(sd); | |
420 | struct adv7511_state_edid *edid = &state->edid; | |
421 | ||
422 | static const char * const states[] = { | |
423 | "in reset", | |
424 | "reading EDID", | |
425 | "idle", | |
426 | "initializing HDCP", | |
427 | "HDCP enabled", | |
428 | "initializing HDCP repeater", | |
429 | "6", "7", "8", "9", "A", "B", "C", "D", "E", "F" | |
430 | }; | |
431 | static const char * const errors[] = { | |
432 | "no error", | |
433 | "bad receiver BKSV", | |
434 | "Ri mismatch", | |
435 | "Pj mismatch", | |
436 | "i2c error", | |
437 | "timed out", | |
438 | "max repeater cascade exceeded", | |
439 | "hash check failed", | |
440 | "too many devices", | |
441 | "9", "A", "B", "C", "D", "E", "F" | |
442 | }; | |
443 | ||
444 | v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off"); | |
445 | v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n", | |
446 | (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no", | |
447 | (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no", | |
448 | edid->segments ? "found" : "no", | |
449 | edid->blocks); | |
450 | v4l2_info(sd, "%s output %s\n", | |
451 | (adv7511_rd(sd, 0xaf) & 0x02) ? | |
452 | "HDMI" : "DVI-D", | |
453 | (adv7511_rd(sd, 0xa1) & 0x3c) ? | |
454 | "disabled" : "enabled"); | |
455 | v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n", | |
456 | states[adv7511_rd(sd, 0xc8) & 0xf], | |
457 | errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter, | |
458 | adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96)); | |
459 | v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full"); | |
3ecabed1 MB |
460 | if (adv7511_rd(sd, 0xaf) & 0x02) { |
461 | /* HDMI only */ | |
462 | u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80; | |
463 | u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 | | |
464 | adv7511_rd(sd, 0x02) << 8 | | |
465 | adv7511_rd(sd, 0x03); | |
466 | u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2; | |
467 | u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f; | |
468 | u32 CTS; | |
469 | ||
470 | if (manual_cts) | |
471 | CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 | | |
472 | adv7511_rd(sd, 0x08) << 8 | | |
473 | adv7511_rd(sd, 0x09); | |
474 | else | |
475 | CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 | | |
476 | adv7511_rd(sd, 0x05) << 8 | | |
477 | adv7511_rd(sd, 0x06); | |
478 | v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n", | |
479 | manual_cts ? "manual" : "automatic", N, CTS); | |
480 | v4l2_info(sd, "VIC: detected %d, sent %d\n", | |
481 | vic_detect, vic_sent); | |
482 | } | |
5a544cce HV |
483 | if (state->dv_timings.type == V4L2_DV_BT_656_1120) |
484 | v4l2_print_dv_timings(sd->name, "timings: ", | |
485 | &state->dv_timings, false); | |
486 | else | |
487 | v4l2_info(sd, "no timings set\n"); | |
488 | v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr); | |
489 | v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr); | |
490 | return 0; | |
491 | } | |
492 | ||
493 | /* Power up/down adv7511 */ | |
494 | static int adv7511_s_power(struct v4l2_subdev *sd, int on) | |
495 | { | |
496 | struct adv7511_state *state = get_adv7511_state(sd); | |
497 | const int retries = 20; | |
498 | int i; | |
499 | ||
500 | v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off"); | |
501 | ||
502 | state->power_on = on; | |
503 | ||
504 | if (!on) { | |
505 | /* Power down */ | |
506 | adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40); | |
507 | return true; | |
508 | } | |
509 | ||
510 | /* Power up */ | |
511 | /* The adv7511 does not always come up immediately. | |
512 | Retry multiple times. */ | |
513 | for (i = 0; i < retries; i++) { | |
514 | adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0); | |
515 | if ((adv7511_rd(sd, 0x41) & 0x40) == 0) | |
516 | break; | |
517 | adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40); | |
518 | msleep(10); | |
519 | } | |
520 | if (i == retries) { | |
521 | v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__); | |
522 | adv7511_s_power(sd, 0); | |
523 | return false; | |
524 | } | |
525 | if (i > 1) | |
526 | v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i); | |
527 | ||
528 | /* Reserved registers that must be set */ | |
529 | adv7511_wr(sd, 0x98, 0x03); | |
530 | adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70); | |
531 | adv7511_wr(sd, 0x9c, 0x30); | |
532 | adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01); | |
533 | adv7511_wr(sd, 0xa2, 0xa4); | |
534 | adv7511_wr(sd, 0xa3, 0xa4); | |
535 | adv7511_wr(sd, 0xe0, 0xd0); | |
536 | adv7511_wr(sd, 0xf9, 0x00); | |
537 | ||
538 | adv7511_wr(sd, 0x43, state->i2c_edid_addr); | |
539 | ||
540 | /* Set number of attempts to read the EDID */ | |
541 | adv7511_wr(sd, 0xc9, 0xf); | |
542 | return true; | |
543 | } | |
544 | ||
545 | /* Enable interrupts */ | |
546 | static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable) | |
547 | { | |
548 | uint8_t irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT; | |
549 | uint8_t irqs_rd; | |
550 | int retries = 100; | |
551 | ||
552 | v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable"); | |
553 | ||
554 | /* The datasheet says that the EDID ready interrupt should be | |
555 | disabled if there is no hotplug. */ | |
556 | if (!enable) | |
557 | irqs = 0; | |
558 | else if (adv7511_have_hotplug(sd)) | |
559 | irqs |= MASK_ADV7511_EDID_RDY_INT; | |
560 | ||
561 | /* | |
562 | * This i2c write can fail (approx. 1 in 1000 writes). But it | |
563 | * is essential that this register is correct, so retry it | |
564 | * multiple times. | |
565 | * | |
566 | * Note that the i2c write does not report an error, but the readback | |
567 | * clearly shows the wrong value. | |
568 | */ | |
569 | do { | |
570 | adv7511_wr(sd, 0x94, irqs); | |
571 | irqs_rd = adv7511_rd(sd, 0x94); | |
572 | } while (retries-- && irqs_rd != irqs); | |
573 | ||
574 | if (irqs_rd == irqs) | |
575 | return; | |
576 | v4l2_err(sd, "Could not set interrupts: hw failure?\n"); | |
577 | } | |
578 | ||
579 | /* Interrupt handler */ | |
580 | static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled) | |
581 | { | |
582 | uint8_t irq_status; | |
583 | ||
584 | /* disable interrupts to prevent a race condition */ | |
585 | adv7511_set_isr(sd, false); | |
586 | irq_status = adv7511_rd(sd, 0x96); | |
587 | /* clear detected interrupts */ | |
588 | adv7511_wr(sd, 0x96, irq_status); | |
589 | ||
590 | v4l2_dbg(1, debug, sd, "%s: irq 0x%x\n", __func__, irq_status); | |
591 | ||
592 | if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT)) | |
593 | adv7511_check_monitor_present_status(sd); | |
594 | if (irq_status & MASK_ADV7511_EDID_RDY_INT) | |
595 | adv7511_check_edid_status(sd); | |
596 | ||
597 | /* enable interrupts */ | |
598 | adv7511_set_isr(sd, true); | |
599 | ||
600 | if (handled) | |
601 | *handled = true; | |
602 | return 0; | |
603 | } | |
604 | ||
5a544cce HV |
605 | static const struct v4l2_subdev_core_ops adv7511_core_ops = { |
606 | .log_status = adv7511_log_status, | |
607 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
608 | .g_register = adv7511_g_register, | |
609 | .s_register = adv7511_s_register, | |
610 | #endif | |
611 | .s_power = adv7511_s_power, | |
612 | .interrupt_service_routine = adv7511_isr, | |
613 | }; | |
614 | ||
615 | /* ------------------------------ VIDEO OPS ------------------------------ */ | |
616 | ||
617 | /* Enable/disable adv7511 output */ | |
618 | static int adv7511_s_stream(struct v4l2_subdev *sd, int enable) | |
619 | { | |
620 | struct adv7511_state *state = get_adv7511_state(sd); | |
621 | ||
622 | v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis")); | |
623 | adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c)); | |
624 | if (enable) { | |
625 | adv7511_check_monitor_present_status(sd); | |
626 | } else { | |
627 | adv7511_s_power(sd, 0); | |
628 | state->have_monitor = false; | |
629 | } | |
630 | return 0; | |
631 | } | |
632 | ||
633 | static int adv7511_s_dv_timings(struct v4l2_subdev *sd, | |
634 | struct v4l2_dv_timings *timings) | |
635 | { | |
636 | struct adv7511_state *state = get_adv7511_state(sd); | |
637 | ||
638 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
639 | ||
640 | /* quick sanity check */ | |
641 | if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL)) | |
642 | return -EINVAL; | |
643 | ||
644 | /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings | |
645 | if the format is one of the CEA or DMT timings. */ | |
646 | v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL); | |
647 | ||
648 | timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS; | |
649 | ||
650 | /* save timings */ | |
651 | state->dv_timings = *timings; | |
652 | ||
653 | /* update quantization range based on new dv_timings */ | |
654 | adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl); | |
655 | ||
656 | /* update AVI infoframe */ | |
657 | adv7511_set_IT_content_AVI_InfoFrame(sd); | |
658 | ||
659 | return 0; | |
660 | } | |
661 | ||
662 | static int adv7511_g_dv_timings(struct v4l2_subdev *sd, | |
663 | struct v4l2_dv_timings *timings) | |
664 | { | |
665 | struct adv7511_state *state = get_adv7511_state(sd); | |
666 | ||
667 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
668 | ||
669 | if (!timings) | |
670 | return -EINVAL; | |
671 | ||
672 | *timings = state->dv_timings; | |
673 | ||
674 | return 0; | |
675 | } | |
676 | ||
677 | static int adv7511_enum_dv_timings(struct v4l2_subdev *sd, | |
678 | struct v4l2_enum_dv_timings *timings) | |
679 | { | |
9646171f LP |
680 | if (timings->pad != 0) |
681 | return -EINVAL; | |
682 | ||
5a544cce HV |
683 | return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL); |
684 | } | |
685 | ||
686 | static int adv7511_dv_timings_cap(struct v4l2_subdev *sd, | |
687 | struct v4l2_dv_timings_cap *cap) | |
688 | { | |
9646171f LP |
689 | if (cap->pad != 0) |
690 | return -EINVAL; | |
691 | ||
5a544cce HV |
692 | *cap = adv7511_timings_cap; |
693 | return 0; | |
694 | } | |
695 | ||
696 | static const struct v4l2_subdev_video_ops adv7511_video_ops = { | |
697 | .s_stream = adv7511_s_stream, | |
698 | .s_dv_timings = adv7511_s_dv_timings, | |
699 | .g_dv_timings = adv7511_g_dv_timings, | |
5a544cce HV |
700 | }; |
701 | ||
702 | /* ------------------------------ AUDIO OPS ------------------------------ */ | |
703 | static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable) | |
704 | { | |
705 | v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis")); | |
706 | ||
707 | if (enable) | |
708 | adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80); | |
709 | else | |
710 | adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40); | |
711 | ||
712 | return 0; | |
713 | } | |
714 | ||
715 | static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq) | |
716 | { | |
717 | u32 N; | |
718 | ||
719 | switch (freq) { | |
720 | case 32000: N = 4096; break; | |
721 | case 44100: N = 6272; break; | |
722 | case 48000: N = 6144; break; | |
723 | case 88200: N = 12544; break; | |
724 | case 96000: N = 12288; break; | |
725 | case 176400: N = 25088; break; | |
726 | case 192000: N = 24576; break; | |
727 | default: | |
728 | return -EINVAL; | |
729 | } | |
730 | ||
731 | /* Set N (used with CTS to regenerate the audio clock) */ | |
732 | adv7511_wr(sd, 0x01, (N >> 16) & 0xf); | |
733 | adv7511_wr(sd, 0x02, (N >> 8) & 0xff); | |
734 | adv7511_wr(sd, 0x03, N & 0xff); | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
739 | static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq) | |
740 | { | |
741 | u32 i2s_sf; | |
742 | ||
743 | switch (freq) { | |
744 | case 32000: i2s_sf = 0x30; break; | |
745 | case 44100: i2s_sf = 0x00; break; | |
746 | case 48000: i2s_sf = 0x20; break; | |
747 | case 88200: i2s_sf = 0x80; break; | |
748 | case 96000: i2s_sf = 0xa0; break; | |
749 | case 176400: i2s_sf = 0xc0; break; | |
750 | case 192000: i2s_sf = 0xe0; break; | |
751 | default: | |
752 | return -EINVAL; | |
753 | } | |
754 | ||
755 | /* Set sampling frequency for I2S audio to 48 kHz */ | |
756 | adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf); | |
757 | ||
758 | return 0; | |
759 | } | |
760 | ||
761 | static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config) | |
762 | { | |
763 | /* Only 2 channels in use for application */ | |
764 | adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1); | |
765 | /* Speaker mapping */ | |
766 | adv7511_wr(sd, 0x76, 0x00); | |
767 | ||
768 | /* 16 bit audio word length */ | |
769 | adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02); | |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
774 | static const struct v4l2_subdev_audio_ops adv7511_audio_ops = { | |
775 | .s_stream = adv7511_s_audio_stream, | |
776 | .s_clock_freq = adv7511_s_clock_freq, | |
777 | .s_i2s_clock_freq = adv7511_s_i2s_clock_freq, | |
778 | .s_routing = adv7511_s_routing, | |
779 | }; | |
780 | ||
9646171f LP |
781 | /* ---------------------------- PAD OPS ------------------------------------- */ |
782 | ||
783 | static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid) | |
784 | { | |
785 | struct adv7511_state *state = get_adv7511_state(sd); | |
786 | ||
c81285ae HV |
787 | memset(edid->reserved, 0, sizeof(edid->reserved)); |
788 | ||
9646171f LP |
789 | if (edid->pad != 0) |
790 | return -EINVAL; | |
c81285ae HV |
791 | |
792 | if (edid->start_block == 0 && edid->blocks == 0) { | |
793 | edid->blocks = state->edid.segments * 2; | |
794 | return 0; | |
9646171f | 795 | } |
c81285ae HV |
796 | |
797 | if (state->edid.segments == 0) | |
798 | return -ENODATA; | |
799 | ||
9646171f | 800 | if (edid->start_block >= state->edid.segments * 2) |
c81285ae HV |
801 | return -EINVAL; |
802 | ||
803 | if (edid->start_block + edid->blocks > state->edid.segments * 2) | |
9646171f LP |
804 | edid->blocks = state->edid.segments * 2 - edid->start_block; |
805 | ||
806 | memcpy(edid->edid, &state->edid.data[edid->start_block * 128], | |
807 | 128 * edid->blocks); | |
c81285ae | 808 | |
9646171f LP |
809 | return 0; |
810 | } | |
811 | ||
1fb69bfd | 812 | static int adv7511_enum_mbus_code(struct v4l2_subdev *sd, |
f7234138 | 813 | struct v4l2_subdev_pad_config *cfg, |
1fb69bfd HV |
814 | struct v4l2_subdev_mbus_code_enum *code) |
815 | { | |
816 | if (code->pad != 0) | |
817 | return -EINVAL; | |
818 | ||
819 | switch (code->index) { | |
820 | case 0: | |
821 | code->code = MEDIA_BUS_FMT_RGB888_1X24; | |
822 | break; | |
823 | case 1: | |
824 | code->code = MEDIA_BUS_FMT_YUYV8_1X16; | |
825 | break; | |
826 | case 2: | |
827 | code->code = MEDIA_BUS_FMT_UYVY8_1X16; | |
828 | break; | |
829 | default: | |
830 | return -EINVAL; | |
831 | } | |
832 | return 0; | |
833 | } | |
834 | ||
835 | static void adv7511_fill_format(struct adv7511_state *state, | |
836 | struct v4l2_mbus_framefmt *format) | |
837 | { | |
838 | memset(format, 0, sizeof(*format)); | |
839 | ||
840 | format->width = state->dv_timings.bt.width; | |
841 | format->height = state->dv_timings.bt.height; | |
842 | format->field = V4L2_FIELD_NONE; | |
843 | } | |
844 | ||
f7234138 HV |
845 | static int adv7511_get_fmt(struct v4l2_subdev *sd, |
846 | struct v4l2_subdev_pad_config *cfg, | |
847 | struct v4l2_subdev_format *format) | |
1fb69bfd HV |
848 | { |
849 | struct adv7511_state *state = get_adv7511_state(sd); | |
850 | ||
851 | if (format->pad != 0) | |
852 | return -EINVAL; | |
853 | ||
854 | adv7511_fill_format(state, &format->format); | |
855 | ||
856 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | |
857 | struct v4l2_mbus_framefmt *fmt; | |
858 | ||
f7234138 | 859 | fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad); |
1fb69bfd HV |
860 | format->format.code = fmt->code; |
861 | format->format.colorspace = fmt->colorspace; | |
862 | format->format.ycbcr_enc = fmt->ycbcr_enc; | |
863 | format->format.quantization = fmt->quantization; | |
864 | } else { | |
865 | format->format.code = state->fmt_code; | |
866 | format->format.colorspace = state->colorspace; | |
867 | format->format.ycbcr_enc = state->ycbcr_enc; | |
868 | format->format.quantization = state->quantization; | |
869 | } | |
870 | ||
871 | return 0; | |
872 | } | |
873 | ||
f7234138 HV |
874 | static int adv7511_set_fmt(struct v4l2_subdev *sd, |
875 | struct v4l2_subdev_pad_config *cfg, | |
876 | struct v4l2_subdev_format *format) | |
1fb69bfd HV |
877 | { |
878 | struct adv7511_state *state = get_adv7511_state(sd); | |
879 | /* | |
880 | * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary | |
881 | * Video Information (AVI) InfoFrame Format" | |
882 | * | |
883 | * c = Colorimetry | |
884 | * ec = Extended Colorimetry | |
885 | * y = RGB or YCbCr | |
886 | * q = RGB Quantization Range | |
887 | * yq = YCC Quantization Range | |
888 | */ | |
889 | u8 c = HDMI_COLORIMETRY_NONE; | |
890 | u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; | |
891 | u8 y = HDMI_COLORSPACE_RGB; | |
892 | u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT; | |
893 | u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED; | |
894 | ||
895 | if (format->pad != 0) | |
896 | return -EINVAL; | |
897 | switch (format->format.code) { | |
898 | case MEDIA_BUS_FMT_UYVY8_1X16: | |
899 | case MEDIA_BUS_FMT_YUYV8_1X16: | |
900 | case MEDIA_BUS_FMT_RGB888_1X24: | |
901 | break; | |
902 | default: | |
903 | return -EINVAL; | |
904 | } | |
905 | ||
906 | adv7511_fill_format(state, &format->format); | |
907 | if (format->which == V4L2_SUBDEV_FORMAT_TRY) { | |
908 | struct v4l2_mbus_framefmt *fmt; | |
909 | ||
f7234138 | 910 | fmt = v4l2_subdev_get_try_format(sd, cfg, format->pad); |
1fb69bfd HV |
911 | fmt->code = format->format.code; |
912 | fmt->colorspace = format->format.colorspace; | |
913 | fmt->ycbcr_enc = format->format.ycbcr_enc; | |
914 | fmt->quantization = format->format.quantization; | |
915 | return 0; | |
916 | } | |
917 | ||
918 | switch (format->format.code) { | |
919 | case MEDIA_BUS_FMT_UYVY8_1X16: | |
920 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01); | |
921 | adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8); | |
922 | y = HDMI_COLORSPACE_YUV422; | |
923 | break; | |
924 | case MEDIA_BUS_FMT_YUYV8_1X16: | |
925 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01); | |
926 | adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc); | |
927 | y = HDMI_COLORSPACE_YUV422; | |
928 | break; | |
929 | case MEDIA_BUS_FMT_RGB888_1X24: | |
930 | default: | |
931 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00); | |
932 | adv7511_wr_and_or(sd, 0x16, 0x03, 0x00); | |
933 | break; | |
934 | } | |
935 | state->fmt_code = format->format.code; | |
936 | state->colorspace = format->format.colorspace; | |
937 | state->ycbcr_enc = format->format.ycbcr_enc; | |
938 | state->quantization = format->format.quantization; | |
939 | ||
940 | switch (format->format.colorspace) { | |
941 | case V4L2_COLORSPACE_ADOBERGB: | |
942 | c = HDMI_COLORIMETRY_EXTENDED; | |
943 | ec = y ? HDMI_EXTENDED_COLORIMETRY_ADOBE_YCC_601 : | |
944 | HDMI_EXTENDED_COLORIMETRY_ADOBE_RGB; | |
945 | break; | |
946 | case V4L2_COLORSPACE_SMPTE170M: | |
947 | c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE; | |
948 | if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) { | |
949 | c = HDMI_COLORIMETRY_EXTENDED; | |
950 | ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; | |
951 | } | |
952 | break; | |
953 | case V4L2_COLORSPACE_REC709: | |
954 | c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE; | |
955 | if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) { | |
956 | c = HDMI_COLORIMETRY_EXTENDED; | |
957 | ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709; | |
958 | } | |
959 | break; | |
960 | case V4L2_COLORSPACE_SRGB: | |
961 | c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE; | |
962 | ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 : | |
963 | HDMI_EXTENDED_COLORIMETRY_XV_YCC_601; | |
964 | break; | |
965 | case V4L2_COLORSPACE_BT2020: | |
966 | c = HDMI_COLORIMETRY_EXTENDED; | |
967 | if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM) | |
968 | ec = 5; /* Not yet available in hdmi.h */ | |
969 | else | |
970 | ec = 6; /* Not yet available in hdmi.h */ | |
971 | break; | |
972 | default: | |
973 | break; | |
974 | } | |
975 | ||
976 | /* | |
977 | * CEA-861-F says that for RGB formats the YCC range must match the | |
978 | * RGB range, although sources should ignore the YCC range. | |
979 | * | |
980 | * The RGB quantization range shouldn't be non-zero if the EDID doesn't | |
981 | * have the Q bit set in the Video Capabilities Data Block, however this | |
982 | * isn't checked at the moment. The assumption is that the application | |
983 | * knows the EDID and can detect this. | |
984 | * | |
985 | * The same is true for the YCC quantization range: non-standard YCC | |
986 | * quantization ranges should only be sent if the EDID has the YQ bit | |
987 | * set in the Video Capabilities Data Block. | |
988 | */ | |
989 | switch (format->format.quantization) { | |
990 | case V4L2_QUANTIZATION_FULL_RANGE: | |
991 | q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT : | |
992 | HDMI_QUANTIZATION_RANGE_FULL; | |
993 | yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL; | |
994 | break; | |
995 | case V4L2_QUANTIZATION_LIM_RANGE: | |
996 | q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT : | |
997 | HDMI_QUANTIZATION_RANGE_LIMITED; | |
998 | yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED; | |
999 | break; | |
1000 | } | |
1001 | ||
1002 | adv7511_wr_and_or(sd, 0x4a, 0xbf, 0); | |
1003 | adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5); | |
1004 | adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6); | |
1005 | adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2)); | |
1006 | adv7511_wr_and_or(sd, 0x59, 0x0f, yq << 4); | |
1007 | adv7511_wr_and_or(sd, 0x4a, 0xff, 1); | |
1008 | ||
1009 | return 0; | |
1010 | } | |
1011 | ||
9646171f LP |
1012 | static const struct v4l2_subdev_pad_ops adv7511_pad_ops = { |
1013 | .get_edid = adv7511_get_edid, | |
1fb69bfd HV |
1014 | .enum_mbus_code = adv7511_enum_mbus_code, |
1015 | .get_fmt = adv7511_get_fmt, | |
1016 | .set_fmt = adv7511_set_fmt, | |
9646171f LP |
1017 | .enum_dv_timings = adv7511_enum_dv_timings, |
1018 | .dv_timings_cap = adv7511_dv_timings_cap, | |
1019 | }; | |
1020 | ||
5a544cce HV |
1021 | /* --------------------- SUBDEV OPS --------------------------------------- */ |
1022 | ||
1023 | static const struct v4l2_subdev_ops adv7511_ops = { | |
1024 | .core = &adv7511_core_ops, | |
1025 | .pad = &adv7511_pad_ops, | |
1026 | .video = &adv7511_video_ops, | |
1027 | .audio = &adv7511_audio_ops, | |
1028 | }; | |
1029 | ||
1030 | /* ----------------------------------------------------------------------- */ | |
1031 | static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, uint8_t *buf) | |
1032 | { | |
1033 | if (debug >= lvl) { | |
1034 | int i, j; | |
1035 | v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment); | |
1036 | for (i = 0; i < 256; i += 16) { | |
1037 | u8 b[128]; | |
1038 | u8 *bp = b; | |
1039 | if (i == 128) | |
1040 | v4l2_dbg(lvl, debug, sd, "\n"); | |
1041 | for (j = i; j < i + 16; j++) { | |
1042 | sprintf(bp, "0x%02x, ", buf[j]); | |
1043 | bp += 6; | |
1044 | } | |
1045 | bp[0] = '\0'; | |
1046 | v4l2_dbg(lvl, debug, sd, "%s\n", b); | |
1047 | } | |
1048 | } | |
1049 | } | |
1050 | ||
1051 | static void adv7511_edid_handler(struct work_struct *work) | |
1052 | { | |
1053 | struct delayed_work *dwork = to_delayed_work(work); | |
1054 | struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler); | |
1055 | struct v4l2_subdev *sd = &state->sd; | |
1056 | struct adv7511_edid_detect ed; | |
1057 | ||
1058 | v4l2_dbg(1, debug, sd, "%s:\n", __func__); | |
1059 | ||
1060 | if (adv7511_check_edid_status(sd)) { | |
1061 | /* Return if we received the EDID. */ | |
1062 | return; | |
1063 | } | |
1064 | ||
1065 | if (adv7511_have_hotplug(sd)) { | |
1066 | /* We must retry reading the EDID several times, it is possible | |
1067 | * that initially the EDID couldn't be read due to i2c errors | |
1068 | * (DVI connectors are particularly prone to this problem). */ | |
1069 | if (state->edid.read_retries) { | |
1070 | state->edid.read_retries--; | |
1071 | v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__); | |
1072 | state->have_monitor = false; | |
1073 | adv7511_s_power(sd, false); | |
1074 | adv7511_s_power(sd, true); | |
1075 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1076 | return; | |
1077 | } | |
1078 | } | |
1079 | ||
1080 | /* We failed to read the EDID, so send an event for this. */ | |
1081 | ed.present = false; | |
1082 | ed.segment = adv7511_rd(sd, 0xc4); | |
1083 | v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed); | |
1084 | v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__); | |
1085 | } | |
1086 | ||
1087 | static void adv7511_audio_setup(struct v4l2_subdev *sd) | |
1088 | { | |
1089 | v4l2_dbg(1, debug, sd, "%s\n", __func__); | |
1090 | ||
1091 | adv7511_s_i2s_clock_freq(sd, 48000); | |
1092 | adv7511_s_clock_freq(sd, 48000); | |
1093 | adv7511_s_routing(sd, 0, 0, 0); | |
1094 | } | |
1095 | ||
1096 | /* Configure hdmi transmitter. */ | |
1097 | static void adv7511_setup(struct v4l2_subdev *sd) | |
1098 | { | |
1099 | struct adv7511_state *state = get_adv7511_state(sd); | |
1100 | v4l2_dbg(1, debug, sd, "%s\n", __func__); | |
1101 | ||
1102 | /* Input format: RGB 4:4:4 */ | |
1103 | adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0); | |
1104 | /* Output format: RGB 4:4:4 */ | |
1105 | adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0); | |
1106 | /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */ | |
1107 | adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06); | |
1108 | /* Disable pixel repetition */ | |
1109 | adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0); | |
1110 | /* Disable CSC */ | |
1111 | adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0); | |
1112 | /* Output format: RGB 4:4:4, Active Format Information is valid, | |
1113 | * underscanned */ | |
1114 | adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12); | |
1115 | /* AVI Info frame packet enable, Audio Info frame disable */ | |
1116 | adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10); | |
1117 | /* Colorimetry, Active format aspect ratio: same as picure. */ | |
1118 | adv7511_wr(sd, 0x56, 0xa8); | |
1119 | /* No encryption */ | |
1120 | adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0); | |
1121 | ||
1122 | /* Positive clk edge capture for input video clock */ | |
1123 | adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60); | |
1124 | ||
1125 | adv7511_audio_setup(sd); | |
1126 | ||
1127 | v4l2_ctrl_handler_setup(&state->hdl); | |
1128 | } | |
1129 | ||
1130 | static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd) | |
1131 | { | |
1132 | struct adv7511_monitor_detect mdt; | |
1133 | struct adv7511_state *state = get_adv7511_state(sd); | |
1134 | ||
1135 | mdt.present = state->have_monitor; | |
1136 | v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt); | |
1137 | } | |
1138 | ||
1139 | static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd) | |
1140 | { | |
1141 | struct adv7511_state *state = get_adv7511_state(sd); | |
1142 | /* read hotplug and rx-sense state */ | |
1143 | uint8_t status = adv7511_rd(sd, 0x42); | |
1144 | ||
1145 | v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n", | |
1146 | __func__, | |
1147 | status, | |
1148 | status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "", | |
1149 | status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : ""); | |
1150 | ||
1151 | /* update read only ctrls */ | |
1152 | v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0); | |
1153 | v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0); | |
1154 | v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, state->edid.segments ? 0x1 : 0x0); | |
1155 | ||
1156 | if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) { | |
1157 | v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__); | |
1158 | if (!state->have_monitor) { | |
1159 | v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__); | |
1160 | state->have_monitor = true; | |
1161 | adv7511_set_isr(sd, true); | |
1162 | if (!adv7511_s_power(sd, true)) { | |
1163 | v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__); | |
1164 | return; | |
1165 | } | |
1166 | adv7511_setup(sd); | |
1167 | adv7511_notify_monitor_detect(sd); | |
1168 | state->edid.read_retries = EDID_MAX_RETRIES; | |
1169 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1170 | } | |
1171 | } else if (status & MASK_ADV7511_HPD_DETECT) { | |
1172 | v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__); | |
1173 | state->edid.read_retries = EDID_MAX_RETRIES; | |
1174 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1175 | } else if (!(status & MASK_ADV7511_HPD_DETECT)) { | |
1176 | v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__); | |
1177 | if (state->have_monitor) { | |
1178 | v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__); | |
1179 | state->have_monitor = false; | |
1180 | adv7511_notify_monitor_detect(sd); | |
1181 | } | |
1182 | adv7511_s_power(sd, false); | |
1183 | memset(&state->edid, 0, sizeof(struct adv7511_state_edid)); | |
1184 | } | |
1185 | } | |
1186 | ||
1187 | static bool edid_block_verify_crc(uint8_t *edid_block) | |
1188 | { | |
5a544cce | 1189 | uint8_t sum = 0; |
928b0fe7 | 1190 | int i; |
5a544cce HV |
1191 | |
1192 | for (i = 0; i < 128; i++) | |
928b0fe7 MB |
1193 | sum += edid_block[i]; |
1194 | return sum == 0; | |
5a544cce HV |
1195 | } |
1196 | ||
928b0fe7 | 1197 | static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment) |
5a544cce HV |
1198 | { |
1199 | struct adv7511_state *state = get_adv7511_state(sd); | |
1200 | u32 blocks = state->edid.blocks; | |
1201 | uint8_t *data = state->edid.data; | |
1202 | ||
928b0fe7 MB |
1203 | if (!edid_block_verify_crc(&data[segment * 256])) |
1204 | return false; | |
1205 | if ((segment + 1) * 2 <= blocks) | |
1206 | return edid_block_verify_crc(&data[segment * 256 + 128]); | |
1207 | return true; | |
1208 | } | |
1209 | ||
1210 | static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment) | |
1211 | { | |
1212 | static const u8 hdmi_header[] = { | |
1213 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 | |
1214 | }; | |
1215 | struct adv7511_state *state = get_adv7511_state(sd); | |
1216 | u8 *data = state->edid.data; | |
1217 | ||
1218 | if (segment != 0) | |
5a544cce | 1219 | return true; |
928b0fe7 | 1220 | return !memcmp(data, hdmi_header, sizeof(hdmi_header)); |
5a544cce HV |
1221 | } |
1222 | ||
1223 | static bool adv7511_check_edid_status(struct v4l2_subdev *sd) | |
1224 | { | |
1225 | struct adv7511_state *state = get_adv7511_state(sd); | |
1226 | uint8_t edidRdy = adv7511_rd(sd, 0xc5); | |
1227 | ||
1228 | v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n", | |
1229 | __func__, EDID_MAX_RETRIES - state->edid.read_retries); | |
1230 | ||
1231 | if (state->edid.complete) | |
1232 | return true; | |
1233 | ||
1234 | if (edidRdy & MASK_ADV7511_EDID_RDY) { | |
1235 | int segment = adv7511_rd(sd, 0xc4); | |
1236 | struct adv7511_edid_detect ed; | |
1237 | ||
1238 | if (segment >= EDID_MAX_SEGM) { | |
1239 | v4l2_err(sd, "edid segment number too big\n"); | |
1240 | return false; | |
1241 | } | |
1242 | v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment); | |
1243 | adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]); | |
1244 | adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]); | |
1245 | if (segment == 0) { | |
1246 | state->edid.blocks = state->edid.data[0x7e] + 1; | |
1247 | v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n", __func__, state->edid.blocks); | |
1248 | } | |
928b0fe7 MB |
1249 | if (!edid_verify_crc(sd, segment) || |
1250 | !edid_verify_header(sd, segment)) { | |
5a544cce | 1251 | /* edid crc error, force reread of edid segment */ |
928b0fe7 | 1252 | v4l2_err(sd, "%s: edid crc or header error\n", __func__); |
5a544cce HV |
1253 | state->have_monitor = false; |
1254 | adv7511_s_power(sd, false); | |
1255 | adv7511_s_power(sd, true); | |
1256 | return false; | |
1257 | } | |
1258 | /* one more segment read ok */ | |
1259 | state->edid.segments = segment + 1; | |
1260 | if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) { | |
1261 | /* Request next EDID segment */ | |
1262 | v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments); | |
1263 | adv7511_wr(sd, 0xc9, 0xf); | |
1264 | adv7511_wr(sd, 0xc4, state->edid.segments); | |
1265 | state->edid.read_retries = EDID_MAX_RETRIES; | |
1266 | queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY); | |
1267 | return false; | |
1268 | } | |
1269 | ||
1270 | v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments); | |
1271 | state->edid.complete = true; | |
1272 | ||
1273 | /* report when we have all segments | |
1274 | but report only for segment 0 | |
1275 | */ | |
1276 | ed.present = true; | |
1277 | ed.segment = 0; | |
1278 | state->edid_detect_counter++; | |
1279 | v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, state->edid.segments ? 0x1 : 0x0); | |
1280 | v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed); | |
1281 | return ed.present; | |
1282 | } | |
1283 | ||
1284 | return false; | |
1285 | } | |
1286 | ||
1287 | /* ----------------------------------------------------------------------- */ | |
1288 | /* Setup ADV7511 */ | |
1289 | static void adv7511_init_setup(struct v4l2_subdev *sd) | |
1290 | { | |
1291 | struct adv7511_state *state = get_adv7511_state(sd); | |
1292 | struct adv7511_state_edid *edid = &state->edid; | |
1293 | ||
1294 | v4l2_dbg(1, debug, sd, "%s\n", __func__); | |
1295 | ||
1296 | /* clear all interrupts */ | |
1297 | adv7511_wr(sd, 0x96, 0xff); | |
a62c6216 MB |
1298 | /* |
1299 | * Stop HPD from resetting a lot of registers. | |
1300 | * It might leave the chip in a partly un-initialized state, | |
1301 | * in particular with regards to hotplug bounces. | |
1302 | */ | |
1303 | adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0); | |
5a544cce HV |
1304 | memset(edid, 0, sizeof(struct adv7511_state_edid)); |
1305 | state->have_monitor = false; | |
1306 | adv7511_set_isr(sd, false); | |
1307 | adv7511_s_stream(sd, false); | |
1308 | adv7511_s_audio_stream(sd, false); | |
1309 | } | |
1310 | ||
1311 | static int adv7511_probe(struct i2c_client *client, const struct i2c_device_id *id) | |
1312 | { | |
1313 | struct adv7511_state *state; | |
1314 | struct adv7511_platform_data *pdata = client->dev.platform_data; | |
1315 | struct v4l2_ctrl_handler *hdl; | |
1316 | struct v4l2_subdev *sd; | |
1317 | u8 chip_id[2]; | |
1318 | int err = -EIO; | |
1319 | ||
1320 | /* Check if the adapter supports the needed features */ | |
1321 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
1322 | return -EIO; | |
1323 | ||
1324 | state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL); | |
1325 | if (!state) | |
1326 | return -ENOMEM; | |
1327 | ||
1328 | /* Platform data */ | |
1329 | if (!pdata) { | |
1330 | v4l_err(client, "No platform data!\n"); | |
1331 | return -ENODEV; | |
1332 | } | |
1333 | memcpy(&state->pdata, pdata, sizeof(state->pdata)); | |
1fb69bfd HV |
1334 | state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24; |
1335 | state->colorspace = V4L2_COLORSPACE_SRGB; | |
5a544cce HV |
1336 | |
1337 | sd = &state->sd; | |
1338 | ||
1339 | v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n", | |
1340 | client->addr << 1); | |
1341 | ||
1342 | v4l2_i2c_subdev_init(sd, client, &adv7511_ops); | |
1343 | ||
1344 | hdl = &state->hdl; | |
1345 | v4l2_ctrl_handler_init(hdl, 10); | |
1346 | /* add in ascending ID order */ | |
1347 | state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, | |
1348 | V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI, | |
1349 | 0, V4L2_DV_TX_MODE_DVI_D); | |
1350 | state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL, | |
1351 | V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0); | |
1352 | state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL, | |
1353 | V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0); | |
1354 | state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL, | |
1355 | V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0); | |
1356 | state->rgb_quantization_range_ctrl = | |
1357 | v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops, | |
1358 | V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL, | |
1359 | 0, V4L2_DV_RGB_RANGE_AUTO); | |
1360 | sd->ctrl_handler = hdl; | |
1361 | if (hdl->error) { | |
1362 | err = hdl->error; | |
1363 | goto err_hdl; | |
1364 | } | |
1365 | state->hdmi_mode_ctrl->is_private = true; | |
1366 | state->hotplug_ctrl->is_private = true; | |
1367 | state->rx_sense_ctrl->is_private = true; | |
1368 | state->have_edid0_ctrl->is_private = true; | |
1369 | state->rgb_quantization_range_ctrl->is_private = true; | |
1370 | ||
1371 | state->pad.flags = MEDIA_PAD_FL_SINK; | |
1372 | err = media_entity_init(&sd->entity, 1, &state->pad, 0); | |
1373 | if (err) | |
1374 | goto err_hdl; | |
1375 | ||
1376 | /* EDID and CEC i2c addr */ | |
1377 | state->i2c_edid_addr = state->pdata.i2c_edid << 1; | |
1378 | state->i2c_cec_addr = state->pdata.i2c_cec << 1; | |
1379 | ||
1380 | state->chip_revision = adv7511_rd(sd, 0x0); | |
1381 | chip_id[0] = adv7511_rd(sd, 0xf5); | |
1382 | chip_id[1] = adv7511_rd(sd, 0xf6); | |
1383 | if (chip_id[0] != 0x75 || chip_id[1] != 0x11) { | |
1384 | v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0], chip_id[1]); | |
1385 | err = -EIO; | |
1386 | goto err_entity; | |
1387 | } | |
1388 | ||
1389 | state->i2c_edid = i2c_new_dummy(client->adapter, state->i2c_edid_addr >> 1); | |
1390 | if (state->i2c_edid == NULL) { | |
1391 | v4l2_err(sd, "failed to register edid i2c client\n"); | |
f527b17a | 1392 | err = -ENOMEM; |
5a544cce HV |
1393 | goto err_entity; |
1394 | } | |
1395 | ||
1396 | adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */ | |
1397 | state->work_queue = create_singlethread_workqueue(sd->name); | |
1398 | if (state->work_queue == NULL) { | |
1399 | v4l2_err(sd, "could not create workqueue\n"); | |
f527b17a | 1400 | err = -ENOMEM; |
5a544cce HV |
1401 | goto err_unreg_cec; |
1402 | } | |
1403 | ||
1404 | INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler); | |
1405 | ||
1406 | adv7511_init_setup(sd); | |
1407 | adv7511_set_isr(sd, true); | |
1408 | adv7511_check_monitor_present_status(sd); | |
1409 | ||
1410 | v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name, | |
1411 | client->addr << 1, client->adapter->name); | |
1412 | return 0; | |
1413 | ||
1414 | err_unreg_cec: | |
1415 | i2c_unregister_device(state->i2c_edid); | |
1416 | err_entity: | |
1417 | media_entity_cleanup(&sd->entity); | |
1418 | err_hdl: | |
1419 | v4l2_ctrl_handler_free(&state->hdl); | |
1420 | return err; | |
1421 | } | |
1422 | ||
1423 | /* ----------------------------------------------------------------------- */ | |
1424 | ||
1425 | static int adv7511_remove(struct i2c_client *client) | |
1426 | { | |
1427 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | |
1428 | struct adv7511_state *state = get_adv7511_state(sd); | |
1429 | ||
1430 | state->chip_revision = -1; | |
1431 | ||
1432 | v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name, | |
1433 | client->addr << 1, client->adapter->name); | |
1434 | ||
1435 | adv7511_init_setup(sd); | |
1436 | cancel_delayed_work(&state->edid_handler); | |
1437 | i2c_unregister_device(state->i2c_edid); | |
1438 | destroy_workqueue(state->work_queue); | |
1439 | v4l2_device_unregister_subdev(sd); | |
1440 | media_entity_cleanup(&sd->entity); | |
1441 | v4l2_ctrl_handler_free(sd->ctrl_handler); | |
1442 | return 0; | |
1443 | } | |
1444 | ||
1445 | /* ----------------------------------------------------------------------- */ | |
1446 | ||
1447 | static struct i2c_device_id adv7511_id[] = { | |
1448 | { "adv7511", 0 }, | |
1449 | { } | |
1450 | }; | |
1451 | MODULE_DEVICE_TABLE(i2c, adv7511_id); | |
1452 | ||
1453 | static struct i2c_driver adv7511_driver = { | |
1454 | .driver = { | |
1455 | .owner = THIS_MODULE, | |
1456 | .name = "adv7511", | |
1457 | }, | |
1458 | .probe = adv7511_probe, | |
1459 | .remove = adv7511_remove, | |
1460 | .id_table = adv7511_id, | |
1461 | }; | |
1462 | ||
1463 | module_i2c_driver(adv7511_driver); |