[deliverable/linux.git] / drivers / media / i2c / smiapp / smiapp-quirk.c

/*
 * drivers/media/i2c/smiapp/smiapp-quirk.c
 *
 * Generic driver for SMIA/SMIA++ compliant camera modules
 *
 * Copyright (C) 2011--2012 Nokia Corporation
 * Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/delay.h>

#include "smiapp.h"

static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val)
{
	return smiapp_write(sensor, (SMIA_REG_8BIT << 16) | reg, val);
}

static int smiapp_write_8s(struct smiapp_sensor *sensor,
			   struct smiapp_reg_8 *regs, int len)
{
	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
	int rval;

	for (; len > 0; len--, regs++) {
		rval = smiapp_write_8(sensor, regs->reg, regs->val);
		if (rval < 0) {
			dev_err(&client->dev,
				"error %d writing reg 0x%4.4x, val 0x%2.2x",
				rval, regs->reg, regs->val);
			return rval;
		}
	}

	return 0;
}

void smiapp_replace_limit(struct smiapp_sensor *sensor,
			  u32 limit, u32 val)
{
	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);

	dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n",
		smiapp_reg_limits[limit].addr,
		smiapp_reg_limits[limit].what, val, val);
	sensor->limits[limit] = val;
}

bool smiapp_quirk_reg(struct smiapp_sensor *sensor,
		      u32 reg, u32 *val)
{
	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
	const struct smia_reg *sreg;

	if (!sensor->minfo.quirk)
		return false;

	sreg = sensor->minfo.quirk->regs;

	if (!sreg)
		return false;

	while (sreg->type) {
		u16 type = reg >> 16;
		u16 reg16 = reg;

		if (sreg->type != type || sreg->reg != reg16) {
			sreg++;
			continue;
		}

		switch ((u8)type) {
		case SMIA_REG_8BIT:
			dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%2.2x\n",
				reg, sreg->val);
			break;
		case SMIA_REG_16BIT:
			dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%4.4x\n",
				reg, sreg->val);
			break;
		case SMIA_REG_32BIT:
			dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%8.8x\n",
				reg, sreg->val);
			break;
		}

		*val = sreg->val;

		return true;
	}

	return false;
}

static int jt8ew9_limits(struct smiapp_sensor *sensor)
{
	if (sensor->minfo.revision_number_major < 0x03)
		sensor->frame_skip = 1;

	/* Below 24 gain doesn't have effect at all, */
	/* but ~59 is needed for full dynamic range */
	smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59);
	smiapp_replace_limit(
		sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000);

	return 0;
}

static int jt8ew9_post_poweron(struct smiapp_sensor *sensor)
{
	struct smiapp_reg_8 regs[] = {
		{ 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */
		{ 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
		{ 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
		{ 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */
		{ 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
		{ 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
		{ 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
		{ 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
		{ 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */
		{ 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
		{ 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
		{ 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
		{ 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
		{ 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
		{ 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
		{ 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
		{ 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
		{ 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
		{ 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */
		{ 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */
		{ 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */
		{ 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
		{ 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
		/* Taken from v03. No idea what the rest are. */
		{ 0x32e0, 0x05 },
		{ 0x32e1, 0x05 },
		{ 0x32e2, 0x04 },
		{ 0x32e5, 0x04 },
		{ 0x32e6, 0x04 },

	};

	return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
}

const struct smiapp_quirk smiapp_jt8ew9_quirk = {
	.limits = jt8ew9_limits,
	.post_poweron = jt8ew9_post_poweron,
};

static int imx125es_post_poweron(struct smiapp_sensor *sensor)
{
	/* Taken from v02. No idea what the other two are. */
	struct smiapp_reg_8 regs[] = {
		/*
		 * 0x3302: clk during frame blanking:
		 * 0x00 - HS mode, 0x01 - LP11
		 */
		{ 0x3302, 0x01 },
		{ 0x302d, 0x00 },
		{ 0x3b08, 0x8c },
	};

	return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
}

const struct smiapp_quirk smiapp_imx125es_quirk = {
	.post_poweron = imx125es_post_poweron,
};

static int jt8ev1_limits(struct smiapp_sensor *sensor)
{
	smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271);
	smiapp_replace_limit(sensor,
			     SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184);

	return 0;
}

static int jt8ev1_post_poweron(struct smiapp_sensor *sensor)
{
	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
	int rval;

	struct smiapp_reg_8 regs[] = {
		{ 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */
		{ 0x30a3, 0xd0 }, /* FLASH STROBE enable */
		{ 0x3237, 0x00 }, /* For control of pulse timing for ADC */
		{ 0x3238, 0x43 },
		{ 0x3301, 0x06 }, /* For analog bias for sensor */
		{ 0x3302, 0x06 },
		{ 0x3304, 0x00 },
		{ 0x3305, 0x88 },
		{ 0x332a, 0x14 },
		{ 0x332c, 0x6b },
		{ 0x3336, 0x01 },
		{ 0x333f, 0x1f },
		{ 0x3355, 0x00 },
		{ 0x3356, 0x20 },
		{ 0x33bf, 0x20 }, /* Adjust the FBC speed */
		{ 0x33c9, 0x20 },
		{ 0x33ce, 0x30 }, /* Adjust the parameter for logic function */
		{ 0x33cf, 0xec }, /* For Black sun */
		{ 0x3328, 0x80 }, /* Ugh. No idea what's this. */
	};

	struct smiapp_reg_8 regs_96[] = {
		{ 0x30ae, 0x00 }, /* For control of ADC clock */
		{ 0x30af, 0xd0 },
		{ 0x30b0, 0x01 },
	};

	rval = smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
	if (rval < 0)
		return rval;

	switch (sensor->platform_data->ext_clk) {
	case 9600000:
		return smiapp_write_8s(sensor, regs_96,
				       ARRAY_SIZE(regs_96));
	default:
		dev_warn(&client->dev, "no MSRs for %d Hz ext_clk\n",
			 sensor->platform_data->ext_clk);
		return 0;
	}
}

static int jt8ev1_pre_streamon(struct smiapp_sensor *sensor)
{
	return smiapp_write_8(sensor, 0x3328, 0x00);
}

static int jt8ev1_post_streamoff(struct smiapp_sensor *sensor)
{
	int rval;

	/* Workaround: allows fast standby to work properly */
	rval = smiapp_write_8(sensor, 0x3205, 0x04);
	if (rval < 0)
		return rval;

	/* Wait for 1 ms + one line => 2 ms is likely enough */
	usleep_range(2000, 2000);

	/* Restore it */
	rval = smiapp_write_8(sensor, 0x3205, 0x00);
	if (rval < 0)
		return rval;

	return smiapp_write_8(sensor, 0x3328, 0x80);
}

const struct smiapp_quirk smiapp_jt8ev1_quirk = {
	.limits = jt8ev1_limits,
	.post_poweron = jt8ev1_post_poweron,
	.pre_streamon = jt8ev1_pre_streamon,
	.post_streamoff = jt8ev1_post_streamoff,
	.flags = SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE,
};

static int tcm8500md_limits(struct smiapp_sensor *sensor)
{
	smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000);

	return 0;
}

const struct smiapp_quirk smiapp_tcm8500md_quirk = {
	.limits = tcm8500md_limits,
};
Commit	Line	Data
ccfc97bd	1	/*
cb7a01ac	2	* drivers/media/i2c/smiapp/smiapp-quirk.c
ccfc97bd SA	3	*
	4	* Generic driver for SMIA/SMIA++ compliant camera modules
	5	*
	6	* Copyright (C) 2011--2012 Nokia Corporation
	7	* Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	21	* 02110-1301 USA
	22	*
	23	*/
	24
ccfc97bd SA	25	#include <linux/delay.h>
	26
	27	#include "smiapp.h"
	28
	29	static int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val)
	30	{
1e73eea7	31	return smiapp_write(sensor, (SMIA_REG_8BIT << 16) \| reg, val);
ccfc97bd SA	32	}
	33
	34	static int smiapp_write_8s(struct smiapp_sensor *sensor,
	35	struct smiapp_reg_8 *regs, int len)
	36	{
	37	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
	38	int rval;
	39
	40	for (; len > 0; len--, regs++) {
	41	rval = smiapp_write_8(sensor, regs->reg, regs->val);
	42	if (rval < 0) {
	43	dev_err(&client->dev,
	44	"error %d writing reg 0x%4.4x, val 0x%2.2x",
	45	rval, regs->reg, regs->val);
	46	return rval;
	47	}
	48	}
	49
	50	return 0;
	51	}
	52
	53	void smiapp_replace_limit(struct smiapp_sensor *sensor,
	54	u32 limit, u32 val)
	55	{
	56	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
	57
	58	dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n",
	59	smiapp_reg_limits[limit].addr,
	60	smiapp_reg_limits[limit].what, val, val);
	61	sensor->limits[limit] = val;
	62	}
	63
27b2e76d SA	64	bool smiapp_quirk_reg(struct smiapp_sensor *sensor,
	65	u32 reg, u32 *val)
	66	{
	67	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
	68	const struct smia_reg *sreg;
	69
	70	if (!sensor->minfo.quirk)
	71	return false;
	72
	73	sreg = sensor->minfo.quirk->regs;
	74
	75	if (!sreg)
	76	return false;
	77
	78	while (sreg->type) {
	79	u16 type = reg >> 16;
	80	u16 reg16 = reg;
	81
	82	if (sreg->type != type \|\| sreg->reg != reg16) {
	83	sreg++;
	84	continue;
	85	}
	86
	87	switch ((u8)type) {
	88	case SMIA_REG_8BIT:
	89	dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%2.2x\n",
	90	reg, sreg->val);
	91	break;
	92	case SMIA_REG_16BIT:
	93	dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%4.4x\n",
	94	reg, sreg->val);
	95	break;
	96	case SMIA_REG_32BIT:
	97	dev_dbg(&client->dev, "quirk: 0x%8.8x: 0x%8.8x\n",
	98	reg, sreg->val);
	99	break;
	100	}
	101
	102	*val = sreg->val;
	103
	104	return true;
	105	}
	106
	107	return false;
	108	}
	109
ccfc97bd SA	110	static int jt8ew9_limits(struct smiapp_sensor *sensor)
	111	{
	112	if (sensor->minfo.revision_number_major < 0x03)
	113	sensor->frame_skip = 1;
	114
	115	/* Below 24 gain doesn't have effect at all, */
	116	/* but ~59 is needed for full dynamic range */
	117	smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59);
	118	smiapp_replace_limit(
	119	sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000);
	120
	121	return 0;
	122	}
	123
	124	static int jt8ew9_post_poweron(struct smiapp_sensor *sensor)
	125	{
	126	struct smiapp_reg_8 regs[] = {
	127	{ 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */
	128	{ 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
	129	{ 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */
	130	{ 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */
	131	{ 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
	132	{ 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
	133	{ 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
	134	{ 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */
	135	{ 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */
	136	{ 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
	137	{ 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
	138	{ 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
	139	{ 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */
	140	{ 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
	141	{ 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
	142	{ 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
	143	{ 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
	144	{ 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
	145	{ 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */
	146	{ 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */
	147	{ 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */
	148	{ 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */
	149	{ 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */
	150	/* Taken from v03. No idea what the rest are. */
	151	{ 0x32e0, 0x05 },
	152	{ 0x32e1, 0x05 },
	153	{ 0x32e2, 0x04 },
	154	{ 0x32e5, 0x04 },
	155	{ 0x32e6, 0x04 },
	156
	157	};
	158
	159	return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
	160	}
	161
	162	const struct smiapp_quirk smiapp_jt8ew9_quirk = {
	163	.limits = jt8ew9_limits,
	164	.post_poweron = jt8ew9_post_poweron,
	165	};
	166
	167	static int imx125es_post_poweron(struct smiapp_sensor *sensor)
	168	{
	169	/* Taken from v02. No idea what the other two are. */
	170	struct smiapp_reg_8 regs[] = {
	171	/*
	172	* 0x3302: clk during frame blanking:
	173	* 0x00 - HS mode, 0x01 - LP11
174	*/
175	{ 0x3302, 0x01 },
176	{ 0x302d, 0x00 },
177	{ 0x3b08, 0x8c },
178	};
179
180	return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
181	}
182
183	const struct smiapp_quirk smiapp_imx125es_quirk = {
184	.post_poweron = imx125es_post_poweron,
185	};
186
187	static int jt8ev1_limits(struct smiapp_sensor *sensor)
188	{
189	smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271);
190	smiapp_replace_limit(sensor,
191	SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184);
192
193	return 0;
194	}
195
196	static int jt8ev1_post_poweron(struct smiapp_sensor *sensor)
197	{
198	struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd);
199	int rval;
200
201	struct smiapp_reg_8 regs[] = {
202	{ 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */
203	{ 0x30a3, 0xd0 }, /* FLASH STROBE enable */
204	{ 0x3237, 0x00 }, /* For control of pulse timing for ADC */
205	{ 0x3238, 0x43 },
206	{ 0x3301, 0x06 }, /* For analog bias for sensor */
207	{ 0x3302, 0x06 },
208	{ 0x3304, 0x00 },
209	{ 0x3305, 0x88 },
210	{ 0x332a, 0x14 },
211	{ 0x332c, 0x6b },
212	{ 0x3336, 0x01 },
213	{ 0x333f, 0x1f },
214	{ 0x3355, 0x00 },
215	{ 0x3356, 0x20 },
216	{ 0x33bf, 0x20 }, /* Adjust the FBC speed */
217	{ 0x33c9, 0x20 },
218	{ 0x33ce, 0x30 }, /* Adjust the parameter for logic function */
219	{ 0x33cf, 0xec }, /* For Black sun */
220	{ 0x3328, 0x80 }, /* Ugh. No idea what's this. */
221	};
222
223	struct smiapp_reg_8 regs_96[] = {
224	{ 0x30ae, 0x00 }, /* For control of ADC clock */
225	{ 0x30af, 0xd0 },
226	{ 0x30b0, 0x01 },
227	};
228
229	rval = smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs));
230	if (rval < 0)
231	return rval;
232
233	switch (sensor->platform_data->ext_clk) {
234	case 9600000:
235	return smiapp_write_8s(sensor, regs_96,
236	ARRAY_SIZE(regs_96));
237	default:
238	dev_warn(&client->dev, "no MSRs for %d Hz ext_clk\n",
239	sensor->platform_data->ext_clk);
240	return 0;
241	}
242	}
243
244	static int jt8ev1_pre_streamon(struct smiapp_sensor *sensor)
245	{
246	return smiapp_write_8(sensor, 0x3328, 0x00);
247	}
248
249	static int jt8ev1_post_streamoff(struct smiapp_sensor *sensor)
250	{
251	int rval;
252
253	/* Workaround: allows fast standby to work properly */
254	rval = smiapp_write_8(sensor, 0x3205, 0x04);
255	if (rval < 0)
256	return rval;
257
258	/* Wait for 1 ms + one line => 2 ms is likely enough */
259	usleep_range(2000, 2000);
260
261	/* Restore it */
262	rval = smiapp_write_8(sensor, 0x3205, 0x00);
263	if (rval < 0)
264	return rval;
265
266	return smiapp_write_8(sensor, 0x3328, 0x80);
267	}
268
269	const struct smiapp_quirk smiapp_jt8ev1_quirk = {
270	.limits = jt8ev1_limits,
271	.post_poweron = jt8ev1_post_poweron,
272	.pre_streamon = jt8ev1_pre_streamon,
273	.post_streamoff = jt8ev1_post_streamoff,
274	.flags = SMIAPP_QUIRK_FLAG_OP_PIX_CLOCK_PER_LANE,
275	};
276
277	static int tcm8500md_limits(struct smiapp_sensor *sensor)
278	{
279	smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000);
280
281	return 0;
282	}
283
284	const struct smiapp_quirk smiapp_tcm8500md_quirk = {
285	.limits = tcm8500md_limits,
286	};