Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[deliverable/linux.git] / drivers / media / i2c / soc_camera / mt9m001.c
CommitLineData
f523dd0d
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1/*
2 * Driver for MT9M001 CMOS Image Sensor from Micron
3 *
4 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/videodev2.h>
12#include <linux/slab.h>
13#include <linux/i2c.h>
14#include <linux/log2.h>
7a707b89 15#include <linux/module.h>
f523dd0d 16
32ca2085
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17#include <media/soc_camera.h>
18#include <media/soc_mediabus.h>
9aea470b 19#include <media/v4l2-clk.h>
979ea1dd 20#include <media/v4l2-subdev.h>
2dd7d29c 21#include <media/v4l2-ctrls.h>
f523dd0d 22
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23/*
24 * mt9m001 i2c address 0x5d
22cf83fa 25 * The platform has to define struct i2c_board_info objects and link to them
25a34811 26 * from struct soc_camera_host_desc
5d28d525 27 */
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28
29/* mt9m001 selected register addresses */
30#define MT9M001_CHIP_VERSION 0x00
31#define MT9M001_ROW_START 0x01
32#define MT9M001_COLUMN_START 0x02
33#define MT9M001_WINDOW_HEIGHT 0x03
34#define MT9M001_WINDOW_WIDTH 0x04
35#define MT9M001_HORIZONTAL_BLANKING 0x05
36#define MT9M001_VERTICAL_BLANKING 0x06
37#define MT9M001_OUTPUT_CONTROL 0x07
38#define MT9M001_SHUTTER_WIDTH 0x09
39#define MT9M001_FRAME_RESTART 0x0b
40#define MT9M001_SHUTTER_DELAY 0x0c
41#define MT9M001_RESET 0x0d
42#define MT9M001_READ_OPTIONS1 0x1e
43#define MT9M001_READ_OPTIONS2 0x20
44#define MT9M001_GLOBAL_GAIN 0x35
45#define MT9M001_CHIP_ENABLE 0xF1
46
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47#define MT9M001_MAX_WIDTH 1280
48#define MT9M001_MAX_HEIGHT 1024
49#define MT9M001_MIN_WIDTH 48
50#define MT9M001_MIN_HEIGHT 32
51#define MT9M001_COLUMN_SKIP 20
52#define MT9M001_ROW_SKIP 12
53
760697be
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54/* MT9M001 has only one fixed colorspace per pixelcode */
55struct mt9m001_datafmt {
f5fe58fd 56 u32 code;
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57 enum v4l2_colorspace colorspace;
58};
59
60/* Find a data format by a pixel code in an array */
61static const struct mt9m001_datafmt *mt9m001_find_datafmt(
f5fe58fd 62 u32 code, const struct mt9m001_datafmt *fmt,
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63 int n)
64{
65 int i;
66 for (i = 0; i < n; i++)
67 if (fmt[i].code == code)
68 return fmt + i;
69
70 return NULL;
71}
72
73static const struct mt9m001_datafmt mt9m001_colour_fmts[] = {
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74 /*
75 * Order important: first natively supported,
76 * second supported with a GPIO extender
77 */
f5fe58fd
BB
78 {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
79 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
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80};
81
760697be 82static const struct mt9m001_datafmt mt9m001_monochrome_fmts[] = {
bb55de3b 83 /* Order important - see above */
f5fe58fd
BB
84 {MEDIA_BUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG},
85 {MEDIA_BUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG},
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86};
87
88struct mt9m001 {
979ea1dd 89 struct v4l2_subdev subdev;
2dd7d29c
HV
90 struct v4l2_ctrl_handler hdl;
91 struct {
92 /* exposure/auto-exposure cluster */
93 struct v4l2_ctrl *autoexposure;
94 struct v4l2_ctrl *exposure;
95 };
6a6c8786 96 struct v4l2_rect rect; /* Sensor window */
9aea470b 97 struct v4l2_clk *clk;
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98 const struct mt9m001_datafmt *fmt;
99 const struct mt9m001_datafmt *fmts;
100 int num_fmts;
2dd7d29c 101 unsigned int total_h;
32536108 102 unsigned short y_skip_top; /* Lines to skip at the top */
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103};
104
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105static struct mt9m001 *to_mt9m001(const struct i2c_client *client)
106{
107 return container_of(i2c_get_clientdata(client), struct mt9m001, subdev);
108}
109
9538e1c2 110static int reg_read(struct i2c_client *client, const u8 reg)
f523dd0d 111{
3f877045 112 return i2c_smbus_read_word_swapped(client, reg);
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113}
114
9538e1c2 115static int reg_write(struct i2c_client *client, const u8 reg,
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116 const u16 data)
117{
3f877045 118 return i2c_smbus_write_word_swapped(client, reg, data);
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119}
120
9538e1c2 121static int reg_set(struct i2c_client *client, const u8 reg,
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122 const u16 data)
123{
124 int ret;
125
9538e1c2 126 ret = reg_read(client, reg);
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127 if (ret < 0)
128 return ret;
9538e1c2 129 return reg_write(client, reg, ret | data);
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130}
131
9538e1c2 132static int reg_clear(struct i2c_client *client, const u8 reg,
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133 const u16 data)
134{
135 int ret;
136
9538e1c2 137 ret = reg_read(client, reg);
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138 if (ret < 0)
139 return ret;
9538e1c2 140 return reg_write(client, reg, ret & ~data);
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141}
142
a4c56fd8 143static int mt9m001_init(struct i2c_client *client)
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144{
145 int ret;
146
85f8be68 147 dev_dbg(&client->dev, "%s\n", __func__);
f523dd0d 148
979ea1dd 149 /*
96c75399
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150 * We don't know, whether platform provides reset, issue a soft reset
151 * too. This returns all registers to their default values.
979ea1dd
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152 */
153 ret = reg_write(client, MT9M001_RESET, 1);
154 if (!ret)
155 ret = reg_write(client, MT9M001_RESET, 0);
81034663 156
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157 /* Disable chip, synchronous option update */
158 if (!ret)
9538e1c2 159 ret = reg_write(client, MT9M001_OUTPUT_CONTROL, 0);
f523dd0d 160
11211641 161 return ret;
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162}
163
979ea1dd 164static int mt9m001_s_stream(struct v4l2_subdev *sd, int enable)
f523dd0d 165{
c4ce6d14 166 struct i2c_client *client = v4l2_get_subdevdata(sd);
9538e1c2 167
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168 /* Switch to master "normal" mode or stop sensor readout */
169 if (reg_write(client, MT9M001_OUTPUT_CONTROL, enable ? 2 : 0) < 0)
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170 return -EIO;
171 return 0;
172}
173
4f996594 174static int mt9m001_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
ad5f2e85 175{
c4ce6d14 176 struct i2c_client *client = v4l2_get_subdevdata(sd);
979ea1dd 177 struct mt9m001 *mt9m001 = to_mt9m001(client);
6a6c8786 178 struct v4l2_rect rect = a->c;
ad5f2e85
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179 int ret;
180 const u16 hblank = 9, vblank = 25;
181
760697be 182 if (mt9m001->fmts == mt9m001_colour_fmts)
6a6c8786
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183 /*
184 * Bayer format - even number of rows for simplicity,
185 * but let the user play with the top row.
186 */
187 rect.height = ALIGN(rect.height, 2);
188
189 /* Datasheet requirement: see register description */
190 rect.width = ALIGN(rect.width, 2);
191 rect.left = ALIGN(rect.left, 2);
192
193 soc_camera_limit_side(&rect.left, &rect.width,
194 MT9M001_COLUMN_SKIP, MT9M001_MIN_WIDTH, MT9M001_MAX_WIDTH);
195
196 soc_camera_limit_side(&rect.top, &rect.height,
197 MT9M001_ROW_SKIP, MT9M001_MIN_HEIGHT, MT9M001_MAX_HEIGHT);
198
2dd7d29c 199 mt9m001->total_h = rect.height + mt9m001->y_skip_top + vblank;
96c75399 200
f523dd0d 201 /* Blanking and start values - default... */
9538e1c2 202 ret = reg_write(client, MT9M001_HORIZONTAL_BLANKING, hblank);
11211641 203 if (!ret)
9538e1c2 204 ret = reg_write(client, MT9M001_VERTICAL_BLANKING, vblank);
f523dd0d 205
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206 /*
207 * The caller provides a supported format, as verified per
717fd5b4 208 * call to .set_fmt(FORMAT_TRY).
5d28d525 209 */
11211641 210 if (!ret)
6a6c8786 211 ret = reg_write(client, MT9M001_COLUMN_START, rect.left);
11211641 212 if (!ret)
6a6c8786 213 ret = reg_write(client, MT9M001_ROW_START, rect.top);
11211641 214 if (!ret)
6a6c8786 215 ret = reg_write(client, MT9M001_WINDOW_WIDTH, rect.width - 1);
11211641 216 if (!ret)
9538e1c2 217 ret = reg_write(client, MT9M001_WINDOW_HEIGHT,
32536108 218 rect.height + mt9m001->y_skip_top - 1);
2dd7d29c
HV
219 if (!ret && v4l2_ctrl_g_ctrl(mt9m001->autoexposure) == V4L2_EXPOSURE_AUTO)
220 ret = reg_write(client, MT9M001_SHUTTER_WIDTH, mt9m001->total_h);
f523dd0d 221
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GL
222 if (!ret)
223 mt9m001->rect = rect;
224
11211641 225 return ret;
f523dd0d
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226}
227
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228static int mt9m001_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
229{
c4ce6d14 230 struct i2c_client *client = v4l2_get_subdevdata(sd);
6a6c8786
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231 struct mt9m001 *mt9m001 = to_mt9m001(client);
232
233 a->c = mt9m001->rect;
234 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
235
236 return 0;
237}
238
239static int mt9m001_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
240{
241 a->bounds.left = MT9M001_COLUMN_SKIP;
242 a->bounds.top = MT9M001_ROW_SKIP;
243 a->bounds.width = MT9M001_MAX_WIDTH;
244 a->bounds.height = MT9M001_MAX_HEIGHT;
245 a->defrect = a->bounds;
246 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
247 a->pixelaspect.numerator = 1;
248 a->pixelaspect.denominator = 1;
249
250 return 0;
251}
252
da298c6d
HV
253static int mt9m001_get_fmt(struct v4l2_subdev *sd,
254 struct v4l2_subdev_pad_config *cfg,
255 struct v4l2_subdev_format *format)
6a6c8786 256{
c4ce6d14 257 struct i2c_client *client = v4l2_get_subdevdata(sd);
6a6c8786 258 struct mt9m001 *mt9m001 = to_mt9m001(client);
da298c6d
HV
259 struct v4l2_mbus_framefmt *mf = &format->format;
260
261 if (format->pad)
262 return -EINVAL;
6a6c8786 263
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264 mf->width = mt9m001->rect.width;
265 mf->height = mt9m001->rect.height;
266 mf->code = mt9m001->fmt->code;
267 mf->colorspace = mt9m001->fmt->colorspace;
268 mf->field = V4L2_FIELD_NONE;
6a6c8786
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269
270 return 0;
271}
272
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273static int mt9m001_s_fmt(struct v4l2_subdev *sd,
274 struct v4l2_mbus_framefmt *mf)
09e231b3 275{
c4ce6d14 276 struct i2c_client *client = v4l2_get_subdevdata(sd);
6a6c8786 277 struct mt9m001 *mt9m001 = to_mt9m001(client);
08590b96
GL
278 struct v4l2_crop a = {
279 .c = {
6a6c8786
GL
280 .left = mt9m001->rect.left,
281 .top = mt9m001->rect.top,
760697be
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282 .width = mf->width,
283 .height = mf->height,
08590b96 284 },
09e231b3 285 };
6a6c8786 286 int ret;
09e231b3
GL
287
288 /* No support for scaling so far, just crop. TODO: use skipping */
6a6c8786
GL
289 ret = mt9m001_s_crop(sd, &a);
290 if (!ret) {
760697be
GL
291 mf->width = mt9m001->rect.width;
292 mf->height = mt9m001->rect.height;
293 mt9m001->fmt = mt9m001_find_datafmt(mf->code,
294 mt9m001->fmts, mt9m001->num_fmts);
295 mf->colorspace = mt9m001->fmt->colorspace;
6a6c8786
GL
296 }
297
298 return ret;
09e231b3
GL
299}
300
717fd5b4
HV
301static int mt9m001_set_fmt(struct v4l2_subdev *sd,
302 struct v4l2_subdev_pad_config *cfg,
303 struct v4l2_subdev_format *format)
f523dd0d 304{
717fd5b4 305 struct v4l2_mbus_framefmt *mf = &format->format;
c4ce6d14 306 struct i2c_client *client = v4l2_get_subdevdata(sd);
32536108 307 struct mt9m001 *mt9m001 = to_mt9m001(client);
760697be 308 const struct mt9m001_datafmt *fmt;
64f5905e 309
717fd5b4
HV
310 if (format->pad)
311 return -EINVAL;
312
760697be 313 v4l_bound_align_image(&mf->width, MT9M001_MIN_WIDTH,
6a6c8786 314 MT9M001_MAX_WIDTH, 1,
760697be 315 &mf->height, MT9M001_MIN_HEIGHT + mt9m001->y_skip_top,
32536108 316 MT9M001_MAX_HEIGHT + mt9m001->y_skip_top, 0, 0);
6a6c8786 317
760697be
GL
318 if (mt9m001->fmts == mt9m001_colour_fmts)
319 mf->height = ALIGN(mf->height - 1, 2);
320
321 fmt = mt9m001_find_datafmt(mf->code, mt9m001->fmts,
322 mt9m001->num_fmts);
323 if (!fmt) {
324 fmt = mt9m001->fmt;
325 mf->code = fmt->code;
326 }
327
328 mf->colorspace = fmt->colorspace;
f523dd0d 329
717fd5b4
HV
330 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
331 return mt9m001_s_fmt(sd, mf);
332 cfg->try_fmt = *mf;
f523dd0d
GL
333 return 0;
334}
335
f523dd0d 336#ifdef CONFIG_VIDEO_ADV_DEBUG
979ea1dd
GL
337static int mt9m001_g_register(struct v4l2_subdev *sd,
338 struct v4l2_dbg_register *reg)
f523dd0d 339{
c4ce6d14 340 struct i2c_client *client = v4l2_get_subdevdata(sd);
f523dd0d 341
6be89daa 342 if (reg->reg > 0xff)
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343 return -EINVAL;
344
aecde8b5 345 reg->size = 2;
9538e1c2 346 reg->val = reg_read(client, reg->reg);
f523dd0d
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347
348 if (reg->val > 0xffff)
349 return -EIO;
350
351 return 0;
352}
353
979ea1dd 354static int mt9m001_s_register(struct v4l2_subdev *sd,
977ba3b1 355 const struct v4l2_dbg_register *reg)
f523dd0d 356{
c4ce6d14 357 struct i2c_client *client = v4l2_get_subdevdata(sd);
f523dd0d 358
6be89daa 359 if (reg->reg > 0xff)
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360 return -EINVAL;
361
9538e1c2 362 if (reg_write(client, reg->reg, reg->val) < 0)
f523dd0d
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363 return -EIO;
364
365 return 0;
366}
367#endif
368
4ec10bac
LP
369static int mt9m001_s_power(struct v4l2_subdev *sd, int on)
370{
371 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 372 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
9aea470b 373 struct mt9m001 *mt9m001 = to_mt9m001(client);
4ec10bac 374
9aea470b 375 return soc_camera_set_power(&client->dev, ssdd, mt9m001->clk, on);
4ec10bac
LP
376}
377
2dd7d29c 378static int mt9m001_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
f523dd0d 379{
2dd7d29c
HV
380 struct mt9m001 *mt9m001 = container_of(ctrl->handler,
381 struct mt9m001, hdl);
382 s32 min, max;
f523dd0d
GL
383
384 switch (ctrl->id) {
f523dd0d 385 case V4L2_CID_EXPOSURE_AUTO:
2dd7d29c
HV
386 min = mt9m001->exposure->minimum;
387 max = mt9m001->exposure->maximum;
388 mt9m001->exposure->val =
389 (524 + (mt9m001->total_h - 1) * (max - min)) / 1048 + min;
96c75399 390 break;
f523dd0d
GL
391 }
392 return 0;
393}
394
2dd7d29c 395static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl)
f523dd0d 396{
2dd7d29c
HV
397 struct mt9m001 *mt9m001 = container_of(ctrl->handler,
398 struct mt9m001, hdl);
399 struct v4l2_subdev *sd = &mt9m001->subdev;
c4ce6d14 400 struct i2c_client *client = v4l2_get_subdevdata(sd);
2dd7d29c 401 struct v4l2_ctrl *exp = mt9m001->exposure;
f523dd0d
GL
402 int data;
403
f523dd0d
GL
404 switch (ctrl->id) {
405 case V4L2_CID_VFLIP:
2dd7d29c 406 if (ctrl->val)
9538e1c2 407 data = reg_set(client, MT9M001_READ_OPTIONS2, 0x8000);
f523dd0d 408 else
9538e1c2 409 data = reg_clear(client, MT9M001_READ_OPTIONS2, 0x8000);
f523dd0d
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410 if (data < 0)
411 return -EIO;
2dd7d29c
HV
412 return 0;
413
f523dd0d 414 case V4L2_CID_GAIN:
f523dd0d 415 /* See Datasheet Table 7, Gain settings. */
2dd7d29c 416 if (ctrl->val <= ctrl->default_value) {
f523dd0d 417 /* Pack it into 0..1 step 0.125, register values 0..8 */
2dd7d29c 418 unsigned long range = ctrl->default_value - ctrl->minimum;
0d5e8c43 419 data = ((ctrl->val - (s32)ctrl->minimum) * 8 + range / 2) / range;
f523dd0d 420
85f8be68 421 dev_dbg(&client->dev, "Setting gain %d\n", data);
9538e1c2 422 data = reg_write(client, MT9M001_GLOBAL_GAIN, data);
f523dd0d
GL
423 if (data < 0)
424 return -EIO;
425 } else {
426 /* Pack it into 1.125..15 variable step, register values 9..67 */
427 /* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */
2dd7d29c 428 unsigned long range = ctrl->maximum - ctrl->default_value - 1;
0d5e8c43 429 unsigned long gain = ((ctrl->val - (s32)ctrl->default_value - 1) *
f523dd0d
GL
430 111 + range / 2) / range + 9;
431
432 if (gain <= 32)
433 data = gain;
434 else if (gain <= 64)
435 data = ((gain - 32) * 16 + 16) / 32 + 80;
436 else
437 data = ((gain - 64) * 7 + 28) / 56 + 96;
438
85f8be68 439 dev_dbg(&client->dev, "Setting gain from %d to %d\n",
9538e1c2
GL
440 reg_read(client, MT9M001_GLOBAL_GAIN), data);
441 data = reg_write(client, MT9M001_GLOBAL_GAIN, data);
f523dd0d
GL
442 if (data < 0)
443 return -EIO;
444 }
2dd7d29c 445 return 0;
f523dd0d 446
2dd7d29c
HV
447 case V4L2_CID_EXPOSURE_AUTO:
448 if (ctrl->val == V4L2_EXPOSURE_MANUAL) {
449 unsigned long range = exp->maximum - exp->minimum;
0d5e8c43 450 unsigned long shutter = ((exp->val - (s32)exp->minimum) * 1048 +
f523dd0d
GL
451 range / 2) / range + 1;
452
85f8be68
GL
453 dev_dbg(&client->dev,
454 "Setting shutter width from %d to %lu\n",
2dd7d29c 455 reg_read(client, MT9M001_SHUTTER_WIDTH), shutter);
9538e1c2 456 if (reg_write(client, MT9M001_SHUTTER_WIDTH, shutter) < 0)
f523dd0d 457 return -EIO;
2dd7d29c 458 } else {
f523dd0d 459 const u16 vblank = 25;
2dd7d29c
HV
460
461 mt9m001->total_h = mt9m001->rect.height +
32536108 462 mt9m001->y_skip_top + vblank;
2dd7d29c 463 if (reg_write(client, MT9M001_SHUTTER_WIDTH, mt9m001->total_h) < 0)
f523dd0d 464 return -EIO;
2dd7d29c
HV
465 }
466 return 0;
f523dd0d 467 }
2dd7d29c 468 return -EINVAL;
f523dd0d
GL
469}
470
5d28d525
GL
471/*
472 * Interface active, can use i2c. If it fails, it can indeed mean, that
473 * this wasn't our capture interface, so, we wait for the right one
474 */
25a34811 475static int mt9m001_video_probe(struct soc_camera_subdev_desc *ssdd,
40e2e092 476 struct i2c_client *client)
f523dd0d 477{
979ea1dd 478 struct mt9m001 *mt9m001 = to_mt9m001(client);
f523dd0d 479 s32 data;
36034dc3 480 unsigned long flags;
a4c56fd8 481 int ret;
f523dd0d 482
4bbc6d52
LP
483 ret = mt9m001_s_power(&mt9m001->subdev, 1);
484 if (ret < 0)
485 return ret;
486
f523dd0d 487 /* Enable the chip */
9538e1c2 488 data = reg_write(client, MT9M001_CHIP_ENABLE, 1);
85f8be68 489 dev_dbg(&client->dev, "write: %d\n", data);
f523dd0d
GL
490
491 /* Read out the chip version register */
9538e1c2 492 data = reg_read(client, MT9M001_CHIP_VERSION);
f523dd0d
GL
493
494 /* must be 0x8411 or 0x8421 for colour sensor and 8431 for bw */
495 switch (data) {
496 case 0x8411:
497 case 0x8421:
760697be 498 mt9m001->fmts = mt9m001_colour_fmts;
f523dd0d
GL
499 break;
500 case 0x8431:
760697be 501 mt9m001->fmts = mt9m001_monochrome_fmts;
f523dd0d
GL
502 break;
503 default:
85f8be68 504 dev_err(&client->dev,
f523dd0d 505 "No MT9M001 chip detected, register read %x\n", data);
4bbc6d52
LP
506 ret = -ENODEV;
507 goto done;
f523dd0d
GL
508 }
509
760697be 510 mt9m001->num_fmts = 0;
36034dc3
SH
511
512 /*
513 * This is a 10bit sensor, so by default we only allow 10bit.
514 * The platform may support different bus widths due to
515 * different routing of the data lines.
516 */
25a34811
GL
517 if (ssdd->query_bus_param)
518 flags = ssdd->query_bus_param(ssdd);
36034dc3
SH
519 else
520 flags = SOCAM_DATAWIDTH_10;
521
522 if (flags & SOCAM_DATAWIDTH_10)
760697be 523 mt9m001->num_fmts++;
36034dc3 524 else
760697be 525 mt9m001->fmts++;
36034dc3
SH
526
527 if (flags & SOCAM_DATAWIDTH_8)
760697be 528 mt9m001->num_fmts++;
36034dc3 529
760697be 530 mt9m001->fmt = &mt9m001->fmts[0];
6a6c8786 531
85f8be68 532 dev_info(&client->dev, "Detected a MT9M001 chip ID %x (%s)\n", data,
f523dd0d
GL
533 data == 0x8431 ? "C12STM" : "C12ST");
534
a4c56fd8 535 ret = mt9m001_init(client);
4bbc6d52 536 if (ret < 0) {
a4c56fd8 537 dev_err(&client->dev, "Failed to initialise the camera\n");
4bbc6d52
LP
538 goto done;
539 }
a4c56fd8 540
96c75399 541 /* mt9m001_init() has reset the chip, returning registers to defaults */
4bbc6d52
LP
542 ret = v4l2_ctrl_handler_setup(&mt9m001->hdl);
543
544done:
545 mt9m001_s_power(&mt9m001->subdev, 0);
546 return ret;
f523dd0d
GL
547}
548
25a34811 549static void mt9m001_video_remove(struct soc_camera_subdev_desc *ssdd)
f523dd0d 550{
25a34811
GL
551 if (ssdd->free_bus)
552 ssdd->free_bus(ssdd);
f523dd0d
GL
553}
554
32536108
GL
555static int mt9m001_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
556{
c4ce6d14 557 struct i2c_client *client = v4l2_get_subdevdata(sd);
32536108
GL
558 struct mt9m001 *mt9m001 = to_mt9m001(client);
559
560 *lines = mt9m001->y_skip_top;
561
562 return 0;
563}
564
2dd7d29c
HV
565static const struct v4l2_ctrl_ops mt9m001_ctrl_ops = {
566 .g_volatile_ctrl = mt9m001_g_volatile_ctrl,
567 .s_ctrl = mt9m001_s_ctrl,
568};
569
979ea1dd 570static struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = {
979ea1dd
GL
571#ifdef CONFIG_VIDEO_ADV_DEBUG
572 .g_register = mt9m001_g_register,
573 .s_register = mt9m001_s_register,
574#endif
4ec10bac 575 .s_power = mt9m001_s_power,
979ea1dd
GL
576};
577
ebcff5fc
HV
578static int mt9m001_enum_mbus_code(struct v4l2_subdev *sd,
579 struct v4l2_subdev_pad_config *cfg,
580 struct v4l2_subdev_mbus_code_enum *code)
760697be 581{
c4ce6d14 582 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be
GL
583 struct mt9m001 *mt9m001 = to_mt9m001(client);
584
ebcff5fc 585 if (code->pad || code->index >= mt9m001->num_fmts)
760697be
GL
586 return -EINVAL;
587
ebcff5fc 588 code->code = mt9m001->fmts[code->index].code;
760697be
GL
589 return 0;
590}
591
32ca2085
GL
592static int mt9m001_g_mbus_config(struct v4l2_subdev *sd,
593 struct v4l2_mbus_config *cfg)
594{
595 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 596 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
32ca2085
GL
597
598 /* MT9M001 has all capture_format parameters fixed */
599 cfg->flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
600 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
601 V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_MASTER;
602 cfg->type = V4L2_MBUS_PARALLEL;
25a34811 603 cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
32ca2085
GL
604
605 return 0;
606}
607
608static int mt9m001_s_mbus_config(struct v4l2_subdev *sd,
609 const struct v4l2_mbus_config *cfg)
610{
14178aa5 611 const struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 612 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
443f483a
GL
613 struct mt9m001 *mt9m001 = to_mt9m001(client);
614 unsigned int bps = soc_mbus_get_fmtdesc(mt9m001->fmt->code)->bits_per_sample;
32ca2085 615
25a34811
GL
616 if (ssdd->set_bus_param)
617 return ssdd->set_bus_param(ssdd, 1 << (bps - 1));
32ca2085
GL
618
619 /*
620 * Without board specific bus width settings we only support the
621 * sensors native bus width
622 */
623 return bps == 10 ? 0 : -EINVAL;
624}
625
979ea1dd
GL
626static struct v4l2_subdev_video_ops mt9m001_subdev_video_ops = {
627 .s_stream = mt9m001_s_stream,
08590b96 628 .s_crop = mt9m001_s_crop,
6a6c8786
GL
629 .g_crop = mt9m001_g_crop,
630 .cropcap = mt9m001_cropcap,
32ca2085
GL
631 .g_mbus_config = mt9m001_g_mbus_config,
632 .s_mbus_config = mt9m001_s_mbus_config,
979ea1dd
GL
633};
634
32536108
GL
635static struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = {
636 .g_skip_top_lines = mt9m001_g_skip_top_lines,
637};
638
ebcff5fc
HV
639static const struct v4l2_subdev_pad_ops mt9m001_subdev_pad_ops = {
640 .enum_mbus_code = mt9m001_enum_mbus_code,
da298c6d 641 .get_fmt = mt9m001_get_fmt,
717fd5b4 642 .set_fmt = mt9m001_set_fmt,
ebcff5fc
HV
643};
644
979ea1dd
GL
645static struct v4l2_subdev_ops mt9m001_subdev_ops = {
646 .core = &mt9m001_subdev_core_ops,
647 .video = &mt9m001_subdev_video_ops,
32536108 648 .sensor = &mt9m001_subdev_sensor_ops,
ebcff5fc 649 .pad = &mt9m001_subdev_pad_ops,
979ea1dd
GL
650};
651
d2653e92
JD
652static int mt9m001_probe(struct i2c_client *client,
653 const struct i2c_device_id *did)
f523dd0d
GL
654{
655 struct mt9m001 *mt9m001;
f523dd0d 656 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
25a34811 657 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
f523dd0d
GL
658 int ret;
659
25a34811 660 if (!ssdd) {
f523dd0d
GL
661 dev_err(&client->dev, "MT9M001 driver needs platform data\n");
662 return -EINVAL;
663 }
664
665 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
666 dev_warn(&adapter->dev,
667 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
668 return -EIO;
669 }
670
70e176a5 671 mt9m001 = devm_kzalloc(&client->dev, sizeof(struct mt9m001), GFP_KERNEL);
f523dd0d
GL
672 if (!mt9m001)
673 return -ENOMEM;
674
979ea1dd 675 v4l2_i2c_subdev_init(&mt9m001->subdev, client, &mt9m001_subdev_ops);
2dd7d29c
HV
676 v4l2_ctrl_handler_init(&mt9m001->hdl, 4);
677 v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops,
678 V4L2_CID_VFLIP, 0, 1, 1, 0);
679 v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops,
680 V4L2_CID_GAIN, 0, 127, 1, 64);
681 mt9m001->exposure = v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops,
682 V4L2_CID_EXPOSURE, 1, 255, 1, 255);
683 /*
684 * Simulated autoexposure. If enabled, we calculate shutter width
685 * ourselves in the driver based on vertical blanking and frame width
686 */
687 mt9m001->autoexposure = v4l2_ctrl_new_std_menu(&mt9m001->hdl,
688 &mt9m001_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
689 V4L2_EXPOSURE_AUTO);
690 mt9m001->subdev.ctrl_handler = &mt9m001->hdl;
70e176a5
GL
691 if (mt9m001->hdl.error)
692 return mt9m001->hdl.error;
f523dd0d 693
2dd7d29c
HV
694 v4l2_ctrl_auto_cluster(2, &mt9m001->autoexposure,
695 V4L2_EXPOSURE_MANUAL, true);
6a6c8786 696
2dd7d29c 697 /* Second stage probe - when a capture adapter is there */
32536108 698 mt9m001->y_skip_top = 0;
6a6c8786
GL
699 mt9m001->rect.left = MT9M001_COLUMN_SKIP;
700 mt9m001->rect.top = MT9M001_ROW_SKIP;
701 mt9m001->rect.width = MT9M001_MAX_WIDTH;
702 mt9m001->rect.height = MT9M001_MAX_HEIGHT;
703
9aea470b
GL
704 mt9m001->clk = v4l2_clk_get(&client->dev, "mclk");
705 if (IS_ERR(mt9m001->clk)) {
706 ret = PTR_ERR(mt9m001->clk);
707 goto eclkget;
708 }
709
25a34811 710 ret = mt9m001_video_probe(ssdd, client);
9aea470b
GL
711 if (ret) {
712 v4l2_clk_put(mt9m001->clk);
713eclkget:
2dd7d29c 714 v4l2_ctrl_handler_free(&mt9m001->hdl);
9aea470b 715 }
f523dd0d 716
f523dd0d
GL
717 return ret;
718}
719
720static int mt9m001_remove(struct i2c_client *client)
721{
979ea1dd 722 struct mt9m001 *mt9m001 = to_mt9m001(client);
25a34811 723 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
f523dd0d 724
9aea470b 725 v4l2_clk_put(mt9m001->clk);
2dd7d29c
HV
726 v4l2_device_unregister_subdev(&mt9m001->subdev);
727 v4l2_ctrl_handler_free(&mt9m001->hdl);
25a34811 728 mt9m001_video_remove(ssdd);
f523dd0d
GL
729
730 return 0;
731}
732
3760f736
JD
733static const struct i2c_device_id mt9m001_id[] = {
734 { "mt9m001", 0 },
735 { }
736};
737MODULE_DEVICE_TABLE(i2c, mt9m001_id);
738
f523dd0d
GL
739static struct i2c_driver mt9m001_i2c_driver = {
740 .driver = {
741 .name = "mt9m001",
742 },
743 .probe = mt9m001_probe,
744 .remove = mt9m001_remove,
3760f736 745 .id_table = mt9m001_id,
f523dd0d
GL
746};
747
c6e8d86f 748module_i2c_driver(mt9m001_i2c_driver);
f523dd0d
GL
749
750MODULE_DESCRIPTION("Micron MT9M001 Camera driver");
751MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
752MODULE_LICENSE("GPL");
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