[media] v4l2: add const to argument of write-only s_register ioctl
[deliverable/linux.git] / drivers / media / i2c / soc_camera / mt9v022.c
CommitLineData
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1/*
2 * Driver for MT9V022 CMOS Image Sensor from Micron
3 *
4 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/videodev2.h>
12#include <linux/slab.h>
13#include <linux/i2c.h>
14#include <linux/delay.h>
15#include <linux/log2.h>
7a707b89 16#include <linux/module.h>
7397bfbe 17
b6f50b49 18#include <media/mt9v022.h>
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19#include <media/soc_camera.h>
20#include <media/soc_mediabus.h>
979ea1dd 21#include <media/v4l2-subdev.h>
7397bfbe 22#include <media/v4l2-chip-ident.h>
ab7b50ae 23#include <media/v4l2-ctrls.h>
7397bfbe 24
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25/*
26 * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c
22cf83fa 27 * The platform has to define struct i2c_board_info objects and link to them
25a34811 28 * from struct soc_camera_host_desc
5d28d525 29 */
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30
31static char *sensor_type;
32module_param(sensor_type, charp, S_IRUGO);
61a2d07d 33MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\"");
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34
35/* mt9v022 selected register addresses */
36#define MT9V022_CHIP_VERSION 0x00
37#define MT9V022_COLUMN_START 0x01
38#define MT9V022_ROW_START 0x02
39#define MT9V022_WINDOW_HEIGHT 0x03
40#define MT9V022_WINDOW_WIDTH 0x04
41#define MT9V022_HORIZONTAL_BLANKING 0x05
42#define MT9V022_VERTICAL_BLANKING 0x06
43#define MT9V022_CHIP_CONTROL 0x07
44#define MT9V022_SHUTTER_WIDTH1 0x08
45#define MT9V022_SHUTTER_WIDTH2 0x09
46#define MT9V022_SHUTTER_WIDTH_CTRL 0x0a
47#define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b
48#define MT9V022_RESET 0x0c
49#define MT9V022_READ_MODE 0x0d
50#define MT9V022_MONITOR_MODE 0x0e
51#define MT9V022_PIXEL_OPERATION_MODE 0x0f
52#define MT9V022_LED_OUT_CONTROL 0x1b
53#define MT9V022_ADC_MODE_CONTROL 0x1c
d0bac768 54#define MT9V022_REG32 0x20
96c75399 55#define MT9V022_ANALOG_GAIN 0x35
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56#define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47
57#define MT9V022_PIXCLK_FV_LV 0x74
58#define MT9V022_DIGITAL_TEST_PATTERN 0x7f
59#define MT9V022_AEC_AGC_ENABLE 0xAF
60#define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD
61
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62/* mt9v024 partial list register addresses changes with respect to mt9v022 */
63#define MT9V024_PIXCLK_FV_LV 0x72
64#define MT9V024_MAX_TOTAL_SHUTTER_WIDTH 0xAD
65
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66/* Progressive scan, master, defaults */
67#define MT9V022_CHIP_CONTROL_DEFAULT 0x188
68
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69#define MT9V022_MAX_WIDTH 752
70#define MT9V022_MAX_HEIGHT 480
71#define MT9V022_MIN_WIDTH 48
72#define MT9V022_MIN_HEIGHT 32
73#define MT9V022_COLUMN_SKIP 1
74#define MT9V022_ROW_SKIP 4
75
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76#define MT9V022_HORIZONTAL_BLANKING_MIN 43
77#define MT9V022_HORIZONTAL_BLANKING_MAX 1023
78#define MT9V022_HORIZONTAL_BLANKING_DEF 94
79#define MT9V022_VERTICAL_BLANKING_MIN 2
80#define MT9V022_VERTICAL_BLANKING_MAX 3000
81#define MT9V022_VERTICAL_BLANKING_DEF 45
82
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83#define is_mt9v022_rev3(id) (id == 0x1313)
84#define is_mt9v024(id) (id == 0x1324)
c078ac18 85
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86/* MT9V022 has only one fixed colorspace per pixelcode */
87struct mt9v022_datafmt {
88 enum v4l2_mbus_pixelcode code;
89 enum v4l2_colorspace colorspace;
90};
91
92/* Find a data format by a pixel code in an array */
93static const struct mt9v022_datafmt *mt9v022_find_datafmt(
94 enum v4l2_mbus_pixelcode code, const struct mt9v022_datafmt *fmt,
95 int n)
96{
97 int i;
98 for (i = 0; i < n; i++)
99 if (fmt[i].code == code)
100 return fmt + i;
101
102 return NULL;
103}
104
105static const struct mt9v022_datafmt mt9v022_colour_fmts[] = {
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106 /*
107 * Order important: first natively supported,
108 * second supported with a GPIO extender
109 */
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110 {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
111 {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
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112};
113
760697be 114static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = {
bb55de3b 115 /* Order important - see above */
760697be 116 {V4L2_MBUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG},
07670433 117 {V4L2_MBUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG},
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118};
119
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120/* only registers with different addresses on different mt9v02x sensors */
121struct mt9v02x_register {
122 u8 max_total_shutter_width;
123 u8 pixclk_fv_lv;
124};
125
126static const struct mt9v02x_register mt9v022_register = {
127 .max_total_shutter_width = MT9V022_MAX_TOTAL_SHUTTER_WIDTH,
128 .pixclk_fv_lv = MT9V022_PIXCLK_FV_LV,
129};
130
131static const struct mt9v02x_register mt9v024_register = {
132 .max_total_shutter_width = MT9V024_MAX_TOTAL_SHUTTER_WIDTH,
133 .pixclk_fv_lv = MT9V024_PIXCLK_FV_LV,
134};
135
7397bfbe 136struct mt9v022 {
979ea1dd 137 struct v4l2_subdev subdev;
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138 struct v4l2_ctrl_handler hdl;
139 struct {
140 /* exposure/auto-exposure cluster */
141 struct v4l2_ctrl *autoexposure;
142 struct v4l2_ctrl *exposure;
143 };
144 struct {
145 /* gain/auto-gain cluster */
146 struct v4l2_ctrl *autogain;
147 struct v4l2_ctrl *gain;
148 };
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149 struct v4l2_ctrl *hblank;
150 struct v4l2_ctrl *vblank;
6a6c8786 151 struct v4l2_rect rect; /* Sensor window */
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152 const struct mt9v022_datafmt *fmt;
153 const struct mt9v022_datafmt *fmts;
c078ac18 154 const struct mt9v02x_register *reg;
760697be 155 int num_fmts;
7fb0fd05 156 int model; /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */
7397bfbe 157 u16 chip_control;
d0bac768 158 u16 chip_version;
32536108 159 unsigned short y_skip_top; /* Lines to skip at the top */
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160};
161
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162static struct mt9v022 *to_mt9v022(const struct i2c_client *client)
163{
164 return container_of(i2c_get_clientdata(client), struct mt9v022, subdev);
165}
166
9538e1c2 167static int reg_read(struct i2c_client *client, const u8 reg)
7397bfbe 168{
3f877045 169 return i2c_smbus_read_word_swapped(client, reg);
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170}
171
9538e1c2 172static int reg_write(struct i2c_client *client, const u8 reg,
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173 const u16 data)
174{
3f877045 175 return i2c_smbus_write_word_swapped(client, reg, data);
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176}
177
9538e1c2 178static int reg_set(struct i2c_client *client, const u8 reg,
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179 const u16 data)
180{
181 int ret;
182
9538e1c2 183 ret = reg_read(client, reg);
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184 if (ret < 0)
185 return ret;
9538e1c2 186 return reg_write(client, reg, ret | data);
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187}
188
9538e1c2 189static int reg_clear(struct i2c_client *client, const u8 reg,
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190 const u16 data)
191{
192 int ret;
193
9538e1c2 194 ret = reg_read(client, reg);
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195 if (ret < 0)
196 return ret;
9538e1c2 197 return reg_write(client, reg, ret & ~data);
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198}
199
a4c56fd8 200static int mt9v022_init(struct i2c_client *client)
7397bfbe 201{
979ea1dd 202 struct mt9v022 *mt9v022 = to_mt9v022(client);
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203 int ret;
204
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205 /*
206 * Almost the default mode: master, parallel, simultaneous, and an
7397bfbe 207 * undocumented bit 0x200, which is present in table 7, but not in 8,
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208 * plus snapshot mode to disable scan for now
209 */
7397bfbe 210 mt9v022->chip_control |= 0x10;
9538e1c2 211 ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
11211641 212 if (!ret)
9538e1c2 213 ret = reg_write(client, MT9V022_READ_MODE, 0x300);
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214
215 /* All defaults */
11211641 216 if (!ret)
7397bfbe 217 /* AEC, AGC on */
9538e1c2 218 ret = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x3);
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219 if (!ret)
220 ret = reg_write(client, MT9V022_ANALOG_GAIN, 16);
221 if (!ret)
222 ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480);
11211641 223 if (!ret)
c078ac18 224 ret = reg_write(client, mt9v022->reg->max_total_shutter_width, 480);
11211641 225 if (!ret)
7397bfbe 226 /* default - auto */
9538e1c2 227 ret = reg_clear(client, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1);
11211641 228 if (!ret)
9538e1c2 229 ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0);
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230 if (!ret)
231 return v4l2_ctrl_handler_setup(&mt9v022->hdl);
7397bfbe 232
11211641 233 return ret;
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234}
235
979ea1dd 236static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable)
7397bfbe 237{
c4ce6d14 238 struct i2c_client *client = v4l2_get_subdevdata(sd);
979ea1dd 239 struct mt9v022 *mt9v022 = to_mt9v022(client);
81034663 240
d0bac768 241 if (enable) {
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242 /* Switch to master "normal" mode */
243 mt9v022->chip_control &= ~0x10;
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244 if (is_mt9v022_rev3(mt9v022->chip_version) ||
245 is_mt9v024(mt9v022->chip_version)) {
246 /*
247 * Unset snapshot mode specific settings: clear bit 9
248 * and bit 2 in reg. 0x20 when in normal mode.
249 */
250 if (reg_clear(client, MT9V022_REG32, 0x204))
251 return -EIO;
252 }
253 } else {
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254 /* Switch to snapshot mode */
255 mt9v022->chip_control |= 0x10;
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256 if (is_mt9v022_rev3(mt9v022->chip_version) ||
257 is_mt9v024(mt9v022->chip_version)) {
258 /*
259 * Required settings for snapshot mode: set bit 9
260 * (RST enable) and bit 2 (CR enable) in reg. 0x20
261 * See TechNote TN0960 or TN-09-225.
262 */
263 if (reg_set(client, MT9V022_REG32, 0x204))
264 return -EIO;
265 }
266 }
7397bfbe 267
979ea1dd 268 if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0)
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269 return -EIO;
270 return 0;
271}
272
4f996594 273static int mt9v022_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
ad5f2e85 274{
c4ce6d14 275 struct i2c_client *client = v4l2_get_subdevdata(sd);
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276 struct mt9v022 *mt9v022 = to_mt9v022(client);
277 struct v4l2_rect rect = a->c;
bff79939 278 int min_row, min_blank;
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279 int ret;
280
6a6c8786 281 /* Bayer format - even size lengths */
760697be 282 if (mt9v022->fmts == mt9v022_colour_fmts) {
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283 rect.width = ALIGN(rect.width, 2);
284 rect.height = ALIGN(rect.height, 2);
285 /* Let the user play with the starting pixel */
286 }
287
288 soc_camera_limit_side(&rect.left, &rect.width,
289 MT9V022_COLUMN_SKIP, MT9V022_MIN_WIDTH, MT9V022_MAX_WIDTH);
290
291 soc_camera_limit_side(&rect.top, &rect.height,
292 MT9V022_ROW_SKIP, MT9V022_MIN_HEIGHT, MT9V022_MAX_HEIGHT);
293
7397bfbe 294 /* Like in example app. Contradicts the datasheet though */
9538e1c2 295 ret = reg_read(client, MT9V022_AEC_AGC_ENABLE);
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296 if (ret >= 0) {
297 if (ret & 1) /* Autoexposure */
c078ac18 298 ret = reg_write(client, mt9v022->reg->max_total_shutter_width,
32536108 299 rect.height + mt9v022->y_skip_top + 43);
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300 /*
301 * If autoexposure is off, there is no need to set
302 * MT9V022_TOTAL_SHUTTER_WIDTH here. Autoexposure can be off
303 * only if the user has set exposure manually, using the
304 * V4L2_CID_EXPOSURE_AUTO with the value V4L2_EXPOSURE_MANUAL.
305 * In this case the register MT9V022_TOTAL_SHUTTER_WIDTH
306 * already contains the correct value.
307 */
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308 }
309 /* Setup frame format: defaults apart from width and height */
11211641 310 if (!ret)
6a6c8786 311 ret = reg_write(client, MT9V022_COLUMN_START, rect.left);
11211641 312 if (!ret)
6a6c8786 313 ret = reg_write(client, MT9V022_ROW_START, rect.top);
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314 /*
315 * mt9v022: min total row time is 660 columns, min blanking is 43
316 * mt9v024: min total row time is 690 columns, min blanking is 61
317 */
318 if (is_mt9v024(mt9v022->chip_version)) {
319 min_row = 690;
320 min_blank = 61;
321 } else {
322 min_row = 660;
323 min_blank = 43;
324 }
11211641 325 if (!ret)
6cc1eb70 326 ret = v4l2_ctrl_s_ctrl(mt9v022->hblank,
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327 rect.width > min_row - min_blank ?
328 min_blank : min_row - rect.width);
11211641 329 if (!ret)
6cc1eb70 330 ret = v4l2_ctrl_s_ctrl(mt9v022->vblank, 45);
11211641 331 if (!ret)
6a6c8786 332 ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width);
11211641 333 if (!ret)
9538e1c2 334 ret = reg_write(client, MT9V022_WINDOW_HEIGHT,
32536108 335 rect.height + mt9v022->y_skip_top);
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336
337 if (ret < 0)
338 return ret;
339
e26b3144 340 dev_dbg(&client->dev, "Frame %dx%d pixel\n", rect.width, rect.height);
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341
342 mt9v022->rect = rect;
343
344 return 0;
345}
346
347static int mt9v022_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
348{
c4ce6d14 349 struct i2c_client *client = v4l2_get_subdevdata(sd);
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350 struct mt9v022 *mt9v022 = to_mt9v022(client);
351
352 a->c = mt9v022->rect;
353 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
354
355 return 0;
356}
357
358static int mt9v022_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
359{
360 a->bounds.left = MT9V022_COLUMN_SKIP;
361 a->bounds.top = MT9V022_ROW_SKIP;
362 a->bounds.width = MT9V022_MAX_WIDTH;
363 a->bounds.height = MT9V022_MAX_HEIGHT;
364 a->defrect = a->bounds;
365 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
366 a->pixelaspect.numerator = 1;
367 a->pixelaspect.denominator = 1;
368
369 return 0;
370}
371
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372static int mt9v022_g_fmt(struct v4l2_subdev *sd,
373 struct v4l2_mbus_framefmt *mf)
6a6c8786 374{
c4ce6d14 375 struct i2c_client *client = v4l2_get_subdevdata(sd);
6a6c8786 376 struct mt9v022 *mt9v022 = to_mt9v022(client);
6a6c8786 377
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378 mf->width = mt9v022->rect.width;
379 mf->height = mt9v022->rect.height;
380 mf->code = mt9v022->fmt->code;
381 mf->colorspace = mt9v022->fmt->colorspace;
382 mf->field = V4L2_FIELD_NONE;
7397bfbe 383
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384 return 0;
385}
386
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387static int mt9v022_s_fmt(struct v4l2_subdev *sd,
388 struct v4l2_mbus_framefmt *mf)
09e231b3 389{
c4ce6d14 390 struct i2c_client *client = v4l2_get_subdevdata(sd);
979ea1dd 391 struct mt9v022 *mt9v022 = to_mt9v022(client);
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392 struct v4l2_crop a = {
393 .c = {
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394 .left = mt9v022->rect.left,
395 .top = mt9v022->rect.top,
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396 .width = mf->width,
397 .height = mf->height,
08590b96 398 },
09e231b3 399 };
6a6c8786 400 int ret;
09e231b3 401
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402 /*
403 * The caller provides a supported format, as verified per call to
14178aa5 404 * .try_mbus_fmt(), datawidth is from our supported format list
5d28d525 405 */
760697be 406 switch (mf->code) {
07670433 407 case V4L2_MBUS_FMT_Y8_1X8:
760697be 408 case V4L2_MBUS_FMT_Y10_1X10:
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409 if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM)
410 return -EINVAL;
411 break;
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412 case V4L2_MBUS_FMT_SBGGR8_1X8:
413 case V4L2_MBUS_FMT_SBGGR10_1X10:
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414 if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC)
415 return -EINVAL;
416 break;
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417 default:
418 return -EINVAL;
419 }
420
421 /* No support for scaling on this camera, just crop. */
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422 ret = mt9v022_s_crop(sd, &a);
423 if (!ret) {
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424 mf->width = mt9v022->rect.width;
425 mf->height = mt9v022->rect.height;
426 mt9v022->fmt = mt9v022_find_datafmt(mf->code,
427 mt9v022->fmts, mt9v022->num_fmts);
428 mf->colorspace = mt9v022->fmt->colorspace;
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429 }
430
431 return ret;
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432}
433
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434static int mt9v022_try_fmt(struct v4l2_subdev *sd,
435 struct v4l2_mbus_framefmt *mf)
7397bfbe 436{
c4ce6d14 437 struct i2c_client *client = v4l2_get_subdevdata(sd);
32536108 438 struct mt9v022 *mt9v022 = to_mt9v022(client);
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439 const struct mt9v022_datafmt *fmt;
440 int align = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
441 mf->code == V4L2_MBUS_FMT_SBGGR10_1X10;
64f5905e 442
760697be 443 v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH,
6a6c8786 444 MT9V022_MAX_WIDTH, align,
760697be 445 &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top,
32536108 446 MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0);
7397bfbe 447
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448 fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts,
449 mt9v022->num_fmts);
450 if (!fmt) {
451 fmt = mt9v022->fmt;
452 mf->code = fmt->code;
453 }
454
455 mf->colorspace = fmt->colorspace;
456
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457 return 0;
458}
459
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460static int mt9v022_g_chip_ident(struct v4l2_subdev *sd,
461 struct v4l2_dbg_chip_ident *id)
7397bfbe 462{
c4ce6d14 463 struct i2c_client *client = v4l2_get_subdevdata(sd);
979ea1dd 464 struct mt9v022 *mt9v022 = to_mt9v022(client);
7397bfbe 465
aecde8b5 466 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
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467 return -EINVAL;
468
40e2e092 469 if (id->match.addr != client->addr)
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470 return -ENODEV;
471
472 id->ident = mt9v022->model;
473 id->revision = 0;
474
475 return 0;
476}
477
478#ifdef CONFIG_VIDEO_ADV_DEBUG
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479static int mt9v022_g_register(struct v4l2_subdev *sd,
480 struct v4l2_dbg_register *reg)
7397bfbe 481{
c4ce6d14 482 struct i2c_client *client = v4l2_get_subdevdata(sd);
7397bfbe 483
aecde8b5 484 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff)
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485 return -EINVAL;
486
9538e1c2 487 if (reg->match.addr != client->addr)
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488 return -ENODEV;
489
aecde8b5 490 reg->size = 2;
9538e1c2 491 reg->val = reg_read(client, reg->reg);
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492
493 if (reg->val > 0xffff)
494 return -EIO;
495
496 return 0;
497}
498
979ea1dd 499static int mt9v022_s_register(struct v4l2_subdev *sd,
977ba3b1 500 const struct v4l2_dbg_register *reg)
7397bfbe 501{
c4ce6d14 502 struct i2c_client *client = v4l2_get_subdevdata(sd);
7397bfbe 503
aecde8b5 504 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff)
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505 return -EINVAL;
506
9538e1c2 507 if (reg->match.addr != client->addr)
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GL
508 return -ENODEV;
509
9538e1c2 510 if (reg_write(client, reg->reg, reg->val) < 0)
7397bfbe
GL
511 return -EIO;
512
513 return 0;
514}
515#endif
516
4ec10bac
LP
517static int mt9v022_s_power(struct v4l2_subdev *sd, int on)
518{
519 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 520 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
4ec10bac 521
25a34811 522 return soc_camera_set_power(&client->dev, ssdd, on);
4ec10bac
LP
523}
524
ab7b50ae 525static int mt9v022_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
7397bfbe 526{
ab7b50ae
HV
527 struct mt9v022 *mt9v022 = container_of(ctrl->handler,
528 struct mt9v022, hdl);
529 struct v4l2_subdev *sd = &mt9v022->subdev;
c4ce6d14 530 struct i2c_client *client = v4l2_get_subdevdata(sd);
ab7b50ae
HV
531 struct v4l2_ctrl *gain = mt9v022->gain;
532 struct v4l2_ctrl *exp = mt9v022->exposure;
96c75399 533 unsigned long range;
7397bfbe
GL
534 int data;
535
536 switch (ctrl->id) {
7397bfbe 537 case V4L2_CID_AUTOGAIN:
96c75399
GL
538 data = reg_read(client, MT9V022_ANALOG_GAIN);
539 if (data < 0)
540 return -EIO;
541
ab7b50ae
HV
542 range = gain->maximum - gain->minimum;
543 gain->val = ((data - 16) * range + 24) / 48 + gain->minimum;
544 return 0;
545 case V4L2_CID_EXPOSURE_AUTO:
96c75399
GL
546 data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH);
547 if (data < 0)
548 return -EIO;
549
ab7b50ae
HV
550 range = exp->maximum - exp->minimum;
551 exp->val = ((data - 1) * range + 239) / 479 + exp->minimum;
552 return 0;
6cc1eb70
AG
553 case V4L2_CID_HBLANK:
554 data = reg_read(client, MT9V022_HORIZONTAL_BLANKING);
555 if (data < 0)
556 return -EIO;
557 ctrl->val = data;
558 return 0;
559 case V4L2_CID_VBLANK:
560 data = reg_read(client, MT9V022_VERTICAL_BLANKING);
561 if (data < 0)
562 return -EIO;
563 ctrl->val = data;
564 return 0;
7397bfbe 565 }
ab7b50ae 566 return -EINVAL;
7397bfbe
GL
567}
568
ab7b50ae 569static int mt9v022_s_ctrl(struct v4l2_ctrl *ctrl)
7397bfbe 570{
ab7b50ae
HV
571 struct mt9v022 *mt9v022 = container_of(ctrl->handler,
572 struct mt9v022, hdl);
573 struct v4l2_subdev *sd = &mt9v022->subdev;
c4ce6d14 574 struct i2c_client *client = v4l2_get_subdevdata(sd);
ab7b50ae 575 int data;
7397bfbe
GL
576
577 switch (ctrl->id) {
578 case V4L2_CID_VFLIP:
ab7b50ae 579 if (ctrl->val)
9538e1c2 580 data = reg_set(client, MT9V022_READ_MODE, 0x10);
7397bfbe 581 else
9538e1c2 582 data = reg_clear(client, MT9V022_READ_MODE, 0x10);
7397bfbe
GL
583 if (data < 0)
584 return -EIO;
ab7b50ae 585 return 0;
7397bfbe 586 case V4L2_CID_HFLIP:
ab7b50ae 587 if (ctrl->val)
9538e1c2 588 data = reg_set(client, MT9V022_READ_MODE, 0x20);
7397bfbe 589 else
9538e1c2 590 data = reg_clear(client, MT9V022_READ_MODE, 0x20);
7397bfbe
GL
591 if (data < 0)
592 return -EIO;
ab7b50ae
HV
593 return 0;
594 case V4L2_CID_AUTOGAIN:
595 if (ctrl->val) {
596 if (reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0)
597 return -EIO;
598 } else {
599 struct v4l2_ctrl *gain = mt9v022->gain;
600 /* mt9v022 has minimum == default */
601 unsigned long range = gain->maximum - gain->minimum;
96c75399 602 /* Valid values 16 to 64, 32 to 64 must be even. */
ab7b50ae 603 unsigned long gain_val = ((gain->val - gain->minimum) *
96c75399 604 48 + range / 2) / range + 16;
ab7b50ae
HV
605
606 if (gain_val >= 32)
607 gain_val &= ~1;
608
5d28d525
GL
609 /*
610 * The user wants to set gain manually, hope, she
611 * knows, what she's doing... Switch AGC off.
612 */
9538e1c2 613 if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0)
7397bfbe
GL
614 return -EIO;
615
96c75399 616 dev_dbg(&client->dev, "Setting gain from %d to %lu\n",
ab7b50ae
HV
617 reg_read(client, MT9V022_ANALOG_GAIN), gain_val);
618 if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0)
7397bfbe 619 return -EIO;
7397bfbe 620 }
ab7b50ae
HV
621 return 0;
622 case V4L2_CID_EXPOSURE_AUTO:
623 if (ctrl->val == V4L2_EXPOSURE_AUTO) {
624 data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x1);
625 } else {
626 struct v4l2_ctrl *exp = mt9v022->exposure;
627 unsigned long range = exp->maximum - exp->minimum;
628 unsigned long shutter = ((exp->val - exp->minimum) *
629 479 + range / 2) / range + 1;
630
5d28d525
GL
631 /*
632 * The user wants to set shutter width manually, hope,
633 * she knows, what she's doing... Switch AEC off.
634 */
ab7b50ae
HV
635 data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1);
636 if (data < 0)
7397bfbe 637 return -EIO;
85f8be68 638 dev_dbg(&client->dev, "Shutter width from %d to %lu\n",
ab7b50ae
HV
639 reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH),
640 shutter);
9538e1c2 641 if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
ab7b50ae 642 shutter) < 0)
7397bfbe 643 return -EIO;
7397bfbe 644 }
ab7b50ae 645 return 0;
6cc1eb70
AG
646 case V4L2_CID_HBLANK:
647 if (reg_write(client, MT9V022_HORIZONTAL_BLANKING,
648 ctrl->val) < 0)
649 return -EIO;
650 return 0;
651 case V4L2_CID_VBLANK:
652 if (reg_write(client, MT9V022_VERTICAL_BLANKING,
653 ctrl->val) < 0)
654 return -EIO;
655 return 0;
7397bfbe 656 }
ab7b50ae 657 return -EINVAL;
7397bfbe
GL
658}
659
5d28d525
GL
660/*
661 * Interface active, can use i2c. If it fails, it can indeed mean, that
662 * this wasn't our capture interface, so, we wait for the right one
663 */
14178aa5 664static int mt9v022_video_probe(struct i2c_client *client)
7397bfbe 665{
979ea1dd 666 struct mt9v022 *mt9v022 = to_mt9v022(client);
25a34811 667 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
7397bfbe
GL
668 s32 data;
669 int ret;
e958e27a 670 unsigned long flags;
7397bfbe 671
4bbc6d52
LP
672 ret = mt9v022_s_power(&mt9v022->subdev, 1);
673 if (ret < 0)
674 return ret;
675
7397bfbe 676 /* Read out the chip version register */
9538e1c2 677 data = reg_read(client, MT9V022_CHIP_VERSION);
7397bfbe 678
c078ac18
AG
679 /* must be 0x1311, 0x1313 or 0x1324 */
680 if (data != 0x1311 && data != 0x1313 && data != 0x1324) {
7397bfbe 681 ret = -ENODEV;
85f8be68 682 dev_info(&client->dev, "No MT9V022 found, ID register 0x%x\n",
7397bfbe
GL
683 data);
684 goto ei2c;
685 }
686
d0bac768
AG
687 mt9v022->chip_version = data;
688
c078ac18
AG
689 mt9v022->reg = is_mt9v024(data) ? &mt9v024_register :
690 &mt9v022_register;
691
7397bfbe 692 /* Soft reset */
9538e1c2 693 ret = reg_write(client, MT9V022_RESET, 1);
7397bfbe
GL
694 if (ret < 0)
695 goto ei2c;
696 /* 15 clock cycles */
697 udelay(200);
9538e1c2 698 if (reg_read(client, MT9V022_RESET)) {
85f8be68 699 dev_err(&client->dev, "Resetting MT9V022 failed!\n");
40e2e092
GL
700 if (ret > 0)
701 ret = -EIO;
7397bfbe
GL
702 goto ei2c;
703 }
704
705 /* Set monochrome or colour sensor type */
706 if (sensor_type && (!strcmp("colour", sensor_type) ||
707 !strcmp("color", sensor_type))) {
9538e1c2 708 ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11);
7397bfbe 709 mt9v022->model = V4L2_IDENT_MT9V022IX7ATC;
760697be 710 mt9v022->fmts = mt9v022_colour_fmts;
7397bfbe 711 } else {
9538e1c2 712 ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11);
7397bfbe 713 mt9v022->model = V4L2_IDENT_MT9V022IX7ATM;
760697be 714 mt9v022->fmts = mt9v022_monochrome_fmts;
7397bfbe
GL
715 }
716
e958e27a 717 if (ret < 0)
40e2e092 718 goto ei2c;
e958e27a 719
760697be 720 mt9v022->num_fmts = 0;
e958e27a
SH
721
722 /*
723 * This is a 10bit sensor, so by default we only allow 10bit.
724 * The platform may support different bus widths due to
725 * different routing of the data lines.
726 */
25a34811
GL
727 if (ssdd->query_bus_param)
728 flags = ssdd->query_bus_param(ssdd);
e958e27a
SH
729 else
730 flags = SOCAM_DATAWIDTH_10;
731
732 if (flags & SOCAM_DATAWIDTH_10)
760697be 733 mt9v022->num_fmts++;
e958e27a 734 else
760697be 735 mt9v022->fmts++;
e958e27a
SH
736
737 if (flags & SOCAM_DATAWIDTH_8)
760697be 738 mt9v022->num_fmts++;
e958e27a 739
760697be 740 mt9v022->fmt = &mt9v022->fmts[0];
6a6c8786 741
85f8be68 742 dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n",
7397bfbe
GL
743 data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ?
744 "monochrome" : "colour");
745
a4c56fd8
GL
746 ret = mt9v022_init(client);
747 if (ret < 0)
748 dev_err(&client->dev, "Failed to initialise the camera\n");
749
7397bfbe 750ei2c:
4bbc6d52 751 mt9v022_s_power(&mt9v022->subdev, 0);
7397bfbe
GL
752 return ret;
753}
754
32536108
GL
755static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
756{
c4ce6d14 757 struct i2c_client *client = v4l2_get_subdevdata(sd);
32536108
GL
758 struct mt9v022 *mt9v022 = to_mt9v022(client);
759
760 *lines = mt9v022->y_skip_top;
761
762 return 0;
763}
764
ab7b50ae
HV
765static const struct v4l2_ctrl_ops mt9v022_ctrl_ops = {
766 .g_volatile_ctrl = mt9v022_g_volatile_ctrl,
767 .s_ctrl = mt9v022_s_ctrl,
768};
769
979ea1dd 770static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = {
979ea1dd
GL
771 .g_chip_ident = mt9v022_g_chip_ident,
772#ifdef CONFIG_VIDEO_ADV_DEBUG
773 .g_register = mt9v022_g_register,
774 .s_register = mt9v022_s_register,
775#endif
4ec10bac 776 .s_power = mt9v022_s_power,
979ea1dd
GL
777};
778
3805f201 779static int mt9v022_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
760697be
GL
780 enum v4l2_mbus_pixelcode *code)
781{
c4ce6d14 782 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be
GL
783 struct mt9v022 *mt9v022 = to_mt9v022(client);
784
3805f201 785 if (index >= mt9v022->num_fmts)
760697be
GL
786 return -EINVAL;
787
788 *code = mt9v022->fmts[index].code;
789 return 0;
790}
791
e8e2c70c
GL
792static int mt9v022_g_mbus_config(struct v4l2_subdev *sd,
793 struct v4l2_mbus_config *cfg)
794{
795 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 796 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
e8e2c70c
GL
797
798 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE |
799 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
800 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW |
801 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW |
802 V4L2_MBUS_DATA_ACTIVE_HIGH;
803 cfg->type = V4L2_MBUS_PARALLEL;
25a34811 804 cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
e8e2c70c
GL
805
806 return 0;
807}
808
809static int mt9v022_s_mbus_config(struct v4l2_subdev *sd,
810 const struct v4l2_mbus_config *cfg)
811{
812 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 813 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
e8e2c70c 814 struct mt9v022 *mt9v022 = to_mt9v022(client);
25a34811 815 unsigned long flags = soc_camera_apply_board_flags(ssdd, cfg);
443f483a 816 unsigned int bps = soc_mbus_get_fmtdesc(mt9v022->fmt->code)->bits_per_sample;
e8e2c70c
GL
817 int ret;
818 u16 pixclk = 0;
819
25a34811
GL
820 if (ssdd->set_bus_param) {
821 ret = ssdd->set_bus_param(ssdd, 1 << (bps - 1));
e8e2c70c
GL
822 if (ret)
823 return ret;
824 } else if (bps != 10) {
825 /*
826 * Without board specific bus width settings we only support the
827 * sensors native bus width
828 */
829 return -EINVAL;
830 }
831
832 if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
833 pixclk |= 0x10;
834
835 if (!(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH))
836 pixclk |= 0x1;
837
838 if (!(flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH))
839 pixclk |= 0x2;
840
c078ac18 841 ret = reg_write(client, mt9v022->reg->pixclk_fv_lv, pixclk);
e8e2c70c
GL
842 if (ret < 0)
843 return ret;
844
845 if (!(flags & V4L2_MBUS_MASTER))
846 mt9v022->chip_control &= ~0x8;
847
848 ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
849 if (ret < 0)
850 return ret;
851
852 dev_dbg(&client->dev, "Calculated pixclk 0x%x, chip control 0x%x\n",
853 pixclk, mt9v022->chip_control);
854
855 return 0;
856}
857
979ea1dd
GL
858static struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = {
859 .s_stream = mt9v022_s_stream,
760697be
GL
860 .s_mbus_fmt = mt9v022_s_fmt,
861 .g_mbus_fmt = mt9v022_g_fmt,
862 .try_mbus_fmt = mt9v022_try_fmt,
08590b96 863 .s_crop = mt9v022_s_crop,
6a6c8786
GL
864 .g_crop = mt9v022_g_crop,
865 .cropcap = mt9v022_cropcap,
760697be 866 .enum_mbus_fmt = mt9v022_enum_fmt,
e8e2c70c
GL
867 .g_mbus_config = mt9v022_g_mbus_config,
868 .s_mbus_config = mt9v022_s_mbus_config,
979ea1dd
GL
869};
870
32536108
GL
871static struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = {
872 .g_skip_top_lines = mt9v022_g_skip_top_lines,
873};
874
979ea1dd
GL
875static struct v4l2_subdev_ops mt9v022_subdev_ops = {
876 .core = &mt9v022_subdev_core_ops,
877 .video = &mt9v022_subdev_video_ops,
32536108 878 .sensor = &mt9v022_subdev_sensor_ops,
979ea1dd
GL
879};
880
d2653e92
JD
881static int mt9v022_probe(struct i2c_client *client,
882 const struct i2c_device_id *did)
7397bfbe
GL
883{
884 struct mt9v022 *mt9v022;
25a34811 885 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
7397bfbe 886 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
daf16bab 887 struct mt9v022_platform_data *pdata;
7397bfbe
GL
888 int ret;
889
25a34811 890 if (!ssdd) {
7397bfbe
GL
891 dev_err(&client->dev, "MT9V022 driver needs platform data\n");
892 return -EINVAL;
893 }
894
895 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
896 dev_warn(&adapter->dev,
897 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
898 return -EIO;
899 }
900
70e176a5 901 mt9v022 = devm_kzalloc(&client->dev, sizeof(struct mt9v022), GFP_KERNEL);
7397bfbe
GL
902 if (!mt9v022)
903 return -ENOMEM;
904
25a34811 905 pdata = ssdd->drv_priv;
979ea1dd 906 v4l2_i2c_subdev_init(&mt9v022->subdev, client, &mt9v022_subdev_ops);
ab7b50ae
HV
907 v4l2_ctrl_handler_init(&mt9v022->hdl, 6);
908 v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
909 V4L2_CID_VFLIP, 0, 1, 1, 0);
910 v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
911 V4L2_CID_HFLIP, 0, 1, 1, 0);
912 mt9v022->autogain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
913 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
914 mt9v022->gain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
915 V4L2_CID_GAIN, 0, 127, 1, 64);
916
917 /*
918 * Simulated autoexposure. If enabled, we calculate shutter width
919 * ourselves in the driver based on vertical blanking and frame width
920 */
921 mt9v022->autoexposure = v4l2_ctrl_new_std_menu(&mt9v022->hdl,
922 &mt9v022_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
923 V4L2_EXPOSURE_AUTO);
924 mt9v022->exposure = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
925 V4L2_CID_EXPOSURE, 1, 255, 1, 255);
926
6cc1eb70
AG
927 mt9v022->hblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
928 V4L2_CID_HBLANK, MT9V022_HORIZONTAL_BLANKING_MIN,
929 MT9V022_HORIZONTAL_BLANKING_MAX, 1,
930 MT9V022_HORIZONTAL_BLANKING_DEF);
931
932 mt9v022->vblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
933 V4L2_CID_VBLANK, MT9V022_VERTICAL_BLANKING_MIN,
934 MT9V022_VERTICAL_BLANKING_MAX, 1,
935 MT9V022_VERTICAL_BLANKING_DEF);
936
ab7b50ae
HV
937 mt9v022->subdev.ctrl_handler = &mt9v022->hdl;
938 if (mt9v022->hdl.error) {
939 int err = mt9v022->hdl.error;
940
6cc1eb70 941 dev_err(&client->dev, "control initialisation err %d\n", err);
ab7b50ae
HV
942 return err;
943 }
944 v4l2_ctrl_auto_cluster(2, &mt9v022->autoexposure,
945 V4L2_EXPOSURE_MANUAL, true);
946 v4l2_ctrl_auto_cluster(2, &mt9v022->autogain, 0, true);
979ea1dd 947
7397bfbe 948 mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT;
7397bfbe 949
96c75399 950 /*
b6f50b49
AG
951 * On some platforms the first read out line is corrupted.
952 * Workaround it by skipping if indicated by platform data.
96c75399 953 */
b6f50b49 954 mt9v022->y_skip_top = pdata ? pdata->y_skip_top : 0;
6a6c8786
GL
955 mt9v022->rect.left = MT9V022_COLUMN_SKIP;
956 mt9v022->rect.top = MT9V022_ROW_SKIP;
957 mt9v022->rect.width = MT9V022_MAX_WIDTH;
958 mt9v022->rect.height = MT9V022_MAX_HEIGHT;
959
14178aa5 960 ret = mt9v022_video_probe(client);
70e176a5 961 if (ret)
ab7b50ae 962 v4l2_ctrl_handler_free(&mt9v022->hdl);
7397bfbe 963
7397bfbe
GL
964 return ret;
965}
966
967static int mt9v022_remove(struct i2c_client *client)
968{
979ea1dd 969 struct mt9v022 *mt9v022 = to_mt9v022(client);
25a34811 970 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
7397bfbe 971
ab7b50ae 972 v4l2_device_unregister_subdev(&mt9v022->subdev);
25a34811
GL
973 if (ssdd->free_bus)
974 ssdd->free_bus(ssdd);
ab7b50ae 975 v4l2_ctrl_handler_free(&mt9v022->hdl);
7397bfbe
GL
976
977 return 0;
978}
3760f736
JD
979static const struct i2c_device_id mt9v022_id[] = {
980 { "mt9v022", 0 },
981 { }
982};
983MODULE_DEVICE_TABLE(i2c, mt9v022_id);
984
7397bfbe
GL
985static struct i2c_driver mt9v022_i2c_driver = {
986 .driver = {
987 .name = "mt9v022",
988 },
989 .probe = mt9v022_probe,
990 .remove = mt9v022_remove,
3760f736 991 .id_table = mt9v022_id,
7397bfbe
GL
992};
993
c6e8d86f 994module_i2c_driver(mt9v022_i2c_driver);
7397bfbe
GL
995
996MODULE_DESCRIPTION("Micron MT9V022 Camera driver");
997MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
998MODULE_LICENSE("GPL");
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