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7397bfbe GL |
1 | /* |
2 | * Driver for MT9V022 CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/videodev2.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/log2.h> | |
7a707b89 | 16 | #include <linux/module.h> |
7397bfbe | 17 | |
b6f50b49 | 18 | #include <media/mt9v022.h> |
e8e2c70c GL |
19 | #include <media/soc_camera.h> |
20 | #include <media/soc_mediabus.h> | |
979ea1dd | 21 | #include <media/v4l2-subdev.h> |
7397bfbe | 22 | #include <media/v4l2-chip-ident.h> |
ab7b50ae | 23 | #include <media/v4l2-ctrls.h> |
7397bfbe | 24 | |
5d28d525 GL |
25 | /* |
26 | * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c | |
22cf83fa | 27 | * The platform has to define struct i2c_board_info objects and link to them |
5d28d525 GL |
28 | * from struct soc_camera_link |
29 | */ | |
7397bfbe GL |
30 | |
31 | static char *sensor_type; | |
32 | module_param(sensor_type, charp, S_IRUGO); | |
61a2d07d | 33 | MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\""); |
7397bfbe GL |
34 | |
35 | /* mt9v022 selected register addresses */ | |
36 | #define MT9V022_CHIP_VERSION 0x00 | |
37 | #define MT9V022_COLUMN_START 0x01 | |
38 | #define MT9V022_ROW_START 0x02 | |
39 | #define MT9V022_WINDOW_HEIGHT 0x03 | |
40 | #define MT9V022_WINDOW_WIDTH 0x04 | |
41 | #define MT9V022_HORIZONTAL_BLANKING 0x05 | |
42 | #define MT9V022_VERTICAL_BLANKING 0x06 | |
43 | #define MT9V022_CHIP_CONTROL 0x07 | |
44 | #define MT9V022_SHUTTER_WIDTH1 0x08 | |
45 | #define MT9V022_SHUTTER_WIDTH2 0x09 | |
46 | #define MT9V022_SHUTTER_WIDTH_CTRL 0x0a | |
47 | #define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b | |
48 | #define MT9V022_RESET 0x0c | |
49 | #define MT9V022_READ_MODE 0x0d | |
50 | #define MT9V022_MONITOR_MODE 0x0e | |
51 | #define MT9V022_PIXEL_OPERATION_MODE 0x0f | |
52 | #define MT9V022_LED_OUT_CONTROL 0x1b | |
53 | #define MT9V022_ADC_MODE_CONTROL 0x1c | |
d0bac768 | 54 | #define MT9V022_REG32 0x20 |
96c75399 | 55 | #define MT9V022_ANALOG_GAIN 0x35 |
7397bfbe GL |
56 | #define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47 |
57 | #define MT9V022_PIXCLK_FV_LV 0x74 | |
58 | #define MT9V022_DIGITAL_TEST_PATTERN 0x7f | |
59 | #define MT9V022_AEC_AGC_ENABLE 0xAF | |
60 | #define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD | |
61 | ||
c078ac18 AG |
62 | /* mt9v024 partial list register addresses changes with respect to mt9v022 */ |
63 | #define MT9V024_PIXCLK_FV_LV 0x72 | |
64 | #define MT9V024_MAX_TOTAL_SHUTTER_WIDTH 0xAD | |
65 | ||
7397bfbe GL |
66 | /* Progressive scan, master, defaults */ |
67 | #define MT9V022_CHIP_CONTROL_DEFAULT 0x188 | |
68 | ||
6a6c8786 GL |
69 | #define MT9V022_MAX_WIDTH 752 |
70 | #define MT9V022_MAX_HEIGHT 480 | |
71 | #define MT9V022_MIN_WIDTH 48 | |
72 | #define MT9V022_MIN_HEIGHT 32 | |
73 | #define MT9V022_COLUMN_SKIP 1 | |
74 | #define MT9V022_ROW_SKIP 4 | |
75 | ||
6cc1eb70 AG |
76 | #define MT9V022_HORIZONTAL_BLANKING_MIN 43 |
77 | #define MT9V022_HORIZONTAL_BLANKING_MAX 1023 | |
78 | #define MT9V022_HORIZONTAL_BLANKING_DEF 94 | |
79 | #define MT9V022_VERTICAL_BLANKING_MIN 2 | |
80 | #define MT9V022_VERTICAL_BLANKING_MAX 3000 | |
81 | #define MT9V022_VERTICAL_BLANKING_DEF 45 | |
82 | ||
d0bac768 AG |
83 | #define is_mt9v022_rev3(id) (id == 0x1313) |
84 | #define is_mt9v024(id) (id == 0x1324) | |
c078ac18 | 85 | |
760697be GL |
86 | /* MT9V022 has only one fixed colorspace per pixelcode */ |
87 | struct mt9v022_datafmt { | |
88 | enum v4l2_mbus_pixelcode code; | |
89 | enum v4l2_colorspace colorspace; | |
90 | }; | |
91 | ||
92 | /* Find a data format by a pixel code in an array */ | |
93 | static const struct mt9v022_datafmt *mt9v022_find_datafmt( | |
94 | enum v4l2_mbus_pixelcode code, const struct mt9v022_datafmt *fmt, | |
95 | int n) | |
96 | { | |
97 | int i; | |
98 | for (i = 0; i < n; i++) | |
99 | if (fmt[i].code == code) | |
100 | return fmt + i; | |
101 | ||
102 | return NULL; | |
103 | } | |
104 | ||
105 | static const struct mt9v022_datafmt mt9v022_colour_fmts[] = { | |
5d28d525 GL |
106 | /* |
107 | * Order important: first natively supported, | |
108 | * second supported with a GPIO extender | |
109 | */ | |
760697be GL |
110 | {V4L2_MBUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, |
111 | {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, | |
bb55de3b GL |
112 | }; |
113 | ||
760697be | 114 | static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = { |
bb55de3b | 115 | /* Order important - see above */ |
760697be | 116 | {V4L2_MBUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG}, |
07670433 | 117 | {V4L2_MBUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG}, |
7397bfbe GL |
118 | }; |
119 | ||
c078ac18 AG |
120 | /* only registers with different addresses on different mt9v02x sensors */ |
121 | struct mt9v02x_register { | |
122 | u8 max_total_shutter_width; | |
123 | u8 pixclk_fv_lv; | |
124 | }; | |
125 | ||
126 | static const struct mt9v02x_register mt9v022_register = { | |
127 | .max_total_shutter_width = MT9V022_MAX_TOTAL_SHUTTER_WIDTH, | |
128 | .pixclk_fv_lv = MT9V022_PIXCLK_FV_LV, | |
129 | }; | |
130 | ||
131 | static const struct mt9v02x_register mt9v024_register = { | |
132 | .max_total_shutter_width = MT9V024_MAX_TOTAL_SHUTTER_WIDTH, | |
133 | .pixclk_fv_lv = MT9V024_PIXCLK_FV_LV, | |
134 | }; | |
135 | ||
7397bfbe | 136 | struct mt9v022 { |
979ea1dd | 137 | struct v4l2_subdev subdev; |
ab7b50ae HV |
138 | struct v4l2_ctrl_handler hdl; |
139 | struct { | |
140 | /* exposure/auto-exposure cluster */ | |
141 | struct v4l2_ctrl *autoexposure; | |
142 | struct v4l2_ctrl *exposure; | |
143 | }; | |
144 | struct { | |
145 | /* gain/auto-gain cluster */ | |
146 | struct v4l2_ctrl *autogain; | |
147 | struct v4l2_ctrl *gain; | |
148 | }; | |
6cc1eb70 AG |
149 | struct v4l2_ctrl *hblank; |
150 | struct v4l2_ctrl *vblank; | |
6a6c8786 | 151 | struct v4l2_rect rect; /* Sensor window */ |
760697be GL |
152 | const struct mt9v022_datafmt *fmt; |
153 | const struct mt9v022_datafmt *fmts; | |
c078ac18 | 154 | const struct mt9v02x_register *reg; |
760697be | 155 | int num_fmts; |
7fb0fd05 | 156 | int model; /* V4L2_IDENT_MT9V022* codes from v4l2-chip-ident.h */ |
7397bfbe | 157 | u16 chip_control; |
d0bac768 | 158 | u16 chip_version; |
32536108 | 159 | unsigned short y_skip_top; /* Lines to skip at the top */ |
7397bfbe GL |
160 | }; |
161 | ||
979ea1dd GL |
162 | static struct mt9v022 *to_mt9v022(const struct i2c_client *client) |
163 | { | |
164 | return container_of(i2c_get_clientdata(client), struct mt9v022, subdev); | |
165 | } | |
166 | ||
9538e1c2 | 167 | static int reg_read(struct i2c_client *client, const u8 reg) |
7397bfbe | 168 | { |
3f877045 | 169 | return i2c_smbus_read_word_swapped(client, reg); |
7397bfbe GL |
170 | } |
171 | ||
9538e1c2 | 172 | static int reg_write(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
173 | const u16 data) |
174 | { | |
3f877045 | 175 | return i2c_smbus_write_word_swapped(client, reg, data); |
7397bfbe GL |
176 | } |
177 | ||
9538e1c2 | 178 | static int reg_set(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
179 | const u16 data) |
180 | { | |
181 | int ret; | |
182 | ||
9538e1c2 | 183 | ret = reg_read(client, reg); |
7397bfbe GL |
184 | if (ret < 0) |
185 | return ret; | |
9538e1c2 | 186 | return reg_write(client, reg, ret | data); |
7397bfbe GL |
187 | } |
188 | ||
9538e1c2 | 189 | static int reg_clear(struct i2c_client *client, const u8 reg, |
7397bfbe GL |
190 | const u16 data) |
191 | { | |
192 | int ret; | |
193 | ||
9538e1c2 | 194 | ret = reg_read(client, reg); |
7397bfbe GL |
195 | if (ret < 0) |
196 | return ret; | |
9538e1c2 | 197 | return reg_write(client, reg, ret & ~data); |
7397bfbe GL |
198 | } |
199 | ||
a4c56fd8 | 200 | static int mt9v022_init(struct i2c_client *client) |
7397bfbe | 201 | { |
979ea1dd | 202 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
7397bfbe GL |
203 | int ret; |
204 | ||
5d28d525 GL |
205 | /* |
206 | * Almost the default mode: master, parallel, simultaneous, and an | |
7397bfbe | 207 | * undocumented bit 0x200, which is present in table 7, but not in 8, |
5d28d525 GL |
208 | * plus snapshot mode to disable scan for now |
209 | */ | |
7397bfbe | 210 | mt9v022->chip_control |= 0x10; |
9538e1c2 | 211 | ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); |
11211641 | 212 | if (!ret) |
9538e1c2 | 213 | ret = reg_write(client, MT9V022_READ_MODE, 0x300); |
7397bfbe GL |
214 | |
215 | /* All defaults */ | |
11211641 | 216 | if (!ret) |
7397bfbe | 217 | /* AEC, AGC on */ |
9538e1c2 | 218 | ret = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x3); |
96c75399 GL |
219 | if (!ret) |
220 | ret = reg_write(client, MT9V022_ANALOG_GAIN, 16); | |
221 | if (!ret) | |
222 | ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480); | |
11211641 | 223 | if (!ret) |
c078ac18 | 224 | ret = reg_write(client, mt9v022->reg->max_total_shutter_width, 480); |
11211641 | 225 | if (!ret) |
7397bfbe | 226 | /* default - auto */ |
9538e1c2 | 227 | ret = reg_clear(client, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1); |
11211641 | 228 | if (!ret) |
9538e1c2 | 229 | ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0); |
ab7b50ae HV |
230 | if (!ret) |
231 | return v4l2_ctrl_handler_setup(&mt9v022->hdl); | |
7397bfbe | 232 | |
11211641 | 233 | return ret; |
7397bfbe GL |
234 | } |
235 | ||
979ea1dd | 236 | static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable) |
7397bfbe | 237 | { |
c4ce6d14 | 238 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 239 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
81034663 | 240 | |
d0bac768 | 241 | if (enable) { |
979ea1dd GL |
242 | /* Switch to master "normal" mode */ |
243 | mt9v022->chip_control &= ~0x10; | |
d0bac768 AG |
244 | if (is_mt9v022_rev3(mt9v022->chip_version) || |
245 | is_mt9v024(mt9v022->chip_version)) { | |
246 | /* | |
247 | * Unset snapshot mode specific settings: clear bit 9 | |
248 | * and bit 2 in reg. 0x20 when in normal mode. | |
249 | */ | |
250 | if (reg_clear(client, MT9V022_REG32, 0x204)) | |
251 | return -EIO; | |
252 | } | |
253 | } else { | |
979ea1dd GL |
254 | /* Switch to snapshot mode */ |
255 | mt9v022->chip_control |= 0x10; | |
d0bac768 AG |
256 | if (is_mt9v022_rev3(mt9v022->chip_version) || |
257 | is_mt9v024(mt9v022->chip_version)) { | |
258 | /* | |
259 | * Required settings for snapshot mode: set bit 9 | |
260 | * (RST enable) and bit 2 (CR enable) in reg. 0x20 | |
261 | * See TechNote TN0960 or TN-09-225. | |
262 | */ | |
263 | if (reg_set(client, MT9V022_REG32, 0x204)) | |
264 | return -EIO; | |
265 | } | |
266 | } | |
7397bfbe | 267 | |
979ea1dd | 268 | if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0) |
7397bfbe GL |
269 | return -EIO; |
270 | return 0; | |
271 | } | |
272 | ||
4f996594 | 273 | static int mt9v022_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a) |
ad5f2e85 | 274 | { |
c4ce6d14 | 275 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 GL |
276 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
277 | struct v4l2_rect rect = a->c; | |
ad5f2e85 GL |
278 | int ret; |
279 | ||
6a6c8786 | 280 | /* Bayer format - even size lengths */ |
760697be | 281 | if (mt9v022->fmts == mt9v022_colour_fmts) { |
6a6c8786 GL |
282 | rect.width = ALIGN(rect.width, 2); |
283 | rect.height = ALIGN(rect.height, 2); | |
284 | /* Let the user play with the starting pixel */ | |
285 | } | |
286 | ||
287 | soc_camera_limit_side(&rect.left, &rect.width, | |
288 | MT9V022_COLUMN_SKIP, MT9V022_MIN_WIDTH, MT9V022_MAX_WIDTH); | |
289 | ||
290 | soc_camera_limit_side(&rect.top, &rect.height, | |
291 | MT9V022_ROW_SKIP, MT9V022_MIN_HEIGHT, MT9V022_MAX_HEIGHT); | |
292 | ||
7397bfbe | 293 | /* Like in example app. Contradicts the datasheet though */ |
9538e1c2 | 294 | ret = reg_read(client, MT9V022_AEC_AGC_ENABLE); |
7397bfbe GL |
295 | if (ret >= 0) { |
296 | if (ret & 1) /* Autoexposure */ | |
c078ac18 | 297 | ret = reg_write(client, mt9v022->reg->max_total_shutter_width, |
32536108 | 298 | rect.height + mt9v022->y_skip_top + 43); |
9bb047cd AG |
299 | /* |
300 | * If autoexposure is off, there is no need to set | |
301 | * MT9V022_TOTAL_SHUTTER_WIDTH here. Autoexposure can be off | |
302 | * only if the user has set exposure manually, using the | |
303 | * V4L2_CID_EXPOSURE_AUTO with the value V4L2_EXPOSURE_MANUAL. | |
304 | * In this case the register MT9V022_TOTAL_SHUTTER_WIDTH | |
305 | * already contains the correct value. | |
306 | */ | |
7397bfbe GL |
307 | } |
308 | /* Setup frame format: defaults apart from width and height */ | |
11211641 | 309 | if (!ret) |
6a6c8786 | 310 | ret = reg_write(client, MT9V022_COLUMN_START, rect.left); |
11211641 | 311 | if (!ret) |
6a6c8786 | 312 | ret = reg_write(client, MT9V022_ROW_START, rect.top); |
11211641 | 313 | if (!ret) |
5d28d525 GL |
314 | /* |
315 | * Default 94, Phytec driver says: | |
316 | * "width + horizontal blank >= 660" | |
317 | */ | |
6cc1eb70 AG |
318 | ret = v4l2_ctrl_s_ctrl(mt9v022->hblank, |
319 | rect.width > 660 - 43 ? 43 : 660 - rect.width); | |
11211641 | 320 | if (!ret) |
6cc1eb70 | 321 | ret = v4l2_ctrl_s_ctrl(mt9v022->vblank, 45); |
11211641 | 322 | if (!ret) |
6a6c8786 | 323 | ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width); |
11211641 | 324 | if (!ret) |
9538e1c2 | 325 | ret = reg_write(client, MT9V022_WINDOW_HEIGHT, |
32536108 | 326 | rect.height + mt9v022->y_skip_top); |
7397bfbe GL |
327 | |
328 | if (ret < 0) | |
329 | return ret; | |
330 | ||
e26b3144 | 331 | dev_dbg(&client->dev, "Frame %dx%d pixel\n", rect.width, rect.height); |
6a6c8786 GL |
332 | |
333 | mt9v022->rect = rect; | |
334 | ||
335 | return 0; | |
336 | } | |
337 | ||
338 | static int mt9v022_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
339 | { | |
c4ce6d14 | 340 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 GL |
341 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
342 | ||
343 | a->c = mt9v022->rect; | |
344 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
345 | ||
346 | return 0; | |
347 | } | |
348 | ||
349 | static int mt9v022_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
350 | { | |
351 | a->bounds.left = MT9V022_COLUMN_SKIP; | |
352 | a->bounds.top = MT9V022_ROW_SKIP; | |
353 | a->bounds.width = MT9V022_MAX_WIDTH; | |
354 | a->bounds.height = MT9V022_MAX_HEIGHT; | |
355 | a->defrect = a->bounds; | |
356 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
357 | a->pixelaspect.numerator = 1; | |
358 | a->pixelaspect.denominator = 1; | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
760697be GL |
363 | static int mt9v022_g_fmt(struct v4l2_subdev *sd, |
364 | struct v4l2_mbus_framefmt *mf) | |
6a6c8786 | 365 | { |
c4ce6d14 | 366 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 | 367 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
6a6c8786 | 368 | |
760697be GL |
369 | mf->width = mt9v022->rect.width; |
370 | mf->height = mt9v022->rect.height; | |
371 | mf->code = mt9v022->fmt->code; | |
372 | mf->colorspace = mt9v022->fmt->colorspace; | |
373 | mf->field = V4L2_FIELD_NONE; | |
7397bfbe | 374 | |
7397bfbe GL |
375 | return 0; |
376 | } | |
377 | ||
760697be GL |
378 | static int mt9v022_s_fmt(struct v4l2_subdev *sd, |
379 | struct v4l2_mbus_framefmt *mf) | |
09e231b3 | 380 | { |
c4ce6d14 | 381 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 382 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
08590b96 GL |
383 | struct v4l2_crop a = { |
384 | .c = { | |
6a6c8786 GL |
385 | .left = mt9v022->rect.left, |
386 | .top = mt9v022->rect.top, | |
760697be GL |
387 | .width = mf->width, |
388 | .height = mf->height, | |
08590b96 | 389 | }, |
09e231b3 | 390 | }; |
6a6c8786 | 391 | int ret; |
09e231b3 | 392 | |
5d28d525 GL |
393 | /* |
394 | * The caller provides a supported format, as verified per call to | |
14178aa5 | 395 | * .try_mbus_fmt(), datawidth is from our supported format list |
5d28d525 | 396 | */ |
760697be | 397 | switch (mf->code) { |
07670433 | 398 | case V4L2_MBUS_FMT_Y8_1X8: |
760697be | 399 | case V4L2_MBUS_FMT_Y10_1X10: |
09e231b3 GL |
400 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATM) |
401 | return -EINVAL; | |
402 | break; | |
760697be GL |
403 | case V4L2_MBUS_FMT_SBGGR8_1X8: |
404 | case V4L2_MBUS_FMT_SBGGR10_1X10: | |
09e231b3 GL |
405 | if (mt9v022->model != V4L2_IDENT_MT9V022IX7ATC) |
406 | return -EINVAL; | |
407 | break; | |
09e231b3 GL |
408 | default: |
409 | return -EINVAL; | |
410 | } | |
411 | ||
412 | /* No support for scaling on this camera, just crop. */ | |
6a6c8786 GL |
413 | ret = mt9v022_s_crop(sd, &a); |
414 | if (!ret) { | |
760697be GL |
415 | mf->width = mt9v022->rect.width; |
416 | mf->height = mt9v022->rect.height; | |
417 | mt9v022->fmt = mt9v022_find_datafmt(mf->code, | |
418 | mt9v022->fmts, mt9v022->num_fmts); | |
419 | mf->colorspace = mt9v022->fmt->colorspace; | |
6a6c8786 GL |
420 | } |
421 | ||
422 | return ret; | |
09e231b3 GL |
423 | } |
424 | ||
760697be GL |
425 | static int mt9v022_try_fmt(struct v4l2_subdev *sd, |
426 | struct v4l2_mbus_framefmt *mf) | |
7397bfbe | 427 | { |
c4ce6d14 | 428 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
32536108 | 429 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
760697be GL |
430 | const struct mt9v022_datafmt *fmt; |
431 | int align = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 || | |
432 | mf->code == V4L2_MBUS_FMT_SBGGR10_1X10; | |
64f5905e | 433 | |
760697be | 434 | v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH, |
6a6c8786 | 435 | MT9V022_MAX_WIDTH, align, |
760697be | 436 | &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top, |
32536108 | 437 | MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0); |
7397bfbe | 438 | |
760697be GL |
439 | fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts, |
440 | mt9v022->num_fmts); | |
441 | if (!fmt) { | |
442 | fmt = mt9v022->fmt; | |
443 | mf->code = fmt->code; | |
444 | } | |
445 | ||
446 | mf->colorspace = fmt->colorspace; | |
447 | ||
7397bfbe GL |
448 | return 0; |
449 | } | |
450 | ||
979ea1dd GL |
451 | static int mt9v022_g_chip_ident(struct v4l2_subdev *sd, |
452 | struct v4l2_dbg_chip_ident *id) | |
7397bfbe | 453 | { |
c4ce6d14 | 454 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 455 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
7397bfbe | 456 | |
aecde8b5 | 457 | if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR) |
7397bfbe GL |
458 | return -EINVAL; |
459 | ||
40e2e092 | 460 | if (id->match.addr != client->addr) |
7397bfbe GL |
461 | return -ENODEV; |
462 | ||
463 | id->ident = mt9v022->model; | |
464 | id->revision = 0; | |
465 | ||
466 | return 0; | |
467 | } | |
468 | ||
469 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
979ea1dd GL |
470 | static int mt9v022_g_register(struct v4l2_subdev *sd, |
471 | struct v4l2_dbg_register *reg) | |
7397bfbe | 472 | { |
c4ce6d14 | 473 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
7397bfbe | 474 | |
aecde8b5 | 475 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
476 | return -EINVAL; |
477 | ||
9538e1c2 | 478 | if (reg->match.addr != client->addr) |
7397bfbe GL |
479 | return -ENODEV; |
480 | ||
aecde8b5 | 481 | reg->size = 2; |
9538e1c2 | 482 | reg->val = reg_read(client, reg->reg); |
7397bfbe GL |
483 | |
484 | if (reg->val > 0xffff) | |
485 | return -EIO; | |
486 | ||
487 | return 0; | |
488 | } | |
489 | ||
979ea1dd GL |
490 | static int mt9v022_s_register(struct v4l2_subdev *sd, |
491 | struct v4l2_dbg_register *reg) | |
7397bfbe | 492 | { |
c4ce6d14 | 493 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
7397bfbe | 494 | |
aecde8b5 | 495 | if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0xff) |
7397bfbe GL |
496 | return -EINVAL; |
497 | ||
9538e1c2 | 498 | if (reg->match.addr != client->addr) |
7397bfbe GL |
499 | return -ENODEV; |
500 | ||
9538e1c2 | 501 | if (reg_write(client, reg->reg, reg->val) < 0) |
7397bfbe GL |
502 | return -EIO; |
503 | ||
504 | return 0; | |
505 | } | |
506 | #endif | |
507 | ||
4ec10bac LP |
508 | static int mt9v022_s_power(struct v4l2_subdev *sd, int on) |
509 | { | |
510 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
511 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); | |
512 | ||
513 | return soc_camera_set_power(&client->dev, icl, on); | |
514 | } | |
515 | ||
ab7b50ae | 516 | static int mt9v022_g_volatile_ctrl(struct v4l2_ctrl *ctrl) |
7397bfbe | 517 | { |
ab7b50ae HV |
518 | struct mt9v022 *mt9v022 = container_of(ctrl->handler, |
519 | struct mt9v022, hdl); | |
520 | struct v4l2_subdev *sd = &mt9v022->subdev; | |
c4ce6d14 | 521 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
ab7b50ae HV |
522 | struct v4l2_ctrl *gain = mt9v022->gain; |
523 | struct v4l2_ctrl *exp = mt9v022->exposure; | |
96c75399 | 524 | unsigned long range; |
7397bfbe GL |
525 | int data; |
526 | ||
527 | switch (ctrl->id) { | |
7397bfbe | 528 | case V4L2_CID_AUTOGAIN: |
96c75399 GL |
529 | data = reg_read(client, MT9V022_ANALOG_GAIN); |
530 | if (data < 0) | |
531 | return -EIO; | |
532 | ||
ab7b50ae HV |
533 | range = gain->maximum - gain->minimum; |
534 | gain->val = ((data - 16) * range + 24) / 48 + gain->minimum; | |
535 | return 0; | |
536 | case V4L2_CID_EXPOSURE_AUTO: | |
96c75399 GL |
537 | data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH); |
538 | if (data < 0) | |
539 | return -EIO; | |
540 | ||
ab7b50ae HV |
541 | range = exp->maximum - exp->minimum; |
542 | exp->val = ((data - 1) * range + 239) / 479 + exp->minimum; | |
543 | return 0; | |
6cc1eb70 AG |
544 | case V4L2_CID_HBLANK: |
545 | data = reg_read(client, MT9V022_HORIZONTAL_BLANKING); | |
546 | if (data < 0) | |
547 | return -EIO; | |
548 | ctrl->val = data; | |
549 | return 0; | |
550 | case V4L2_CID_VBLANK: | |
551 | data = reg_read(client, MT9V022_VERTICAL_BLANKING); | |
552 | if (data < 0) | |
553 | return -EIO; | |
554 | ctrl->val = data; | |
555 | return 0; | |
7397bfbe | 556 | } |
ab7b50ae | 557 | return -EINVAL; |
7397bfbe GL |
558 | } |
559 | ||
ab7b50ae | 560 | static int mt9v022_s_ctrl(struct v4l2_ctrl *ctrl) |
7397bfbe | 561 | { |
ab7b50ae HV |
562 | struct mt9v022 *mt9v022 = container_of(ctrl->handler, |
563 | struct mt9v022, hdl); | |
564 | struct v4l2_subdev *sd = &mt9v022->subdev; | |
c4ce6d14 | 565 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
ab7b50ae | 566 | int data; |
7397bfbe GL |
567 | |
568 | switch (ctrl->id) { | |
569 | case V4L2_CID_VFLIP: | |
ab7b50ae | 570 | if (ctrl->val) |
9538e1c2 | 571 | data = reg_set(client, MT9V022_READ_MODE, 0x10); |
7397bfbe | 572 | else |
9538e1c2 | 573 | data = reg_clear(client, MT9V022_READ_MODE, 0x10); |
7397bfbe GL |
574 | if (data < 0) |
575 | return -EIO; | |
ab7b50ae | 576 | return 0; |
7397bfbe | 577 | case V4L2_CID_HFLIP: |
ab7b50ae | 578 | if (ctrl->val) |
9538e1c2 | 579 | data = reg_set(client, MT9V022_READ_MODE, 0x20); |
7397bfbe | 580 | else |
9538e1c2 | 581 | data = reg_clear(client, MT9V022_READ_MODE, 0x20); |
7397bfbe GL |
582 | if (data < 0) |
583 | return -EIO; | |
ab7b50ae HV |
584 | return 0; |
585 | case V4L2_CID_AUTOGAIN: | |
586 | if (ctrl->val) { | |
587 | if (reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) | |
588 | return -EIO; | |
589 | } else { | |
590 | struct v4l2_ctrl *gain = mt9v022->gain; | |
591 | /* mt9v022 has minimum == default */ | |
592 | unsigned long range = gain->maximum - gain->minimum; | |
96c75399 | 593 | /* Valid values 16 to 64, 32 to 64 must be even. */ |
ab7b50ae | 594 | unsigned long gain_val = ((gain->val - gain->minimum) * |
96c75399 | 595 | 48 + range / 2) / range + 16; |
ab7b50ae HV |
596 | |
597 | if (gain_val >= 32) | |
598 | gain_val &= ~1; | |
599 | ||
5d28d525 GL |
600 | /* |
601 | * The user wants to set gain manually, hope, she | |
602 | * knows, what she's doing... Switch AGC off. | |
603 | */ | |
9538e1c2 | 604 | if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0) |
7397bfbe GL |
605 | return -EIO; |
606 | ||
96c75399 | 607 | dev_dbg(&client->dev, "Setting gain from %d to %lu\n", |
ab7b50ae HV |
608 | reg_read(client, MT9V022_ANALOG_GAIN), gain_val); |
609 | if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0) | |
7397bfbe | 610 | return -EIO; |
7397bfbe | 611 | } |
ab7b50ae HV |
612 | return 0; |
613 | case V4L2_CID_EXPOSURE_AUTO: | |
614 | if (ctrl->val == V4L2_EXPOSURE_AUTO) { | |
615 | data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x1); | |
616 | } else { | |
617 | struct v4l2_ctrl *exp = mt9v022->exposure; | |
618 | unsigned long range = exp->maximum - exp->minimum; | |
619 | unsigned long shutter = ((exp->val - exp->minimum) * | |
620 | 479 + range / 2) / range + 1; | |
621 | ||
5d28d525 GL |
622 | /* |
623 | * The user wants to set shutter width manually, hope, | |
624 | * she knows, what she's doing... Switch AEC off. | |
625 | */ | |
ab7b50ae HV |
626 | data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1); |
627 | if (data < 0) | |
7397bfbe | 628 | return -EIO; |
85f8be68 | 629 | dev_dbg(&client->dev, "Shutter width from %d to %lu\n", |
ab7b50ae HV |
630 | reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH), |
631 | shutter); | |
9538e1c2 | 632 | if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, |
ab7b50ae | 633 | shutter) < 0) |
7397bfbe | 634 | return -EIO; |
7397bfbe | 635 | } |
ab7b50ae | 636 | return 0; |
6cc1eb70 AG |
637 | case V4L2_CID_HBLANK: |
638 | if (reg_write(client, MT9V022_HORIZONTAL_BLANKING, | |
639 | ctrl->val) < 0) | |
640 | return -EIO; | |
641 | return 0; | |
642 | case V4L2_CID_VBLANK: | |
643 | if (reg_write(client, MT9V022_VERTICAL_BLANKING, | |
644 | ctrl->val) < 0) | |
645 | return -EIO; | |
646 | return 0; | |
7397bfbe | 647 | } |
ab7b50ae | 648 | return -EINVAL; |
7397bfbe GL |
649 | } |
650 | ||
5d28d525 GL |
651 | /* |
652 | * Interface active, can use i2c. If it fails, it can indeed mean, that | |
653 | * this wasn't our capture interface, so, we wait for the right one | |
654 | */ | |
14178aa5 | 655 | static int mt9v022_video_probe(struct i2c_client *client) |
7397bfbe | 656 | { |
979ea1dd | 657 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
14178aa5 | 658 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
7397bfbe GL |
659 | s32 data; |
660 | int ret; | |
e958e27a | 661 | unsigned long flags; |
7397bfbe | 662 | |
4bbc6d52 LP |
663 | ret = mt9v022_s_power(&mt9v022->subdev, 1); |
664 | if (ret < 0) | |
665 | return ret; | |
666 | ||
7397bfbe | 667 | /* Read out the chip version register */ |
9538e1c2 | 668 | data = reg_read(client, MT9V022_CHIP_VERSION); |
7397bfbe | 669 | |
c078ac18 AG |
670 | /* must be 0x1311, 0x1313 or 0x1324 */ |
671 | if (data != 0x1311 && data != 0x1313 && data != 0x1324) { | |
7397bfbe | 672 | ret = -ENODEV; |
85f8be68 | 673 | dev_info(&client->dev, "No MT9V022 found, ID register 0x%x\n", |
7397bfbe GL |
674 | data); |
675 | goto ei2c; | |
676 | } | |
677 | ||
d0bac768 AG |
678 | mt9v022->chip_version = data; |
679 | ||
c078ac18 AG |
680 | mt9v022->reg = is_mt9v024(data) ? &mt9v024_register : |
681 | &mt9v022_register; | |
682 | ||
7397bfbe | 683 | /* Soft reset */ |
9538e1c2 | 684 | ret = reg_write(client, MT9V022_RESET, 1); |
7397bfbe GL |
685 | if (ret < 0) |
686 | goto ei2c; | |
687 | /* 15 clock cycles */ | |
688 | udelay(200); | |
9538e1c2 | 689 | if (reg_read(client, MT9V022_RESET)) { |
85f8be68 | 690 | dev_err(&client->dev, "Resetting MT9V022 failed!\n"); |
40e2e092 GL |
691 | if (ret > 0) |
692 | ret = -EIO; | |
7397bfbe GL |
693 | goto ei2c; |
694 | } | |
695 | ||
696 | /* Set monochrome or colour sensor type */ | |
697 | if (sensor_type && (!strcmp("colour", sensor_type) || | |
698 | !strcmp("color", sensor_type))) { | |
9538e1c2 | 699 | ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11); |
7397bfbe | 700 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATC; |
760697be | 701 | mt9v022->fmts = mt9v022_colour_fmts; |
7397bfbe | 702 | } else { |
9538e1c2 | 703 | ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11); |
7397bfbe | 704 | mt9v022->model = V4L2_IDENT_MT9V022IX7ATM; |
760697be | 705 | mt9v022->fmts = mt9v022_monochrome_fmts; |
7397bfbe GL |
706 | } |
707 | ||
e958e27a | 708 | if (ret < 0) |
40e2e092 | 709 | goto ei2c; |
e958e27a | 710 | |
760697be | 711 | mt9v022->num_fmts = 0; |
e958e27a SH |
712 | |
713 | /* | |
714 | * This is a 10bit sensor, so by default we only allow 10bit. | |
715 | * The platform may support different bus widths due to | |
716 | * different routing of the data lines. | |
717 | */ | |
718 | if (icl->query_bus_param) | |
719 | flags = icl->query_bus_param(icl); | |
720 | else | |
721 | flags = SOCAM_DATAWIDTH_10; | |
722 | ||
723 | if (flags & SOCAM_DATAWIDTH_10) | |
760697be | 724 | mt9v022->num_fmts++; |
e958e27a | 725 | else |
760697be | 726 | mt9v022->fmts++; |
e958e27a SH |
727 | |
728 | if (flags & SOCAM_DATAWIDTH_8) | |
760697be | 729 | mt9v022->num_fmts++; |
e958e27a | 730 | |
760697be | 731 | mt9v022->fmt = &mt9v022->fmts[0]; |
6a6c8786 | 732 | |
85f8be68 | 733 | dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n", |
7397bfbe GL |
734 | data, mt9v022->model == V4L2_IDENT_MT9V022IX7ATM ? |
735 | "monochrome" : "colour"); | |
736 | ||
a4c56fd8 GL |
737 | ret = mt9v022_init(client); |
738 | if (ret < 0) | |
739 | dev_err(&client->dev, "Failed to initialise the camera\n"); | |
740 | ||
7397bfbe | 741 | ei2c: |
4bbc6d52 | 742 | mt9v022_s_power(&mt9v022->subdev, 0); |
7397bfbe GL |
743 | return ret; |
744 | } | |
745 | ||
32536108 GL |
746 | static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) |
747 | { | |
c4ce6d14 | 748 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
32536108 GL |
749 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
750 | ||
751 | *lines = mt9v022->y_skip_top; | |
752 | ||
753 | return 0; | |
754 | } | |
755 | ||
ab7b50ae HV |
756 | static const struct v4l2_ctrl_ops mt9v022_ctrl_ops = { |
757 | .g_volatile_ctrl = mt9v022_g_volatile_ctrl, | |
758 | .s_ctrl = mt9v022_s_ctrl, | |
759 | }; | |
760 | ||
979ea1dd | 761 | static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = { |
979ea1dd GL |
762 | .g_chip_ident = mt9v022_g_chip_ident, |
763 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
764 | .g_register = mt9v022_g_register, | |
765 | .s_register = mt9v022_s_register, | |
766 | #endif | |
4ec10bac | 767 | .s_power = mt9v022_s_power, |
979ea1dd GL |
768 | }; |
769 | ||
3805f201 | 770 | static int mt9v022_enum_fmt(struct v4l2_subdev *sd, unsigned int index, |
760697be GL |
771 | enum v4l2_mbus_pixelcode *code) |
772 | { | |
c4ce6d14 | 773 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
760697be GL |
774 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
775 | ||
3805f201 | 776 | if (index >= mt9v022->num_fmts) |
760697be GL |
777 | return -EINVAL; |
778 | ||
779 | *code = mt9v022->fmts[index].code; | |
780 | return 0; | |
781 | } | |
782 | ||
e8e2c70c GL |
783 | static int mt9v022_g_mbus_config(struct v4l2_subdev *sd, |
784 | struct v4l2_mbus_config *cfg) | |
785 | { | |
786 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
14178aa5 | 787 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
e8e2c70c GL |
788 | |
789 | cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE | | |
790 | V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING | | |
791 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW | | |
792 | V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW | | |
793 | V4L2_MBUS_DATA_ACTIVE_HIGH; | |
794 | cfg->type = V4L2_MBUS_PARALLEL; | |
795 | cfg->flags = soc_camera_apply_board_flags(icl, cfg); | |
796 | ||
797 | return 0; | |
798 | } | |
799 | ||
800 | static int mt9v022_s_mbus_config(struct v4l2_subdev *sd, | |
801 | const struct v4l2_mbus_config *cfg) | |
802 | { | |
803 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
443f483a | 804 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
e8e2c70c GL |
805 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
806 | unsigned long flags = soc_camera_apply_board_flags(icl, cfg); | |
443f483a | 807 | unsigned int bps = soc_mbus_get_fmtdesc(mt9v022->fmt->code)->bits_per_sample; |
e8e2c70c GL |
808 | int ret; |
809 | u16 pixclk = 0; | |
810 | ||
e8e2c70c GL |
811 | if (icl->set_bus_param) { |
812 | ret = icl->set_bus_param(icl, 1 << (bps - 1)); | |
813 | if (ret) | |
814 | return ret; | |
815 | } else if (bps != 10) { | |
816 | /* | |
817 | * Without board specific bus width settings we only support the | |
818 | * sensors native bus width | |
819 | */ | |
820 | return -EINVAL; | |
821 | } | |
822 | ||
823 | if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) | |
824 | pixclk |= 0x10; | |
825 | ||
826 | if (!(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)) | |
827 | pixclk |= 0x1; | |
828 | ||
829 | if (!(flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)) | |
830 | pixclk |= 0x2; | |
831 | ||
c078ac18 | 832 | ret = reg_write(client, mt9v022->reg->pixclk_fv_lv, pixclk); |
e8e2c70c GL |
833 | if (ret < 0) |
834 | return ret; | |
835 | ||
836 | if (!(flags & V4L2_MBUS_MASTER)) | |
837 | mt9v022->chip_control &= ~0x8; | |
838 | ||
839 | ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control); | |
840 | if (ret < 0) | |
841 | return ret; | |
842 | ||
843 | dev_dbg(&client->dev, "Calculated pixclk 0x%x, chip control 0x%x\n", | |
844 | pixclk, mt9v022->chip_control); | |
845 | ||
846 | return 0; | |
847 | } | |
848 | ||
979ea1dd GL |
849 | static struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = { |
850 | .s_stream = mt9v022_s_stream, | |
760697be GL |
851 | .s_mbus_fmt = mt9v022_s_fmt, |
852 | .g_mbus_fmt = mt9v022_g_fmt, | |
853 | .try_mbus_fmt = mt9v022_try_fmt, | |
08590b96 | 854 | .s_crop = mt9v022_s_crop, |
6a6c8786 GL |
855 | .g_crop = mt9v022_g_crop, |
856 | .cropcap = mt9v022_cropcap, | |
760697be | 857 | .enum_mbus_fmt = mt9v022_enum_fmt, |
e8e2c70c GL |
858 | .g_mbus_config = mt9v022_g_mbus_config, |
859 | .s_mbus_config = mt9v022_s_mbus_config, | |
979ea1dd GL |
860 | }; |
861 | ||
32536108 GL |
862 | static struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = { |
863 | .g_skip_top_lines = mt9v022_g_skip_top_lines, | |
864 | }; | |
865 | ||
979ea1dd GL |
866 | static struct v4l2_subdev_ops mt9v022_subdev_ops = { |
867 | .core = &mt9v022_subdev_core_ops, | |
868 | .video = &mt9v022_subdev_video_ops, | |
32536108 | 869 | .sensor = &mt9v022_subdev_sensor_ops, |
979ea1dd GL |
870 | }; |
871 | ||
d2653e92 JD |
872 | static int mt9v022_probe(struct i2c_client *client, |
873 | const struct i2c_device_id *did) | |
7397bfbe GL |
874 | { |
875 | struct mt9v022 *mt9v022; | |
14178aa5 | 876 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
7397bfbe | 877 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
daf16bab | 878 | struct mt9v022_platform_data *pdata; |
7397bfbe GL |
879 | int ret; |
880 | ||
881 | if (!icl) { | |
882 | dev_err(&client->dev, "MT9V022 driver needs platform data\n"); | |
883 | return -EINVAL; | |
884 | } | |
885 | ||
886 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
887 | dev_warn(&adapter->dev, | |
888 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
889 | return -EIO; | |
890 | } | |
891 | ||
892 | mt9v022 = kzalloc(sizeof(struct mt9v022), GFP_KERNEL); | |
893 | if (!mt9v022) | |
894 | return -ENOMEM; | |
895 | ||
daf16bab | 896 | pdata = icl->priv; |
979ea1dd | 897 | v4l2_i2c_subdev_init(&mt9v022->subdev, client, &mt9v022_subdev_ops); |
ab7b50ae HV |
898 | v4l2_ctrl_handler_init(&mt9v022->hdl, 6); |
899 | v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
900 | V4L2_CID_VFLIP, 0, 1, 1, 0); | |
901 | v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
902 | V4L2_CID_HFLIP, 0, 1, 1, 0); | |
903 | mt9v022->autogain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
904 | V4L2_CID_AUTOGAIN, 0, 1, 1, 1); | |
905 | mt9v022->gain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
906 | V4L2_CID_GAIN, 0, 127, 1, 64); | |
907 | ||
908 | /* | |
909 | * Simulated autoexposure. If enabled, we calculate shutter width | |
910 | * ourselves in the driver based on vertical blanking and frame width | |
911 | */ | |
912 | mt9v022->autoexposure = v4l2_ctrl_new_std_menu(&mt9v022->hdl, | |
913 | &mt9v022_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, | |
914 | V4L2_EXPOSURE_AUTO); | |
915 | mt9v022->exposure = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
916 | V4L2_CID_EXPOSURE, 1, 255, 1, 255); | |
917 | ||
6cc1eb70 AG |
918 | mt9v022->hblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, |
919 | V4L2_CID_HBLANK, MT9V022_HORIZONTAL_BLANKING_MIN, | |
920 | MT9V022_HORIZONTAL_BLANKING_MAX, 1, | |
921 | MT9V022_HORIZONTAL_BLANKING_DEF); | |
922 | ||
923 | mt9v022->vblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops, | |
924 | V4L2_CID_VBLANK, MT9V022_VERTICAL_BLANKING_MIN, | |
925 | MT9V022_VERTICAL_BLANKING_MAX, 1, | |
926 | MT9V022_VERTICAL_BLANKING_DEF); | |
927 | ||
ab7b50ae HV |
928 | mt9v022->subdev.ctrl_handler = &mt9v022->hdl; |
929 | if (mt9v022->hdl.error) { | |
930 | int err = mt9v022->hdl.error; | |
931 | ||
6cc1eb70 | 932 | dev_err(&client->dev, "control initialisation err %d\n", err); |
ab7b50ae HV |
933 | kfree(mt9v022); |
934 | return err; | |
935 | } | |
936 | v4l2_ctrl_auto_cluster(2, &mt9v022->autoexposure, | |
937 | V4L2_EXPOSURE_MANUAL, true); | |
938 | v4l2_ctrl_auto_cluster(2, &mt9v022->autogain, 0, true); | |
979ea1dd | 939 | |
7397bfbe | 940 | mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT; |
7397bfbe | 941 | |
96c75399 | 942 | /* |
b6f50b49 AG |
943 | * On some platforms the first read out line is corrupted. |
944 | * Workaround it by skipping if indicated by platform data. | |
96c75399 | 945 | */ |
b6f50b49 | 946 | mt9v022->y_skip_top = pdata ? pdata->y_skip_top : 0; |
6a6c8786 GL |
947 | mt9v022->rect.left = MT9V022_COLUMN_SKIP; |
948 | mt9v022->rect.top = MT9V022_ROW_SKIP; | |
949 | mt9v022->rect.width = MT9V022_MAX_WIDTH; | |
950 | mt9v022->rect.height = MT9V022_MAX_HEIGHT; | |
951 | ||
14178aa5 | 952 | ret = mt9v022_video_probe(client); |
40e2e092 | 953 | if (ret) { |
ab7b50ae | 954 | v4l2_ctrl_handler_free(&mt9v022->hdl); |
40e2e092 GL |
955 | kfree(mt9v022); |
956 | } | |
7397bfbe | 957 | |
7397bfbe GL |
958 | return ret; |
959 | } | |
960 | ||
961 | static int mt9v022_remove(struct i2c_client *client) | |
962 | { | |
979ea1dd | 963 | struct mt9v022 *mt9v022 = to_mt9v022(client); |
14178aa5 | 964 | struct soc_camera_link *icl = soc_camera_i2c_to_link(client); |
7397bfbe | 965 | |
ab7b50ae | 966 | v4l2_device_unregister_subdev(&mt9v022->subdev); |
14178aa5 GL |
967 | if (icl->free_bus) |
968 | icl->free_bus(icl); | |
ab7b50ae | 969 | v4l2_ctrl_handler_free(&mt9v022->hdl); |
7397bfbe GL |
970 | kfree(mt9v022); |
971 | ||
972 | return 0; | |
973 | } | |
3760f736 JD |
974 | static const struct i2c_device_id mt9v022_id[] = { |
975 | { "mt9v022", 0 }, | |
976 | { } | |
977 | }; | |
978 | MODULE_DEVICE_TABLE(i2c, mt9v022_id); | |
979 | ||
7397bfbe GL |
980 | static struct i2c_driver mt9v022_i2c_driver = { |
981 | .driver = { | |
982 | .name = "mt9v022", | |
983 | }, | |
984 | .probe = mt9v022_probe, | |
985 | .remove = mt9v022_remove, | |
3760f736 | 986 | .id_table = mt9v022_id, |
7397bfbe GL |
987 | }; |
988 | ||
c6e8d86f | 989 | module_i2c_driver(mt9v022_i2c_driver); |
7397bfbe GL |
990 | |
991 | MODULE_DESCRIPTION("Micron MT9V022 Camera driver"); | |
992 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | |
993 | MODULE_LICENSE("GPL"); |