[media] i2c: Make use of media_bus_format enum
[deliverable/linux.git] / drivers / media / i2c / soc_camera / mt9v022.c
CommitLineData
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1/*
2 * Driver for MT9V022 CMOS Image Sensor from Micron
3 *
4 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/videodev2.h>
12#include <linux/slab.h>
13#include <linux/i2c.h>
14#include <linux/delay.h>
15#include <linux/log2.h>
7a707b89 16#include <linux/module.h>
7397bfbe 17
b6f50b49 18#include <media/mt9v022.h>
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19#include <media/soc_camera.h>
20#include <media/soc_mediabus.h>
979ea1dd 21#include <media/v4l2-subdev.h>
9aea470b 22#include <media/v4l2-clk.h>
ab7b50ae 23#include <media/v4l2-ctrls.h>
7397bfbe 24
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25/*
26 * mt9v022 i2c address 0x48, 0x4c, 0x58, 0x5c
22cf83fa 27 * The platform has to define struct i2c_board_info objects and link to them
25a34811 28 * from struct soc_camera_host_desc
5d28d525 29 */
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30
31static char *sensor_type;
32module_param(sensor_type, charp, S_IRUGO);
61a2d07d 33MODULE_PARM_DESC(sensor_type, "Sensor type: \"colour\" or \"monochrome\"");
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34
35/* mt9v022 selected register addresses */
36#define MT9V022_CHIP_VERSION 0x00
37#define MT9V022_COLUMN_START 0x01
38#define MT9V022_ROW_START 0x02
39#define MT9V022_WINDOW_HEIGHT 0x03
40#define MT9V022_WINDOW_WIDTH 0x04
41#define MT9V022_HORIZONTAL_BLANKING 0x05
42#define MT9V022_VERTICAL_BLANKING 0x06
43#define MT9V022_CHIP_CONTROL 0x07
44#define MT9V022_SHUTTER_WIDTH1 0x08
45#define MT9V022_SHUTTER_WIDTH2 0x09
46#define MT9V022_SHUTTER_WIDTH_CTRL 0x0a
47#define MT9V022_TOTAL_SHUTTER_WIDTH 0x0b
48#define MT9V022_RESET 0x0c
49#define MT9V022_READ_MODE 0x0d
50#define MT9V022_MONITOR_MODE 0x0e
51#define MT9V022_PIXEL_OPERATION_MODE 0x0f
52#define MT9V022_LED_OUT_CONTROL 0x1b
53#define MT9V022_ADC_MODE_CONTROL 0x1c
d0bac768 54#define MT9V022_REG32 0x20
96c75399 55#define MT9V022_ANALOG_GAIN 0x35
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56#define MT9V022_BLACK_LEVEL_CALIB_CTRL 0x47
57#define MT9V022_PIXCLK_FV_LV 0x74
58#define MT9V022_DIGITAL_TEST_PATTERN 0x7f
59#define MT9V022_AEC_AGC_ENABLE 0xAF
60#define MT9V022_MAX_TOTAL_SHUTTER_WIDTH 0xBD
61
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62/* mt9v024 partial list register addresses changes with respect to mt9v022 */
63#define MT9V024_PIXCLK_FV_LV 0x72
64#define MT9V024_MAX_TOTAL_SHUTTER_WIDTH 0xAD
65
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66/* Progressive scan, master, defaults */
67#define MT9V022_CHIP_CONTROL_DEFAULT 0x188
68
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69#define MT9V022_MAX_WIDTH 752
70#define MT9V022_MAX_HEIGHT 480
71#define MT9V022_MIN_WIDTH 48
72#define MT9V022_MIN_HEIGHT 32
73#define MT9V022_COLUMN_SKIP 1
74#define MT9V022_ROW_SKIP 4
75
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76#define MT9V022_HORIZONTAL_BLANKING_MIN 43
77#define MT9V022_HORIZONTAL_BLANKING_MAX 1023
78#define MT9V022_HORIZONTAL_BLANKING_DEF 94
79#define MT9V022_VERTICAL_BLANKING_MIN 2
80#define MT9V022_VERTICAL_BLANKING_MAX 3000
81#define MT9V022_VERTICAL_BLANKING_DEF 45
82
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83#define is_mt9v022_rev3(id) (id == 0x1313)
84#define is_mt9v024(id) (id == 0x1324)
c078ac18 85
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86/* MT9V022 has only one fixed colorspace per pixelcode */
87struct mt9v022_datafmt {
f5fe58fd 88 u32 code;
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89 enum v4l2_colorspace colorspace;
90};
91
92/* Find a data format by a pixel code in an array */
93static const struct mt9v022_datafmt *mt9v022_find_datafmt(
f5fe58fd 94 u32 code, const struct mt9v022_datafmt *fmt,
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95 int n)
96{
97 int i;
98 for (i = 0; i < n; i++)
99 if (fmt[i].code == code)
100 return fmt + i;
101
102 return NULL;
103}
104
105static const struct mt9v022_datafmt mt9v022_colour_fmts[] = {
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106 /*
107 * Order important: first natively supported,
108 * second supported with a GPIO extender
109 */
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110 {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
111 {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
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112};
113
760697be 114static const struct mt9v022_datafmt mt9v022_monochrome_fmts[] = {
bb55de3b 115 /* Order important - see above */
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116 {MEDIA_BUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG},
117 {MEDIA_BUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG},
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118};
119
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120/* only registers with different addresses on different mt9v02x sensors */
121struct mt9v02x_register {
122 u8 max_total_shutter_width;
123 u8 pixclk_fv_lv;
124};
125
126static const struct mt9v02x_register mt9v022_register = {
127 .max_total_shutter_width = MT9V022_MAX_TOTAL_SHUTTER_WIDTH,
128 .pixclk_fv_lv = MT9V022_PIXCLK_FV_LV,
129};
130
131static const struct mt9v02x_register mt9v024_register = {
132 .max_total_shutter_width = MT9V024_MAX_TOTAL_SHUTTER_WIDTH,
133 .pixclk_fv_lv = MT9V024_PIXCLK_FV_LV,
134};
135
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136enum mt9v022_model {
137 MT9V022IX7ATM,
138 MT9V022IX7ATC,
139};
140
7397bfbe 141struct mt9v022 {
979ea1dd 142 struct v4l2_subdev subdev;
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143 struct v4l2_ctrl_handler hdl;
144 struct {
145 /* exposure/auto-exposure cluster */
146 struct v4l2_ctrl *autoexposure;
147 struct v4l2_ctrl *exposure;
148 };
149 struct {
150 /* gain/auto-gain cluster */
151 struct v4l2_ctrl *autogain;
152 struct v4l2_ctrl *gain;
153 };
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154 struct v4l2_ctrl *hblank;
155 struct v4l2_ctrl *vblank;
6a6c8786 156 struct v4l2_rect rect; /* Sensor window */
9aea470b 157 struct v4l2_clk *clk;
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158 const struct mt9v022_datafmt *fmt;
159 const struct mt9v022_datafmt *fmts;
c078ac18 160 const struct mt9v02x_register *reg;
760697be 161 int num_fmts;
6be89daa 162 enum mt9v022_model model;
7397bfbe 163 u16 chip_control;
d0bac768 164 u16 chip_version;
32536108 165 unsigned short y_skip_top; /* Lines to skip at the top */
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166};
167
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168static struct mt9v022 *to_mt9v022(const struct i2c_client *client)
169{
170 return container_of(i2c_get_clientdata(client), struct mt9v022, subdev);
171}
172
9538e1c2 173static int reg_read(struct i2c_client *client, const u8 reg)
7397bfbe 174{
3f877045 175 return i2c_smbus_read_word_swapped(client, reg);
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176}
177
9538e1c2 178static int reg_write(struct i2c_client *client, const u8 reg,
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179 const u16 data)
180{
3f877045 181 return i2c_smbus_write_word_swapped(client, reg, data);
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182}
183
9538e1c2 184static int reg_set(struct i2c_client *client, const u8 reg,
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185 const u16 data)
186{
187 int ret;
188
9538e1c2 189 ret = reg_read(client, reg);
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190 if (ret < 0)
191 return ret;
9538e1c2 192 return reg_write(client, reg, ret | data);
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193}
194
9538e1c2 195static int reg_clear(struct i2c_client *client, const u8 reg,
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196 const u16 data)
197{
198 int ret;
199
9538e1c2 200 ret = reg_read(client, reg);
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201 if (ret < 0)
202 return ret;
9538e1c2 203 return reg_write(client, reg, ret & ~data);
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204}
205
a4c56fd8 206static int mt9v022_init(struct i2c_client *client)
7397bfbe 207{
979ea1dd 208 struct mt9v022 *mt9v022 = to_mt9v022(client);
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209 int ret;
210
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211 /*
212 * Almost the default mode: master, parallel, simultaneous, and an
7397bfbe 213 * undocumented bit 0x200, which is present in table 7, but not in 8,
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214 * plus snapshot mode to disable scan for now
215 */
7397bfbe 216 mt9v022->chip_control |= 0x10;
9538e1c2 217 ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
11211641 218 if (!ret)
9538e1c2 219 ret = reg_write(client, MT9V022_READ_MODE, 0x300);
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220
221 /* All defaults */
11211641 222 if (!ret)
7397bfbe 223 /* AEC, AGC on */
9538e1c2 224 ret = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x3);
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225 if (!ret)
226 ret = reg_write(client, MT9V022_ANALOG_GAIN, 16);
227 if (!ret)
228 ret = reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH, 480);
11211641 229 if (!ret)
c078ac18 230 ret = reg_write(client, mt9v022->reg->max_total_shutter_width, 480);
11211641 231 if (!ret)
7397bfbe 232 /* default - auto */
9538e1c2 233 ret = reg_clear(client, MT9V022_BLACK_LEVEL_CALIB_CTRL, 1);
11211641 234 if (!ret)
9538e1c2 235 ret = reg_write(client, MT9V022_DIGITAL_TEST_PATTERN, 0);
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236 if (!ret)
237 return v4l2_ctrl_handler_setup(&mt9v022->hdl);
7397bfbe 238
11211641 239 return ret;
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240}
241
979ea1dd 242static int mt9v022_s_stream(struct v4l2_subdev *sd, int enable)
7397bfbe 243{
c4ce6d14 244 struct i2c_client *client = v4l2_get_subdevdata(sd);
979ea1dd 245 struct mt9v022 *mt9v022 = to_mt9v022(client);
81034663 246
d0bac768 247 if (enable) {
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248 /* Switch to master "normal" mode */
249 mt9v022->chip_control &= ~0x10;
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250 if (is_mt9v022_rev3(mt9v022->chip_version) ||
251 is_mt9v024(mt9v022->chip_version)) {
252 /*
253 * Unset snapshot mode specific settings: clear bit 9
254 * and bit 2 in reg. 0x20 when in normal mode.
255 */
256 if (reg_clear(client, MT9V022_REG32, 0x204))
257 return -EIO;
258 }
259 } else {
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260 /* Switch to snapshot mode */
261 mt9v022->chip_control |= 0x10;
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262 if (is_mt9v022_rev3(mt9v022->chip_version) ||
263 is_mt9v024(mt9v022->chip_version)) {
264 /*
265 * Required settings for snapshot mode: set bit 9
266 * (RST enable) and bit 2 (CR enable) in reg. 0x20
267 * See TechNote TN0960 or TN-09-225.
268 */
269 if (reg_set(client, MT9V022_REG32, 0x204))
270 return -EIO;
271 }
272 }
7397bfbe 273
979ea1dd 274 if (reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control) < 0)
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275 return -EIO;
276 return 0;
277}
278
4f996594 279static int mt9v022_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
ad5f2e85 280{
c4ce6d14 281 struct i2c_client *client = v4l2_get_subdevdata(sd);
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282 struct mt9v022 *mt9v022 = to_mt9v022(client);
283 struct v4l2_rect rect = a->c;
bff79939 284 int min_row, min_blank;
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285 int ret;
286
6a6c8786 287 /* Bayer format - even size lengths */
760697be 288 if (mt9v022->fmts == mt9v022_colour_fmts) {
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289 rect.width = ALIGN(rect.width, 2);
290 rect.height = ALIGN(rect.height, 2);
291 /* Let the user play with the starting pixel */
292 }
293
294 soc_camera_limit_side(&rect.left, &rect.width,
295 MT9V022_COLUMN_SKIP, MT9V022_MIN_WIDTH, MT9V022_MAX_WIDTH);
296
297 soc_camera_limit_side(&rect.top, &rect.height,
298 MT9V022_ROW_SKIP, MT9V022_MIN_HEIGHT, MT9V022_MAX_HEIGHT);
299
7397bfbe 300 /* Like in example app. Contradicts the datasheet though */
9538e1c2 301 ret = reg_read(client, MT9V022_AEC_AGC_ENABLE);
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302 if (ret >= 0) {
303 if (ret & 1) /* Autoexposure */
c078ac18 304 ret = reg_write(client, mt9v022->reg->max_total_shutter_width,
32536108 305 rect.height + mt9v022->y_skip_top + 43);
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306 /*
307 * If autoexposure is off, there is no need to set
308 * MT9V022_TOTAL_SHUTTER_WIDTH here. Autoexposure can be off
309 * only if the user has set exposure manually, using the
310 * V4L2_CID_EXPOSURE_AUTO with the value V4L2_EXPOSURE_MANUAL.
311 * In this case the register MT9V022_TOTAL_SHUTTER_WIDTH
312 * already contains the correct value.
313 */
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314 }
315 /* Setup frame format: defaults apart from width and height */
11211641 316 if (!ret)
6a6c8786 317 ret = reg_write(client, MT9V022_COLUMN_START, rect.left);
11211641 318 if (!ret)
6a6c8786 319 ret = reg_write(client, MT9V022_ROW_START, rect.top);
bff79939
AA
320 /*
321 * mt9v022: min total row time is 660 columns, min blanking is 43
322 * mt9v024: min total row time is 690 columns, min blanking is 61
323 */
324 if (is_mt9v024(mt9v022->chip_version)) {
325 min_row = 690;
326 min_blank = 61;
327 } else {
328 min_row = 660;
329 min_blank = 43;
330 }
11211641 331 if (!ret)
6cc1eb70 332 ret = v4l2_ctrl_s_ctrl(mt9v022->hblank,
bff79939
AA
333 rect.width > min_row - min_blank ?
334 min_blank : min_row - rect.width);
11211641 335 if (!ret)
6cc1eb70 336 ret = v4l2_ctrl_s_ctrl(mt9v022->vblank, 45);
11211641 337 if (!ret)
6a6c8786 338 ret = reg_write(client, MT9V022_WINDOW_WIDTH, rect.width);
11211641 339 if (!ret)
9538e1c2 340 ret = reg_write(client, MT9V022_WINDOW_HEIGHT,
32536108 341 rect.height + mt9v022->y_skip_top);
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342
343 if (ret < 0)
344 return ret;
345
e26b3144 346 dev_dbg(&client->dev, "Frame %dx%d pixel\n", rect.width, rect.height);
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347
348 mt9v022->rect = rect;
349
350 return 0;
351}
352
353static int mt9v022_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
354{
c4ce6d14 355 struct i2c_client *client = v4l2_get_subdevdata(sd);
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356 struct mt9v022 *mt9v022 = to_mt9v022(client);
357
358 a->c = mt9v022->rect;
359 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
360
361 return 0;
362}
363
364static int mt9v022_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
365{
366 a->bounds.left = MT9V022_COLUMN_SKIP;
367 a->bounds.top = MT9V022_ROW_SKIP;
368 a->bounds.width = MT9V022_MAX_WIDTH;
369 a->bounds.height = MT9V022_MAX_HEIGHT;
370 a->defrect = a->bounds;
371 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
372 a->pixelaspect.numerator = 1;
373 a->pixelaspect.denominator = 1;
374
375 return 0;
376}
377
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378static int mt9v022_g_fmt(struct v4l2_subdev *sd,
379 struct v4l2_mbus_framefmt *mf)
6a6c8786 380{
c4ce6d14 381 struct i2c_client *client = v4l2_get_subdevdata(sd);
6a6c8786 382 struct mt9v022 *mt9v022 = to_mt9v022(client);
6a6c8786 383
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384 mf->width = mt9v022->rect.width;
385 mf->height = mt9v022->rect.height;
386 mf->code = mt9v022->fmt->code;
387 mf->colorspace = mt9v022->fmt->colorspace;
388 mf->field = V4L2_FIELD_NONE;
7397bfbe 389
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390 return 0;
391}
392
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393static int mt9v022_s_fmt(struct v4l2_subdev *sd,
394 struct v4l2_mbus_framefmt *mf)
09e231b3 395{
c4ce6d14 396 struct i2c_client *client = v4l2_get_subdevdata(sd);
979ea1dd 397 struct mt9v022 *mt9v022 = to_mt9v022(client);
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398 struct v4l2_crop a = {
399 .c = {
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400 .left = mt9v022->rect.left,
401 .top = mt9v022->rect.top,
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402 .width = mf->width,
403 .height = mf->height,
08590b96 404 },
09e231b3 405 };
6a6c8786 406 int ret;
09e231b3 407
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408 /*
409 * The caller provides a supported format, as verified per call to
14178aa5 410 * .try_mbus_fmt(), datawidth is from our supported format list
5d28d525 411 */
760697be 412 switch (mf->code) {
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BB
413 case MEDIA_BUS_FMT_Y8_1X8:
414 case MEDIA_BUS_FMT_Y10_1X10:
6be89daa 415 if (mt9v022->model != MT9V022IX7ATM)
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416 return -EINVAL;
417 break;
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418 case MEDIA_BUS_FMT_SBGGR8_1X8:
419 case MEDIA_BUS_FMT_SBGGR10_1X10:
6be89daa 420 if (mt9v022->model != MT9V022IX7ATC)
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421 return -EINVAL;
422 break;
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423 default:
424 return -EINVAL;
425 }
426
427 /* No support for scaling on this camera, just crop. */
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428 ret = mt9v022_s_crop(sd, &a);
429 if (!ret) {
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430 mf->width = mt9v022->rect.width;
431 mf->height = mt9v022->rect.height;
432 mt9v022->fmt = mt9v022_find_datafmt(mf->code,
433 mt9v022->fmts, mt9v022->num_fmts);
434 mf->colorspace = mt9v022->fmt->colorspace;
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435 }
436
437 return ret;
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438}
439
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440static int mt9v022_try_fmt(struct v4l2_subdev *sd,
441 struct v4l2_mbus_framefmt *mf)
7397bfbe 442{
c4ce6d14 443 struct i2c_client *client = v4l2_get_subdevdata(sd);
32536108 444 struct mt9v022 *mt9v022 = to_mt9v022(client);
760697be 445 const struct mt9v022_datafmt *fmt;
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BB
446 int align = mf->code == MEDIA_BUS_FMT_SBGGR8_1X8 ||
447 mf->code == MEDIA_BUS_FMT_SBGGR10_1X10;
64f5905e 448
760697be 449 v4l_bound_align_image(&mf->width, MT9V022_MIN_WIDTH,
6a6c8786 450 MT9V022_MAX_WIDTH, align,
760697be 451 &mf->height, MT9V022_MIN_HEIGHT + mt9v022->y_skip_top,
32536108 452 MT9V022_MAX_HEIGHT + mt9v022->y_skip_top, align, 0);
7397bfbe 453
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454 fmt = mt9v022_find_datafmt(mf->code, mt9v022->fmts,
455 mt9v022->num_fmts);
456 if (!fmt) {
457 fmt = mt9v022->fmt;
458 mf->code = fmt->code;
459 }
460
461 mf->colorspace = fmt->colorspace;
462
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463 return 0;
464}
465
7397bfbe 466#ifdef CONFIG_VIDEO_ADV_DEBUG
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467static int mt9v022_g_register(struct v4l2_subdev *sd,
468 struct v4l2_dbg_register *reg)
7397bfbe 469{
c4ce6d14 470 struct i2c_client *client = v4l2_get_subdevdata(sd);
7397bfbe 471
6be89daa 472 if (reg->reg > 0xff)
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473 return -EINVAL;
474
aecde8b5 475 reg->size = 2;
9538e1c2 476 reg->val = reg_read(client, reg->reg);
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477
478 if (reg->val > 0xffff)
479 return -EIO;
480
481 return 0;
482}
483
979ea1dd 484static int mt9v022_s_register(struct v4l2_subdev *sd,
977ba3b1 485 const struct v4l2_dbg_register *reg)
7397bfbe 486{
c4ce6d14 487 struct i2c_client *client = v4l2_get_subdevdata(sd);
7397bfbe 488
6be89daa 489 if (reg->reg > 0xff)
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490 return -EINVAL;
491
9538e1c2 492 if (reg_write(client, reg->reg, reg->val) < 0)
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493 return -EIO;
494
495 return 0;
496}
497#endif
498
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LP
499static int mt9v022_s_power(struct v4l2_subdev *sd, int on)
500{
501 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 502 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
9aea470b 503 struct mt9v022 *mt9v022 = to_mt9v022(client);
4ec10bac 504
9aea470b 505 return soc_camera_set_power(&client->dev, ssdd, mt9v022->clk, on);
4ec10bac
LP
506}
507
ab7b50ae 508static int mt9v022_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
7397bfbe 509{
ab7b50ae
HV
510 struct mt9v022 *mt9v022 = container_of(ctrl->handler,
511 struct mt9v022, hdl);
512 struct v4l2_subdev *sd = &mt9v022->subdev;
c4ce6d14 513 struct i2c_client *client = v4l2_get_subdevdata(sd);
ab7b50ae
HV
514 struct v4l2_ctrl *gain = mt9v022->gain;
515 struct v4l2_ctrl *exp = mt9v022->exposure;
96c75399 516 unsigned long range;
7397bfbe
GL
517 int data;
518
519 switch (ctrl->id) {
7397bfbe 520 case V4L2_CID_AUTOGAIN:
96c75399
GL
521 data = reg_read(client, MT9V022_ANALOG_GAIN);
522 if (data < 0)
523 return -EIO;
524
ab7b50ae
HV
525 range = gain->maximum - gain->minimum;
526 gain->val = ((data - 16) * range + 24) / 48 + gain->minimum;
527 return 0;
528 case V4L2_CID_EXPOSURE_AUTO:
96c75399
GL
529 data = reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH);
530 if (data < 0)
531 return -EIO;
532
ab7b50ae
HV
533 range = exp->maximum - exp->minimum;
534 exp->val = ((data - 1) * range + 239) / 479 + exp->minimum;
535 return 0;
6cc1eb70
AG
536 case V4L2_CID_HBLANK:
537 data = reg_read(client, MT9V022_HORIZONTAL_BLANKING);
538 if (data < 0)
539 return -EIO;
540 ctrl->val = data;
541 return 0;
542 case V4L2_CID_VBLANK:
543 data = reg_read(client, MT9V022_VERTICAL_BLANKING);
544 if (data < 0)
545 return -EIO;
546 ctrl->val = data;
547 return 0;
7397bfbe 548 }
ab7b50ae 549 return -EINVAL;
7397bfbe
GL
550}
551
ab7b50ae 552static int mt9v022_s_ctrl(struct v4l2_ctrl *ctrl)
7397bfbe 553{
ab7b50ae
HV
554 struct mt9v022 *mt9v022 = container_of(ctrl->handler,
555 struct mt9v022, hdl);
556 struct v4l2_subdev *sd = &mt9v022->subdev;
c4ce6d14 557 struct i2c_client *client = v4l2_get_subdevdata(sd);
ab7b50ae 558 int data;
7397bfbe
GL
559
560 switch (ctrl->id) {
561 case V4L2_CID_VFLIP:
ab7b50ae 562 if (ctrl->val)
9538e1c2 563 data = reg_set(client, MT9V022_READ_MODE, 0x10);
7397bfbe 564 else
9538e1c2 565 data = reg_clear(client, MT9V022_READ_MODE, 0x10);
7397bfbe
GL
566 if (data < 0)
567 return -EIO;
ab7b50ae 568 return 0;
7397bfbe 569 case V4L2_CID_HFLIP:
ab7b50ae 570 if (ctrl->val)
9538e1c2 571 data = reg_set(client, MT9V022_READ_MODE, 0x20);
7397bfbe 572 else
9538e1c2 573 data = reg_clear(client, MT9V022_READ_MODE, 0x20);
7397bfbe
GL
574 if (data < 0)
575 return -EIO;
ab7b50ae
HV
576 return 0;
577 case V4L2_CID_AUTOGAIN:
578 if (ctrl->val) {
579 if (reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0)
580 return -EIO;
581 } else {
582 struct v4l2_ctrl *gain = mt9v022->gain;
583 /* mt9v022 has minimum == default */
584 unsigned long range = gain->maximum - gain->minimum;
96c75399 585 /* Valid values 16 to 64, 32 to 64 must be even. */
0d5e8c43 586 unsigned long gain_val = ((gain->val - (s32)gain->minimum) *
96c75399 587 48 + range / 2) / range + 16;
ab7b50ae
HV
588
589 if (gain_val >= 32)
590 gain_val &= ~1;
591
5d28d525
GL
592 /*
593 * The user wants to set gain manually, hope, she
594 * knows, what she's doing... Switch AGC off.
595 */
9538e1c2 596 if (reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x2) < 0)
7397bfbe
GL
597 return -EIO;
598
96c75399 599 dev_dbg(&client->dev, "Setting gain from %d to %lu\n",
ab7b50ae
HV
600 reg_read(client, MT9V022_ANALOG_GAIN), gain_val);
601 if (reg_write(client, MT9V022_ANALOG_GAIN, gain_val) < 0)
7397bfbe 602 return -EIO;
7397bfbe 603 }
ab7b50ae
HV
604 return 0;
605 case V4L2_CID_EXPOSURE_AUTO:
606 if (ctrl->val == V4L2_EXPOSURE_AUTO) {
607 data = reg_set(client, MT9V022_AEC_AGC_ENABLE, 0x1);
608 } else {
609 struct v4l2_ctrl *exp = mt9v022->exposure;
610 unsigned long range = exp->maximum - exp->minimum;
0d5e8c43 611 unsigned long shutter = ((exp->val - (s32)exp->minimum) *
ab7b50ae
HV
612 479 + range / 2) / range + 1;
613
5d28d525
GL
614 /*
615 * The user wants to set shutter width manually, hope,
616 * she knows, what she's doing... Switch AEC off.
617 */
ab7b50ae
HV
618 data = reg_clear(client, MT9V022_AEC_AGC_ENABLE, 0x1);
619 if (data < 0)
7397bfbe 620 return -EIO;
85f8be68 621 dev_dbg(&client->dev, "Shutter width from %d to %lu\n",
ab7b50ae
HV
622 reg_read(client, MT9V022_TOTAL_SHUTTER_WIDTH),
623 shutter);
9538e1c2 624 if (reg_write(client, MT9V022_TOTAL_SHUTTER_WIDTH,
ab7b50ae 625 shutter) < 0)
7397bfbe 626 return -EIO;
7397bfbe 627 }
ab7b50ae 628 return 0;
6cc1eb70
AG
629 case V4L2_CID_HBLANK:
630 if (reg_write(client, MT9V022_HORIZONTAL_BLANKING,
631 ctrl->val) < 0)
632 return -EIO;
633 return 0;
634 case V4L2_CID_VBLANK:
635 if (reg_write(client, MT9V022_VERTICAL_BLANKING,
636 ctrl->val) < 0)
637 return -EIO;
638 return 0;
7397bfbe 639 }
ab7b50ae 640 return -EINVAL;
7397bfbe
GL
641}
642
5d28d525
GL
643/*
644 * Interface active, can use i2c. If it fails, it can indeed mean, that
645 * this wasn't our capture interface, so, we wait for the right one
646 */
14178aa5 647static int mt9v022_video_probe(struct i2c_client *client)
7397bfbe 648{
979ea1dd 649 struct mt9v022 *mt9v022 = to_mt9v022(client);
25a34811 650 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
7397bfbe
GL
651 s32 data;
652 int ret;
e958e27a 653 unsigned long flags;
7397bfbe 654
4bbc6d52
LP
655 ret = mt9v022_s_power(&mt9v022->subdev, 1);
656 if (ret < 0)
657 return ret;
658
7397bfbe 659 /* Read out the chip version register */
9538e1c2 660 data = reg_read(client, MT9V022_CHIP_VERSION);
7397bfbe 661
c078ac18
AG
662 /* must be 0x1311, 0x1313 or 0x1324 */
663 if (data != 0x1311 && data != 0x1313 && data != 0x1324) {
7397bfbe 664 ret = -ENODEV;
85f8be68 665 dev_info(&client->dev, "No MT9V022 found, ID register 0x%x\n",
7397bfbe
GL
666 data);
667 goto ei2c;
668 }
669
d0bac768
AG
670 mt9v022->chip_version = data;
671
c078ac18
AG
672 mt9v022->reg = is_mt9v024(data) ? &mt9v024_register :
673 &mt9v022_register;
674
7397bfbe 675 /* Soft reset */
9538e1c2 676 ret = reg_write(client, MT9V022_RESET, 1);
7397bfbe
GL
677 if (ret < 0)
678 goto ei2c;
679 /* 15 clock cycles */
680 udelay(200);
9538e1c2 681 if (reg_read(client, MT9V022_RESET)) {
85f8be68 682 dev_err(&client->dev, "Resetting MT9V022 failed!\n");
40e2e092
GL
683 if (ret > 0)
684 ret = -EIO;
7397bfbe
GL
685 goto ei2c;
686 }
687
688 /* Set monochrome or colour sensor type */
689 if (sensor_type && (!strcmp("colour", sensor_type) ||
690 !strcmp("color", sensor_type))) {
9538e1c2 691 ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 4 | 0x11);
6be89daa 692 mt9v022->model = MT9V022IX7ATC;
760697be 693 mt9v022->fmts = mt9v022_colour_fmts;
7397bfbe 694 } else {
9538e1c2 695 ret = reg_write(client, MT9V022_PIXEL_OPERATION_MODE, 0x11);
6be89daa 696 mt9v022->model = MT9V022IX7ATM;
760697be 697 mt9v022->fmts = mt9v022_monochrome_fmts;
7397bfbe
GL
698 }
699
e958e27a 700 if (ret < 0)
40e2e092 701 goto ei2c;
e958e27a 702
760697be 703 mt9v022->num_fmts = 0;
e958e27a
SH
704
705 /*
706 * This is a 10bit sensor, so by default we only allow 10bit.
707 * The platform may support different bus widths due to
708 * different routing of the data lines.
709 */
25a34811
GL
710 if (ssdd->query_bus_param)
711 flags = ssdd->query_bus_param(ssdd);
e958e27a
SH
712 else
713 flags = SOCAM_DATAWIDTH_10;
714
715 if (flags & SOCAM_DATAWIDTH_10)
760697be 716 mt9v022->num_fmts++;
e958e27a 717 else
760697be 718 mt9v022->fmts++;
e958e27a
SH
719
720 if (flags & SOCAM_DATAWIDTH_8)
760697be 721 mt9v022->num_fmts++;
e958e27a 722
760697be 723 mt9v022->fmt = &mt9v022->fmts[0];
6a6c8786 724
85f8be68 725 dev_info(&client->dev, "Detected a MT9V022 chip ID %x, %s sensor\n",
6be89daa 726 data, mt9v022->model == MT9V022IX7ATM ?
7397bfbe
GL
727 "monochrome" : "colour");
728
a4c56fd8
GL
729 ret = mt9v022_init(client);
730 if (ret < 0)
731 dev_err(&client->dev, "Failed to initialise the camera\n");
732
7397bfbe 733ei2c:
4bbc6d52 734 mt9v022_s_power(&mt9v022->subdev, 0);
7397bfbe
GL
735 return ret;
736}
737
32536108
GL
738static int mt9v022_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines)
739{
c4ce6d14 740 struct i2c_client *client = v4l2_get_subdevdata(sd);
32536108
GL
741 struct mt9v022 *mt9v022 = to_mt9v022(client);
742
743 *lines = mt9v022->y_skip_top;
744
745 return 0;
746}
747
ab7b50ae
HV
748static const struct v4l2_ctrl_ops mt9v022_ctrl_ops = {
749 .g_volatile_ctrl = mt9v022_g_volatile_ctrl,
750 .s_ctrl = mt9v022_s_ctrl,
751};
752
979ea1dd 753static struct v4l2_subdev_core_ops mt9v022_subdev_core_ops = {
979ea1dd
GL
754#ifdef CONFIG_VIDEO_ADV_DEBUG
755 .g_register = mt9v022_g_register,
756 .s_register = mt9v022_s_register,
757#endif
4ec10bac 758 .s_power = mt9v022_s_power,
979ea1dd
GL
759};
760
3805f201 761static int mt9v022_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
f5fe58fd 762 u32 *code)
760697be 763{
c4ce6d14 764 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be
GL
765 struct mt9v022 *mt9v022 = to_mt9v022(client);
766
3805f201 767 if (index >= mt9v022->num_fmts)
760697be
GL
768 return -EINVAL;
769
770 *code = mt9v022->fmts[index].code;
771 return 0;
772}
773
e8e2c70c
GL
774static int mt9v022_g_mbus_config(struct v4l2_subdev *sd,
775 struct v4l2_mbus_config *cfg)
776{
777 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 778 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
e8e2c70c
GL
779
780 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_SLAVE |
781 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
782 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW |
783 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW |
784 V4L2_MBUS_DATA_ACTIVE_HIGH;
785 cfg->type = V4L2_MBUS_PARALLEL;
25a34811 786 cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
e8e2c70c
GL
787
788 return 0;
789}
790
791static int mt9v022_s_mbus_config(struct v4l2_subdev *sd,
792 const struct v4l2_mbus_config *cfg)
793{
794 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 795 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
e8e2c70c 796 struct mt9v022 *mt9v022 = to_mt9v022(client);
25a34811 797 unsigned long flags = soc_camera_apply_board_flags(ssdd, cfg);
443f483a 798 unsigned int bps = soc_mbus_get_fmtdesc(mt9v022->fmt->code)->bits_per_sample;
e8e2c70c
GL
799 int ret;
800 u16 pixclk = 0;
801
25a34811
GL
802 if (ssdd->set_bus_param) {
803 ret = ssdd->set_bus_param(ssdd, 1 << (bps - 1));
e8e2c70c
GL
804 if (ret)
805 return ret;
806 } else if (bps != 10) {
807 /*
808 * Without board specific bus width settings we only support the
809 * sensors native bus width
810 */
811 return -EINVAL;
812 }
813
814 if (flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
815 pixclk |= 0x10;
816
817 if (!(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH))
818 pixclk |= 0x1;
819
820 if (!(flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH))
821 pixclk |= 0x2;
822
c078ac18 823 ret = reg_write(client, mt9v022->reg->pixclk_fv_lv, pixclk);
e8e2c70c
GL
824 if (ret < 0)
825 return ret;
826
827 if (!(flags & V4L2_MBUS_MASTER))
828 mt9v022->chip_control &= ~0x8;
829
830 ret = reg_write(client, MT9V022_CHIP_CONTROL, mt9v022->chip_control);
831 if (ret < 0)
832 return ret;
833
834 dev_dbg(&client->dev, "Calculated pixclk 0x%x, chip control 0x%x\n",
835 pixclk, mt9v022->chip_control);
836
837 return 0;
838}
839
979ea1dd
GL
840static struct v4l2_subdev_video_ops mt9v022_subdev_video_ops = {
841 .s_stream = mt9v022_s_stream,
760697be
GL
842 .s_mbus_fmt = mt9v022_s_fmt,
843 .g_mbus_fmt = mt9v022_g_fmt,
844 .try_mbus_fmt = mt9v022_try_fmt,
08590b96 845 .s_crop = mt9v022_s_crop,
6a6c8786
GL
846 .g_crop = mt9v022_g_crop,
847 .cropcap = mt9v022_cropcap,
760697be 848 .enum_mbus_fmt = mt9v022_enum_fmt,
e8e2c70c
GL
849 .g_mbus_config = mt9v022_g_mbus_config,
850 .s_mbus_config = mt9v022_s_mbus_config,
979ea1dd
GL
851};
852
32536108
GL
853static struct v4l2_subdev_sensor_ops mt9v022_subdev_sensor_ops = {
854 .g_skip_top_lines = mt9v022_g_skip_top_lines,
855};
856
979ea1dd
GL
857static struct v4l2_subdev_ops mt9v022_subdev_ops = {
858 .core = &mt9v022_subdev_core_ops,
859 .video = &mt9v022_subdev_video_ops,
32536108 860 .sensor = &mt9v022_subdev_sensor_ops,
979ea1dd
GL
861};
862
d2653e92
JD
863static int mt9v022_probe(struct i2c_client *client,
864 const struct i2c_device_id *did)
7397bfbe
GL
865{
866 struct mt9v022 *mt9v022;
25a34811 867 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
7397bfbe 868 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
daf16bab 869 struct mt9v022_platform_data *pdata;
7397bfbe
GL
870 int ret;
871
25a34811 872 if (!ssdd) {
7397bfbe
GL
873 dev_err(&client->dev, "MT9V022 driver needs platform data\n");
874 return -EINVAL;
875 }
876
877 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
878 dev_warn(&adapter->dev,
879 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
880 return -EIO;
881 }
882
70e176a5 883 mt9v022 = devm_kzalloc(&client->dev, sizeof(struct mt9v022), GFP_KERNEL);
7397bfbe
GL
884 if (!mt9v022)
885 return -ENOMEM;
886
25a34811 887 pdata = ssdd->drv_priv;
979ea1dd 888 v4l2_i2c_subdev_init(&mt9v022->subdev, client, &mt9v022_subdev_ops);
ab7b50ae
HV
889 v4l2_ctrl_handler_init(&mt9v022->hdl, 6);
890 v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
891 V4L2_CID_VFLIP, 0, 1, 1, 0);
892 v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
893 V4L2_CID_HFLIP, 0, 1, 1, 0);
894 mt9v022->autogain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
895 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
896 mt9v022->gain = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
897 V4L2_CID_GAIN, 0, 127, 1, 64);
898
899 /*
900 * Simulated autoexposure. If enabled, we calculate shutter width
901 * ourselves in the driver based on vertical blanking and frame width
902 */
903 mt9v022->autoexposure = v4l2_ctrl_new_std_menu(&mt9v022->hdl,
904 &mt9v022_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
905 V4L2_EXPOSURE_AUTO);
906 mt9v022->exposure = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
907 V4L2_CID_EXPOSURE, 1, 255, 1, 255);
908
6cc1eb70
AG
909 mt9v022->hblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
910 V4L2_CID_HBLANK, MT9V022_HORIZONTAL_BLANKING_MIN,
911 MT9V022_HORIZONTAL_BLANKING_MAX, 1,
912 MT9V022_HORIZONTAL_BLANKING_DEF);
913
914 mt9v022->vblank = v4l2_ctrl_new_std(&mt9v022->hdl, &mt9v022_ctrl_ops,
915 V4L2_CID_VBLANK, MT9V022_VERTICAL_BLANKING_MIN,
916 MT9V022_VERTICAL_BLANKING_MAX, 1,
917 MT9V022_VERTICAL_BLANKING_DEF);
918
ab7b50ae
HV
919 mt9v022->subdev.ctrl_handler = &mt9v022->hdl;
920 if (mt9v022->hdl.error) {
921 int err = mt9v022->hdl.error;
922
6cc1eb70 923 dev_err(&client->dev, "control initialisation err %d\n", err);
ab7b50ae
HV
924 return err;
925 }
926 v4l2_ctrl_auto_cluster(2, &mt9v022->autoexposure,
927 V4L2_EXPOSURE_MANUAL, true);
928 v4l2_ctrl_auto_cluster(2, &mt9v022->autogain, 0, true);
979ea1dd 929
7397bfbe 930 mt9v022->chip_control = MT9V022_CHIP_CONTROL_DEFAULT;
7397bfbe 931
96c75399 932 /*
b6f50b49
AG
933 * On some platforms the first read out line is corrupted.
934 * Workaround it by skipping if indicated by platform data.
96c75399 935 */
b6f50b49 936 mt9v022->y_skip_top = pdata ? pdata->y_skip_top : 0;
6a6c8786
GL
937 mt9v022->rect.left = MT9V022_COLUMN_SKIP;
938 mt9v022->rect.top = MT9V022_ROW_SKIP;
939 mt9v022->rect.width = MT9V022_MAX_WIDTH;
940 mt9v022->rect.height = MT9V022_MAX_HEIGHT;
941
9aea470b
GL
942 mt9v022->clk = v4l2_clk_get(&client->dev, "mclk");
943 if (IS_ERR(mt9v022->clk)) {
944 ret = PTR_ERR(mt9v022->clk);
945 goto eclkget;
946 }
947
14178aa5 948 ret = mt9v022_video_probe(client);
9aea470b
GL
949 if (ret) {
950 v4l2_clk_put(mt9v022->clk);
951eclkget:
ab7b50ae 952 v4l2_ctrl_handler_free(&mt9v022->hdl);
9aea470b 953 }
7397bfbe 954
7397bfbe
GL
955 return ret;
956}
957
958static int mt9v022_remove(struct i2c_client *client)
959{
979ea1dd 960 struct mt9v022 *mt9v022 = to_mt9v022(client);
25a34811 961 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
7397bfbe 962
9aea470b 963 v4l2_clk_put(mt9v022->clk);
ab7b50ae 964 v4l2_device_unregister_subdev(&mt9v022->subdev);
25a34811
GL
965 if (ssdd->free_bus)
966 ssdd->free_bus(ssdd);
ab7b50ae 967 v4l2_ctrl_handler_free(&mt9v022->hdl);
7397bfbe
GL
968
969 return 0;
970}
3760f736
JD
971static const struct i2c_device_id mt9v022_id[] = {
972 { "mt9v022", 0 },
973 { }
974};
975MODULE_DEVICE_TABLE(i2c, mt9v022_id);
976
7397bfbe
GL
977static struct i2c_driver mt9v022_i2c_driver = {
978 .driver = {
979 .name = "mt9v022",
980 },
981 .probe = mt9v022_probe,
982 .remove = mt9v022_remove,
3760f736 983 .id_table = mt9v022_id,
7397bfbe
GL
984};
985
c6e8d86f 986module_i2c_driver(mt9v022_i2c_driver);
7397bfbe
GL
987
988MODULE_DESCRIPTION("Micron MT9V022 Camera driver");
989MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>");
990MODULE_LICENSE("GPL");
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