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[media] em28xx: add support for Hauppauge WinTV-dualHD DVB tuner
[deliverable/linux.git] / drivers / media / i2c / tvp5150.c
CommitLineData
cd4665c5 1/*
c43875f6 2 * tvp5150 - Texas Instruments TVP5150A/AM1 and TVP5151 video decoder driver
cd4665c5 3 *
6ac48b45
MCC		 4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org)
5 * This code is placed under the terms of the GNU General Public License v2
cd4665c5
MCC		 6 */
7
b802fb99 8#include <dt-bindings/media/tvp5150.h>
cd4665c5 9#include <linux/i2c.h>
5a0e3ad6 10#include <linux/slab.h>
33b687cf 11#include <linux/videodev2.h>
cd4665c5 12#include <linux/delay.h>
09aa2609 13#include <linux/gpio/consumer.h>
7a707b89 14#include <linux/module.h>
c7d97499 15#include <media/v4l2-async.h>
6b8fe025 16#include <media/v4l2-device.h>
6c45ec71 17#include <media/v4l2-ctrls.h>
a2e5f1b3 18#include <media/v4l2-of.h>
55606310 19#include <media/v4l2-mc.h>
cd4665c5
MCC		 20
21#include "tvp5150_reg.h"
22
785a3de1
PZ		 23#define TVP5150_H_MAX 720U
24#define TVP5150_V_MAX_525_60 480U
25#define TVP5150_V_MAX_OTHERS 576U
963ddc63
JM		 26#define TVP5150_MAX_CROP_LEFT 511
27#define TVP5150_MAX_CROP_TOP 127
28#define TVP5150_CROP_SHIFT 2
29
c43875f6 30MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver");
cd4665c5
MCC		 31MODULE_AUTHOR("Mauro Carvalho Chehab");
32MODULE_LICENSE("GPL");
33
cd4665c5 34
ff699e6b 35static int debug;
2a0489d3 36module_param(debug, int, 0644);
6b8fe025 37MODULE_PARM_DESC(debug, "Debug level (0-2)");
cd4665c5
MCC		 38
39struct tvp5150 {
6b8fe025 40 struct v4l2_subdev sd;
55606310
MCC		 41#ifdef CONFIG_MEDIA_CONTROLLER
42 struct media_pad pads[DEMOD_NUM_PADS];
f7b4b54e
JMC		 43 struct media_entity input_ent[TVP5150_INPUT_NUM];
44 struct media_pad input_pad[TVP5150_INPUT_NUM];
55606310 45#endif
6c45ec71 46 struct v4l2_ctrl_handler hdl;
963ddc63 47 struct v4l2_rect rect;
84486d53 48
3ad96835 49 v4l2_std_id norm; /* Current set standard */
5325b427
HV		 50 u32 input;
51 u32 output;
84486d53 52 int enable;
a2e5f1b3 53
82275133
JMC		 54 u16 dev_id;
55 u16 rom_ver;
56
a2e5f1b3 57 enum v4l2_mbus_type mbus_type;
cd4665c5
MCC		 58};
59
6b8fe025 60static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd)
cd4665c5 61{
6b8fe025
HV		 62 return container_of(sd, struct tvp5150, sd);
63}
64
6c45ec71
HV		 65static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
66{
67 return &container_of(ctrl->handler, struct tvp5150, hdl)->sd;
68}
69
6b8fe025
HV		 70static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr)
71{
72 struct i2c_client *c = v4l2_get_subdevdata(sd);
cd4665c5 73 int rc;
e35ce2e4
LP		 74
75 rc = i2c_smbus_read_byte_data(c, addr);
76 if (rc < 0) {
77 v4l2_err(sd, "i2c i/o error: rc == %d\n", rc);
78 return rc;
8cd0d4ca 79 }
e1bc80ad 80
e35ce2e4 81 v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, rc);
cd4665c5 82
e35ce2e4 83 return rc;
cd4665c5
MCC		 84}
85
6b8fe025 86static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr,
84486d53 87 unsigned char value)
cd4665c5 88{
6b8fe025 89 struct i2c_client *c = v4l2_get_subdevdata(sd);
cd4665c5 90 int rc;
cd4665c5 91
e35ce2e4
LP		 92 v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", addr, value);
93 rc = i2c_smbus_write_byte_data(c, addr, value);
94 if (rc < 0)
95 v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d\n", rc);
cd4665c5
MCC		 96}
97
6b8fe025
HV		 98static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init,
99 const u8 end, int max_line)
3ad96835 100{
6b8fe025 101 int i = 0;
3ad96835 102
6b8fe025
HV		 103 while (init != (u8)(end + 1)) {
104 if ((i % max_line) == 0) {
105 if (i > 0)
3ad96835 106 printk("\n");
6b8fe025 107 printk("tvp5150: %s reg 0x%02x = ", s, init);
3ad96835 108 }
6b8fe025 109 printk("%02x ", tvp5150_read(sd, init));
3ad96835
MCC		 110
111 init++;
112 i++;
113 }
114 printk("\n");
115}
116
6b8fe025 117static int tvp5150_log_status(struct v4l2_subdev *sd)
cd4665c5 118{
84486d53 119 printk("tvp5150: Video input source selection #1 = 0x%02x\n",
6b8fe025 120 tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1));
84486d53 121 printk("tvp5150: Analog channel controls = 0x%02x\n",
6b8fe025 122 tvp5150_read(sd, TVP5150_ANAL_CHL_CTL));
84486d53 123 printk("tvp5150: Operation mode controls = 0x%02x\n",
6b8fe025 124 tvp5150_read(sd, TVP5150_OP_MODE_CTL));
84486d53 125 printk("tvp5150: Miscellaneous controls = 0x%02x\n",
6b8fe025 126 tvp5150_read(sd, TVP5150_MISC_CTL));
3ad96835 127 printk("tvp5150: Autoswitch mask= 0x%02x\n",
6b8fe025 128 tvp5150_read(sd, TVP5150_AUTOSW_MSK));
84486d53 129 printk("tvp5150: Color killer threshold control = 0x%02x\n",
6b8fe025 130 tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL));
3ad96835 131 printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
6b8fe025
HV		 132 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1),
133 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2),
134 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3));
84486d53 135 printk("tvp5150: Brightness control = 0x%02x\n",
6b8fe025 136 tvp5150_read(sd, TVP5150_BRIGHT_CTL));
84486d53 137 printk("tvp5150: Color saturation control = 0x%02x\n",
6b8fe025 138 tvp5150_read(sd, TVP5150_SATURATION_CTL));
84486d53 139 printk("tvp5150: Hue control = 0x%02x\n",
6b8fe025 140 tvp5150_read(sd, TVP5150_HUE_CTL));
84486d53 141 printk("tvp5150: Contrast control = 0x%02x\n",
6b8fe025 142 tvp5150_read(sd, TVP5150_CONTRAST_CTL));
84486d53 143 printk("tvp5150: Outputs and data rates select = 0x%02x\n",
6b8fe025 144 tvp5150_read(sd, TVP5150_DATA_RATE_SEL));
84486d53 145 printk("tvp5150: Configuration shared pins = 0x%02x\n",
6b8fe025 146 tvp5150_read(sd, TVP5150_CONF_SHARED_PIN));
3ad96835 147 printk("tvp5150: Active video cropping start = 0x%02x%02x\n",
6b8fe025
HV		 148 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB),
149 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB));
3ad96835 150 printk("tvp5150: Active video cropping stop = 0x%02x%02x\n",
6b8fe025
HV		 151 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB),
152 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB));
84486d53 153 printk("tvp5150: Genlock/RTC = 0x%02x\n",
6b8fe025 154 tvp5150_read(sd, TVP5150_GENLOCK));
84486d53 155 printk("tvp5150: Horizontal sync start = 0x%02x\n",
6b8fe025 156 tvp5150_read(sd, TVP5150_HORIZ_SYNC_START));
84486d53 157 printk("tvp5150: Vertical blanking start = 0x%02x\n",
6b8fe025 158 tvp5150_read(sd, TVP5150_VERT_BLANKING_START));
84486d53 159 printk("tvp5150: Vertical blanking stop = 0x%02x\n",
6b8fe025 160 tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP));
3ad96835 161 printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
6b8fe025
HV		 162 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1),
163 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2));
84486d53 164 printk("tvp5150: Interrupt reset register B = 0x%02x\n",
6b8fe025 165 tvp5150_read(sd, TVP5150_INT_RESET_REG_B));
84486d53 166 printk("tvp5150: Interrupt enable register B = 0x%02x\n",
6b8fe025 167 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B));
84486d53 168 printk("tvp5150: Interrupt configuration register B = 0x%02x\n",
6b8fe025 169 tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B));
84486d53 170 printk("tvp5150: Video standard = 0x%02x\n",
6b8fe025 171 tvp5150_read(sd, TVP5150_VIDEO_STD));
3ad96835 172 printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
6b8fe025
HV		 173 tvp5150_read(sd, TVP5150_CB_GAIN_FACT),
174 tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR));
84486d53 175 printk("tvp5150: Macrovision on counter = 0x%02x\n",
6b8fe025 176 tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR));
84486d53 177 printk("tvp5150: Macrovision off counter = 0x%02x\n",
6b8fe025 178 tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR));
3ad96835 179 printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
6b8fe025 180 (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4);
3ad96835 181 printk("tvp5150: Device ID = %02x%02x\n",
6b8fe025
HV		 182 tvp5150_read(sd, TVP5150_MSB_DEV_ID),
183 tvp5150_read(sd, TVP5150_LSB_DEV_ID));
3ad96835 184 printk("tvp5150: ROM version = (hex) %02x.%02x\n",
6b8fe025
HV		 185 tvp5150_read(sd, TVP5150_ROM_MAJOR_VER),
186 tvp5150_read(sd, TVP5150_ROM_MINOR_VER));
3ad96835 187 printk("tvp5150: Vertical line count = 0x%02x%02x\n",
6b8fe025
HV		 188 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB),
189 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB));
84486d53 190 printk("tvp5150: Interrupt status register B = 0x%02x\n",
6b8fe025 191 tvp5150_read(sd, TVP5150_INT_STATUS_REG_B));
84486d53 192 printk("tvp5150: Interrupt active register B = 0x%02x\n",
6b8fe025 193 tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B));
3ad96835 194 printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
6b8fe025
HV		 195 tvp5150_read(sd, TVP5150_STATUS_REG_1),
196 tvp5150_read(sd, TVP5150_STATUS_REG_2),
197 tvp5150_read(sd, TVP5150_STATUS_REG_3),
198 tvp5150_read(sd, TVP5150_STATUS_REG_4),
199 tvp5150_read(sd, TVP5150_STATUS_REG_5));
3ad96835 200
6b8fe025
HV		 201 dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
202 TVP5150_TELETEXT_FIL1_END, 8);
203 dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
204 TVP5150_TELETEXT_FIL2_END, 8);
3ad96835 205
84486d53 206 printk("tvp5150: Teletext filter enable = 0x%02x\n",
6b8fe025 207 tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA));
84486d53 208 printk("tvp5150: Interrupt status register A = 0x%02x\n",
6b8fe025 209 tvp5150_read(sd, TVP5150_INT_STATUS_REG_A));
84486d53 210 printk("tvp5150: Interrupt enable register A = 0x%02x\n",
6b8fe025 211 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A));
84486d53 212 printk("tvp5150: Interrupt configuration = 0x%02x\n",
6b8fe025 213 tvp5150_read(sd, TVP5150_INT_CONF));
84486d53 214 printk("tvp5150: VDP status register = 0x%02x\n",
6b8fe025 215 tvp5150_read(sd, TVP5150_VDP_STATUS_REG));
84486d53 216 printk("tvp5150: FIFO word count = 0x%02x\n",
6b8fe025 217 tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT));
84486d53 218 printk("tvp5150: FIFO interrupt threshold = 0x%02x\n",
6b8fe025 219 tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD));
84486d53 220 printk("tvp5150: FIFO reset = 0x%02x\n",
6b8fe025 221 tvp5150_read(sd, TVP5150_FIFO_RESET));
84486d53 222 printk("tvp5150: Line number interrupt = 0x%02x\n",
6b8fe025 223 tvp5150_read(sd, TVP5150_LINE_NUMBER_INT));
3ad96835 224 printk("tvp5150: Pixel alignment register = 0x%02x%02x\n",
6b8fe025
HV		 225 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH),
226 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW));
84486d53 227 printk("tvp5150: FIFO output control = 0x%02x\n",
6b8fe025 228 tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL));
3ad96835 229 printk("tvp5150: Full field enable = 0x%02x\n",
6b8fe025 230 tvp5150_read(sd, TVP5150_FULL_FIELD_ENA));
84486d53 231 printk("tvp5150: Full field mode register = 0x%02x\n",
6b8fe025 232 tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG));
3ad96835 233
6b8fe025
HV		 234 dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI,
235 TVP5150_CC_DATA_END, 8);
3ad96835 236
6b8fe025
HV		 237 dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI,
238 TVP5150_WSS_DATA_END, 8);
3ad96835 239
6b8fe025
HV		 240 dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI,
241 TVP5150_VPS_DATA_END, 8);
3ad96835 242
6b8fe025
HV		 243 dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI,
244 TVP5150_VITC_DATA_END, 10);
3ad96835 245
6b8fe025
HV		 246 dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI,
247 TVP5150_LINE_MODE_END, 8);
248 return 0;
cd4665c5
MCC		 249}
250
251/****************************************************************************
252 Basic functions
253 ****************************************************************************/
cd4665c5 254
6b8fe025 255static inline void tvp5150_selmux(struct v4l2_subdev *sd)
cd4665c5 256{
2962fc01 257 int opmode = 0;
6b8fe025 258 struct tvp5150 *decoder = to_tvp5150(sd);
c7c0b34c 259 int input = 0;
afcc8e8c 260 int val;
84486d53 261
c43875f6
MCC		 262 /* Only tvp5150am1 and tvp5151 have signal generator support */
263 if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) ||
264 (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) {
265 if (!decoder->enable)
266 input = 8;
267 }
4c86f973 268
5325b427 269 switch (decoder->input) {
c7c0b34c
HV		 270 case TVP5150_COMPOSITE1:
271 input |= 2;
272 /* fall through */
273 case TVP5150_COMPOSITE0:
c0477ad9 274 break;
c7c0b34c 275 case TVP5150_SVIDEO:
c0477ad9 276 default:
c7c0b34c 277 input |= 1;
c0477ad9
MCC		 278 break;
279 }
280
6b8fe025 281 v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i "
12500f07 282 "=> tvp5150 input=%i, opmode=%i\n",
5325b427
HV		 283 decoder->input, decoder->output,
284 input, opmode);
12500f07 285
6b8fe025
HV		 286 tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode);
287 tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input);
f4b8b3ae
MCC		 288
289 /* Svideo should enable YCrCb output and disable GPCL output
290 * For Composite and TV, it should be the reverse
291 */
6b8fe025 292 val = tvp5150_read(sd, TVP5150_MISC_CTL);
8cd0d4ca
DL		 293 if (val < 0) {
294 v4l2_err(sd, "%s: failed with error = %d\n", __func__, val);
295 return;
296 }
297
5325b427 298 if (decoder->input == TVP5150_SVIDEO)
f4b8b3ae
MCC		 299 val = (val & ~0x40) | 0x10;
300 else
301 val = (val & ~0x10) | 0x40;
6b8fe025 302 tvp5150_write(sd, TVP5150_MISC_CTL, val);
cd4665c5
MCC		 303};
304
e1bc80ad
MCC		 305struct i2c_reg_value {
306 unsigned char reg;
307 unsigned char value;
308};
309
310/* Default values as sugested at TVP5150AM1 datasheet */
311static const struct i2c_reg_value tvp5150_init_default[] = {
312 { /* 0x00 */
313 TVP5150_VD_IN_SRC_SEL_1,0x00
314 },
315 { /* 0x01 */
316 TVP5150_ANAL_CHL_CTL,0x15
317 },
318 { /* 0x02 */
319 TVP5150_OP_MODE_CTL,0x00
320 },
321 { /* 0x03 */
322 TVP5150_MISC_CTL,0x01
323 },
324 { /* 0x06 */
325 TVP5150_COLOR_KIL_THSH_CTL,0x10
326 },
327 { /* 0x07 */
328 TVP5150_LUMA_PROC_CTL_1,0x60
329 },
330 { /* 0x08 */
331 TVP5150_LUMA_PROC_CTL_2,0x00
332 },
333 { /* 0x09 */
334 TVP5150_BRIGHT_CTL,0x80
335 },
336 { /* 0x0a */
337 TVP5150_SATURATION_CTL,0x80
338 },
339 { /* 0x0b */
340 TVP5150_HUE_CTL,0x00
341 },
342 { /* 0x0c */
343 TVP5150_CONTRAST_CTL,0x80
344 },
345 { /* 0x0d */
346 TVP5150_DATA_RATE_SEL,0x47
347 },
348 { /* 0x0e */
349 TVP5150_LUMA_PROC_CTL_3,0x00
350 },
351 { /* 0x0f */
352 TVP5150_CONF_SHARED_PIN,0x08
353 },
354 { /* 0x11 */
355 TVP5150_ACT_VD_CROP_ST_MSB,0x00
356 },
357 { /* 0x12 */
358 TVP5150_ACT_VD_CROP_ST_LSB,0x00
359 },
360 { /* 0x13 */
361 TVP5150_ACT_VD_CROP_STP_MSB,0x00
362 },
363 { /* 0x14 */
364 TVP5150_ACT_VD_CROP_STP_LSB,0x00
365 },
366 { /* 0x15 */
367 TVP5150_GENLOCK,0x01
368 },
369 { /* 0x16 */
370 TVP5150_HORIZ_SYNC_START,0x80
371 },
372 { /* 0x18 */
373 TVP5150_VERT_BLANKING_START,0x00
374 },
375 { /* 0x19 */
376 TVP5150_VERT_BLANKING_STOP,0x00
377 },
378 { /* 0x1a */
379 TVP5150_CHROMA_PROC_CTL_1,0x0c
380 },
381 { /* 0x1b */
382 TVP5150_CHROMA_PROC_CTL_2,0x14
383 },
384 { /* 0x1c */
385 TVP5150_INT_RESET_REG_B,0x00
386 },
387 { /* 0x1d */
388 TVP5150_INT_ENABLE_REG_B,0x00
389 },
390 { /* 0x1e */
391 TVP5150_INTT_CONFIG_REG_B,0x00
392 },
393 { /* 0x28 */
394 TVP5150_VIDEO_STD,0x00
395 },
396 { /* 0x2e */
397 TVP5150_MACROVISION_ON_CTR,0x0f
398 },
399 { /* 0x2f */
400 TVP5150_MACROVISION_OFF_CTR,0x01
401 },
402 { /* 0xbb */
403 TVP5150_TELETEXT_FIL_ENA,0x00
404 },
405 { /* 0xc0 */
406 TVP5150_INT_STATUS_REG_A,0x00
407 },
408 { /* 0xc1 */
409 TVP5150_INT_ENABLE_REG_A,0x00
410 },
411 { /* 0xc2 */
412 TVP5150_INT_CONF,0x04
413 },
414 { /* 0xc8 */
415 TVP5150_FIFO_INT_THRESHOLD,0x80
416 },
417 { /* 0xc9 */
418 TVP5150_FIFO_RESET,0x00
419 },
420 { /* 0xca */
421 TVP5150_LINE_NUMBER_INT,0x00
422 },
423 { /* 0xcb */
424 TVP5150_PIX_ALIGN_REG_LOW,0x4e
425 },
426 { /* 0xcc */
427 TVP5150_PIX_ALIGN_REG_HIGH,0x00
428 },
429 { /* 0xcd */
430 TVP5150_FIFO_OUT_CTRL,0x01
431 },
432 { /* 0xcf */
3ad96835 433 TVP5150_FULL_FIELD_ENA,0x00
e1bc80ad
MCC		 434 },
435 { /* 0xd0 */
3ad96835 436 TVP5150_LINE_MODE_INI,0x00
e1bc80ad
MCC		 437 },
438 { /* 0xfc */
439 TVP5150_FULL_FIELD_MODE_REG,0x7f
440 },
441 { /* end of data */
442 0xff,0xff
443 }
444};
445
446/* Default values as sugested at TVP5150AM1 datasheet */
447static const struct i2c_reg_value tvp5150_init_enable[] = {
448 {
449 TVP5150_CONF_SHARED_PIN, 2
450 },{ /* Automatic offset and AGC enabled */
451 TVP5150_ANAL_CHL_CTL, 0x15
452 },{ /* Activate YCrCb output 0x9 or 0xd ? */
453 TVP5150_MISC_CTL, 0x6f
454 },{ /* Activates video std autodetection for all standards */
455 TVP5150_AUTOSW_MSK, 0x0
456 },{ /* Default format: 0x47. For 4:2:2: 0x40 */
457 TVP5150_DATA_RATE_SEL, 0x47
458 },{
459 TVP5150_CHROMA_PROC_CTL_1, 0x0c
460 },{
461 TVP5150_CHROMA_PROC_CTL_2, 0x54
462 },{ /* Non documented, but initialized on WinTV USB2 */
463 0x27, 0x20
464 },{
465 0xff,0xff
466 }
467};
468
6ac48b45
MCC		 469struct tvp5150_vbi_type {
470 unsigned int vbi_type;
471 unsigned int ini_line;
472 unsigned int end_line;
473 unsigned int by_field :1;
474};
475
e1bc80ad
MCC		 476struct i2c_vbi_ram_value {
477 u16 reg;
6ac48b45
MCC		 478 struct tvp5150_vbi_type type;
479 unsigned char values[16];
e1bc80ad
MCC		 480};
481
6ac48b45
MCC		 482/* This struct have the values for each supported VBI Standard
483 * by
484 tvp5150_vbi_types should follow the same order as vbi_ram_default
3ad96835
MCC		 485 * value 0 means rom position 0x10, value 1 means rom position 0x30
486 * and so on. There are 16 possible locations from 0 to 15.
487 */
3ad96835 488
a9cff90e 489static struct i2c_vbi_ram_value vbi_ram_default[] =
cd4665c5 490{
9bc7400a
HV		 491 /* FIXME: Current api doesn't handle all VBI types, those not
492 yet supported are placed under #if 0 */
493#if 0
6ac48b45
MCC		 494 {0x010, /* Teletext, SECAM, WST System A */
495 {V4L2_SLICED_TELETEXT_SECAM,6,23,1},
496 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
497 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 498 },
9bc7400a 499#endif
6ac48b45 500 {0x030, /* Teletext, PAL, WST System B */
9bc7400a 501 {V4L2_SLICED_TELETEXT_B,6,22,1},
6ac48b45
MCC		 502 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
503 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 504 },
9bc7400a 505#if 0
6ac48b45
MCC		 506 {0x050, /* Teletext, PAL, WST System C */
507 {V4L2_SLICED_TELETEXT_PAL_C,6,22,1},
508 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
509 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 510 },
6ac48b45
MCC		 511 {0x070, /* Teletext, NTSC, WST System B */
512 {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},
513 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
514 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 515 },
6ac48b45
MCC		 516 {0x090, /* Tetetext, NTSC NABTS System C */
517 {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},
518 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
519 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
e1bc80ad 520 },
6ac48b45
MCC		 521 {0x0b0, /* Teletext, NTSC-J, NABTS System D */
522 {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},
523 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
524 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 525 },
6ac48b45
MCC		 526 {0x0d0, /* Closed Caption, PAL/SECAM */
527 {V4L2_SLICED_CAPTION_625,22,22,1},
528 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
529 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 530 },
9bc7400a 531#endif
6ac48b45
MCC		 532 {0x0f0, /* Closed Caption, NTSC */
533 {V4L2_SLICED_CAPTION_525,21,21,1},
534 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
535 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 536 },
6ac48b45 537 {0x110, /* Wide Screen Signal, PAL/SECAM */
12db5607 538 {V4L2_SLICED_WSS_625,23,23,1},
6ac48b45
MCC		 539 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
540 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
e1bc80ad 541 },
9bc7400a 542#if 0
6ac48b45
MCC		 543 {0x130, /* Wide Screen Signal, NTSC C */
544 {V4L2_SLICED_WSS_525,20,20,1},
545 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
546 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
e1bc80ad 547 },
6ac48b45
MCC		 548 {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
549 {V4l2_SLICED_VITC_625,6,22,0},
550 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
551 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 552 },
6ac48b45
MCC		 553 {0x170, /* Vertical Interval Timecode (VITC), NTSC */
554 {V4l2_SLICED_VITC_525,10,20,0},
555 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
556 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 557 },
9bc7400a 558#endif
6ac48b45
MCC		 559 {0x190, /* Video Program System (VPS), PAL */
560 {V4L2_SLICED_VPS,16,16,0},
561 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
562 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
3ad96835 563 },
6ac48b45
MCC		 564 /* 0x1d0 User programmable */
565
566 /* End of struct */
567 { (u16)-1 }
e1bc80ad 568};
4c86f973 569
6b8fe025 570static int tvp5150_write_inittab(struct v4l2_subdev *sd,
6ac48b45 571 const struct i2c_reg_value *regs)
e1bc80ad
MCC		 572{
573 while (regs->reg != 0xff) {
6b8fe025 574 tvp5150_write(sd, regs->reg, regs->value);
e1bc80ad
MCC		 575 regs++;
576 }
577 return 0;
578}
84486d53 579
6b8fe025 580static int tvp5150_vdp_init(struct v4l2_subdev *sd,
6ac48b45 581 const struct i2c_vbi_ram_value *regs)
e1bc80ad
MCC		 582{
583 unsigned int i;
cd4665c5 584
e1bc80ad 585 /* Disable Full Field */
6b8fe025 586 tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0);
cd4665c5 587
e1bc80ad 588 /* Before programming, Line mode should be at 0xff */
6b8fe025
HV		 589 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
590 tvp5150_write(sd, i, 0xff);
cd4665c5 591
e1bc80ad 592 /* Load Ram Table */
6b8fe025
HV		 593 while (regs->reg != (u16)-1) {
594 tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8);
595 tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg);
cd4665c5 596
6b8fe025
HV		 597 for (i = 0; i < 16; i++)
598 tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]);
84486d53 599
e1bc80ad
MCC		 600 regs++;
601 }
602 return 0;
603}
cd4665c5 604
6ac48b45 605/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
6b8fe025 606static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd,
6ac48b45
MCC		 607 struct v4l2_sliced_vbi_cap *cap)
608{
6b8fe025 609 const struct i2c_vbi_ram_value *regs = vbi_ram_default;
6ac48b45
MCC		 610 int line;
611
bccfa449 612 v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n");
6ac48b45
MCC		 613 memset(cap, 0, sizeof *cap);
614
615 while (regs->reg != (u16)-1 ) {
616 for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {
617 cap->service_lines[0][line] |= regs->type.vbi_type;
618 }
619 cap->service_set |= regs->type.vbi_type;
620
621 regs++;
622 }
6b8fe025 623 return 0;
6ac48b45
MCC		 624}
625
3ad96835
MCC		 626/* Set vbi processing
627 * type - one of tvp5150_vbi_types
628 * line - line to gather data
629 * fields: bit 0 field1, bit 1, field2
630 * flags (default=0xf0) is a bitmask, were set means:
631 * bit 7: enable filtering null bytes on CC
632 * bit 6: send data also to FIFO
633 * bit 5: don't allow data with errors on FIFO
634 * bit 4: enable ECC when possible
635 * pix_align = pix alignment:
636 * LSB = field1
637 * MSB = field2
638 */
6b8fe025 639static int tvp5150_set_vbi(struct v4l2_subdev *sd,
2701dacb
MCC		 640 const struct i2c_vbi_ram_value *regs,
641 unsigned int type,u8 flags, int line,
642 const int fields)
3ad96835 643{
6b8fe025
HV		 644 struct tvp5150 *decoder = to_tvp5150(sd);
645 v4l2_std_id std = decoder->norm;
3ad96835 646 u8 reg;
2701dacb 647 int pos=0;
3ad96835
MCC		 648
649 if (std == V4L2_STD_ALL) {
6b8fe025 650 v4l2_err(sd, "VBI can't be configured without knowing number of lines\n");
12db5607 651 return 0;
7d5b7b98 652 } else if (std & V4L2_STD_625_50) {
3ad96835
MCC		 653 /* Don't follow NTSC Line number convension */
654 line += 3;
655 }
656
657 if (line<6||line>27)
2701dacb
MCC		 658 return 0;
659
660 while (regs->reg != (u16)-1 ) {
661 if ((type & regs->type.vbi_type) &&
662 (line>=regs->type.ini_line) &&
663 (line<=regs->type.end_line)) {
664 type=regs->type.vbi_type;
665 break;
666 }
667
668 regs++;
669 pos++;
670 }
671 if (regs->reg == (u16)-1)
672 return 0;
3ad96835 673
2701dacb 674 type=pos | (flags & 0xf0);
3ad96835
MCC		 675 reg=((line-6)<<1)+TVP5150_LINE_MODE_INI;
676
677 if (fields&1) {
6b8fe025 678 tvp5150_write(sd, reg, type);
3ad96835
MCC		 679 }
680
681 if (fields&2) {
6b8fe025 682 tvp5150_write(sd, reg+1, type);
3ad96835
MCC		 683 }
684
2701dacb 685 return type;
3ad96835
MCC		 686}
687
6b8fe025 688static int tvp5150_get_vbi(struct v4l2_subdev *sd,
12db5607
MCC		 689 const struct i2c_vbi_ram_value *regs, int line)
690{
6b8fe025
HV		 691 struct tvp5150 *decoder = to_tvp5150(sd);
692 v4l2_std_id std = decoder->norm;
12db5607 693 u8 reg;
6b8fe025 694 int pos, type = 0;
8cd0d4ca 695 int i, ret = 0;
12db5607
MCC		 696
697 if (std == V4L2_STD_ALL) {
6b8fe025 698 v4l2_err(sd, "VBI can't be configured without knowing number of lines\n");
12db5607 699 return 0;
7d5b7b98 700 } else if (std & V4L2_STD_625_50) {
12db5607
MCC		 701 /* Don't follow NTSC Line number convension */
702 line += 3;
703 }
704
6b8fe025 705 if (line < 6 || line > 27)
12db5607
MCC		 706 return 0;
707
6b8fe025 708 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
12db5607 709
8cd0d4ca
DL		 710 for (i = 0; i <= 1; i++) {
711 ret = tvp5150_read(sd, reg + i);
712 if (ret < 0) {
713 v4l2_err(sd, "%s: failed with error = %d\n",
714 __func__, ret);
715 return 0;
716 }
717 pos = ret & 0x0f;
718 if (pos < 0x0f)
719 type |= regs[pos].type.vbi_type;
720 }
12db5607
MCC		 721
722 return type;
723}
6b8fe025
HV		 724
725static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
e1bc80ad 726{
6b8fe025
HV		 727 struct tvp5150 *decoder = to_tvp5150(sd);
728 int fmt = 0;
e1bc80ad 729
6b8fe025 730 decoder->norm = std;
e1bc80ad
MCC		 731
732 /* First tests should be against specific std */
733
26811ae0 734 if (std == V4L2_STD_NTSC_443) {
2da12fcb 735 fmt = VIDEO_STD_NTSC_4_43_BIT;
26811ae0 736 } else if (std == V4L2_STD_PAL_M) {
2da12fcb 737 fmt = VIDEO_STD_PAL_M_BIT;
26811ae0 738 } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) {
2da12fcb 739 fmt = VIDEO_STD_PAL_COMBINATION_N_BIT;
e1bc80ad
MCC		 740 } else {
741 /* Then, test against generic ones */
6b8fe025 742 if (std & V4L2_STD_NTSC)
2da12fcb 743 fmt = VIDEO_STD_NTSC_MJ_BIT;
6b8fe025 744 else if (std & V4L2_STD_PAL)
2da12fcb 745 fmt = VIDEO_STD_PAL_BDGHIN_BIT;
6b8fe025 746 else if (std & V4L2_STD_SECAM)
2da12fcb 747 fmt = VIDEO_STD_SECAM_BIT;
e1bc80ad 748 }
84486d53 749
6b8fe025
HV		 750 v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt);
751 tvp5150_write(sd, TVP5150_VIDEO_STD, fmt);
e1bc80ad
MCC		 752 return 0;
753}
754
6b8fe025
HV		 755static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
756{
757 struct tvp5150 *decoder = to_tvp5150(sd);
758
759 if (decoder->norm == std)
760 return 0;
761
963ddc63
JM		 762 /* Change cropping height limits */
763 if (std & V4L2_STD_525_60)
764 decoder->rect.height = TVP5150_V_MAX_525_60;
765 else
766 decoder->rect.height = TVP5150_V_MAX_OTHERS;
767
768
6b8fe025
HV		 769 return tvp5150_set_std(sd, std);
770}
771
772static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
e1bc80ad 773{
6b8fe025 774 struct tvp5150 *decoder = to_tvp5150(sd);
84486d53 775
e1bc80ad 776 /* Initializes TVP5150 to its default values */
6b8fe025 777 tvp5150_write_inittab(sd, tvp5150_init_default);
e1bc80ad
MCC		 778
779 /* Initializes VDP registers */
6b8fe025 780 tvp5150_vdp_init(sd, vbi_ram_default);
e1bc80ad
MCC		 781
782 /* Selects decoder input */
6b8fe025 783 tvp5150_selmux(sd);
e1bc80ad
MCC		 784
785 /* Initializes TVP5150 to stream enabled values */
6b8fe025 786 tvp5150_write_inittab(sd, tvp5150_init_enable);
e1bc80ad
MCC		 787
788 /* Initialize image preferences */
6c45ec71 789 v4l2_ctrl_handler_setup(&decoder->hdl);
e1bc80ad 790
6b8fe025 791 tvp5150_set_std(sd, decoder->norm);
a2e5f1b3
JMC		 792
793 if (decoder->mbus_type == V4L2_MBUS_PARALLEL)
794 tvp5150_write(sd, TVP5150_DATA_RATE_SEL, 0x40);
795
6b8fe025 796 return 0;
cd4665c5
MCC		 797};
798
6c45ec71 799static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl)
a6c2ba28 800{
6c45ec71 801 struct v4l2_subdev *sd = to_sd(ctrl);
c43875f6 802 struct tvp5150 *decoder = to_tvp5150(sd);
a6c2ba28 803
804 switch (ctrl->id) {
805 case V4L2_CID_BRIGHTNESS:
6c45ec71 806 tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val);
a6c2ba28 807 return 0;
808 case V4L2_CID_CONTRAST:
6c45ec71 809 tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val);
a6c2ba28 810 return 0;
811 case V4L2_CID_SATURATION:
6c45ec71 812 tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val);
a6c2ba28 813 return 0;
814 case V4L2_CID_HUE:
6c45ec71 815 tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val);
c43875f6
MCC		 816 case V4L2_CID_TEST_PATTERN:
817 decoder->enable = ctrl->val ? false : true;
818 tvp5150_selmux(sd);
a6c2ba28 819 return 0;
a6c2ba28 820 }
c0477ad9 821 return -EINVAL;
a6c2ba28 822}
823
ec2c4f3f
JM		 824static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
825{
826 int val = tvp5150_read(sd, TVP5150_STATUS_REG_5);
827
828 switch (val & 0x0F) {
829 case 0x01:
830 return V4L2_STD_NTSC;
831 case 0x03:
832 return V4L2_STD_PAL;
833 case 0x05:
834 return V4L2_STD_PAL_M;
835 case 0x07:
836 return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc;
837 case 0x09:
838 return V4L2_STD_NTSC_443;
839 case 0xb:
840 return V4L2_STD_SECAM;
841 default:
842 return V4L2_STD_UNKNOWN;
843 }
844}
845
da298c6d
HV		 846static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
847 struct v4l2_subdev_pad_config *cfg,
848 struct v4l2_subdev_format *format)
ec2c4f3f 849{
da298c6d 850 struct v4l2_mbus_framefmt *f;
ec2c4f3f 851 struct tvp5150 *decoder = to_tvp5150(sd);
ec2c4f3f 852
da298c6d 853 if (!format || format->pad)
ec2c4f3f
JM		 854 return -EINVAL;
855
da298c6d
HV		 856 f = &format->format;
857
ec2c4f3f
JM		 858 tvp5150_reset(sd, 0);
859
963ddc63 860 f->width = decoder->rect.width;
4f57d27b 861 f->height = decoder->rect.height / 2;
ec2c4f3f 862
f5fe58fd 863 f->code = MEDIA_BUS_FMT_UYVY8_2X8;
4f57d27b 864 f->field = V4L2_FIELD_ALTERNATE;
ec2c4f3f
JM		 865 f->colorspace = V4L2_COLORSPACE_SMPTE170M;
866
867 v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width,
868 f->height);
869 return 0;
870}
871
4f996594 872static int tvp5150_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a)
963ddc63
JM		 873{
874 struct v4l2_rect rect = a->c;
875 struct tvp5150 *decoder = to_tvp5150(sd);
876 v4l2_std_id std;
f90580ca 877 unsigned int hmax;
963ddc63
JM		 878
879 v4l2_dbg(1, debug, sd, "%s left=%d, top=%d, width=%d, height=%d\n",
880 __func__, rect.left, rect.top, rect.width, rect.height);
881
882 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
883 return -EINVAL;
884
885 /* tvp5150 has some special limits */
886 rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT);
f90580ca
RR		 887 rect.width = clamp_t(unsigned int, rect.width,
888 TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left,
889 TVP5150_H_MAX - rect.left);
963ddc63
JM		 890 rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP);
891
892 /* Calculate height based on current standard */
893 if (decoder->norm == V4L2_STD_ALL)
894 std = tvp5150_read_std(sd);
895 else
896 std = decoder->norm;
897
898 if (std & V4L2_STD_525_60)
899 hmax = TVP5150_V_MAX_525_60;
900 else
901 hmax = TVP5150_V_MAX_OTHERS;
902
f90580ca
RR		 903 rect.height = clamp_t(unsigned int, rect.height,
904 hmax - TVP5150_MAX_CROP_TOP - rect.top,
905 hmax - rect.top);
963ddc63
JM		 906
907 tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top);
908 tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP,
909 rect.top + rect.height - hmax);
910 tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB,
911 rect.left >> TVP5150_CROP_SHIFT);
912 tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB,
913 rect.left | (1 << TVP5150_CROP_SHIFT));
914 tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB,
915 (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >>
916 TVP5150_CROP_SHIFT);
917 tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB,
918 rect.left + rect.width - TVP5150_MAX_CROP_LEFT);
919
920 decoder->rect = rect;
921
922 return 0;
923}
924
925static int tvp5150_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
926{
12bd10c7 927 struct tvp5150 *decoder = to_tvp5150(sd);
963ddc63
JM		 928
929 a->c = decoder->rect;
930 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
931
932 return 0;
933}
934
935static int tvp5150_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
936{
12bd10c7 937 struct tvp5150 *decoder = to_tvp5150(sd);
963ddc63
JM		 938 v4l2_std_id std;
939
940 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
941 return -EINVAL;
942
943 a->bounds.left = 0;
944 a->bounds.top = 0;
945 a->bounds.width = TVP5150_H_MAX;
946
947 /* Calculate height based on current standard */
948 if (decoder->norm == V4L2_STD_ALL)
949 std = tvp5150_read_std(sd);
950 else
951 std = decoder->norm;
952
953 if (std & V4L2_STD_525_60)
954 a->bounds.height = TVP5150_V_MAX_525_60;
955 else
956 a->bounds.height = TVP5150_V_MAX_OTHERS;
957
958 a->defrect = a->bounds;
959 a->pixelaspect.numerator = 1;
960 a->pixelaspect.denominator = 1;
961
962 return 0;
963}
964
dd3a46bb
LP		 965static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
966 struct v4l2_mbus_config *cfg)
967{
a2e5f1b3
JMC		 968 struct tvp5150 *decoder = to_tvp5150(sd);
969
970 cfg->type = decoder->mbus_type;
dd3a46bb
LP		 971 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
972 | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
973
974 return 0;
975}
976
e545ac87
LP		 977/****************************************************************************
978 V4L2 subdev pad ops
979 ****************************************************************************/
980static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
981 struct v4l2_subdev_pad_config *cfg,
982 struct v4l2_subdev_mbus_code_enum *code)
983{
984 if (code->pad || code->index)
985 return -EINVAL;
986
987 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
988 return 0;
989}
990
991static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
992 struct v4l2_subdev_pad_config *cfg,
993 struct v4l2_subdev_frame_size_enum *fse)
994{
995 struct tvp5150 *decoder = to_tvp5150(sd);
996
997 if (fse->index >= 8 || fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
998 return -EINVAL;
999
1000 fse->code = MEDIA_BUS_FMT_UYVY8_2X8;
1001 fse->min_width = decoder->rect.width;
1002 fse->max_width = decoder->rect.width;
1003 fse->min_height = decoder->rect.height / 2;
1004 fse->max_height = decoder->rect.height / 2;
1005
1006 return 0;
1007}
1008
f7b4b54e
JMC		 1009/****************************************************************************
1010 Media entity ops
1011 ****************************************************************************/
1012
1013static int tvp5150_link_setup(struct media_entity *entity,
1014 const struct media_pad *local,
1015 const struct media_pad *remote, u32 flags)
1016{
1017#ifdef CONFIG_MEDIA_CONTROLLER
1018 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1019 struct tvp5150 *decoder = to_tvp5150(sd);
1020 int i;
1021
1022 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1023 if (remote->entity == &decoder->input_ent[i])
1024 break;
1025 }
1026
1027 /* Do nothing for entities that are not input connectors */
1028 if (i == TVP5150_INPUT_NUM)
1029 return 0;
1030
1031 decoder->input = i;
1032
f7b4b54e
JMC		 1033 tvp5150_selmux(sd);
1034#endif
1035
1036 return 0;
1037}
1038
1039static const struct media_entity_operations tvp5150_sd_media_ops = {
1040 .link_setup = tvp5150_link_setup,
1041};
1042
84486d53
MCC		 1043/****************************************************************************
1044 I2C Command
1045 ****************************************************************************/
c7c0b34c 1046
460b6c08
LP		 1047static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
1048{
a2e5f1b3 1049 struct tvp5150 *decoder = to_tvp5150(sd);
841502d7
MCC		 1050 /* Output format: 8-bit ITU-R BT.656 with embedded syncs */
1051 int val = 0x09;
a2e5f1b3
JMC		 1052
1053 /* Output format: 8-bit 4:2:2 YUV with discrete sync */
841502d7
MCC		 1054 if (decoder->mbus_type == V4L2_MBUS_PARALLEL)
1055 val = 0x0d;
a2e5f1b3 1056
460b6c08
LP		 1057 /* Initializes TVP5150 to its default values */
1058 /* # set PCLK (27MHz) */
1059 tvp5150_write(sd, TVP5150_CONF_SHARED_PIN, 0x00);
1060
460b6c08 1061 if (enable)
841502d7 1062 tvp5150_write(sd, TVP5150_MISC_CTL, val);
460b6c08
LP		 1063 else
1064 tvp5150_write(sd, TVP5150_MISC_CTL, 0x00);
1065
1066 return 0;
1067}
1068
5325b427
HV		 1069static int tvp5150_s_routing(struct v4l2_subdev *sd,
1070 u32 input, u32 output, u32 config)
6b8fe025
HV		 1071{
1072 struct tvp5150 *decoder = to_tvp5150(sd);
84486d53 1073
5325b427
HV		 1074 decoder->input = input;
1075 decoder->output = output;
c43875f6
MCC		 1076
1077 if (output == TVP5150_BLACK_SCREEN)
1078 decoder->enable = false;
1079 else
1080 decoder->enable = true;
1081
6b8fe025
HV		 1082 tvp5150_selmux(sd);
1083 return 0;
1084}
6ac48b45 1085
d37dad49
HV		 1086static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
1087{
1088 /* this is for capturing 36 raw vbi lines
1089 if there's a way to cut off the beginning 2 vbi lines
1090 with the tvp5150 then the vbi line count could be lowered
1091 to 17 lines/field again, although I couldn't find a register
1092 which could do that cropping */
1093 if (fmt->sample_format == V4L2_PIX_FMT_GREY)
1094 tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70);
1095 if (fmt->count[0] == 18 && fmt->count[1] == 18) {
1096 tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00);
1097 tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01);
1098 }
1099 return 0;
1100}
1101
1102static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
6b8fe025 1103{
6b8fe025
HV		 1104 int i;
1105
6b8fe025
HV		 1106 if (svbi->service_set != 0) {
1107 for (i = 0; i <= 23; i++) {
1108 svbi->service_lines[1][i] = 0;
1109 svbi->service_lines[0][i] =
1110 tvp5150_set_vbi(sd, vbi_ram_default,
1111 svbi->service_lines[0][i], 0xf0, i, 3);
2c5aacc6 1112 }
6b8fe025
HV		 1113 /* Enables FIFO */
1114 tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1);
1115 } else {
1116 /* Disables FIFO*/
1117 tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0);
12db5607 1118
6b8fe025
HV		 1119 /* Disable Full Field */
1120 tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0);
12db5607 1121
6b8fe025
HV		 1122 /* Disable Line modes */
1123 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
1124 tvp5150_write(sd, i, 0xff);
12db5607 1125 }
6b8fe025
HV		 1126 return 0;
1127}
12db5607 1128
d37dad49
HV		 1129static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1130{
1131 int i, mask = 0;
1132
30634e8e 1133 memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
12db5607 1134
6b8fe025
HV		 1135 for (i = 0; i <= 23; i++) {
1136 svbi->service_lines[0][i] =
1137 tvp5150_get_vbi(sd, vbi_ram_default, i);
1138 mask |= svbi->service_lines[0][i];
2701dacb 1139 }
6b8fe025
HV		 1140 svbi->service_set = mask;
1141 return 0;
1142}
1143
21dcd8cc 1144#ifdef CONFIG_VIDEO_ADV_DEBUG
aecde8b5 1145static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
6b8fe025 1146{
8cd0d4ca
DL		 1147 int res;
1148
8cd0d4ca
DL		 1149 res = tvp5150_read(sd, reg->reg & 0xff);
1150 if (res < 0) {
1151 v4l2_err(sd, "%s: failed with error = %d\n", __func__, res);
1152 return res;
1153 }
1154
1155 reg->val = res;
aecde8b5 1156 reg->size = 1;
6b8fe025
HV		 1157 return 0;
1158}
84486d53 1159
977ba3b1 1160static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
6b8fe025 1161{
6b8fe025
HV		 1162 tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff);
1163 return 0;
1164}
1165#endif
a6c2ba28 1166
6b8fe025
HV		 1167static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1168{
1169 int status = tvp5150_read(sd, 0x88);
a6c2ba28 1170
6b8fe025
HV		 1171 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
1172 return 0;
1173}
a6c2ba28 1174
f7b4b54e
JMC		 1175static int tvp5150_registered_async(struct v4l2_subdev *sd)
1176{
1177#ifdef CONFIG_MEDIA_CONTROLLER
1178 struct tvp5150 *decoder = to_tvp5150(sd);
1179 int ret = 0;
1180 int i;
1181
1182 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1183 struct media_entity *input = &decoder->input_ent[i];
1184 struct media_pad *pad = &decoder->input_pad[i];
1185
1186 if (!input->name)
1187 continue;
1188
1189 decoder->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
1190
1191 ret = media_entity_pads_init(input, 1, pad);
1192 if (ret < 0)
1193 return ret;
1194
1195 ret = media_device_register_entity(sd->v4l2_dev->mdev, input);
1196 if (ret < 0)
1197 return ret;
1198
1199 ret = media_create_pad_link(input, 0, &sd->entity,
1200 DEMOD_PAD_IF_INPUT, 0);
1201 if (ret < 0) {
1202 media_device_unregister_entity(input);
1203 return ret;
1204 }
1205 }
1206#endif
1207
1208 return 0;
1209}
1210
6b8fe025
HV		 1211/* ----------------------------------------------------------------------- */
1212
6c45ec71
HV		 1213static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = {
1214 .s_ctrl = tvp5150_s_ctrl,
1215};
1216
6b8fe025
HV		 1217static const struct v4l2_subdev_core_ops tvp5150_core_ops = {
1218 .log_status = tvp5150_log_status,
6b8fe025
HV		 1219 .reset = tvp5150_reset,
1220#ifdef CONFIG_VIDEO_ADV_DEBUG
1221 .g_register = tvp5150_g_register,
1222 .s_register = tvp5150_s_register,
1223#endif
f7b4b54e 1224 .registered_async = tvp5150_registered_async,
6b8fe025
HV		 1225};
1226
1227static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
6b8fe025
HV		 1228 .g_tuner = tvp5150_g_tuner,
1229};
1230
1231static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
8774bed9 1232 .s_std = tvp5150_s_std,
460b6c08 1233 .s_stream = tvp5150_s_stream,
6b8fe025 1234 .s_routing = tvp5150_s_routing,
963ddc63
JM		 1235 .s_crop = tvp5150_s_crop,
1236 .g_crop = tvp5150_g_crop,
1237 .cropcap = tvp5150_cropcap,
dd3a46bb 1238 .g_mbus_config = tvp5150_g_mbus_config,
32cd527f
HV		 1239};
1240
1241static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
6b8fe025 1242 .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap,
d37dad49
HV		 1243 .g_sliced_fmt = tvp5150_g_sliced_fmt,
1244 .s_sliced_fmt = tvp5150_s_sliced_fmt,
1245 .s_raw_fmt = tvp5150_s_raw_fmt,
6b8fe025
HV		 1246};
1247
ebcff5fc
HV		 1248static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = {
1249 .enum_mbus_code = tvp5150_enum_mbus_code,
e545ac87 1250 .enum_frame_size = tvp5150_enum_frame_size,
da298c6d
HV		 1251 .set_fmt = tvp5150_fill_fmt,
1252 .get_fmt = tvp5150_fill_fmt,
ebcff5fc
HV		 1253};
1254
6b8fe025
HV		 1255static const struct v4l2_subdev_ops tvp5150_ops = {
1256 .core = &tvp5150_core_ops,
1257 .tuner = &tvp5150_tuner_ops,
1258 .video = &tvp5150_video_ops,
32cd527f 1259 .vbi = &tvp5150_vbi_ops,
ebcff5fc 1260 .pad = &tvp5150_pad_ops,
6b8fe025
HV		 1261};
1262
1263
cd4665c5
MCC		 1264/****************************************************************************
1265 I2C Client & Driver
1266 ****************************************************************************/
cd4665c5 1267
7871597a
LP		 1268static int tvp5150_detect_version(struct tvp5150 *core)
1269{
1270 struct v4l2_subdev *sd = &core->sd;
1271 struct i2c_client *c = v4l2_get_subdevdata(sd);
1272 unsigned int i;
7871597a
LP		 1273 u8 regs[4];
1274 int res;
1275
1276 /*
1277 * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID,
1278 * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER
1279 */
1280 for (i = 0; i < 4; i++) {
1281 res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i);
1282 if (res < 0)
1283 return res;
1284 regs[i] = res;
1285 }
1286
82275133
JMC		 1287 core->dev_id = (regs[0] << 8) | regs[1];
1288 core->rom_ver = (regs[2] << 8) | regs[3];
7871597a
LP		 1289
1290 v4l2_info(sd, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n",
82275133
JMC		 1291 core->dev_id, regs[2], regs[3], c->addr << 1,
1292 c->adapter->name);
7871597a 1293
82275133 1294 if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) {
7871597a 1295 v4l2_info(sd, "tvp5150a detected.\n");
82275133 1296 } else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) {
7871597a
LP		 1297 v4l2_info(sd, "tvp5150am1 detected.\n");
1298
1299 /* ITU-T BT.656.4 timing */
1300 tvp5150_write(sd, TVP5150_REV_SELECT, 0);
82275133 1301 } else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) {
05676b3e 1302 v4l2_info(sd, "tvp5151 detected.\n");
7871597a 1303 } else {
82275133
JMC		 1304 v4l2_info(sd, "*** unknown tvp%04x chip detected.\n",
1305 core->dev_id);
7871597a
LP		 1306 }
1307
1308 return 0;
1309}
1310
09aa2609
JMC		 1311static int tvp5150_init(struct i2c_client *c)
1312{
1313 struct gpio_desc *pdn_gpio;
1314 struct gpio_desc *reset_gpio;
1315
1316 pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH);
1317 if (IS_ERR(pdn_gpio))
1318 return PTR_ERR(pdn_gpio);
1319
1320 if (pdn_gpio) {
1321 gpiod_set_value_cansleep(pdn_gpio, 0);
1322 /* Delay time between power supplies active and reset */
1323 msleep(20);
1324 }
1325
1326 reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH);
1327 if (IS_ERR(reset_gpio))
1328 return PTR_ERR(reset_gpio);
1329
1330 if (reset_gpio) {
1331 /* RESETB pulse duration */
1332 ndelay(500);
1333 gpiod_set_value_cansleep(reset_gpio, 0);
1334 /* Delay time between end of reset to I2C active */
1335 usleep_range(200, 250);
1336 }
1337
1338 return 0;
1339}
1340
a2e5f1b3
JMC		 1341static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np)
1342{
1343 struct v4l2_of_endpoint bus_cfg;
1344 struct device_node *ep;
f7b4b54e
JMC		 1345#ifdef CONFIG_MEDIA_CONTROLLER
1346 struct device_node *connectors, *child;
1347 struct media_entity *input;
1348 const char *name;
1349 u32 input_type;
1350#endif
a2e5f1b3
JMC		 1351 unsigned int flags;
1352 int ret = 0;
1353
1354 ep = of_graph_get_next_endpoint(np, NULL);
1355 if (!ep)
1356 return -EINVAL;
1357
1358 ret = v4l2_of_parse_endpoint(ep, &bus_cfg);
1359 if (ret)
1360 goto err;
1361
1362 flags = bus_cfg.bus.parallel.flags;
1363
1364 if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL &&
1365 !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH &&
1366 flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH &&
2bd5e437
JMC		 1367 flags & V4L2_MBUS_FIELD_EVEN_LOW)) {
1368 ret = -EINVAL;
1369 goto err;
1370 }
a2e5f1b3
JMC		 1371
1372 decoder->mbus_type = bus_cfg.bus_type;
1373
f7b4b54e
JMC		 1374#ifdef CONFIG_MEDIA_CONTROLLER
1375 connectors = of_get_child_by_name(np, "connectors");
1376
1377 if (!connectors)
1378 goto err;
1379
1380 for_each_available_child_of_node(connectors, child) {
1381 ret = of_property_read_u32(child, "input", &input_type);
1382 if (ret) {
1383 v4l2_err(&decoder->sd,
1384 "missing type property in node %s\n",
1385 child->name);
1386 goto err_connector;
1387 }
1388
60ad7689 1389 if (input_type >= TVP5150_INPUT_NUM) {
f7b4b54e
JMC		 1390 ret = -EINVAL;
1391 goto err_connector;
1392 }
1393
1394 input = &decoder->input_ent[input_type];
1395
1396 /* Each input connector can only be defined once */
1397 if (input->name) {
1398 v4l2_err(&decoder->sd,
1399 "input %s with same type already exists\n",
1400 input->name);
1401 ret = -EINVAL;
1402 goto err_connector;
1403 }
1404
1405 switch (input_type) {
1406 case TVP5150_COMPOSITE0:
1407 case TVP5150_COMPOSITE1:
1408 input->function = MEDIA_ENT_F_CONN_COMPOSITE;
1409 break;
1410 case TVP5150_SVIDEO:
1411 input->function = MEDIA_ENT_F_CONN_SVIDEO;
1412 break;
f7b4b54e
JMC		 1413 }
1414
1415 input->flags = MEDIA_ENT_FL_CONNECTOR;
1416
1417 ret = of_property_read_string(child, "label", &name);
1418 if (ret < 0) {
1419 v4l2_err(&decoder->sd,
1420 "missing label property in node %s\n",
1421 child->name);
1422 goto err_connector;
1423 }
1424
1425 input->name = name;
1426 }
1427
1428err_connector:
1429 of_node_put(connectors);
1430#endif
a2e5f1b3
JMC		 1431err:
1432 of_node_put(ep);
1433 return ret;
1434}
1435
c43875f6
MCC		 1436static const char * const tvp5150_test_patterns[2] = {
1437 "Disabled",
1438 "Black screen"
1439};
1440
6b8fe025
HV		 1441static int tvp5150_probe(struct i2c_client *c,
1442 const struct i2c_device_id *id)
cd4665c5 1443{
cd4665c5 1444 struct tvp5150 *core;
6b8fe025 1445 struct v4l2_subdev *sd;
a2e5f1b3 1446 struct device_node *np = c->dev.of_node;
7871597a 1447 int res;
cd4665c5
MCC		 1448
1449 /* Check if the adapter supports the needed features */
6b8fe025 1450 if (!i2c_check_functionality(c->adapter,
cd4665c5 1451 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
6b8fe025 1452 return -EIO;
cd4665c5 1453
09aa2609
JMC		 1454 res = tvp5150_init(c);
1455 if (res)
1456 return res;
1457
c02b211d
LP		 1458 core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL);
1459 if (!core)
cd4665c5 1460 return -ENOMEM;
a2e5f1b3 1461
6b8fe025 1462 sd = &core->sd;
a2e5f1b3
JMC		 1463
1464 if (IS_ENABLED(CONFIG_OF) && np) {
1465 res = tvp5150_parse_dt(core, np);
1466 if (res) {
1467 v4l2_err(sd, "DT parsing error: %d\n", res);
1468 return res;
1469 }
1470 } else {
1471 /* Default to BT.656 embedded sync */
1472 core->mbus_type = V4L2_MBUS_BT656;
1473 }
1474
6b8fe025 1475 v4l2_i2c_subdev_init(sd, c, &tvp5150_ops);
e545ac87
LP		 1476 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1477
1478#if defined(CONFIG_MEDIA_CONTROLLER)
55606310
MCC		 1479 core->pads[DEMOD_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;
1480 core->pads[DEMOD_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
1481 core->pads[DEMOD_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE;
f92c70ad
MCC		 1482
1483 sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
1484
55606310 1485 res = media_entity_pads_init(&sd->entity, DEMOD_NUM_PADS, core->pads);
e545ac87
LP		 1486 if (res < 0)
1487 return res;
f7b4b54e
JMC		 1488
1489 sd->entity.ops = &tvp5150_sd_media_ops;
e545ac87 1490#endif
8cd0d4ca 1491
7871597a
LP		 1492 res = tvp5150_detect_version(core);
1493 if (res < 0)
1494 return res;
0e09a3c9 1495
3ad96835 1496 core->norm = V4L2_STD_ALL; /* Default is autodetect */
5325b427 1497 core->input = TVP5150_COMPOSITE1;
c43875f6 1498 core->enable = true;
6c45ec71 1499
b1950b8d 1500 v4l2_ctrl_handler_init(&core->hdl, 5);
6c45ec71
HV		 1501 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1502 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1503 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1504 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1505 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1506 V4L2_CID_SATURATION, 0, 255, 1, 128);
1507 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1508 V4L2_CID_HUE, -128, 127, 1, 0);
b1950b8d
LP		 1509 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1510 V4L2_CID_PIXEL_RATE, 27000000,
1511 27000000, 1, 27000000);
c43875f6
MCC		 1512 v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops,
1513 V4L2_CID_TEST_PATTERN,
1514 ARRAY_SIZE(tvp5150_test_patterns),
1515 0, 0, tvp5150_test_patterns);
6c45ec71
HV		 1516 sd->ctrl_handler = &core->hdl;
1517 if (core->hdl.error) {
8cd0d4ca 1518 res = core->hdl.error;
c7d97499 1519 goto err;
6c45ec71
HV		 1520 }
1521 v4l2_ctrl_handler_setup(&core->hdl);
4c86f973 1522
963ddc63
JM		 1523 /* Default is no cropping */
1524 core->rect.top = 0;
1525 if (tvp5150_read_std(sd) & V4L2_STD_525_60)
1526 core->rect.height = TVP5150_V_MAX_525_60;
1527 else
1528 core->rect.height = TVP5150_V_MAX_OTHERS;
1529 core->rect.left = 0;
1530 core->rect.width = TVP5150_H_MAX;
1531
c7d97499
JMC		 1532 res = v4l2_async_register_subdev(sd);
1533 if (res < 0)
1534 goto err;
1535
f1e5ee45 1536 if (debug > 1)
6b8fe025 1537 tvp5150_log_status(sd);
cd4665c5 1538 return 0;
c7d97499
JMC		 1539
1540err:
1541 v4l2_ctrl_handler_free(&core->hdl);
1542 return res;
cd4665c5
MCC		 1543}
1544
6b8fe025 1545static int tvp5150_remove(struct i2c_client *c)
cd4665c5 1546{
6b8fe025 1547 struct v4l2_subdev *sd = i2c_get_clientdata(c);
6c45ec71 1548 struct tvp5150 *decoder = to_tvp5150(sd);
cd4665c5 1549
6b8fe025 1550 v4l2_dbg(1, debug, sd,
e1bc80ad
MCC		 1551 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1552 c->addr << 1);
1553
c7d97499 1554 v4l2_async_unregister_subdev(sd);
6c45ec71 1555 v4l2_ctrl_handler_free(&decoder->hdl);
cd4665c5
MCC		 1556 return 0;
1557}
1558
1559/* ----------------------------------------------------------------------- */
1560
6b8fe025
HV		 1561static const struct i2c_device_id tvp5150_id[] = {
1562 { "tvp5150", 0 },
1563 { }
1564};
1565MODULE_DEVICE_TABLE(i2c, tvp5150_id);
84486d53 1566
7ef930a7
EG		 1567#if IS_ENABLED(CONFIG_OF)
1568static const struct of_device_id tvp5150_of_match[] = {
1569 { .compatible = "ti,tvp5150", },
1570 { /* sentinel */ },
1571};
1572MODULE_DEVICE_TABLE(of, tvp5150_of_match);
1573#endif
1574
c771145b
HV		 1575static struct i2c_driver tvp5150_driver = {
1576 .driver = {
7ef930a7 1577 .of_match_table = of_match_ptr(tvp5150_of_match),
c771145b
HV		 1578 .name = "tvp5150",
1579 },
1580 .probe = tvp5150_probe,
1581 .remove = tvp5150_remove,
1582 .id_table = tvp5150_id,
cd4665c5 1583};
c771145b 1584
c6e8d86f 1585module_i2c_driver(tvp5150_driver);
Linux kernel - Deliverables
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