Commit | Line | Data |
---|---|---|
cd4665c5 | 1 | /* |
6ac48b45 | 2 | * tvp5150 - Texas Instruments TVP5150A/AM1 video decoder driver |
cd4665c5 | 3 | * |
6ac48b45 MCC |
4 | * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org) |
5 | * This code is placed under the terms of the GNU General Public License v2 | |
cd4665c5 MCC |
6 | */ |
7 | ||
cd4665c5 | 8 | #include <linux/i2c.h> |
5a0e3ad6 | 9 | #include <linux/slab.h> |
33b687cf | 10 | #include <linux/videodev2.h> |
cd4665c5 | 11 | #include <linux/delay.h> |
7a707b89 | 12 | #include <linux/module.h> |
6b8fe025 | 13 | #include <media/v4l2-device.h> |
c7c0b34c | 14 | #include <media/tvp5150.h> |
6c45ec71 | 15 | #include <media/v4l2-ctrls.h> |
cd4665c5 MCC |
16 | |
17 | #include "tvp5150_reg.h" | |
18 | ||
963ddc63 JM |
19 | #define TVP5150_H_MAX 720 |
20 | #define TVP5150_V_MAX_525_60 480 | |
21 | #define TVP5150_V_MAX_OTHERS 576 | |
22 | #define TVP5150_MAX_CROP_LEFT 511 | |
23 | #define TVP5150_MAX_CROP_TOP 127 | |
24 | #define TVP5150_CROP_SHIFT 2 | |
25 | ||
6ac48b45 | 26 | MODULE_DESCRIPTION("Texas Instruments TVP5150A video decoder driver"); |
cd4665c5 MCC |
27 | MODULE_AUTHOR("Mauro Carvalho Chehab"); |
28 | MODULE_LICENSE("GPL"); | |
29 | ||
cd4665c5 | 30 | |
ff699e6b | 31 | static int debug; |
cd4665c5 | 32 | module_param(debug, int, 0); |
6b8fe025 | 33 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); |
cd4665c5 MCC |
34 | |
35 | struct tvp5150 { | |
6b8fe025 | 36 | struct v4l2_subdev sd; |
6c45ec71 | 37 | struct v4l2_ctrl_handler hdl; |
963ddc63 | 38 | struct v4l2_rect rect; |
84486d53 | 39 | |
3ad96835 | 40 | v4l2_std_id norm; /* Current set standard */ |
5325b427 HV |
41 | u32 input; |
42 | u32 output; | |
84486d53 | 43 | int enable; |
cd4665c5 MCC |
44 | }; |
45 | ||
6b8fe025 | 46 | static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd) |
cd4665c5 | 47 | { |
6b8fe025 HV |
48 | return container_of(sd, struct tvp5150, sd); |
49 | } | |
50 | ||
6c45ec71 HV |
51 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) |
52 | { | |
53 | return &container_of(ctrl->handler, struct tvp5150, hdl)->sd; | |
54 | } | |
55 | ||
6b8fe025 HV |
56 | static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr) |
57 | { | |
58 | struct i2c_client *c = v4l2_get_subdevdata(sd); | |
cd4665c5 MCC |
59 | unsigned char buffer[1]; |
60 | int rc; | |
cd4665c5 MCC |
61 | |
62 | buffer[0] = addr; | |
8cd0d4ca DL |
63 | |
64 | rc = i2c_master_send(c, buffer, 1); | |
65 | if (rc < 0) { | |
66 | v4l2_err(sd, "i2c i/o error: rc == %d (should be 1)\n", rc); | |
67 | return rc; | |
68 | } | |
cd4665c5 MCC |
69 | |
70 | msleep(10); | |
71 | ||
8cd0d4ca DL |
72 | rc = i2c_master_recv(c, buffer, 1); |
73 | if (rc < 0) { | |
74 | v4l2_err(sd, "i2c i/o error: rc == %d (should be 1)\n", rc); | |
75 | return rc; | |
76 | } | |
e1bc80ad | 77 | |
6b8fe025 | 78 | v4l2_dbg(2, debug, sd, "tvp5150: read 0x%02x = 0x%02x\n", addr, buffer[0]); |
cd4665c5 MCC |
79 | |
80 | return (buffer[0]); | |
81 | } | |
82 | ||
6b8fe025 | 83 | static inline void tvp5150_write(struct v4l2_subdev *sd, unsigned char addr, |
84486d53 | 84 | unsigned char value) |
cd4665c5 | 85 | { |
6b8fe025 | 86 | struct i2c_client *c = v4l2_get_subdevdata(sd); |
cd4665c5 MCC |
87 | unsigned char buffer[2]; |
88 | int rc; | |
cd4665c5 MCC |
89 | |
90 | buffer[0] = addr; | |
84486d53 | 91 | buffer[1] = value; |
6b8fe025 | 92 | v4l2_dbg(2, debug, sd, "tvp5150: writing 0x%02x 0x%02x\n", buffer[0], buffer[1]); |
cd4665c5 | 93 | if (2 != (rc = i2c_master_send(c, buffer, 2))) |
6b8fe025 | 94 | v4l2_dbg(0, debug, sd, "i2c i/o error: rc == %d (should be 2)\n", rc); |
cd4665c5 MCC |
95 | } |
96 | ||
6b8fe025 HV |
97 | static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init, |
98 | const u8 end, int max_line) | |
3ad96835 | 99 | { |
6b8fe025 | 100 | int i = 0; |
3ad96835 | 101 | |
6b8fe025 HV |
102 | while (init != (u8)(end + 1)) { |
103 | if ((i % max_line) == 0) { | |
104 | if (i > 0) | |
3ad96835 | 105 | printk("\n"); |
6b8fe025 | 106 | printk("tvp5150: %s reg 0x%02x = ", s, init); |
3ad96835 | 107 | } |
6b8fe025 | 108 | printk("%02x ", tvp5150_read(sd, init)); |
3ad96835 MCC |
109 | |
110 | init++; | |
111 | i++; | |
112 | } | |
113 | printk("\n"); | |
114 | } | |
115 | ||
6b8fe025 | 116 | static int tvp5150_log_status(struct v4l2_subdev *sd) |
cd4665c5 | 117 | { |
84486d53 | 118 | printk("tvp5150: Video input source selection #1 = 0x%02x\n", |
6b8fe025 | 119 | tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1)); |
84486d53 | 120 | printk("tvp5150: Analog channel controls = 0x%02x\n", |
6b8fe025 | 121 | tvp5150_read(sd, TVP5150_ANAL_CHL_CTL)); |
84486d53 | 122 | printk("tvp5150: Operation mode controls = 0x%02x\n", |
6b8fe025 | 123 | tvp5150_read(sd, TVP5150_OP_MODE_CTL)); |
84486d53 | 124 | printk("tvp5150: Miscellaneous controls = 0x%02x\n", |
6b8fe025 | 125 | tvp5150_read(sd, TVP5150_MISC_CTL)); |
3ad96835 | 126 | printk("tvp5150: Autoswitch mask= 0x%02x\n", |
6b8fe025 | 127 | tvp5150_read(sd, TVP5150_AUTOSW_MSK)); |
84486d53 | 128 | printk("tvp5150: Color killer threshold control = 0x%02x\n", |
6b8fe025 | 129 | tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL)); |
3ad96835 | 130 | printk("tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n", |
6b8fe025 HV |
131 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1), |
132 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2), | |
133 | tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3)); | |
84486d53 | 134 | printk("tvp5150: Brightness control = 0x%02x\n", |
6b8fe025 | 135 | tvp5150_read(sd, TVP5150_BRIGHT_CTL)); |
84486d53 | 136 | printk("tvp5150: Color saturation control = 0x%02x\n", |
6b8fe025 | 137 | tvp5150_read(sd, TVP5150_SATURATION_CTL)); |
84486d53 | 138 | printk("tvp5150: Hue control = 0x%02x\n", |
6b8fe025 | 139 | tvp5150_read(sd, TVP5150_HUE_CTL)); |
84486d53 | 140 | printk("tvp5150: Contrast control = 0x%02x\n", |
6b8fe025 | 141 | tvp5150_read(sd, TVP5150_CONTRAST_CTL)); |
84486d53 | 142 | printk("tvp5150: Outputs and data rates select = 0x%02x\n", |
6b8fe025 | 143 | tvp5150_read(sd, TVP5150_DATA_RATE_SEL)); |
84486d53 | 144 | printk("tvp5150: Configuration shared pins = 0x%02x\n", |
6b8fe025 | 145 | tvp5150_read(sd, TVP5150_CONF_SHARED_PIN)); |
3ad96835 | 146 | printk("tvp5150: Active video cropping start = 0x%02x%02x\n", |
6b8fe025 HV |
147 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB), |
148 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB)); | |
3ad96835 | 149 | printk("tvp5150: Active video cropping stop = 0x%02x%02x\n", |
6b8fe025 HV |
150 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB), |
151 | tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB)); | |
84486d53 | 152 | printk("tvp5150: Genlock/RTC = 0x%02x\n", |
6b8fe025 | 153 | tvp5150_read(sd, TVP5150_GENLOCK)); |
84486d53 | 154 | printk("tvp5150: Horizontal sync start = 0x%02x\n", |
6b8fe025 | 155 | tvp5150_read(sd, TVP5150_HORIZ_SYNC_START)); |
84486d53 | 156 | printk("tvp5150: Vertical blanking start = 0x%02x\n", |
6b8fe025 | 157 | tvp5150_read(sd, TVP5150_VERT_BLANKING_START)); |
84486d53 | 158 | printk("tvp5150: Vertical blanking stop = 0x%02x\n", |
6b8fe025 | 159 | tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP)); |
3ad96835 | 160 | printk("tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n", |
6b8fe025 HV |
161 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1), |
162 | tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2)); | |
84486d53 | 163 | printk("tvp5150: Interrupt reset register B = 0x%02x\n", |
6b8fe025 | 164 | tvp5150_read(sd, TVP5150_INT_RESET_REG_B)); |
84486d53 | 165 | printk("tvp5150: Interrupt enable register B = 0x%02x\n", |
6b8fe025 | 166 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B)); |
84486d53 | 167 | printk("tvp5150: Interrupt configuration register B = 0x%02x\n", |
6b8fe025 | 168 | tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B)); |
84486d53 | 169 | printk("tvp5150: Video standard = 0x%02x\n", |
6b8fe025 | 170 | tvp5150_read(sd, TVP5150_VIDEO_STD)); |
3ad96835 | 171 | printk("tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n", |
6b8fe025 HV |
172 | tvp5150_read(sd, TVP5150_CB_GAIN_FACT), |
173 | tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR)); | |
84486d53 | 174 | printk("tvp5150: Macrovision on counter = 0x%02x\n", |
6b8fe025 | 175 | tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR)); |
84486d53 | 176 | printk("tvp5150: Macrovision off counter = 0x%02x\n", |
6b8fe025 | 177 | tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR)); |
3ad96835 | 178 | printk("tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n", |
6b8fe025 | 179 | (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4); |
3ad96835 | 180 | printk("tvp5150: Device ID = %02x%02x\n", |
6b8fe025 HV |
181 | tvp5150_read(sd, TVP5150_MSB_DEV_ID), |
182 | tvp5150_read(sd, TVP5150_LSB_DEV_ID)); | |
3ad96835 | 183 | printk("tvp5150: ROM version = (hex) %02x.%02x\n", |
6b8fe025 HV |
184 | tvp5150_read(sd, TVP5150_ROM_MAJOR_VER), |
185 | tvp5150_read(sd, TVP5150_ROM_MINOR_VER)); | |
3ad96835 | 186 | printk("tvp5150: Vertical line count = 0x%02x%02x\n", |
6b8fe025 HV |
187 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB), |
188 | tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB)); | |
84486d53 | 189 | printk("tvp5150: Interrupt status register B = 0x%02x\n", |
6b8fe025 | 190 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_B)); |
84486d53 | 191 | printk("tvp5150: Interrupt active register B = 0x%02x\n", |
6b8fe025 | 192 | tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B)); |
3ad96835 | 193 | printk("tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n", |
6b8fe025 HV |
194 | tvp5150_read(sd, TVP5150_STATUS_REG_1), |
195 | tvp5150_read(sd, TVP5150_STATUS_REG_2), | |
196 | tvp5150_read(sd, TVP5150_STATUS_REG_3), | |
197 | tvp5150_read(sd, TVP5150_STATUS_REG_4), | |
198 | tvp5150_read(sd, TVP5150_STATUS_REG_5)); | |
3ad96835 | 199 | |
6b8fe025 HV |
200 | dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI, |
201 | TVP5150_TELETEXT_FIL1_END, 8); | |
202 | dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI, | |
203 | TVP5150_TELETEXT_FIL2_END, 8); | |
3ad96835 | 204 | |
84486d53 | 205 | printk("tvp5150: Teletext filter enable = 0x%02x\n", |
6b8fe025 | 206 | tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA)); |
84486d53 | 207 | printk("tvp5150: Interrupt status register A = 0x%02x\n", |
6b8fe025 | 208 | tvp5150_read(sd, TVP5150_INT_STATUS_REG_A)); |
84486d53 | 209 | printk("tvp5150: Interrupt enable register A = 0x%02x\n", |
6b8fe025 | 210 | tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A)); |
84486d53 | 211 | printk("tvp5150: Interrupt configuration = 0x%02x\n", |
6b8fe025 | 212 | tvp5150_read(sd, TVP5150_INT_CONF)); |
84486d53 | 213 | printk("tvp5150: VDP status register = 0x%02x\n", |
6b8fe025 | 214 | tvp5150_read(sd, TVP5150_VDP_STATUS_REG)); |
84486d53 | 215 | printk("tvp5150: FIFO word count = 0x%02x\n", |
6b8fe025 | 216 | tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT)); |
84486d53 | 217 | printk("tvp5150: FIFO interrupt threshold = 0x%02x\n", |
6b8fe025 | 218 | tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD)); |
84486d53 | 219 | printk("tvp5150: FIFO reset = 0x%02x\n", |
6b8fe025 | 220 | tvp5150_read(sd, TVP5150_FIFO_RESET)); |
84486d53 | 221 | printk("tvp5150: Line number interrupt = 0x%02x\n", |
6b8fe025 | 222 | tvp5150_read(sd, TVP5150_LINE_NUMBER_INT)); |
3ad96835 | 223 | printk("tvp5150: Pixel alignment register = 0x%02x%02x\n", |
6b8fe025 HV |
224 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH), |
225 | tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW)); | |
84486d53 | 226 | printk("tvp5150: FIFO output control = 0x%02x\n", |
6b8fe025 | 227 | tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL)); |
3ad96835 | 228 | printk("tvp5150: Full field enable = 0x%02x\n", |
6b8fe025 | 229 | tvp5150_read(sd, TVP5150_FULL_FIELD_ENA)); |
84486d53 | 230 | printk("tvp5150: Full field mode register = 0x%02x\n", |
6b8fe025 | 231 | tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG)); |
3ad96835 | 232 | |
6b8fe025 HV |
233 | dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI, |
234 | TVP5150_CC_DATA_END, 8); | |
3ad96835 | 235 | |
6b8fe025 HV |
236 | dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI, |
237 | TVP5150_WSS_DATA_END, 8); | |
3ad96835 | 238 | |
6b8fe025 HV |
239 | dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI, |
240 | TVP5150_VPS_DATA_END, 8); | |
3ad96835 | 241 | |
6b8fe025 HV |
242 | dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI, |
243 | TVP5150_VITC_DATA_END, 10); | |
3ad96835 | 244 | |
6b8fe025 HV |
245 | dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI, |
246 | TVP5150_LINE_MODE_END, 8); | |
247 | return 0; | |
cd4665c5 MCC |
248 | } |
249 | ||
250 | /**************************************************************************** | |
251 | Basic functions | |
252 | ****************************************************************************/ | |
cd4665c5 | 253 | |
6b8fe025 | 254 | static inline void tvp5150_selmux(struct v4l2_subdev *sd) |
cd4665c5 | 255 | { |
2962fc01 | 256 | int opmode = 0; |
6b8fe025 | 257 | struct tvp5150 *decoder = to_tvp5150(sd); |
c7c0b34c | 258 | int input = 0; |
afcc8e8c | 259 | int val; |
84486d53 | 260 | |
5325b427 | 261 | if ((decoder->output & TVP5150_BLACK_SCREEN) || !decoder->enable) |
c7c0b34c | 262 | input = 8; |
4c86f973 | 263 | |
5325b427 | 264 | switch (decoder->input) { |
c7c0b34c HV |
265 | case TVP5150_COMPOSITE1: |
266 | input |= 2; | |
267 | /* fall through */ | |
268 | case TVP5150_COMPOSITE0: | |
c0477ad9 | 269 | break; |
c7c0b34c | 270 | case TVP5150_SVIDEO: |
c0477ad9 | 271 | default: |
c7c0b34c | 272 | input |= 1; |
c0477ad9 MCC |
273 | break; |
274 | } | |
275 | ||
6b8fe025 | 276 | v4l2_dbg(1, debug, sd, "Selecting video route: route input=%i, output=%i " |
12500f07 | 277 | "=> tvp5150 input=%i, opmode=%i\n", |
5325b427 HV |
278 | decoder->input, decoder->output, |
279 | input, opmode); | |
12500f07 | 280 | |
6b8fe025 HV |
281 | tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode); |
282 | tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input); | |
f4b8b3ae MCC |
283 | |
284 | /* Svideo should enable YCrCb output and disable GPCL output | |
285 | * For Composite and TV, it should be the reverse | |
286 | */ | |
6b8fe025 | 287 | val = tvp5150_read(sd, TVP5150_MISC_CTL); |
8cd0d4ca DL |
288 | if (val < 0) { |
289 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, val); | |
290 | return; | |
291 | } | |
292 | ||
5325b427 | 293 | if (decoder->input == TVP5150_SVIDEO) |
f4b8b3ae MCC |
294 | val = (val & ~0x40) | 0x10; |
295 | else | |
296 | val = (val & ~0x10) | 0x40; | |
6b8fe025 | 297 | tvp5150_write(sd, TVP5150_MISC_CTL, val); |
cd4665c5 MCC |
298 | }; |
299 | ||
e1bc80ad MCC |
300 | struct i2c_reg_value { |
301 | unsigned char reg; | |
302 | unsigned char value; | |
303 | }; | |
304 | ||
305 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
306 | static const struct i2c_reg_value tvp5150_init_default[] = { | |
307 | { /* 0x00 */ | |
308 | TVP5150_VD_IN_SRC_SEL_1,0x00 | |
309 | }, | |
310 | { /* 0x01 */ | |
311 | TVP5150_ANAL_CHL_CTL,0x15 | |
312 | }, | |
313 | { /* 0x02 */ | |
314 | TVP5150_OP_MODE_CTL,0x00 | |
315 | }, | |
316 | { /* 0x03 */ | |
317 | TVP5150_MISC_CTL,0x01 | |
318 | }, | |
319 | { /* 0x06 */ | |
320 | TVP5150_COLOR_KIL_THSH_CTL,0x10 | |
321 | }, | |
322 | { /* 0x07 */ | |
323 | TVP5150_LUMA_PROC_CTL_1,0x60 | |
324 | }, | |
325 | { /* 0x08 */ | |
326 | TVP5150_LUMA_PROC_CTL_2,0x00 | |
327 | }, | |
328 | { /* 0x09 */ | |
329 | TVP5150_BRIGHT_CTL,0x80 | |
330 | }, | |
331 | { /* 0x0a */ | |
332 | TVP5150_SATURATION_CTL,0x80 | |
333 | }, | |
334 | { /* 0x0b */ | |
335 | TVP5150_HUE_CTL,0x00 | |
336 | }, | |
337 | { /* 0x0c */ | |
338 | TVP5150_CONTRAST_CTL,0x80 | |
339 | }, | |
340 | { /* 0x0d */ | |
341 | TVP5150_DATA_RATE_SEL,0x47 | |
342 | }, | |
343 | { /* 0x0e */ | |
344 | TVP5150_LUMA_PROC_CTL_3,0x00 | |
345 | }, | |
346 | { /* 0x0f */ | |
347 | TVP5150_CONF_SHARED_PIN,0x08 | |
348 | }, | |
349 | { /* 0x11 */ | |
350 | TVP5150_ACT_VD_CROP_ST_MSB,0x00 | |
351 | }, | |
352 | { /* 0x12 */ | |
353 | TVP5150_ACT_VD_CROP_ST_LSB,0x00 | |
354 | }, | |
355 | { /* 0x13 */ | |
356 | TVP5150_ACT_VD_CROP_STP_MSB,0x00 | |
357 | }, | |
358 | { /* 0x14 */ | |
359 | TVP5150_ACT_VD_CROP_STP_LSB,0x00 | |
360 | }, | |
361 | { /* 0x15 */ | |
362 | TVP5150_GENLOCK,0x01 | |
363 | }, | |
364 | { /* 0x16 */ | |
365 | TVP5150_HORIZ_SYNC_START,0x80 | |
366 | }, | |
367 | { /* 0x18 */ | |
368 | TVP5150_VERT_BLANKING_START,0x00 | |
369 | }, | |
370 | { /* 0x19 */ | |
371 | TVP5150_VERT_BLANKING_STOP,0x00 | |
372 | }, | |
373 | { /* 0x1a */ | |
374 | TVP5150_CHROMA_PROC_CTL_1,0x0c | |
375 | }, | |
376 | { /* 0x1b */ | |
377 | TVP5150_CHROMA_PROC_CTL_2,0x14 | |
378 | }, | |
379 | { /* 0x1c */ | |
380 | TVP5150_INT_RESET_REG_B,0x00 | |
381 | }, | |
382 | { /* 0x1d */ | |
383 | TVP5150_INT_ENABLE_REG_B,0x00 | |
384 | }, | |
385 | { /* 0x1e */ | |
386 | TVP5150_INTT_CONFIG_REG_B,0x00 | |
387 | }, | |
388 | { /* 0x28 */ | |
389 | TVP5150_VIDEO_STD,0x00 | |
390 | }, | |
391 | { /* 0x2e */ | |
392 | TVP5150_MACROVISION_ON_CTR,0x0f | |
393 | }, | |
394 | { /* 0x2f */ | |
395 | TVP5150_MACROVISION_OFF_CTR,0x01 | |
396 | }, | |
397 | { /* 0xbb */ | |
398 | TVP5150_TELETEXT_FIL_ENA,0x00 | |
399 | }, | |
400 | { /* 0xc0 */ | |
401 | TVP5150_INT_STATUS_REG_A,0x00 | |
402 | }, | |
403 | { /* 0xc1 */ | |
404 | TVP5150_INT_ENABLE_REG_A,0x00 | |
405 | }, | |
406 | { /* 0xc2 */ | |
407 | TVP5150_INT_CONF,0x04 | |
408 | }, | |
409 | { /* 0xc8 */ | |
410 | TVP5150_FIFO_INT_THRESHOLD,0x80 | |
411 | }, | |
412 | { /* 0xc9 */ | |
413 | TVP5150_FIFO_RESET,0x00 | |
414 | }, | |
415 | { /* 0xca */ | |
416 | TVP5150_LINE_NUMBER_INT,0x00 | |
417 | }, | |
418 | { /* 0xcb */ | |
419 | TVP5150_PIX_ALIGN_REG_LOW,0x4e | |
420 | }, | |
421 | { /* 0xcc */ | |
422 | TVP5150_PIX_ALIGN_REG_HIGH,0x00 | |
423 | }, | |
424 | { /* 0xcd */ | |
425 | TVP5150_FIFO_OUT_CTRL,0x01 | |
426 | }, | |
427 | { /* 0xcf */ | |
3ad96835 | 428 | TVP5150_FULL_FIELD_ENA,0x00 |
e1bc80ad MCC |
429 | }, |
430 | { /* 0xd0 */ | |
3ad96835 | 431 | TVP5150_LINE_MODE_INI,0x00 |
e1bc80ad MCC |
432 | }, |
433 | { /* 0xfc */ | |
434 | TVP5150_FULL_FIELD_MODE_REG,0x7f | |
435 | }, | |
436 | { /* end of data */ | |
437 | 0xff,0xff | |
438 | } | |
439 | }; | |
440 | ||
441 | /* Default values as sugested at TVP5150AM1 datasheet */ | |
442 | static const struct i2c_reg_value tvp5150_init_enable[] = { | |
443 | { | |
444 | TVP5150_CONF_SHARED_PIN, 2 | |
445 | },{ /* Automatic offset and AGC enabled */ | |
446 | TVP5150_ANAL_CHL_CTL, 0x15 | |
447 | },{ /* Activate YCrCb output 0x9 or 0xd ? */ | |
448 | TVP5150_MISC_CTL, 0x6f | |
449 | },{ /* Activates video std autodetection for all standards */ | |
450 | TVP5150_AUTOSW_MSK, 0x0 | |
451 | },{ /* Default format: 0x47. For 4:2:2: 0x40 */ | |
452 | TVP5150_DATA_RATE_SEL, 0x47 | |
453 | },{ | |
454 | TVP5150_CHROMA_PROC_CTL_1, 0x0c | |
455 | },{ | |
456 | TVP5150_CHROMA_PROC_CTL_2, 0x54 | |
457 | },{ /* Non documented, but initialized on WinTV USB2 */ | |
458 | 0x27, 0x20 | |
459 | },{ | |
460 | 0xff,0xff | |
461 | } | |
462 | }; | |
463 | ||
6ac48b45 MCC |
464 | struct tvp5150_vbi_type { |
465 | unsigned int vbi_type; | |
466 | unsigned int ini_line; | |
467 | unsigned int end_line; | |
468 | unsigned int by_field :1; | |
469 | }; | |
470 | ||
e1bc80ad MCC |
471 | struct i2c_vbi_ram_value { |
472 | u16 reg; | |
6ac48b45 MCC |
473 | struct tvp5150_vbi_type type; |
474 | unsigned char values[16]; | |
e1bc80ad MCC |
475 | }; |
476 | ||
6ac48b45 MCC |
477 | /* This struct have the values for each supported VBI Standard |
478 | * by | |
479 | tvp5150_vbi_types should follow the same order as vbi_ram_default | |
3ad96835 MCC |
480 | * value 0 means rom position 0x10, value 1 means rom position 0x30 |
481 | * and so on. There are 16 possible locations from 0 to 15. | |
482 | */ | |
3ad96835 | 483 | |
a9cff90e | 484 | static struct i2c_vbi_ram_value vbi_ram_default[] = |
cd4665c5 | 485 | { |
9bc7400a HV |
486 | /* FIXME: Current api doesn't handle all VBI types, those not |
487 | yet supported are placed under #if 0 */ | |
488 | #if 0 | |
6ac48b45 MCC |
489 | {0x010, /* Teletext, SECAM, WST System A */ |
490 | {V4L2_SLICED_TELETEXT_SECAM,6,23,1}, | |
491 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26, | |
492 | 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 493 | }, |
9bc7400a | 494 | #endif |
6ac48b45 | 495 | {0x030, /* Teletext, PAL, WST System B */ |
9bc7400a | 496 | {V4L2_SLICED_TELETEXT_B,6,22,1}, |
6ac48b45 MCC |
497 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b, |
498 | 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 499 | }, |
9bc7400a | 500 | #if 0 |
6ac48b45 MCC |
501 | {0x050, /* Teletext, PAL, WST System C */ |
502 | {V4L2_SLICED_TELETEXT_PAL_C,6,22,1}, | |
503 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
504 | 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 505 | }, |
6ac48b45 MCC |
506 | {0x070, /* Teletext, NTSC, WST System B */ |
507 | {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1}, | |
508 | { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23, | |
509 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 510 | }, |
6ac48b45 MCC |
511 | {0x090, /* Tetetext, NTSC NABTS System C */ |
512 | {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1}, | |
513 | { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22, | |
514 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 } | |
e1bc80ad | 515 | }, |
6ac48b45 MCC |
516 | {0x0b0, /* Teletext, NTSC-J, NABTS System D */ |
517 | {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1}, | |
518 | { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23, | |
519 | 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 } | |
e1bc80ad | 520 | }, |
6ac48b45 MCC |
521 | {0x0d0, /* Closed Caption, PAL/SECAM */ |
522 | {V4L2_SLICED_CAPTION_625,22,22,1}, | |
523 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
524 | 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 525 | }, |
9bc7400a | 526 | #endif |
6ac48b45 MCC |
527 | {0x0f0, /* Closed Caption, NTSC */ |
528 | {V4L2_SLICED_CAPTION_525,21,21,1}, | |
529 | { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02, | |
530 | 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 } | |
e1bc80ad | 531 | }, |
6ac48b45 | 532 | {0x110, /* Wide Screen Signal, PAL/SECAM */ |
12db5607 | 533 | {V4L2_SLICED_WSS_625,23,23,1}, |
6ac48b45 MCC |
534 | { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42, |
535 | 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 } | |
e1bc80ad | 536 | }, |
9bc7400a | 537 | #if 0 |
6ac48b45 MCC |
538 | {0x130, /* Wide Screen Signal, NTSC C */ |
539 | {V4L2_SLICED_WSS_525,20,20,1}, | |
540 | { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43, | |
541 | 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 } | |
e1bc80ad | 542 | }, |
6ac48b45 MCC |
543 | {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */ |
544 | {V4l2_SLICED_VITC_625,6,22,0}, | |
545 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
546 | 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 547 | }, |
6ac48b45 MCC |
548 | {0x170, /* Vertical Interval Timecode (VITC), NTSC */ |
549 | {V4l2_SLICED_VITC_525,10,20,0}, | |
550 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49, | |
551 | 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 } | |
e1bc80ad | 552 | }, |
9bc7400a | 553 | #endif |
6ac48b45 MCC |
554 | {0x190, /* Video Program System (VPS), PAL */ |
555 | {V4L2_SLICED_VPS,16,16,0}, | |
556 | { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d, | |
557 | 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 } | |
3ad96835 | 558 | }, |
6ac48b45 MCC |
559 | /* 0x1d0 User programmable */ |
560 | ||
561 | /* End of struct */ | |
562 | { (u16)-1 } | |
e1bc80ad | 563 | }; |
4c86f973 | 564 | |
6b8fe025 | 565 | static int tvp5150_write_inittab(struct v4l2_subdev *sd, |
6ac48b45 | 566 | const struct i2c_reg_value *regs) |
e1bc80ad MCC |
567 | { |
568 | while (regs->reg != 0xff) { | |
6b8fe025 | 569 | tvp5150_write(sd, regs->reg, regs->value); |
e1bc80ad MCC |
570 | regs++; |
571 | } | |
572 | return 0; | |
573 | } | |
84486d53 | 574 | |
6b8fe025 | 575 | static int tvp5150_vdp_init(struct v4l2_subdev *sd, |
6ac48b45 | 576 | const struct i2c_vbi_ram_value *regs) |
e1bc80ad MCC |
577 | { |
578 | unsigned int i; | |
cd4665c5 | 579 | |
e1bc80ad | 580 | /* Disable Full Field */ |
6b8fe025 | 581 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); |
cd4665c5 | 582 | |
e1bc80ad | 583 | /* Before programming, Line mode should be at 0xff */ |
6b8fe025 HV |
584 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) |
585 | tvp5150_write(sd, i, 0xff); | |
cd4665c5 | 586 | |
e1bc80ad | 587 | /* Load Ram Table */ |
6b8fe025 HV |
588 | while (regs->reg != (u16)-1) { |
589 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8); | |
590 | tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg); | |
cd4665c5 | 591 | |
6b8fe025 HV |
592 | for (i = 0; i < 16; i++) |
593 | tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]); | |
84486d53 | 594 | |
e1bc80ad MCC |
595 | regs++; |
596 | } | |
597 | return 0; | |
598 | } | |
cd4665c5 | 599 | |
6ac48b45 | 600 | /* Fills VBI capabilities based on i2c_vbi_ram_value struct */ |
6b8fe025 | 601 | static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd, |
6ac48b45 MCC |
602 | struct v4l2_sliced_vbi_cap *cap) |
603 | { | |
6b8fe025 | 604 | const struct i2c_vbi_ram_value *regs = vbi_ram_default; |
6ac48b45 MCC |
605 | int line; |
606 | ||
bccfa449 | 607 | v4l2_dbg(1, debug, sd, "g_sliced_vbi_cap\n"); |
6ac48b45 MCC |
608 | memset(cap, 0, sizeof *cap); |
609 | ||
610 | while (regs->reg != (u16)-1 ) { | |
611 | for (line=regs->type.ini_line;line<=regs->type.end_line;line++) { | |
612 | cap->service_lines[0][line] |= regs->type.vbi_type; | |
613 | } | |
614 | cap->service_set |= regs->type.vbi_type; | |
615 | ||
616 | regs++; | |
617 | } | |
6b8fe025 | 618 | return 0; |
6ac48b45 MCC |
619 | } |
620 | ||
3ad96835 MCC |
621 | /* Set vbi processing |
622 | * type - one of tvp5150_vbi_types | |
623 | * line - line to gather data | |
624 | * fields: bit 0 field1, bit 1, field2 | |
625 | * flags (default=0xf0) is a bitmask, were set means: | |
626 | * bit 7: enable filtering null bytes on CC | |
627 | * bit 6: send data also to FIFO | |
628 | * bit 5: don't allow data with errors on FIFO | |
629 | * bit 4: enable ECC when possible | |
630 | * pix_align = pix alignment: | |
631 | * LSB = field1 | |
632 | * MSB = field2 | |
633 | */ | |
6b8fe025 | 634 | static int tvp5150_set_vbi(struct v4l2_subdev *sd, |
2701dacb MCC |
635 | const struct i2c_vbi_ram_value *regs, |
636 | unsigned int type,u8 flags, int line, | |
637 | const int fields) | |
3ad96835 | 638 | { |
6b8fe025 HV |
639 | struct tvp5150 *decoder = to_tvp5150(sd); |
640 | v4l2_std_id std = decoder->norm; | |
3ad96835 | 641 | u8 reg; |
2701dacb | 642 | int pos=0; |
3ad96835 MCC |
643 | |
644 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 645 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 646 | return 0; |
7d5b7b98 | 647 | } else if (std & V4L2_STD_625_50) { |
3ad96835 MCC |
648 | /* Don't follow NTSC Line number convension */ |
649 | line += 3; | |
650 | } | |
651 | ||
652 | if (line<6||line>27) | |
2701dacb MCC |
653 | return 0; |
654 | ||
655 | while (regs->reg != (u16)-1 ) { | |
656 | if ((type & regs->type.vbi_type) && | |
657 | (line>=regs->type.ini_line) && | |
658 | (line<=regs->type.end_line)) { | |
659 | type=regs->type.vbi_type; | |
660 | break; | |
661 | } | |
662 | ||
663 | regs++; | |
664 | pos++; | |
665 | } | |
666 | if (regs->reg == (u16)-1) | |
667 | return 0; | |
3ad96835 | 668 | |
2701dacb | 669 | type=pos | (flags & 0xf0); |
3ad96835 MCC |
670 | reg=((line-6)<<1)+TVP5150_LINE_MODE_INI; |
671 | ||
672 | if (fields&1) { | |
6b8fe025 | 673 | tvp5150_write(sd, reg, type); |
3ad96835 MCC |
674 | } |
675 | ||
676 | if (fields&2) { | |
6b8fe025 | 677 | tvp5150_write(sd, reg+1, type); |
3ad96835 MCC |
678 | } |
679 | ||
2701dacb | 680 | return type; |
3ad96835 MCC |
681 | } |
682 | ||
6b8fe025 | 683 | static int tvp5150_get_vbi(struct v4l2_subdev *sd, |
12db5607 MCC |
684 | const struct i2c_vbi_ram_value *regs, int line) |
685 | { | |
6b8fe025 HV |
686 | struct tvp5150 *decoder = to_tvp5150(sd); |
687 | v4l2_std_id std = decoder->norm; | |
12db5607 | 688 | u8 reg; |
6b8fe025 | 689 | int pos, type = 0; |
8cd0d4ca | 690 | int i, ret = 0; |
12db5607 MCC |
691 | |
692 | if (std == V4L2_STD_ALL) { | |
6b8fe025 | 693 | v4l2_err(sd, "VBI can't be configured without knowing number of lines\n"); |
12db5607 | 694 | return 0; |
7d5b7b98 | 695 | } else if (std & V4L2_STD_625_50) { |
12db5607 MCC |
696 | /* Don't follow NTSC Line number convension */ |
697 | line += 3; | |
698 | } | |
699 | ||
6b8fe025 | 700 | if (line < 6 || line > 27) |
12db5607 MCC |
701 | return 0; |
702 | ||
6b8fe025 | 703 | reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI; |
12db5607 | 704 | |
8cd0d4ca DL |
705 | for (i = 0; i <= 1; i++) { |
706 | ret = tvp5150_read(sd, reg + i); | |
707 | if (ret < 0) { | |
708 | v4l2_err(sd, "%s: failed with error = %d\n", | |
709 | __func__, ret); | |
710 | return 0; | |
711 | } | |
712 | pos = ret & 0x0f; | |
713 | if (pos < 0x0f) | |
714 | type |= regs[pos].type.vbi_type; | |
715 | } | |
12db5607 MCC |
716 | |
717 | return type; | |
718 | } | |
6b8fe025 HV |
719 | |
720 | static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |
e1bc80ad | 721 | { |
6b8fe025 HV |
722 | struct tvp5150 *decoder = to_tvp5150(sd); |
723 | int fmt = 0; | |
e1bc80ad | 724 | |
6b8fe025 | 725 | decoder->norm = std; |
e1bc80ad MCC |
726 | |
727 | /* First tests should be against specific std */ | |
728 | ||
729 | if (std == V4L2_STD_ALL) { | |
2da12fcb | 730 | fmt = VIDEO_STD_AUTO_SWITCH_BIT; /* Autodetect mode */ |
e1bc80ad | 731 | } else if (std & V4L2_STD_NTSC_443) { |
2da12fcb | 732 | fmt = VIDEO_STD_NTSC_4_43_BIT; |
e1bc80ad | 733 | } else if (std & V4L2_STD_PAL_M) { |
2da12fcb | 734 | fmt = VIDEO_STD_PAL_M_BIT; |
6b8fe025 | 735 | } else if (std & (V4L2_STD_PAL_N | V4L2_STD_PAL_Nc)) { |
2da12fcb | 736 | fmt = VIDEO_STD_PAL_COMBINATION_N_BIT; |
e1bc80ad MCC |
737 | } else { |
738 | /* Then, test against generic ones */ | |
6b8fe025 | 739 | if (std & V4L2_STD_NTSC) |
2da12fcb | 740 | fmt = VIDEO_STD_NTSC_MJ_BIT; |
6b8fe025 | 741 | else if (std & V4L2_STD_PAL) |
2da12fcb | 742 | fmt = VIDEO_STD_PAL_BDGHIN_BIT; |
6b8fe025 | 743 | else if (std & V4L2_STD_SECAM) |
2da12fcb | 744 | fmt = VIDEO_STD_SECAM_BIT; |
e1bc80ad | 745 | } |
84486d53 | 746 | |
6b8fe025 HV |
747 | v4l2_dbg(1, debug, sd, "Set video std register to %d.\n", fmt); |
748 | tvp5150_write(sd, TVP5150_VIDEO_STD, fmt); | |
e1bc80ad MCC |
749 | return 0; |
750 | } | |
751 | ||
6b8fe025 HV |
752 | static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std) |
753 | { | |
754 | struct tvp5150 *decoder = to_tvp5150(sd); | |
755 | ||
756 | if (decoder->norm == std) | |
757 | return 0; | |
758 | ||
963ddc63 JM |
759 | /* Change cropping height limits */ |
760 | if (std & V4L2_STD_525_60) | |
761 | decoder->rect.height = TVP5150_V_MAX_525_60; | |
762 | else | |
763 | decoder->rect.height = TVP5150_V_MAX_OTHERS; | |
764 | ||
765 | ||
6b8fe025 HV |
766 | return tvp5150_set_std(sd, std); |
767 | } | |
768 | ||
769 | static int tvp5150_reset(struct v4l2_subdev *sd, u32 val) | |
e1bc80ad | 770 | { |
6b8fe025 | 771 | struct tvp5150 *decoder = to_tvp5150(sd); |
84486d53 | 772 | |
e1bc80ad | 773 | /* Initializes TVP5150 to its default values */ |
6b8fe025 | 774 | tvp5150_write_inittab(sd, tvp5150_init_default); |
e1bc80ad MCC |
775 | |
776 | /* Initializes VDP registers */ | |
6b8fe025 | 777 | tvp5150_vdp_init(sd, vbi_ram_default); |
e1bc80ad MCC |
778 | |
779 | /* Selects decoder input */ | |
6b8fe025 | 780 | tvp5150_selmux(sd); |
e1bc80ad MCC |
781 | |
782 | /* Initializes TVP5150 to stream enabled values */ | |
6b8fe025 | 783 | tvp5150_write_inittab(sd, tvp5150_init_enable); |
e1bc80ad MCC |
784 | |
785 | /* Initialize image preferences */ | |
6c45ec71 | 786 | v4l2_ctrl_handler_setup(&decoder->hdl); |
e1bc80ad | 787 | |
6b8fe025 HV |
788 | tvp5150_set_std(sd, decoder->norm); |
789 | return 0; | |
cd4665c5 MCC |
790 | }; |
791 | ||
6c45ec71 | 792 | static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl) |
a6c2ba28 | 793 | { |
6c45ec71 | 794 | struct v4l2_subdev *sd = to_sd(ctrl); |
a6c2ba28 | 795 | |
796 | switch (ctrl->id) { | |
797 | case V4L2_CID_BRIGHTNESS: | |
6c45ec71 | 798 | tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val); |
a6c2ba28 | 799 | return 0; |
800 | case V4L2_CID_CONTRAST: | |
6c45ec71 | 801 | tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val); |
a6c2ba28 | 802 | return 0; |
803 | case V4L2_CID_SATURATION: | |
6c45ec71 | 804 | tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val); |
a6c2ba28 | 805 | return 0; |
806 | case V4L2_CID_HUE: | |
6c45ec71 | 807 | tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val); |
a6c2ba28 | 808 | return 0; |
a6c2ba28 | 809 | } |
c0477ad9 | 810 | return -EINVAL; |
a6c2ba28 | 811 | } |
812 | ||
ec2c4f3f JM |
813 | static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd) |
814 | { | |
815 | int val = tvp5150_read(sd, TVP5150_STATUS_REG_5); | |
816 | ||
817 | switch (val & 0x0F) { | |
818 | case 0x01: | |
819 | return V4L2_STD_NTSC; | |
820 | case 0x03: | |
821 | return V4L2_STD_PAL; | |
822 | case 0x05: | |
823 | return V4L2_STD_PAL_M; | |
824 | case 0x07: | |
825 | return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc; | |
826 | case 0x09: | |
827 | return V4L2_STD_NTSC_443; | |
828 | case 0xb: | |
829 | return V4L2_STD_SECAM; | |
830 | default: | |
831 | return V4L2_STD_UNKNOWN; | |
832 | } | |
833 | } | |
834 | ||
835 | static int tvp5150_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index, | |
836 | enum v4l2_mbus_pixelcode *code) | |
837 | { | |
838 | if (index) | |
839 | return -EINVAL; | |
840 | ||
002eaf90 | 841 | *code = V4L2_MBUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
842 | return 0; |
843 | } | |
844 | ||
845 | static int tvp5150_mbus_fmt(struct v4l2_subdev *sd, | |
846 | struct v4l2_mbus_framefmt *f) | |
847 | { | |
848 | struct tvp5150 *decoder = to_tvp5150(sd); | |
ec2c4f3f JM |
849 | |
850 | if (f == NULL) | |
851 | return -EINVAL; | |
852 | ||
853 | tvp5150_reset(sd, 0); | |
854 | ||
963ddc63 JM |
855 | f->width = decoder->rect.width; |
856 | f->height = decoder->rect.height; | |
ec2c4f3f | 857 | |
002eaf90 | 858 | f->code = V4L2_MBUS_FMT_UYVY8_2X8; |
ec2c4f3f JM |
859 | f->field = V4L2_FIELD_SEQ_TB; |
860 | f->colorspace = V4L2_COLORSPACE_SMPTE170M; | |
861 | ||
862 | v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width, | |
863 | f->height); | |
864 | return 0; | |
865 | } | |
866 | ||
4f996594 | 867 | static int tvp5150_s_crop(struct v4l2_subdev *sd, const struct v4l2_crop *a) |
963ddc63 JM |
868 | { |
869 | struct v4l2_rect rect = a->c; | |
870 | struct tvp5150 *decoder = to_tvp5150(sd); | |
871 | v4l2_std_id std; | |
872 | int hmax; | |
873 | ||
874 | v4l2_dbg(1, debug, sd, "%s left=%d, top=%d, width=%d, height=%d\n", | |
875 | __func__, rect.left, rect.top, rect.width, rect.height); | |
876 | ||
877 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
878 | return -EINVAL; | |
879 | ||
880 | /* tvp5150 has some special limits */ | |
881 | rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT); | |
882 | rect.width = clamp(rect.width, | |
883 | TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left, | |
884 | TVP5150_H_MAX - rect.left); | |
885 | rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP); | |
886 | ||
887 | /* Calculate height based on current standard */ | |
888 | if (decoder->norm == V4L2_STD_ALL) | |
889 | std = tvp5150_read_std(sd); | |
890 | else | |
891 | std = decoder->norm; | |
892 | ||
893 | if (std & V4L2_STD_525_60) | |
894 | hmax = TVP5150_V_MAX_525_60; | |
895 | else | |
896 | hmax = TVP5150_V_MAX_OTHERS; | |
897 | ||
898 | rect.height = clamp(rect.height, | |
899 | hmax - TVP5150_MAX_CROP_TOP - rect.top, | |
900 | hmax - rect.top); | |
901 | ||
902 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top); | |
903 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, | |
904 | rect.top + rect.height - hmax); | |
905 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB, | |
906 | rect.left >> TVP5150_CROP_SHIFT); | |
907 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB, | |
908 | rect.left | (1 << TVP5150_CROP_SHIFT)); | |
909 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB, | |
910 | (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >> | |
911 | TVP5150_CROP_SHIFT); | |
912 | tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB, | |
913 | rect.left + rect.width - TVP5150_MAX_CROP_LEFT); | |
914 | ||
915 | decoder->rect = rect; | |
916 | ||
917 | return 0; | |
918 | } | |
919 | ||
920 | static int tvp5150_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a) | |
921 | { | |
922 | struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd); | |
923 | ||
924 | a->c = decoder->rect; | |
925 | a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
926 | ||
927 | return 0; | |
928 | } | |
929 | ||
930 | static int tvp5150_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |
931 | { | |
932 | struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd); | |
933 | v4l2_std_id std; | |
934 | ||
935 | if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
936 | return -EINVAL; | |
937 | ||
938 | a->bounds.left = 0; | |
939 | a->bounds.top = 0; | |
940 | a->bounds.width = TVP5150_H_MAX; | |
941 | ||
942 | /* Calculate height based on current standard */ | |
943 | if (decoder->norm == V4L2_STD_ALL) | |
944 | std = tvp5150_read_std(sd); | |
945 | else | |
946 | std = decoder->norm; | |
947 | ||
948 | if (std & V4L2_STD_525_60) | |
949 | a->bounds.height = TVP5150_V_MAX_525_60; | |
950 | else | |
951 | a->bounds.height = TVP5150_V_MAX_OTHERS; | |
952 | ||
953 | a->defrect = a->bounds; | |
954 | a->pixelaspect.numerator = 1; | |
955 | a->pixelaspect.denominator = 1; | |
956 | ||
957 | return 0; | |
958 | } | |
959 | ||
84486d53 MCC |
960 | /**************************************************************************** |
961 | I2C Command | |
962 | ****************************************************************************/ | |
c7c0b34c | 963 | |
5325b427 HV |
964 | static int tvp5150_s_routing(struct v4l2_subdev *sd, |
965 | u32 input, u32 output, u32 config) | |
6b8fe025 HV |
966 | { |
967 | struct tvp5150 *decoder = to_tvp5150(sd); | |
84486d53 | 968 | |
5325b427 HV |
969 | decoder->input = input; |
970 | decoder->output = output; | |
6b8fe025 HV |
971 | tvp5150_selmux(sd); |
972 | return 0; | |
973 | } | |
6ac48b45 | 974 | |
d37dad49 HV |
975 | static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt) |
976 | { | |
977 | /* this is for capturing 36 raw vbi lines | |
978 | if there's a way to cut off the beginning 2 vbi lines | |
979 | with the tvp5150 then the vbi line count could be lowered | |
980 | to 17 lines/field again, although I couldn't find a register | |
981 | which could do that cropping */ | |
982 | if (fmt->sample_format == V4L2_PIX_FMT_GREY) | |
983 | tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70); | |
984 | if (fmt->count[0] == 18 && fmt->count[1] == 18) { | |
985 | tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00); | |
986 | tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01); | |
987 | } | |
988 | return 0; | |
989 | } | |
990 | ||
991 | static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) | |
6b8fe025 | 992 | { |
6b8fe025 HV |
993 | int i; |
994 | ||
6b8fe025 HV |
995 | if (svbi->service_set != 0) { |
996 | for (i = 0; i <= 23; i++) { | |
997 | svbi->service_lines[1][i] = 0; | |
998 | svbi->service_lines[0][i] = | |
999 | tvp5150_set_vbi(sd, vbi_ram_default, | |
1000 | svbi->service_lines[0][i], 0xf0, i, 3); | |
2c5aacc6 | 1001 | } |
6b8fe025 HV |
1002 | /* Enables FIFO */ |
1003 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1); | |
1004 | } else { | |
1005 | /* Disables FIFO*/ | |
1006 | tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0); | |
12db5607 | 1007 | |
6b8fe025 HV |
1008 | /* Disable Full Field */ |
1009 | tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0); | |
12db5607 | 1010 | |
6b8fe025 HV |
1011 | /* Disable Line modes */ |
1012 | for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++) | |
1013 | tvp5150_write(sd, i, 0xff); | |
12db5607 | 1014 | } |
6b8fe025 HV |
1015 | return 0; |
1016 | } | |
12db5607 | 1017 | |
d37dad49 HV |
1018 | static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi) |
1019 | { | |
1020 | int i, mask = 0; | |
1021 | ||
30634e8e | 1022 | memset(svbi->service_lines, 0, sizeof(svbi->service_lines)); |
12db5607 | 1023 | |
6b8fe025 HV |
1024 | for (i = 0; i <= 23; i++) { |
1025 | svbi->service_lines[0][i] = | |
1026 | tvp5150_get_vbi(sd, vbi_ram_default, i); | |
1027 | mask |= svbi->service_lines[0][i]; | |
2701dacb | 1028 | } |
6b8fe025 HV |
1029 | svbi->service_set = mask; |
1030 | return 0; | |
1031 | } | |
1032 | ||
21dcd8cc | 1033 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
aecde8b5 | 1034 | static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) |
6b8fe025 | 1035 | { |
8cd0d4ca DL |
1036 | int res; |
1037 | ||
8cd0d4ca DL |
1038 | res = tvp5150_read(sd, reg->reg & 0xff); |
1039 | if (res < 0) { | |
1040 | v4l2_err(sd, "%s: failed with error = %d\n", __func__, res); | |
1041 | return res; | |
1042 | } | |
1043 | ||
1044 | reg->val = res; | |
aecde8b5 | 1045 | reg->size = 1; |
6b8fe025 HV |
1046 | return 0; |
1047 | } | |
84486d53 | 1048 | |
977ba3b1 | 1049 | static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) |
6b8fe025 | 1050 | { |
6b8fe025 HV |
1051 | tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff); |
1052 | return 0; | |
1053 | } | |
1054 | #endif | |
a6c2ba28 | 1055 | |
6b8fe025 HV |
1056 | static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt) |
1057 | { | |
1058 | int status = tvp5150_read(sd, 0x88); | |
a6c2ba28 | 1059 | |
6b8fe025 HV |
1060 | vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0; |
1061 | return 0; | |
1062 | } | |
a6c2ba28 | 1063 | |
6b8fe025 HV |
1064 | /* ----------------------------------------------------------------------- */ |
1065 | ||
6c45ec71 HV |
1066 | static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = { |
1067 | .s_ctrl = tvp5150_s_ctrl, | |
1068 | }; | |
1069 | ||
6b8fe025 HV |
1070 | static const struct v4l2_subdev_core_ops tvp5150_core_ops = { |
1071 | .log_status = tvp5150_log_status, | |
f41737ec | 1072 | .s_std = tvp5150_s_std, |
6b8fe025 HV |
1073 | .reset = tvp5150_reset, |
1074 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1075 | .g_register = tvp5150_g_register, | |
1076 | .s_register = tvp5150_s_register, | |
1077 | #endif | |
1078 | }; | |
1079 | ||
1080 | static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = { | |
6b8fe025 HV |
1081 | .g_tuner = tvp5150_g_tuner, |
1082 | }; | |
1083 | ||
1084 | static const struct v4l2_subdev_video_ops tvp5150_video_ops = { | |
1085 | .s_routing = tvp5150_s_routing, | |
ec2c4f3f JM |
1086 | .enum_mbus_fmt = tvp5150_enum_mbus_fmt, |
1087 | .s_mbus_fmt = tvp5150_mbus_fmt, | |
1088 | .try_mbus_fmt = tvp5150_mbus_fmt, | |
0f67a03f | 1089 | .g_mbus_fmt = tvp5150_mbus_fmt, |
963ddc63 JM |
1090 | .s_crop = tvp5150_s_crop, |
1091 | .g_crop = tvp5150_g_crop, | |
1092 | .cropcap = tvp5150_cropcap, | |
32cd527f HV |
1093 | }; |
1094 | ||
1095 | static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = { | |
6b8fe025 | 1096 | .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap, |
d37dad49 HV |
1097 | .g_sliced_fmt = tvp5150_g_sliced_fmt, |
1098 | .s_sliced_fmt = tvp5150_s_sliced_fmt, | |
1099 | .s_raw_fmt = tvp5150_s_raw_fmt, | |
6b8fe025 HV |
1100 | }; |
1101 | ||
1102 | static const struct v4l2_subdev_ops tvp5150_ops = { | |
1103 | .core = &tvp5150_core_ops, | |
1104 | .tuner = &tvp5150_tuner_ops, | |
1105 | .video = &tvp5150_video_ops, | |
32cd527f | 1106 | .vbi = &tvp5150_vbi_ops, |
6b8fe025 HV |
1107 | }; |
1108 | ||
1109 | ||
cd4665c5 MCC |
1110 | /**************************************************************************** |
1111 | I2C Client & Driver | |
1112 | ****************************************************************************/ | |
cd4665c5 | 1113 | |
6b8fe025 HV |
1114 | static int tvp5150_probe(struct i2c_client *c, |
1115 | const struct i2c_device_id *id) | |
cd4665c5 | 1116 | { |
cd4665c5 | 1117 | struct tvp5150 *core; |
6b8fe025 | 1118 | struct v4l2_subdev *sd; |
8cd0d4ca DL |
1119 | int tvp5150_id[4]; |
1120 | int i, res; | |
cd4665c5 MCC |
1121 | |
1122 | /* Check if the adapter supports the needed features */ | |
6b8fe025 | 1123 | if (!i2c_check_functionality(c->adapter, |
cd4665c5 | 1124 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) |
6b8fe025 | 1125 | return -EIO; |
cd4665c5 | 1126 | |
c02b211d LP |
1127 | core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL); |
1128 | if (!core) | |
cd4665c5 | 1129 | return -ENOMEM; |
6b8fe025 HV |
1130 | sd = &core->sd; |
1131 | v4l2_i2c_subdev_init(sd, c, &tvp5150_ops); | |
8cd0d4ca DL |
1132 | |
1133 | /* | |
1134 | * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID, | |
1135 | * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER | |
1136 | */ | |
1137 | for (i = 0; i < 4; i++) { | |
1138 | res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i); | |
1139 | if (res < 0) | |
c02b211d | 1140 | return res; |
8cd0d4ca DL |
1141 | tvp5150_id[i] = res; |
1142 | } | |
1143 | ||
6b8fe025 HV |
1144 | v4l_info(c, "chip found @ 0x%02x (%s)\n", |
1145 | c->addr << 1, c->adapter->name); | |
cd4665c5 | 1146 | |
8cd0d4ca DL |
1147 | if (tvp5150_id[2] == 4 && tvp5150_id[3] == 0) { /* Is TVP5150AM1 */ |
1148 | v4l2_info(sd, "tvp%02x%02xam1 detected.\n", | |
1149 | tvp5150_id[0], tvp5150_id[1]); | |
0e09a3c9 MCC |
1150 | |
1151 | /* ITU-T BT.656.4 timing */ | |
1152 | tvp5150_write(sd, TVP5150_REV_SELECT, 0); | |
1153 | } else { | |
8cd0d4ca DL |
1154 | /* Is TVP5150A */ |
1155 | if (tvp5150_id[2] == 3 || tvp5150_id[3] == 0x21) { | |
1156 | v4l2_info(sd, "tvp%02x%02xa detected.\n", | |
1157 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1158 | } else { |
1159 | v4l2_info(sd, "*** unknown tvp%02x%02x chip detected.\n", | |
8cd0d4ca DL |
1160 | tvp5150_id[2], tvp5150_id[3]); |
1161 | v4l2_info(sd, "*** Rom ver is %d.%d\n", | |
1162 | tvp5150_id[2], tvp5150_id[3]); | |
0e09a3c9 MCC |
1163 | } |
1164 | } | |
1165 | ||
3ad96835 | 1166 | core->norm = V4L2_STD_ALL; /* Default is autodetect */ |
5325b427 | 1167 | core->input = TVP5150_COMPOSITE1; |
4c86f973 | 1168 | core->enable = 1; |
6c45ec71 HV |
1169 | |
1170 | v4l2_ctrl_handler_init(&core->hdl, 4); | |
1171 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1172 | V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); | |
1173 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1174 | V4L2_CID_CONTRAST, 0, 255, 1, 128); | |
1175 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1176 | V4L2_CID_SATURATION, 0, 255, 1, 128); | |
1177 | v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops, | |
1178 | V4L2_CID_HUE, -128, 127, 1, 0); | |
1179 | sd->ctrl_handler = &core->hdl; | |
1180 | if (core->hdl.error) { | |
8cd0d4ca | 1181 | res = core->hdl.error; |
6c45ec71 | 1182 | v4l2_ctrl_handler_free(&core->hdl); |
c02b211d | 1183 | return res; |
6c45ec71 HV |
1184 | } |
1185 | v4l2_ctrl_handler_setup(&core->hdl); | |
4c86f973 | 1186 | |
963ddc63 JM |
1187 | /* Default is no cropping */ |
1188 | core->rect.top = 0; | |
1189 | if (tvp5150_read_std(sd) & V4L2_STD_525_60) | |
1190 | core->rect.height = TVP5150_V_MAX_525_60; | |
1191 | else | |
1192 | core->rect.height = TVP5150_V_MAX_OTHERS; | |
1193 | core->rect.left = 0; | |
1194 | core->rect.width = TVP5150_H_MAX; | |
1195 | ||
f1e5ee45 | 1196 | if (debug > 1) |
6b8fe025 | 1197 | tvp5150_log_status(sd); |
cd4665c5 MCC |
1198 | return 0; |
1199 | } | |
1200 | ||
6b8fe025 | 1201 | static int tvp5150_remove(struct i2c_client *c) |
cd4665c5 | 1202 | { |
6b8fe025 | 1203 | struct v4l2_subdev *sd = i2c_get_clientdata(c); |
6c45ec71 | 1204 | struct tvp5150 *decoder = to_tvp5150(sd); |
cd4665c5 | 1205 | |
6b8fe025 | 1206 | v4l2_dbg(1, debug, sd, |
e1bc80ad MCC |
1207 | "tvp5150.c: removing tvp5150 adapter on address 0x%x\n", |
1208 | c->addr << 1); | |
1209 | ||
6b8fe025 | 1210 | v4l2_device_unregister_subdev(sd); |
6c45ec71 | 1211 | v4l2_ctrl_handler_free(&decoder->hdl); |
cd4665c5 MCC |
1212 | return 0; |
1213 | } | |
1214 | ||
1215 | /* ----------------------------------------------------------------------- */ | |
1216 | ||
6b8fe025 HV |
1217 | static const struct i2c_device_id tvp5150_id[] = { |
1218 | { "tvp5150", 0 }, | |
1219 | { } | |
1220 | }; | |
1221 | MODULE_DEVICE_TABLE(i2c, tvp5150_id); | |
84486d53 | 1222 | |
c771145b HV |
1223 | static struct i2c_driver tvp5150_driver = { |
1224 | .driver = { | |
1225 | .owner = THIS_MODULE, | |
1226 | .name = "tvp5150", | |
1227 | }, | |
1228 | .probe = tvp5150_probe, | |
1229 | .remove = tvp5150_remove, | |
1230 | .id_table = tvp5150_id, | |
cd4665c5 | 1231 | }; |
c771145b | 1232 | |
c6e8d86f | 1233 | module_i2c_driver(tvp5150_driver); |