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[media] media: au0828 - convert to use videobuf2
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST		 16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/fs.h>
22#include <linux/kthread.h>
23#include <linux/file.h>
24#include <linux/suspend.h>
25
26#include "cx23885.h"
d19770e5
ST		 27#include <media/v4l2-common.h>
28
5a23b076 29#include "dvb_ca_en50221.h"
d19770e5 30#include "s5h1409.h"
52b50450 31#include "s5h1411.h"
d19770e5 32#include "mt2131.h"
3ba71d21 33#include "tda8290.h"
4041f1a5 34#include "tda18271.h"
9bc37caa 35#include "lgdt330x.h"
0cf8af57 36#include "xc4000.h"
d1987d55 37#include "xc5000.h"
ea5697fe 38#include "max2165.h"
b3ea0166 39#include "tda10048.h"
07b4a835 40#include "tuner-xc2028.h"
827855d3 41#include "tuner-simple.h"
66762373 42#include "dib7000p.h"
46b21bba 43#include "dib0070.h"
66762373 44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
5a23b076 46#include "stv0900.h"
f867c3f4 47#include "stv0900_reg.h"
5a23b076
IL		 48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
e6001482 51#include "cx24117.h"
5a23b076 52#include "cimax2.h"
493b7127 53#include "lgs8gxx.h"
5a23b076
IL		 54#include "netup-eeprom.h"
55#include "netup-init.h"
a5dbf457 56#include "lgdt3305.h"
ea5697fe 57#include "atbm8830.h"
73f0af44 58#include "ts2020.h"
09ea33e5
IL		 59#include "ds3000.h"
60#include "cx23885-f300.h"
78db8547
IL		 61#include "altera-ci.h"
62#include "stv0367.h"
722c90eb
SR		 63#include "drxk.h"
64#include "mt2063.h"
f667190b
MB		 65#include "stv090x.h"
66#include "stb6100.h"
67#include "stb6100_cfg.h"
7c62f5a1
MK		 68#include "tda10071.h"
69#include "a8293.h"
0d1b5265 70#include "mb86a20s.h"
36efec48 71#include "si2165.h"
29442266
OS		 72#include "si2168.h"
73#include "si2157.h"
24e77409 74#include "sp2.h"
29442266
OS		 75#include "m88ds3103.h"
76#include "m88ts2022.h"
1fc77d01 77#include "m88rs6000t.h"
d19770e5 78
4513fc69 79static unsigned int debug;
d19770e5 80
4513fc69
ST		 81#define dprintk(level, fmt, arg...)\
82 do { if (debug >= level)\
83 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
84 } while (0)
d19770e5
ST		 85
86/* ------------------------------------------------------------------ */
87
3ba71d21
MK		 88static unsigned int alt_tuner;
89module_param(alt_tuner, int, 0644);
90MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
91
78e92006
JG		 92DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
93
3ba71d21
MK		 94/* ------------------------------------------------------------------ */
95
453afdd9
HV		 96static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
97 unsigned int *num_buffers, unsigned int *num_planes,
98 unsigned int sizes[], void *alloc_ctxs[])
d19770e5 99{
453afdd9 100 struct cx23885_tsport *port = q->drv_priv;
d19770e5
ST		 101
102 port->ts_packet_size = 188 * 4;
103 port->ts_packet_count = 32;
453afdd9
HV		 104 *num_planes = 1;
105 sizes[0] = port->ts_packet_size * port->ts_packet_count;
0c3a14c1 106 alloc_ctxs[0] = port->dev->alloc_ctx;
453afdd9 107 *num_buffers = 32;
d19770e5
ST		 108 return 0;
109}
110
453afdd9
HV		 111
112static int buffer_prepare(struct vb2_buffer *vb)
d19770e5 113{
453afdd9
HV		 114 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
115 struct cx23885_buffer *buf =
116 container_of(vb, struct cx23885_buffer, vb);
117
118 return cx23885_buf_prepare(buf, port);
d19770e5
ST		 119}
120
453afdd9 121static void buffer_finish(struct vb2_buffer *vb)
d19770e5 122{
453afdd9
HV		 123 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
124 struct cx23885_dev *dev = port->dev;
125 struct cx23885_buffer *buf = container_of(vb,
126 struct cx23885_buffer, vb);
453afdd9
HV		 127
128 cx23885_free_buffer(dev, buf);
d19770e5
ST		 129}
130
453afdd9 131static void buffer_queue(struct vb2_buffer *vb)
d19770e5 132{
453afdd9
HV		 133 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
134 struct cx23885_buffer *buf = container_of(vb,
135 struct cx23885_buffer, vb);
136
137 cx23885_buf_queue(port, buf);
d19770e5
ST		 138}
139
78db8547
IL		 140static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
141{
453afdd9
HV		 142 struct vb2_dvb_frontends *f;
143 struct vb2_dvb_frontend *fe;
78db8547
IL		 144
145 f = &port->frontends;
146
147 if (f->gate <= 1) /* undefined or fe0 */
453afdd9 148 fe = vb2_dvb_get_frontend(f, 1);
78db8547 149 else
453afdd9 150 fe = vb2_dvb_get_frontend(f, f->gate);
78db8547
IL		 151
152 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
153 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
154}
155
453afdd9
HV		 156static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
157{
158 struct cx23885_tsport *port = q->drv_priv;
159 struct cx23885_dmaqueue *dmaq = &port->mpegq;
160 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
161 struct cx23885_buffer, queue);
162
163 cx23885_start_dma(port, dmaq, buf);
164 return 0;
165}
166
167static void cx23885_stop_streaming(struct vb2_queue *q)
168{
169 struct cx23885_tsport *port = q->drv_priv;
170
171 cx23885_cancel_buffers(port);
172}
173
174static struct vb2_ops dvb_qops = {
175 .queue_setup = queue_setup,
176 .buf_prepare = buffer_prepare,
177 .buf_finish = buffer_finish,
178 .buf_queue = buffer_queue,
179 .wait_prepare = vb2_ops_wait_prepare,
180 .wait_finish = vb2_ops_wait_finish,
181 .start_streaming = cx23885_start_streaming,
182 .stop_streaming = cx23885_stop_streaming,
d19770e5
ST		 183};
184
86184e06 185static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST		 186 .demod_address = 0x32 >> 1,
187 .output_mode = S5H1409_SERIAL_OUTPUT,
188 .gpio = S5H1409_GPIO_ON,
2b03238a 189 .qam_if = 44000,
fc959bef 190 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 191 .status_mode = S5H1409_DEMODLOCKING,
192 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST		 193};
194
b3ea0166
ST		 195static struct tda10048_config hauppauge_hvr1200_config = {
196 .demod_address = 0x10 >> 1,
197 .output_mode = TDA10048_SERIAL_OUTPUT,
198 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05 199 .inversion = TDA10048_INVERSION_ON,
8816bef5
ST		 200 .dtv6_if_freq_khz = TDA10048_IF_3300,
201 .dtv7_if_freq_khz = TDA10048_IF_3800,
202 .dtv8_if_freq_khz = TDA10048_IF_4300,
484d9e05 203 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST		 204};
205
6b926eca
MK		 206static struct tda10048_config hauppauge_hvr1210_config = {
207 .demod_address = 0x10 >> 1,
208 .output_mode = TDA10048_SERIAL_OUTPUT,
209 .fwbulkwritelen = TDA10048_BULKWRITE_200,
210 .inversion = TDA10048_INVERSION_ON,
c27586e4
MK		 211 .dtv6_if_freq_khz = TDA10048_IF_3300,
212 .dtv7_if_freq_khz = TDA10048_IF_3500,
213 .dtv8_if_freq_khz = TDA10048_IF_4000,
6b926eca
MK		 214 .clk_freq_khz = TDA10048_CLK_16000,
215};
216
3ba71d21
MK		 217static struct s5h1409_config hauppauge_ezqam_config = {
218 .demod_address = 0x32 >> 1,
219 .output_mode = S5H1409_SERIAL_OUTPUT,
220 .gpio = S5H1409_GPIO_OFF,
221 .qam_if = 4000,
222 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST		 223 .status_mode = S5H1409_DEMODLOCKING,
224 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK		 225};
226
fc959bef 227static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST		 228 .demod_address = 0x32 >> 1,
229 .output_mode = S5H1409_SERIAL_OUTPUT,
230 .gpio = S5H1409_GPIO_OFF,
2b03238a 231 .qam_if = 44000,
fe475163 232 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 233 .status_mode = S5H1409_DEMODLOCKING,
234 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST		 235};
236
07b4a835
MK		 237static struct s5h1409_config hauppauge_hvr1500_config = {
238 .demod_address = 0x32 >> 1,
239 .output_mode = S5H1409_SERIAL_OUTPUT,
240 .gpio = S5H1409_GPIO_OFF,
241 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 242 .status_mode = S5H1409_DEMODLOCKING,
243 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK		 244};
245
86184e06 246static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST		 247 0x61
248};
249
9bc37caa
MK		 250static struct lgdt330x_config fusionhdtv_5_express = {
251 .demod_address = 0x0e,
252 .demod_chip = LGDT3303,
253 .serial_mpeg = 0x40,
254};
255
d1987d55
ST		 256static struct s5h1409_config hauppauge_hvr1500q_config = {
257 .demod_address = 0x32 >> 1,
258 .output_mode = S5H1409_SERIAL_OUTPUT,
259 .gpio = S5H1409_GPIO_ON,
260 .qam_if = 44000,
261 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 262 .status_mode = S5H1409_DEMODLOCKING,
263 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST		 264};
265
335377b7
MK		 266static struct s5h1409_config dvico_s5h1409_config = {
267 .demod_address = 0x32 >> 1,
268 .output_mode = S5H1409_SERIAL_OUTPUT,
269 .gpio = S5H1409_GPIO_ON,
270 .qam_if = 44000,
271 .inversion = S5H1409_INVERSION_OFF,
272 .status_mode = S5H1409_DEMODLOCKING,
273 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
274};
275
52b50450
MK		 276static struct s5h1411_config dvico_s5h1411_config = {
277 .output_mode = S5H1411_SERIAL_OUTPUT,
278 .gpio = S5H1411_GPIO_ON,
279 .qam_if = S5H1411_IF_44000,
280 .vsb_if = S5H1411_IF_44000,
281 .inversion = S5H1411_INVERSION_OFF,
282 .status_mode = S5H1411_DEMODLOCKING,
283 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
284};
285
19bc5796
MK		 286static struct s5h1411_config hcw_s5h1411_config = {
287 .output_mode = S5H1411_SERIAL_OUTPUT,
288 .gpio = S5H1411_GPIO_OFF,
289 .vsb_if = S5H1411_IF_44000,
290 .qam_if = S5H1411_IF_4000,
291 .inversion = S5H1411_INVERSION_ON,
292 .status_mode = S5H1411_DEMODLOCKING,
293 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
294};
295
d1987d55 296static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST		 297 .i2c_address = 0x61,
298 .if_khz = 5380,
d1987d55
ST		 299};
300
335377b7
MK		 301static struct xc5000_config dvico_xc5000_tunerconfig = {
302 .i2c_address = 0x64,
303 .if_khz = 5380,
335377b7
MK		 304};
305
4041f1a5
MK		 306static struct tda829x_config tda829x_no_probe = {
307 .probe_tuner = TDA829X_DONT_PROBE,
308};
309
f21e0d7f 310static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK		 311 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
312 .if_lvl = 6, .rfagc_top = 0x37 },
313 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
314 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK		 315};
316
b34cdc36
MK		 317static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
318 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
319 .if_lvl = 1, .rfagc_top = 0x37, },
320 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
321 .if_lvl = 1, .rfagc_top = 0x37, },
322 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
323 .if_lvl = 1, .rfagc_top = 0x37, },
324};
325
f21e0d7f
MK		 326static struct tda18271_config hauppauge_tda18271_config = {
327 .std_map = &hauppauge_tda18271_std_map,
328 .gate = TDA18271_GATE_ANALOG,
04a68baa 329 .output_opt = TDA18271_OUTPUT_LT_OFF,
f21e0d7f
MK		 330};
331
b3ea0166 332static struct tda18271_config hauppauge_hvr1200_tuner_config = {
b34cdc36 333 .std_map = &hauppauge_hvr1200_tda18271_std_map,
b3ea0166 334 .gate = TDA18271_GATE_ANALOG,
04a68baa 335 .output_opt = TDA18271_OUTPUT_LT_OFF,
b3ea0166
ST		 336};
337
6b926eca
MK		 338static struct tda18271_config hauppauge_hvr1210_tuner_config = {
339 .gate = TDA18271_GATE_DIGITAL,
04a68baa 340 .output_opt = TDA18271_OUTPUT_LT_OFF,
6b926eca
MK		 341};
342
36efec48
MS		 343static struct tda18271_config hauppauge_hvr4400_tuner_config = {
344 .gate = TDA18271_GATE_DIGITAL,
345 .output_opt = TDA18271_OUTPUT_LT_OFF,
346};
347
247bc540 348static struct tda18271_std_map hauppauge_hvr127x_std_map = {
a5dbf457
MK		 349 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
350 .if_lvl = 1, .rfagc_top = 0x58 },
351 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
352 .if_lvl = 1, .rfagc_top = 0x58 },
353};
354
247bc540
MK		 355static struct tda18271_config hauppauge_hvr127x_config = {
356 .std_map = &hauppauge_hvr127x_std_map,
04a68baa 357 .output_opt = TDA18271_OUTPUT_LT_OFF,
a5dbf457
MK		 358};
359
247bc540 360static struct lgdt3305_config hauppauge_lgdt3305_config = {
a5dbf457
MK		 361 .i2c_addr = 0x0e,
362 .mpeg_mode = LGDT3305_MPEG_SERIAL,
363 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
364 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
365 .deny_i2c_rptr = 1,
366 .spectral_inversion = 1,
367 .qam_if_khz = 4000,
368 .vsb_if_khz = 3250,
369};
370
b1721d0d 371static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST		 372 BAND_VHF | BAND_UHF, /* band_caps */
373
374 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
375 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
376 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
377 * P_agc_nb_est=2, P_agc_write=0
378 */
379 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
380 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
381
382 712, /* inv_gain */
383 21, /* time_stabiliz */
384
385 0, /* alpha_level */
386 118, /* thlock */
387
388 0, /* wbd_inv */
389 2867, /* wbd_ref */
390 0, /* wbd_sel */
391 2, /* wbd_alpha */
392
393 0, /* agc1_max */
394 0, /* agc1_min */
395 39718, /* agc2_max */
396 9930, /* agc2_min */
397 0, /* agc1_pt1 */
398 0, /* agc1_pt2 */
399 0, /* agc1_pt3 */
400 0, /* agc1_slope1 */
401 0, /* agc1_slope2 */
402 0, /* agc2_pt1 */
403 128, /* agc2_pt2 */
404 29, /* agc2_slope1 */
405 29, /* agc2_slope2 */
406
407 17, /* alpha_mant */
408 27, /* alpha_exp */
409 23, /* beta_mant */
410 51, /* beta_exp */
411
412 1, /* perform_agc_softsplit */
413};
414
415/* PLL Configuration for COFDM BW_MHz = 8.000000
416 * With external clock = 30.000000 */
b1721d0d 417static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST		 418 60000, /* internal */
419 30000, /* sampling */
420 1, /* pll_cfg: prediv */
421 8, /* pll_cfg: ratio */
422 3, /* pll_cfg: range */
423 1, /* pll_cfg: reset */
424 0, /* pll_cfg: bypass */
425 0, /* misc: refdiv */
426 0, /* misc: bypclk_div */
427 1, /* misc: IO_CLK_en_core */
428 1, /* misc: ADClkSrc */
429 0, /* misc: modulo */
430 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
431 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
432 20452225, /* timf */
433 30000000 /* xtal_hz */
434};
435
436static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
437 .output_mpeg2_in_188_bytes = 1,
438 .hostbus_diversity = 1,
439 .tuner_is_baseband = 0,
440 .update_lna = NULL,
441
442 .agc_config_count = 1,
443 .agc = &xc3028_agc_config,
444 .bw = &xc3028_bw_config,
445
446 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
447 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
448 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
449
450 .pwm_freq_div = 0,
451 .agc_control = NULL,
452 .spur_protect = 0,
453
454 .output_mode = OUTMODE_MPEG2_SERIAL,
455};
456
aef2d186
ST		 457static struct zl10353_config dvico_fusionhdtv_xc3028 = {
458 .demod_address = 0x0f,
459 .if2 = 45600,
460 .no_tuner = 1,
d4dc673d 461 .disable_i2c_gate_ctrl = 1,
aef2d186
ST		 462};
463
f867c3f4
IL		 464static struct stv0900_reg stv0900_ts_regs[] = {
465 { R0900_TSGENERAL, 0x00 },
466 { R0900_P1_TSSPEED, 0x40 },
467 { R0900_P2_TSSPEED, 0x40 },
468 { R0900_P1_TSCFGM, 0xc0 },
469 { R0900_P2_TSCFGM, 0xc0 },
470 { R0900_P1_TSCFGH, 0xe0 },
471 { R0900_P2_TSCFGH, 0xe0 },
472 { R0900_P1_TSCFGL, 0x20 },
473 { R0900_P2_TSCFGL, 0x20 },
474 { 0xffff, 0xff }, /* terminate */
475};
476
5a23b076
IL		 477static struct stv0900_config netup_stv0900_config = {
478 .demod_address = 0x68,
29372a8d 479 .demod_mode = 1, /* dual */
644c7ef0 480 .xtal = 8000000,
5a23b076
IL		 481 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
482 .diseqc_mode = 2,/* 2/3 PWM */
f867c3f4 483 .ts_config_regs = stv0900_ts_regs,
5a23b076
IL		 484 .tun1_maddress = 0,/* 0x60 */
485 .tun2_maddress = 3,/* 0x63 */
486 .tun1_adc = 1,/* 1 Vpp */
487 .tun2_adc = 1,/* 1 Vpp */
488};
489
490static struct stv6110_config netup_stv6110_tunerconfig_a = {
491 .i2c_address = 0x60,
644c7ef0
AO		 492 .mclk = 16000000,
493 .clk_div = 1,
873688cd 494 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 495};
496
497static struct stv6110_config netup_stv6110_tunerconfig_b = {
498 .i2c_address = 0x63,
644c7ef0
AO		 499 .mclk = 16000000,
500 .clk_div = 1,
873688cd 501 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 502};
503
96318d0c 504static struct cx24116_config tbs_cx24116_config = {
09ea33e5 505 .demod_address = 0x55,
96318d0c
IL		 506};
507
e6001482
LA		 508static struct cx24117_config tbs_cx24117_config = {
509 .demod_address = 0x55,
510};
511
09ea33e5
IL		 512static struct ds3000_config tevii_ds3000_config = {
513 .demod_address = 0x68,
579943f5
IL		 514};
515
73f0af44
KD		 516static struct ts2020_config tevii_ts2020_config = {
517 .tuner_address = 0x60,
b858c331 518 .clk_out_div = 1,
8d2b0229 519 .frequency_div = 1146000,
73f0af44
KD		 520};
521
c9b8b04b
IL		 522static struct cx24116_config dvbworld_cx24116_config = {
523 .demod_address = 0x05,
524};
525
493b7127
DW		 526static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
527 .prod = LGS8GXX_PROD_LGS8GL5,
528 .demod_address = 0x19,
529 .serial_ts = 0,
530 .ts_clk_pol = 1,
531 .ts_clk_gated = 1,
532 .if_clk_freq = 30400, /* 30.4 MHz */
533 .if_freq = 5380, /* 5.38 MHz */
534 .if_neg_center = 1,
535 .ext_adc = 0,
536 .adc_signed = 0,
537 .if_neg_edge = 0,
538};
539
540static struct xc5000_config mygica_x8506_xc5000_config = {
541 .i2c_address = 0x61,
542 .if_khz = 5380,
543};
544
0d1b5265
MCC		 545static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
546 .demod_address = 0x10,
547};
548
549static struct xc5000_config mygica_x8507_xc5000_config = {
550 .i2c_address = 0x61,
551 .if_khz = 4000,
552};
553
f667190b 554static struct stv090x_config prof_8000_stv090x_config = {
b858c331
IL		 555 .device = STV0903,
556 .demod_mode = STV090x_SINGLE,
557 .clk_mode = STV090x_CLK_EXT,
558 .xtal = 27000000,
559 .address = 0x6A,
560 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
561 .repeater_level = STV090x_RPTLEVEL_64,
562 .adc1_range = STV090x_ADC_2Vpp,
563 .diseqc_envelope_mode = false,
564
565 .tuner_get_frequency = stb6100_get_frequency,
566 .tuner_set_frequency = stb6100_set_frequency,
567 .tuner_set_bandwidth = stb6100_set_bandwidth,
568 .tuner_get_bandwidth = stb6100_get_bandwidth,
f667190b
MB		 569};
570
571static struct stb6100_config prof_8000_stb6100_config = {
572 .tuner_address = 0x60,
573 .refclock = 27000000,
574};
575
576static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
577{
578 struct cx23885_tsport *port = fe->dvb->priv;
579 struct cx23885_dev *dev = port->dev;
580
581 if (voltage == SEC_VOLTAGE_18)
582 cx_write(MC417_RWD, 0x00001e00);
583 else if (voltage == SEC_VOLTAGE_13)
584 cx_write(MC417_RWD, 0x00001a00);
585 else
586 cx_write(MC417_RWD, 0x00001800);
587 return 0;
588}
589
29442266
OS		 590static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
591 fe_sec_voltage_t voltage)
592{
593 struct cx23885_tsport *port = fe->dvb->priv;
594 struct cx23885_dev *dev = port->dev;
595
596 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
597
598 switch (voltage) {
599 case SEC_VOLTAGE_13:
600 cx23885_gpio_set(dev, GPIO_1);
601 cx23885_gpio_clear(dev, GPIO_0);
602 break;
603 case SEC_VOLTAGE_18:
604 cx23885_gpio_set(dev, GPIO_1);
605 cx23885_gpio_set(dev, GPIO_0);
606 break;
607 case SEC_VOLTAGE_OFF:
608 cx23885_gpio_clear(dev, GPIO_1);
609 cx23885_gpio_clear(dev, GPIO_0);
610 break;
611 }
612
613 /* call the frontend set_voltage function */
614 port->fe_set_voltage(fe, voltage);
615
616 return 0;
617}
618
c29d6a83 619static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe,
620 fe_sec_voltage_t voltage)
621{
622 struct cx23885_tsport *port = fe->dvb->priv;
623 struct cx23885_dev *dev = port->dev;
624
625 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1);
626
627 switch (voltage) {
628 case SEC_VOLTAGE_13:
629 cx23885_gpio_set(dev, GPIO_13);
630 cx23885_gpio_clear(dev, GPIO_12);
631 break;
632 case SEC_VOLTAGE_18:
633 cx23885_gpio_set(dev, GPIO_13);
634 cx23885_gpio_set(dev, GPIO_12);
635 break;
636 case SEC_VOLTAGE_OFF:
637 cx23885_gpio_clear(dev, GPIO_13);
638 cx23885_gpio_clear(dev, GPIO_12);
639 break;
640 }
641 /* call the frontend set_voltage function */
642 return port->fe_set_voltage(fe, voltage);
643}
644
24e77409
OS		 645static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
646 u8 data, int *mem)
647{
648 /* MC417 */
649 #define SP2_DATA 0x000000ff
650 #define SP2_WR 0x00008000
651 #define SP2_RD 0x00004000
652 #define SP2_ACK 0x00001000
653 #define SP2_ADHI 0x00000800
654 #define SP2_ADLO 0x00000400
655 #define SP2_CS1 0x00000200
656 #define SP2_CS0 0x00000100
657 #define SP2_EN_ALL 0x00001000
658 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
659
660 struct cx23885_tsport *port = priv;
661 struct cx23885_dev *dev = port->dev;
662 int ret;
0e6c7b01 663 int tmp = 0;
24e77409
OS		 664 unsigned long timeout;
665
666 mutex_lock(&dev->gpio_lock);
667
668 /* write addr */
669 cx_write(MC417_OEN, SP2_EN_ALL);
670 cx_write(MC417_RWD, SP2_CTRL_OFF |
671 SP2_ADLO | (0xff & addr));
672 cx_clear(MC417_RWD, SP2_ADLO);
673 cx_write(MC417_RWD, SP2_CTRL_OFF |
674 SP2_ADHI | (0xff & (addr >> 8)));
675 cx_clear(MC417_RWD, SP2_ADHI);
676
677 if (read)
678 /* data in */
679 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
680 else
681 /* data out */
682 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
683
684 /* chip select 0 */
685 cx_clear(MC417_RWD, SP2_CS0);
686
687 /* read/write */
688 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
689
690 /* wait for a maximum of 1 msec */
691 timeout = jiffies + msecs_to_jiffies(1);
692 while (!time_after(jiffies, timeout)) {
693 tmp = cx_read(MC417_RWD);
694 if ((tmp & SP2_ACK) == 0)
695 break;
696 usleep_range(50, 100);
697 }
698
699 cx_set(MC417_RWD, SP2_CTRL_OFF);
700 *mem = tmp & 0xff;
701
702 mutex_unlock(&dev->gpio_lock);
703
704 if (!read) {
705 if (*mem < 0) {
706 ret = -EREMOTEIO;
707 goto err;
708 }
709 }
710
711 return 0;
712err:
713 return ret;
714}
715
a7d44baa 716static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
f35b9e80 717{
a7d44baa 718 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
f35b9e80
MK		 719 struct cx23885_tsport *port = fe->dvb->priv;
720 struct cx23885_dev *dev = port->dev;
721
722 switch (dev->board) {
723 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a7d44baa 724 switch (p->modulation) {
f35b9e80
MK		 725 case VSB_8:
726 cx23885_gpio_clear(dev, GPIO_5);
727 break;
728 case QAM_64:
729 case QAM_256:
730 default:
731 cx23885_gpio_set(dev, GPIO_5);
732 break;
733 }
734 break;
6f0d8c02 735 case CX23885_BOARD_MYGICA_X8506:
0d1b5265 736 case CX23885_BOARD_MYGICA_X8507:
6f0d8c02
DW		 737 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
738 /* Select Digital TV */
739 cx23885_gpio_set(dev, GPIO_0);
740 break;
f35b9e80 741 }
15472faf
MCC		 742
743 /* Call the real set_frontend */
744 if (port->set_frontend)
745 return port->set_frontend(fe);
746
5bdd3962 747 return 0;
f35b9e80
MK		 748}
749
15472faf
MCC		 750static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
751 struct dvb_frontend *fe)
752{
753 port->set_frontend = fe->ops.set_frontend;
754 fe->ops.set_frontend = cx23885_dvb_set_frontend;
755}
756
2365b2d3
DW		 757static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
758 .prod = LGS8GXX_PROD_LGS8G75,
759 .demod_address = 0x19,
760 .serial_ts = 0,
761 .ts_clk_pol = 1,
762 .ts_clk_gated = 1,
763 .if_clk_freq = 30400, /* 30.4 MHz */
764 .if_freq = 6500, /* 6.50 MHz */
765 .if_neg_center = 1,
766 .ext_adc = 0,
767 .adc_signed = 1,
768 .adc_vpp = 2, /* 1.6 Vpp */
769 .if_neg_edge = 1,
770};
771
772static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
773 .i2c_address = 0x61,
774 .if_khz = 6500,
775};
776
ea5697fe
DW		 777static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
778 .prod = ATBM8830_PROD_8830,
779 .demod_address = 0x44,
780 .serial_ts = 0,
781 .ts_sampling_edge = 1,
782 .ts_clk_gated = 0,
783 .osc_clk_freq = 30400, /* in kHz */
784 .if_freq = 0, /* zero IF */
785 .zif_swap_iq = 1,
c245c75c
DW		 786 .agc_min = 0x2E,
787 .agc_max = 0xFF,
788 .agc_hold_loop = 0,
ea5697fe
DW		 789};
790
791static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
792 .i2c_address = 0x60,
793 .osc_clk = 20
794};
795
796static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
797 .prod = ATBM8830_PROD_8830,
798 .demod_address = 0x44,
799 .serial_ts = 1,
800 .ts_sampling_edge = 1,
801 .ts_clk_gated = 0,
802 .osc_clk_freq = 30400, /* in kHz */
803 .if_freq = 0, /* zero IF */
804 .zif_swap_iq = 1,
c245c75c
DW		 805 .agc_min = 0x2E,
806 .agc_max = 0xFF,
807 .agc_hold_loop = 0,
ea5697fe
DW		 808};
809
810static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
811 .i2c_address = 0x60,
812 .osc_clk = 20
813};
78db8547
IL		 814static struct stv0367_config netup_stv0367_config[] = {
815 {
816 .demod_address = 0x1c,
817 .xtal = 27000000,
818 .if_khz = 4500,
819 .if_iq_mode = 0,
820 .ts_mode = 1,
821 .clk_pol = 0,
822 }, {
823 .demod_address = 0x1d,
824 .xtal = 27000000,
825 .if_khz = 4500,
826 .if_iq_mode = 0,
827 .ts_mode = 1,
828 .clk_pol = 0,
829 },
830};
831
832static struct xc5000_config netup_xc5000_config[] = {
833 {
834 .i2c_address = 0x61,
835 .if_khz = 4500,
836 }, {
837 .i2c_address = 0x64,
838 .if_khz = 4500,
839 },
840};
841
722c90eb
SR		 842static struct drxk_config terratec_drxk_config[] = {
843 {
844 .adr = 0x29,
845 .no_i2c_bridge = 1,
846 }, {
847 .adr = 0x2a,
848 .no_i2c_bridge = 1,
849 },
850};
851
852static struct mt2063_config terratec_mt2063_config[] = {
853 {
854 .tuner_address = 0x60,
855 }, {
856 .tuner_address = 0x67,
857 },
858};
859
7c62f5a1 860static const struct tda10071_config hauppauge_tda10071_config = {
41f55d57 861 .demod_i2c_addr = 0x05,
7c62f5a1
MK		 862 .tuner_i2c_addr = 0x54,
863 .i2c_wr_max = 64,
864 .ts_mode = TDA10071_TS_SERIAL,
865 .spec_inv = 0,
866 .xtal = 40444000, /* 40.444 MHz */
867 .pll_multiplier = 20,
868};
869
870static const struct a8293_config hauppauge_a8293_config = {
871 .i2c_addr = 0x0b,
872};
873
36efec48
MS		 874static const struct si2165_config hauppauge_hvr4400_si2165_config = {
875 .i2c_addr = 0x64,
876 .chip_mode = SI2165_MODE_PLL_XTAL,
877 .ref_freq_Hz = 16000000,
878};
879
29442266
OS		 880static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
881 .i2c_addr = 0x68,
882 .clock = 27000000,
883 .i2c_wr_max = 33,
884 .clock_out = 0,
885 .ts_mode = M88DS3103_TS_PARALLEL,
886 .ts_clk = 16000,
887 .ts_clk_pol = 1,
888 .lnb_en_pol = 1,
889 .lnb_hv_pol = 0,
890 .agc = 0x99,
891};
892
0e6c7b01 893static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
894 .i2c_addr = 0x68,
895 .clock = 27000000,
896 .i2c_wr_max = 33,
897 .clock_out = 0,
898 .ts_mode = M88DS3103_TS_CI,
899 .ts_clk = 10000,
900 .ts_clk_pol = 1,
901 .lnb_en_pol = 1,
902 .lnb_hv_pol = 0,
903 .agc = 0x99,
904};
905
c29d6a83 906static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = {
907 .i2c_addr = 0x68,
908 .clock = 27000000,
909 .i2c_wr_max = 33,
910 .clock_out = 0,
911 .ts_mode = M88DS3103_TS_SERIAL,
912 .ts_clk = 96000,
913 .ts_clk_pol = 0,
914 .lnb_en_pol = 1,
915 .lnb_hv_pol = 0,
916 .agc = 0x99,
917};
918
1fc77d01
AP		 919static const struct m88ds3103_config hauppauge_hvr5525_m88ds3103_config = {
920 .i2c_addr = 0x69,
921 .clock = 27000000,
922 .i2c_wr_max = 33,
923 .ts_mode = M88DS3103_TS_PARALLEL,
924 .ts_clk = 16000,
925 .ts_clk_pol = 1,
926 .agc = 0x99,
927};
928
ada73eee 929static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
78db8547
IL		 930{
931 struct cx23885_dev *dev = (struct cx23885_dev *)device;
932 unsigned long timeout = jiffies + msecs_to_jiffies(1);
d164460f 933 uint32_t mem = 0;
78db8547 934
d164460f 935 mem = cx_read(MC417_RWD);
78db8547
IL		 936 if (read)
937 cx_set(MC417_OEN, ALT_DATA);
938 else {
939 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
78db8547
IL		 940 mem &= ~ALT_DATA;
941 mem |= (data & ALT_DATA);
78db8547
IL		 942 }
943
944 if (flag)
d164460f 945 mem |= ALT_AD_RG;
78db8547 946 else
d164460f 947 mem &= ~ALT_AD_RG;
78db8547 948
d164460f 949 mem &= ~ALT_CS;
78db8547 950 if (read)
d164460f 951 mem = (mem & ~ALT_RD) | ALT_WR;
78db8547 952 else
d164460f
AO		 953 mem = (mem & ~ALT_WR) | ALT_RD;
954
955 cx_write(MC417_RWD, mem); /* start RW cycle */
78db8547
IL		 956
957 for (;;) {
958 mem = cx_read(MC417_RWD);
959 if ((mem & ALT_RDY) == 0)
960 break;
961 if (time_after(jiffies, timeout))
962 break;
963 udelay(1);
964 }
965
966 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
967 if (read)
968 return mem & ALT_DATA;
969
970 return 0;
971};
ea5697fe 972
46b21bba
JH		 973static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
974{
975 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
976
977 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
978}
979
980static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
981{
982 return 0;
983}
984
985static struct dib0070_config dib7070p_dib0070_config = {
986 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
987 .reset = dib7070_tuner_reset,
988 .sleep = dib7070_tuner_sleep,
989 .clock_khz = 12000,
46b21bba
JH		 990 .freq_offset_khz_vhf = 550,
991 /* .flip_chip = 1, */
992};
993
994/* DIB7070 generic */
995static struct dibx000_agc_config dib7070_agc_config = {
996 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
997
998 /*
999 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
1000 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1001 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
1002 */
1003 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
1004 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1005 .inv_gain = 600,
1006 .time_stabiliz = 10,
1007 .alpha_level = 0,
1008 .thlock = 118,
1009 .wbd_inv = 0,
1010 .wbd_ref = 3530,
1011 .wbd_sel = 1,
1012 .wbd_alpha = 5,
1013 .agc1_max = 65535,
1014 .agc1_min = 0,
1015 .agc2_max = 65535,
1016 .agc2_min = 0,
1017 .agc1_pt1 = 0,
1018 .agc1_pt2 = 40,
1019 .agc1_pt3 = 183,
1020 .agc1_slope1 = 206,
1021 .agc1_slope2 = 255,
1022 .agc2_pt1 = 72,
1023 .agc2_pt2 = 152,
1024 .agc2_slope1 = 88,
1025 .agc2_slope2 = 90,
1026 .alpha_mant = 17,
1027 .alpha_exp = 27,
1028 .beta_mant = 23,
1029 .beta_exp = 51,
1030 .perform_agc_softsplit = 0,
1031};
1032
1033static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
1034 .internal = 60000,
1035 .sampling = 15000,
1036 .pll_prediv = 1,
1037 .pll_ratio = 20,
1038 .pll_range = 3,
1039 .pll_reset = 1,
1040 .pll_bypass = 0,
1041 .enable_refdiv = 0,
1042 .bypclk_div = 0,
1043 .IO_CLK_en_core = 1,
1044 .ADClkSrc = 1,
1045 .modulo = 2,
1046 /* refsel, sel, freq_15k */
1047 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1048 .ifreq = (0 << 25) | 0,
1049 .timf = 20452225,
1050 .xtal_hz = 12000000,
1051};
1052
1053static struct dib7000p_config dib7070p_dib7000p_config = {
1054 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1055 .output_mode = OUTMODE_MPEG2_SERIAL,
1056 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1057 .output_mpeg2_in_188_bytes = 1,
1058
1059 .agc_config_count = 1,
1060 .agc = &dib7070_agc_config,
1061 .bw = &dib7070_bw_config_12_mhz,
1062 .tuner_is_baseband = 1,
1063 .spur_protect = 1,
1064
1065 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1066 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1067 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1068
1069 .hostbus_diversity = 1,
1070};
1071
d19770e5
ST		 1072static int dvb_register(struct cx23885_tsport *port)
1073{
8abe4a0a 1074 struct dib7000p_ops dib7000p_ops;
d19770e5 1075 struct cx23885_dev *dev = port->dev;
493b7127 1076 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
453afdd9 1077 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
29442266
OS		 1078 struct si2168_config si2168_config;
1079 struct si2157_config si2157_config;
24e77409 1080 struct sp2_config sp2_config;
29442266
OS		 1081 struct m88ts2022_config m88ts2022_config;
1082 struct i2c_board_info info;
1083 struct i2c_adapter *adapter;
0e6c7b01 1084 struct i2c_client *client_demod = NULL, *client_tuner = NULL, *client_ci = NULL;
c29d6a83 1085 const struct m88ds3103_config *p_m88ds3103_config = NULL;
1086 int (*p_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage) = NULL;
78db8547 1087 int mfe_shared = 0; /* bus not shared by default */
5a23b076 1088 int ret;
363c35fc 1089
f972e0bd 1090 /* Get the first frontend */
453afdd9 1091 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST		 1092 if (!fe0)
1093 return -EINVAL;
d19770e5 1094
453afdd9 1095 /* init struct vb2_dvb */
363c35fc 1096 fe0->dvb.name = dev->name;
d19770e5 1097
78db8547
IL		 1098 /* multi-frontend gate control is undefined or defaults to fe0 */
1099 port->frontends.gate = 0;
1100
1101 /* Sets the gate control callback to be used by i2c command calls */
1102 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1103
d19770e5
ST		 1104 /* init frontend */
1105 switch (dev->board) {
a77743bc 1106 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 1107 i2c_bus = &dev->i2c_bus[0];
363c35fc 1108 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 1109 &hauppauge_generic_config,
f139fa71 1110 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1111 if (fe0->dvb.frontend == NULL)
1112 break;
1113 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1114 &i2c_bus->i2c_adap,
1115 &hauppauge_generic_tunerconfig, 0);
d19770e5 1116 break;
a5dbf457 1117 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1118 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK		 1119 i2c_bus = &dev->i2c_bus[0];
1120 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
247bc540 1121 &hauppauge_lgdt3305_config,
a5dbf457 1122 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1123 if (fe0->dvb.frontend == NULL)
1124 break;
1125 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1126 0x60, &dev->i2c_bus[1].i2c_adap,
1127 &hauppauge_hvr127x_config);
15472faf
MCC		 1128 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1129 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
a5dbf457 1130 break;
19bc5796 1131 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1132 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
19bc5796
MK		 1133 i2c_bus = &dev->i2c_bus[0];
1134 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1135 &hcw_s5h1411_config,
1136 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1137 if (fe0->dvb.frontend == NULL)
1138 break;
1139
1140 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1141 0x60, &dev->i2c_bus[1].i2c_adap,
1142 &hauppauge_tda18271_config);
0ac60acb
DH		 1143
1144 tda18271_attach(&dev->ts1.analog_fe,
1145 0x60, &dev->i2c_bus[1].i2c_adap,
1146 &hauppauge_tda18271_config);
1147
19bc5796 1148 break;
3ba71d21
MK		 1149 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1150 i2c_bus = &dev->i2c_bus[0];
92abe9ee 1151 switch (alt_tuner) {
3ba71d21 1152 case 1:
363c35fc 1153 fe0->dvb.frontend =
3ba71d21
MK		 1154 dvb_attach(s5h1409_attach,
1155 &hauppauge_ezqam_config,
1156 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1157 if (fe0->dvb.frontend == NULL)
1158 break;
1159
1160 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1161 &dev->i2c_bus[1].i2c_adap, 0x42,
1162 &tda829x_no_probe);
1163 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1164 0x60, &dev->i2c_bus[1].i2c_adap,
1165 &hauppauge_tda18271_config);
3ba71d21
MK		 1166 break;
1167 case 0:
1168 default:
363c35fc 1169 fe0->dvb.frontend =
3ba71d21
MK		 1170 dvb_attach(s5h1409_attach,
1171 &hauppauge_generic_config,
1172 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1173 if (fe0->dvb.frontend == NULL)
1174 break;
1175 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1176 &i2c_bus->i2c_adap,
1177 &hauppauge_generic_tunerconfig, 0);
3ba71d21
MK		 1178 }
1179 break;
fc959bef 1180 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 1181 i2c_bus = &dev->i2c_bus[0];
363c35fc 1182 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 1183 &hauppauge_hvr1800lp_config,
f139fa71 1184 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1185 if (fe0->dvb.frontend == NULL)
1186 break;
1187 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1188 &i2c_bus->i2c_adap,
1189 &hauppauge_generic_tunerconfig, 0);
fc959bef 1190 break;
9bc37caa 1191 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 1192 i2c_bus = &dev->i2c_bus[0];
363c35fc 1193 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 1194 &fusionhdtv_5_express,
f139fa71 1195 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1196 if (fe0->dvb.frontend == NULL)
1197 break;
1198 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1199 &i2c_bus->i2c_adap, 0x61,
1200 TUNER_LG_TDVS_H06XF);
9bc37caa 1201 break;
d1987d55
ST		 1202 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1203 i2c_bus = &dev->i2c_bus[1];
363c35fc 1204 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST		 1205 &hauppauge_hvr1500q_config,
1206 &dev->i2c_bus[0].i2c_adap);
ed3da2bf
MCC		 1207 if (fe0->dvb.frontend == NULL)
1208 break;
1209 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1210 &i2c_bus->i2c_adap,
1211 &hauppauge_hvr1500q_tunerconfig);
d1987d55 1212 break;
07b4a835
MK		 1213 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1214 i2c_bus = &dev->i2c_bus[1];
363c35fc 1215 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK		 1216 &hauppauge_hvr1500_config,
1217 &dev->i2c_bus[0].i2c_adap);
363c35fc 1218 if (fe0->dvb.frontend != NULL) {
07b4a835
MK		 1219 struct dvb_frontend *fe;
1220 struct xc2028_config cfg = {
1221 .i2c_adap = &i2c_bus->i2c_adap,
1222 .i2c_addr = 0x61,
07b4a835
MK		 1223 };
1224 static struct xc2028_ctrl ctl = {
ef80bfeb 1225 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 1226 .max_len = 64,
52c3d29c 1227 .demod = XC3028_FE_OREN538,
07b4a835
MK		 1228 };
1229
1230 fe = dvb_attach(xc2028_attach,
363c35fc 1231 fe0->dvb.frontend, &cfg);
07b4a835
MK		 1232 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1233 fe->ops.tuner_ops.set_config(fe, &ctl);
1234 }
1235 break;
b3ea0166 1236 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1237 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 1238 i2c_bus = &dev->i2c_bus[0];
363c35fc 1239 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST		 1240 &hauppauge_hvr1200_config,
1241 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1242 if (fe0->dvb.frontend == NULL)
1243 break;
1244 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1245 &dev->i2c_bus[1].i2c_adap, 0x42,
1246 &tda829x_no_probe);
1247 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1248 0x60, &dev->i2c_bus[1].i2c_adap,
1249 &hauppauge_hvr1200_tuner_config);
6b926eca
MK		 1250 break;
1251 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1252 i2c_bus = &dev->i2c_bus[0];
1253 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1254 &hauppauge_hvr1210_config,
1255 &i2c_bus->i2c_adap);
1256 if (fe0->dvb.frontend != NULL) {
1257 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1258 0x60, &dev->i2c_bus[1].i2c_adap,
1259 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST		 1260 }
1261 break;
66762373
ST		 1262 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1263 i2c_bus = &dev->i2c_bus[0];
8abe4a0a
MCC		 1264
1265 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1266 return -ENODEV;
1267
1268 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
66762373 1269 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 1270 if (fe0->dvb.frontend != NULL) {
66762373
ST		 1271 struct dvb_frontend *fe;
1272 struct xc2028_config cfg = {
1273 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1274 .i2c_addr = 0x64,
66762373
ST		 1275 };
1276 static struct xc2028_ctrl ctl = {
ef80bfeb 1277 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373 1278 .max_len = 64,
9bed77ee 1279 .demod = XC3028_FE_DIBCOM52,
9c8ced51
ST		 1280 /* This is true for all demods with
1281 v36 firmware? */
0975fc68 1282 .type = XC2028_D2633,
66762373
ST		 1283 };
1284
1285 fe = dvb_attach(xc2028_attach,
363c35fc 1286 fe0->dvb.frontend, &cfg);
66762373
ST		 1287 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1288 fe->ops.tuner_ops.set_config(fe, &ctl);
1289 }
1290 break;
335377b7
MK		 1291 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1292 i2c_bus = &dev->i2c_bus[port->nr - 1];
1293
363c35fc 1294 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK		 1295 &dvico_s5h1409_config,
1296 &i2c_bus->i2c_adap);
363c35fc
ST		 1297 if (fe0->dvb.frontend == NULL)
1298 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK		 1299 &dvico_s5h1411_config,
1300 &i2c_bus->i2c_adap);
363c35fc
ST		 1301 if (fe0->dvb.frontend != NULL)
1302 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 1303 &i2c_bus->i2c_adap,
1304 &dvico_xc5000_tunerconfig);
335377b7 1305 break;
aef2d186
ST		 1306 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1307 i2c_bus = &dev->i2c_bus[port->nr - 1];
1308
363c35fc 1309 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST		 1310 &dvico_fusionhdtv_xc3028,
1311 &i2c_bus->i2c_adap);
363c35fc 1312 if (fe0->dvb.frontend != NULL) {
aef2d186
ST		 1313 struct dvb_frontend *fe;
1314 struct xc2028_config cfg = {
1315 .i2c_adap = &i2c_bus->i2c_adap,
1316 .i2c_addr = 0x61,
aef2d186
ST		 1317 };
1318 static struct xc2028_ctrl ctl = {
ef80bfeb 1319 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST		 1320 .max_len = 64,
1321 .demod = XC3028_FE_ZARLINK456,
1322 };
1323
363c35fc 1324 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST		 1325 &cfg);
1326 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1327 fe->ops.tuner_ops.set_config(fe, &ctl);
1328 }
1329 break;
46b21bba
JH		 1330 }
1331 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1332 i2c_bus = &dev->i2c_bus[port->nr - 1];
1333 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1334 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1335
1336 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1337 return -ENODEV;
1338
1339 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1340 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1341 return -ENODEV;
1342 }
1343 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1344 if (fe0->dvb.frontend != NULL) {
1345 struct i2c_adapter *tun_i2c;
1346
1347 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1348 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1349 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1350 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1351 return -ENODEV;
1352 }
1353 break;
aef2d186 1354 }
4c56b04a 1355 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1356 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1357 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 1358 i2c_bus = &dev->i2c_bus[0];
1359
363c35fc 1360 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST		 1361 &dvico_fusionhdtv_xc3028,
1362 &i2c_bus->i2c_adap);
363c35fc 1363 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST		 1364 struct dvb_frontend *fe;
1365 struct xc2028_config cfg = {
1366 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1367 .i2c_addr = 0x61,
4c56b04a
ST		 1368 };
1369 static struct xc2028_ctrl ctl = {
ef80bfeb 1370 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST		 1371 .max_len = 64,
1372 .demod = XC3028_FE_ZARLINK456,
1373 };
1374
363c35fc 1375 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST		 1376 &cfg);
1377 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1378 fe->ops.tuner_ops.set_config(fe, &ctl);
1379 }
96318d0c 1380 break;
0cf8af57 1381 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1382 i2c_bus = &dev->i2c_bus[0];
1383
1384 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1385 &dvico_fusionhdtv_xc3028,
1386 &i2c_bus->i2c_adap);
1387 if (fe0->dvb.frontend != NULL) {
1388 struct dvb_frontend *fe;
1389 struct xc4000_config cfg = {
1390 .i2c_address = 0x61,
1391 .default_pm = 0,
1392 .dvb_amplitude = 134,
1393 .set_smoothedcvbs = 1,
1394 .if_khz = 4560
1395 };
1396
1397 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1398 &dev->i2c_bus[1].i2c_adap, &cfg);
a7c8aada
MS		 1399 if (!fe) {
1400 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1401 dev->name);
1402 goto frontend_detach;
1403 }
0cf8af57 1404 }
1405 break;
96318d0c 1406 case CX23885_BOARD_TBS_6920:
09ea33e5 1407 i2c_bus = &dev->i2c_bus[1];
96318d0c
IL		 1408
1409 fe0->dvb.frontend = dvb_attach(cx24116_attach,
09ea33e5
IL		 1410 &tbs_cx24116_config,
1411 &i2c_bus->i2c_adap);
96318d0c 1412 if (fe0->dvb.frontend != NULL)
09ea33e5 1413 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
96318d0c 1414
579943f5 1415 break;
e6001482
LA		 1416 case CX23885_BOARD_TBS_6980:
1417 case CX23885_BOARD_TBS_6981:
1418 i2c_bus = &dev->i2c_bus[1];
1419
1420 switch (port->nr) {
1421 /* PORT B */
1422 case 1:
1423 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1424 &tbs_cx24117_config,
d10e8280 1425 &i2c_bus->i2c_adap);
e6001482
LA		 1426 break;
1427 /* PORT C */
1428 case 2:
e6001482
LA		 1429 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1430 &tbs_cx24117_config,
d10e8280 1431 &i2c_bus->i2c_adap);
e6001482
LA		 1432 break;
1433 }
1434 break;
579943f5
IL		 1435 case CX23885_BOARD_TEVII_S470:
1436 i2c_bus = &dev->i2c_bus[1];
1437
09ea33e5
IL		 1438 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1439 &tevii_ds3000_config,
1440 &i2c_bus->i2c_adap);
73f0af44
KD		 1441 if (fe0->dvb.frontend != NULL) {
1442 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1443 &tevii_ts2020_config, &i2c_bus->i2c_adap);
09ea33e5 1444 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
73f0af44 1445 }
579943f5 1446
4c56b04a 1447 break;
c9b8b04b
IL		 1448 case CX23885_BOARD_DVBWORLD_2005:
1449 i2c_bus = &dev->i2c_bus[1];
1450
1451 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1452 &dvbworld_cx24116_config,
1453 &i2c_bus->i2c_adap);
1454 break;
5a23b076
IL		 1455 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1456 i2c_bus = &dev->i2c_bus[0];
1457 switch (port->nr) {
1458 /* port B */
1459 case 1:
1460 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1461 &netup_stv0900_config,
1462 &i2c_bus->i2c_adap, 0);
1463 if (fe0->dvb.frontend != NULL) {
1464 if (dvb_attach(stv6110_attach,
1465 fe0->dvb.frontend,
1466 &netup_stv6110_tunerconfig_a,
1467 &i2c_bus->i2c_adap)) {
1468 if (!dvb_attach(lnbh24_attach,
1469 fe0->dvb.frontend,
1470 &i2c_bus->i2c_adap,
9329fb5b
AO		 1471 LNBH24_PCL | LNBH24_TTX,
1472 LNBH24_TEN, 0x09))
5a23b076
IL		 1473 printk(KERN_ERR
1474 "No LNBH24 found!\n");
1475
1476 }
1477 }
1478 break;
1479 /* port C */
1480 case 2:
1481 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1482 &netup_stv0900_config,
1483 &i2c_bus->i2c_adap, 1);
1484 if (fe0->dvb.frontend != NULL) {
1485 if (dvb_attach(stv6110_attach,
1486 fe0->dvb.frontend,
1487 &netup_stv6110_tunerconfig_b,
1488 &i2c_bus->i2c_adap)) {
1489 if (!dvb_attach(lnbh24_attach,
1490 fe0->dvb.frontend,
1491 &i2c_bus->i2c_adap,
9329fb5b
AO		 1492 LNBH24_PCL | LNBH24_TTX,
1493 LNBH24_TEN, 0x0a))
5a23b076
IL		 1494 printk(KERN_ERR
1495 "No LNBH24 found!\n");
1496
1497 }
1498 }
1499 break;
1500 }
1501 break;
493b7127
DW		 1502 case CX23885_BOARD_MYGICA_X8506:
1503 i2c_bus = &dev->i2c_bus[0];
1504 i2c_bus2 = &dev->i2c_bus[1];
1505 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1506 &mygica_x8506_lgs8gl5_config,
1507 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1508 if (fe0->dvb.frontend == NULL)
1509 break;
1510 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1511 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config);
15472faf 1512 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
493b7127 1513 break;
0d1b5265
MCC		 1514 case CX23885_BOARD_MYGICA_X8507:
1515 i2c_bus = &dev->i2c_bus[0];
1516 i2c_bus2 = &dev->i2c_bus[1];
1517 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1518 &mygica_x8507_mb86a20s_config,
1519 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1520 if (fe0->dvb.frontend == NULL)
1521 break;
1522
1523 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1524 &i2c_bus2->i2c_adap,
1525 &mygica_x8507_xc5000_config);
0d1b5265
MCC		 1526 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1527 break;
2365b2d3
DW		 1528 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1529 i2c_bus = &dev->i2c_bus[0];
1530 i2c_bus2 = &dev->i2c_bus[1];
1531 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1532 &magicpro_prohdtve2_lgs8g75_config,
1533 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1534 if (fe0->dvb.frontend == NULL)
1535 break;
1536 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1537 &i2c_bus2->i2c_adap,
1538 &magicpro_prohdtve2_xc5000_config);
15472faf 1539 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
2365b2d3 1540 break;
13697380 1541 case CX23885_BOARD_HAUPPAUGE_HVR1850:
35045137
ST		 1542 i2c_bus = &dev->i2c_bus[0];
1543 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1544 &hcw_s5h1411_config,
1545 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1546 if (fe0->dvb.frontend == NULL)
1547 break;
1548 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1549 0x60, &dev->i2c_bus[0].i2c_adap,
1550 &hauppauge_tda18271_config);
35045137
ST		 1551
1552 tda18271_attach(&dev->ts1.analog_fe,
1553 0x60, &dev->i2c_bus[1].i2c_adap,
1554 &hauppauge_tda18271_config);
1555
1556 break;
aee0b24c 1557 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 1558 i2c_bus = &dev->i2c_bus[0];
1559 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1560 &hcw_s5h1411_config,
1561 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1562 if (fe0->dvb.frontend == NULL)
1563 break;
1564 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1565 0x60, &dev->i2c_bus[0].i2c_adap,
1566 &hauppauge_tda18271_config);
13697380 1567 break;
ea5697fe
DW		 1568 case CX23885_BOARD_MYGICA_X8558PRO:
1569 switch (port->nr) {
1570 /* port B */
1571 case 1:
1572 i2c_bus = &dev->i2c_bus[0];
1573 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1574 &mygica_x8558pro_atbm8830_cfg1,
1575 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1576 if (fe0->dvb.frontend == NULL)
1577 break;
1578 dvb_attach(max2165_attach, fe0->dvb.frontend,
1579 &i2c_bus->i2c_adap,
1580 &mygic_x8558pro_max2165_cfg1);
ea5697fe
DW		 1581 break;
1582 /* port C */
1583 case 2:
1584 i2c_bus = &dev->i2c_bus[1];
1585 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1586 &mygica_x8558pro_atbm8830_cfg2,
1587 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1588 if (fe0->dvb.frontend == NULL)
1589 break;
1590 dvb_attach(max2165_attach, fe0->dvb.frontend,
1591 &i2c_bus->i2c_adap,
1592 &mygic_x8558pro_max2165_cfg2);
ea5697fe
DW		 1593 }
1594 break;
78db8547
IL		 1595 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1596 i2c_bus = &dev->i2c_bus[0];
1597 mfe_shared = 1;/* MFE */
1598 port->frontends.gate = 0;/* not clear for me yet */
1599 /* ports B, C */
1600 /* MFE frontend 1 DVB-T */
1601 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1602 &netup_stv0367_config[port->nr - 1],
1603 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1604 if (fe0->dvb.frontend == NULL)
1605 break;
1606 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend,
78db8547
IL		 1607 &i2c_bus->i2c_adap,
1608 &netup_xc5000_config[port->nr - 1]))
ed3da2bf
MCC		 1609 goto frontend_detach;
1610 /* load xc5000 firmware */
1611 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1612
78db8547 1613 /* MFE frontend 2 */
453afdd9 1614 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
78db8547
IL		 1615 if (fe1 == NULL)
1616 goto frontend_detach;
1617 /* DVB-C init */
1618 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1619 &netup_stv0367_config[port->nr - 1],
1620 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1621 if (fe1->dvb.frontend == NULL)
1622 break;
1623
1624 fe1->dvb.frontend->id = 1;
1625 if (NULL == dvb_attach(xc5000_attach,
1626 fe1->dvb.frontend,
1627 &i2c_bus->i2c_adap,
1628 &netup_xc5000_config[port->nr - 1]))
1629 goto frontend_detach;
78db8547 1630 break;
722c90eb
SR		 1631 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1632 i2c_bus = &dev->i2c_bus[0];
1633 i2c_bus2 = &dev->i2c_bus[1];
1634
1635 switch (port->nr) {
1636 /* port b */
1637 case 1:
1638 fe0->dvb.frontend = dvb_attach(drxk_attach,
1639 &terratec_drxk_config[0],
1640 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1641 if (fe0->dvb.frontend == NULL)
1642 break;
1643 if (!dvb_attach(mt2063_attach,
1644 fe0->dvb.frontend,
1645 &terratec_mt2063_config[0],
1646 &i2c_bus2->i2c_adap))
1647 goto frontend_detach;
722c90eb
SR		 1648 break;
1649 /* port c */
1650 case 2:
1651 fe0->dvb.frontend = dvb_attach(drxk_attach,
1652 &terratec_drxk_config[1],
1653 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1654 if (fe0->dvb.frontend == NULL)
1655 break;
1656 if (!dvb_attach(mt2063_attach,
1657 fe0->dvb.frontend,
1658 &terratec_mt2063_config[1],
1659 &i2c_bus2->i2c_adap))
1660 goto frontend_detach;
722c90eb
SR		 1661 break;
1662 }
1663 break;
7b134e85
IL		 1664 case CX23885_BOARD_TEVII_S471:
1665 i2c_bus = &dev->i2c_bus[1];
1666
1667 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1668 &tevii_ds3000_config,
1669 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1670 if (fe0->dvb.frontend == NULL)
1671 break;
1672 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1673 &tevii_ts2020_config, &i2c_bus->i2c_adap);
7b134e85 1674 break;
f667190b
MB		 1675 case CX23885_BOARD_PROF_8000:
1676 i2c_bus = &dev->i2c_bus[0];
1677
1678 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1679 &prof_8000_stv090x_config,
1680 &i2c_bus->i2c_adap,
1681 STV090x_DEMODULATOR_0);
ed3da2bf
MCC		 1682 if (fe0->dvb.frontend == NULL)
1683 break;
1684 if (!dvb_attach(stb6100_attach,
1685 fe0->dvb.frontend,
1686 &prof_8000_stb6100_config,
1687 &i2c_bus->i2c_adap))
1688 goto frontend_detach;
f667190b 1689
ed3da2bf 1690 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
f667190b 1691 break;
7c62f5a1
MK		 1692 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1693 i2c_bus = &dev->i2c_bus[0];
36efec48
MS		 1694 i2c_bus2 = &dev->i2c_bus[1];
1695 switch (port->nr) {
1696 /* port b */
1697 case 1:
1698 fe0->dvb.frontend = dvb_attach(tda10071_attach,
7c62f5a1
MK		 1699 &hauppauge_tda10071_config,
1700 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1701 if (fe0->dvb.frontend == NULL)
1702 break;
1703 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
1704 &i2c_bus->i2c_adap,
1705 &hauppauge_a8293_config))
1706 goto frontend_detach;
36efec48
MS		 1707 break;
1708 /* port c */
1709 case 2:
1710 fe0->dvb.frontend = dvb_attach(si2165_attach,
1711 &hauppauge_hvr4400_si2165_config,
1712 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1713 if (fe0->dvb.frontend == NULL)
1714 break;
1715 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1716 if (!dvb_attach(tda18271_attach,
1717 fe0->dvb.frontend,
1718 0x60, &i2c_bus2->i2c_adap,
1719 &hauppauge_hvr4400_tuner_config))
1720 goto frontend_detach;
36efec48 1721 break;
7c62f5a1
MK		 1722 }
1723 break;
721f3223
MS		 1724 case CX23885_BOARD_HAUPPAUGE_STARBURST:
1725 i2c_bus = &dev->i2c_bus[0];
1726 fe0->dvb.frontend = dvb_attach(tda10071_attach,
1727 &hauppauge_tda10071_config,
1728 &i2c_bus->i2c_adap);
1729 if (fe0->dvb.frontend != NULL) {
1730 dvb_attach(a8293_attach, fe0->dvb.frontend,
1731 &i2c_bus->i2c_adap,
1732 &hauppauge_a8293_config);
1733 }
1734 break;
29442266 1735 case CX23885_BOARD_DVBSKY_T9580:
cba5480c 1736 case CX23885_BOARD_DVBSKY_S950:
29442266
OS		 1737 i2c_bus = &dev->i2c_bus[0];
1738 i2c_bus2 = &dev->i2c_bus[1];
1739 switch (port->nr) {
1740 /* port b - satellite */
1741 case 1:
1742 /* attach frontend */
1743 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1744 &dvbsky_t9580_m88ds3103_config,
1745 &i2c_bus2->i2c_adap, &adapter);
1746 if (fe0->dvb.frontend == NULL)
1747 break;
1748
1749 /* attach tuner */
143800a5 1750 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
29442266
OS		 1751 m88ts2022_config.fe = fe0->dvb.frontend;
1752 m88ts2022_config.clock = 27000000;
1753 memset(&info, 0, sizeof(struct i2c_board_info));
1754 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1755 info.addr = 0x60;
1756 info.platform_data = &m88ts2022_config;
1757 request_module(info.type);
1758 client_tuner = i2c_new_device(adapter, &info);
1759 if (client_tuner == NULL ||
1760 client_tuner->dev.driver == NULL)
1761 goto frontend_detach;
1762 if (!try_module_get(client_tuner->dev.driver->owner)) {
1763 i2c_unregister_device(client_tuner);
1764 goto frontend_detach;
1765 }
1766
1767 /* delegate signal strength measurement to tuner */
1768 fe0->dvb.frontend->ops.read_signal_strength =
1769 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1770
1771 /*
1772 * for setting the voltage we need to set GPIOs on
1773 * the card.
1774 */
1775 port->fe_set_voltage =
1776 fe0->dvb.frontend->ops.set_voltage;
1777 fe0->dvb.frontend->ops.set_voltage =
1778 dvbsky_t9580_set_voltage;
1779
1780 port->i2c_client_tuner = client_tuner;
1781
1782 break;
1783 /* port c - terrestrial/cable */
1784 case 2:
1785 /* attach frontend */
143800a5 1786 memset(&si2168_config, 0, sizeof(si2168_config));
29442266
OS		 1787 si2168_config.i2c_adapter = &adapter;
1788 si2168_config.fe = &fe0->dvb.frontend;
1789 si2168_config.ts_mode = SI2168_TS_SERIAL;
1790 memset(&info, 0, sizeof(struct i2c_board_info));
1791 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1792 info.addr = 0x64;
1793 info.platform_data = &si2168_config;
1794 request_module(info.type);
1795 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1796 if (client_demod == NULL ||
1797 client_demod->dev.driver == NULL)
1798 goto frontend_detach;
1799 if (!try_module_get(client_demod->dev.driver->owner)) {
1800 i2c_unregister_device(client_demod);
1801 goto frontend_detach;
1802 }
1803 port->i2c_client_demod = client_demod;
1804
1805 /* attach tuner */
143800a5 1806 memset(&si2157_config, 0, sizeof(si2157_config));
29442266
OS		 1807 si2157_config.fe = fe0->dvb.frontend;
1808 memset(&info, 0, sizeof(struct i2c_board_info));
1809 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1810 info.addr = 0x60;
1811 info.platform_data = &si2157_config;
1812 request_module(info.type);
1813 client_tuner = i2c_new_device(adapter, &info);
1814 if (client_tuner == NULL ||
1815 client_tuner->dev.driver == NULL) {
1816 module_put(client_demod->dev.driver->owner);
1817 i2c_unregister_device(client_demod);
3b952436 1818 port->i2c_client_demod = NULL;
29442266
OS		 1819 goto frontend_detach;
1820 }
1821 if (!try_module_get(client_tuner->dev.driver->owner)) {
1822 i2c_unregister_device(client_tuner);
1823 module_put(client_demod->dev.driver->owner);
1824 i2c_unregister_device(client_demod);
3b952436 1825 port->i2c_client_demod = NULL;
29442266
OS		 1826 goto frontend_detach;
1827 }
1828 port->i2c_client_tuner = client_tuner;
1829 break;
1830 }
1831 break;
82c10276 1832 case CX23885_BOARD_DVBSKY_T980C:
61b103e8 1833 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276 1834 i2c_bus = &dev->i2c_bus[1];
24e77409 1835 i2c_bus2 = &dev->i2c_bus[0];
82c10276
OS		 1836
1837 /* attach frontend */
1838 memset(&si2168_config, 0, sizeof(si2168_config));
1839 si2168_config.i2c_adapter = &adapter;
1840 si2168_config.fe = &fe0->dvb.frontend;
1841 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1842 memset(&info, 0, sizeof(struct i2c_board_info));
1843 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1844 info.addr = 0x64;
1845 info.platform_data = &si2168_config;
1846 request_module(info.type);
1847 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 1848 if (client_demod == NULL || client_demod->dev.driver == NULL)
82c10276
OS		 1849 goto frontend_detach;
1850 if (!try_module_get(client_demod->dev.driver->owner)) {
1851 i2c_unregister_device(client_demod);
1852 goto frontend_detach;
1853 }
1854 port->i2c_client_demod = client_demod;
1855
1856 /* attach tuner */
1857 memset(&si2157_config, 0, sizeof(si2157_config));
1858 si2157_config.fe = fe0->dvb.frontend;
1859 memset(&info, 0, sizeof(struct i2c_board_info));
1860 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1861 info.addr = 0x60;
1862 info.platform_data = &si2157_config;
1863 request_module(info.type);
1864 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1865 if (client_tuner == NULL || client_tuner->dev.driver == NULL) {
82c10276
OS		 1866 module_put(client_demod->dev.driver->owner);
1867 i2c_unregister_device(client_demod);
3b952436 1868 port->i2c_client_demod = NULL;
82c10276
OS		 1869 goto frontend_detach;
1870 }
1871 if (!try_module_get(client_tuner->dev.driver->owner)) {
1872 i2c_unregister_device(client_tuner);
1873 module_put(client_demod->dev.driver->owner);
1874 i2c_unregister_device(client_demod);
3b952436 1875 port->i2c_client_demod = NULL;
82c10276
OS		 1876 goto frontend_detach;
1877 }
0e6c7b01 1878 port->i2c_client_tuner = client_tuner;
1879 break;
1880 case CX23885_BOARD_DVBSKY_S950C:
1881 i2c_bus = &dev->i2c_bus[1];
1882 i2c_bus2 = &dev->i2c_bus[0];
1883
1884 /* attach frontend */
1885 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1886 &dvbsky_s950c_m88ds3103_config,
1887 &i2c_bus->i2c_adap, &adapter);
1888 if (fe0->dvb.frontend == NULL)
1889 break;
1890
1891 /* attach tuner */
1892 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1893 m88ts2022_config.fe = fe0->dvb.frontend;
1894 m88ts2022_config.clock = 27000000;
1895 memset(&info, 0, sizeof(struct i2c_board_info));
1896 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1897 info.addr = 0x60;
1898 info.platform_data = &m88ts2022_config;
1899 request_module(info.type);
1900 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1901 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
0e6c7b01 1902 goto frontend_detach;
1903 if (!try_module_get(client_tuner->dev.driver->owner)) {
1904 i2c_unregister_device(client_tuner);
1905 goto frontend_detach;
1906 }
1907
1908 /* delegate signal strength measurement to tuner */
1909 fe0->dvb.frontend->ops.read_signal_strength =
1910 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1911
c29d6a83 1912 port->i2c_client_tuner = client_tuner;
1913 break;
1914 case CX23885_BOARD_DVBSKY_S952:
1915 switch (port->nr) {
1916 /* port b */
1917 case 1:
1918 i2c_bus = &dev->i2c_bus[1];
1919 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config;
1920 p_set_voltage = dvbsky_t9580_set_voltage;
1921 break;
1922 /* port c */
1923 case 2:
1924 i2c_bus = &dev->i2c_bus[0];
1925 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config;
1926 p_set_voltage = dvbsky_s952_portc_set_voltage;
1927 break;
1928 }
1929
1930 /* attach frontend */
1931 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1932 p_m88ds3103_config,
1933 &i2c_bus->i2c_adap, &adapter);
1934 if (fe0->dvb.frontend == NULL)
1935 break;
1936
1937 /* attach tuner */
1938 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1939 m88ts2022_config.fe = fe0->dvb.frontend;
1940 m88ts2022_config.clock = 27000000;
1941 memset(&info, 0, sizeof(struct i2c_board_info));
1942 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1943 info.addr = 0x60;
1944 info.platform_data = &m88ts2022_config;
1945 request_module(info.type);
1946 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1947 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
c29d6a83 1948 goto frontend_detach;
1949 if (!try_module_get(client_tuner->dev.driver->owner)) {
1950 i2c_unregister_device(client_tuner);
1951 goto frontend_detach;
1952 }
1953
1954 /* delegate signal strength measurement to tuner */
1955 fe0->dvb.frontend->ops.read_signal_strength =
1956 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1957
1958 /*
1959 * for setting the voltage we need to set GPIOs on
1960 * the card.
1961 */
1962 port->fe_set_voltage =
1963 fe0->dvb.frontend->ops.set_voltage;
1964 fe0->dvb.frontend->ops.set_voltage = p_set_voltage;
1965
c02ef64a
NM		 1966 port->i2c_client_tuner = client_tuner;
1967 break;
1968 case CX23885_BOARD_DVBSKY_T982:
1969 memset(&si2168_config, 0, sizeof(si2168_config));
1970 switch (port->nr) {
1971 /* port b */
1972 case 1:
1973 i2c_bus = &dev->i2c_bus[1];
1974 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1975 break;
1976 /* port c */
1977 case 2:
1978 i2c_bus = &dev->i2c_bus[0];
1979 si2168_config.ts_mode = SI2168_TS_SERIAL;
1980 break;
1981 }
1982
1983 /* attach frontend */
1984 si2168_config.i2c_adapter = &adapter;
1985 si2168_config.fe = &fe0->dvb.frontend;
1986 memset(&info, 0, sizeof(struct i2c_board_info));
1987 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1988 info.addr = 0x64;
1989 info.platform_data = &si2168_config;
1990 request_module(info.type);
1991 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 1992 if (client_demod == NULL || client_demod->dev.driver == NULL)
c02ef64a
NM		 1993 goto frontend_detach;
1994 if (!try_module_get(client_demod->dev.driver->owner)) {
1995 i2c_unregister_device(client_demod);
1996 goto frontend_detach;
1997 }
1998 port->i2c_client_demod = client_demod;
1999
2000 /* attach tuner */
2001 memset(&si2157_config, 0, sizeof(si2157_config));
2002 si2157_config.fe = fe0->dvb.frontend;
2003 memset(&info, 0, sizeof(struct i2c_board_info));
2004 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2005 info.addr = 0x60;
2006 info.platform_data = &si2157_config;
2007 request_module(info.type);
2008 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2009 if (client_tuner == NULL || client_tuner->dev.driver == NULL) {
c02ef64a
NM		 2010 module_put(client_demod->dev.driver->owner);
2011 i2c_unregister_device(client_demod);
3b952436 2012 port->i2c_client_demod = NULL;
c02ef64a
NM		 2013 goto frontend_detach;
2014 }
2015 if (!try_module_get(client_tuner->dev.driver->owner)) {
2016 i2c_unregister_device(client_tuner);
2017 module_put(client_demod->dev.driver->owner);
2018 i2c_unregister_device(client_demod);
2019 port->i2c_client_demod = NULL;
2020 goto frontend_detach;
2021 }
82c10276
OS		 2022 port->i2c_client_tuner = client_tuner;
2023 break;
1fc77d01
AP		 2024 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2025 switch (port->nr) {
2026 struct m88rs6000t_config m88rs6000t_config;
2027
2028 /* port b - satellite */
2029 case 1:
2030 /* attach frontend */
2031 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2032 &hauppauge_hvr5525_m88ds3103_config,
2033 &dev->i2c_bus[0].i2c_adap, &adapter);
2034 if (fe0->dvb.frontend == NULL)
2035 break;
2036
2037 /* attach SEC */
2038 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
2039 &dev->i2c_bus[0].i2c_adap,
2040 &hauppauge_a8293_config))
2041 goto frontend_detach;
2042
2043 /* attach tuner */
2044 memset(&m88rs6000t_config, 0, sizeof(m88rs6000t_config));
2045 m88rs6000t_config.fe = fe0->dvb.frontend;
2046 memset(&info, 0, sizeof(struct i2c_board_info));
2047 strlcpy(info.type, "m88rs6000t", I2C_NAME_SIZE);
2048 info.addr = 0x21;
2049 info.platform_data = &m88rs6000t_config;
2050 request_module("%s", info.type);
2051 client_tuner = i2c_new_device(adapter, &info);
2052 if (!client_tuner || !client_tuner->dev.driver)
2053 goto frontend_detach;
2054 if (!try_module_get(client_tuner->dev.driver->owner)) {
2055 i2c_unregister_device(client_tuner);
2056 goto frontend_detach;
2057 }
2058 port->i2c_client_tuner = client_tuner;
2059
2060 /* delegate signal strength measurement to tuner */
2061 fe0->dvb.frontend->ops.read_signal_strength =
2062 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2063 break;
2064 /* port c - terrestrial/cable */
2065 case 2:
2066 /* attach frontend */
2067 memset(&si2168_config, 0, sizeof(si2168_config));
2068 si2168_config.i2c_adapter = &adapter;
2069 si2168_config.fe = &fe0->dvb.frontend;
2070 si2168_config.ts_mode = SI2168_TS_SERIAL;
2071 memset(&info, 0, sizeof(struct i2c_board_info));
2072 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2073 info.addr = 0x64;
2074 info.platform_data = &si2168_config;
2075 request_module("%s", info.type);
2076 client_demod = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2077 if (!client_demod || !client_demod->dev.driver)
2078 goto frontend_detach;
2079 if (!try_module_get(client_demod->dev.driver->owner)) {
2080 i2c_unregister_device(client_demod);
2081 goto frontend_detach;
2082 }
2083 port->i2c_client_demod = client_demod;
2084
2085 /* attach tuner */
2086 memset(&si2157_config, 0, sizeof(si2157_config));
2087 si2157_config.fe = fe0->dvb.frontend;
2088 memset(&info, 0, sizeof(struct i2c_board_info));
2089 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2090 info.addr = 0x60;
2091 info.platform_data = &si2157_config;
2092 request_module("%s", info.type);
2093 client_tuner = i2c_new_device(&dev->i2c_bus[1].i2c_adap, &info);
2094 if (!client_tuner || !client_tuner->dev.driver) {
2095 module_put(client_demod->dev.driver->owner);
2096 i2c_unregister_device(client_demod);
2097 port->i2c_client_demod = NULL;
2098 goto frontend_detach;
2099 }
2100 if (!try_module_get(client_tuner->dev.driver->owner)) {
2101 i2c_unregister_device(client_tuner);
2102 module_put(client_demod->dev.driver->owner);
2103 i2c_unregister_device(client_demod);
2104 port->i2c_client_demod = NULL;
2105 goto frontend_detach;
2106 }
2107 port->i2c_client_tuner = client_tuner;
2108 break;
2109 }
2110 break;
d19770e5 2111 default:
9c8ced51
ST		 2112 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
2113 " isn't supported yet\n",
d19770e5
ST		 2114 dev->name);
2115 break;
2116 }
78db8547
IL		 2117
2118 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
9c8ced51 2119 printk(KERN_ERR "%s: frontend initialization failed\n",
78db8547
IL		 2120 dev->name);
2121 goto frontend_detach;
d19770e5 2122 }
78db8547 2123
d7cba043 2124 /* define general-purpose callback pointer */
363c35fc 2125 fe0->dvb.frontend->callback = cx23885_tuner_callback;
78db8547
IL		 2126 if (fe1)
2127 fe1->dvb.frontend->callback = cx23885_tuner_callback;
2128#if 0
2129 /* Ensure all frontends negotiate bus access */
2130 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2131 if (fe1)
2132 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2133#endif
d19770e5
ST		 2134
2135 /* Put the analog decoder in standby to keep it quiet */
622b828a 2136 call_all(dev, core, s_power, 0);
d19770e5 2137
363c35fc
ST		 2138 if (fe0->dvb.frontend->ops.analog_ops.standby)
2139 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 2140
d19770e5 2141 /* register everything */
453afdd9 2142 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
9adf6132 2143 &dev->pci->dev, adapter_nr, mfe_shared);
bee30192 2144 if (ret)
78db8547 2145 goto frontend_detach;
363c35fc 2146
5a23b076
IL		 2147 /* init CI & MAC */
2148 switch (dev->board) {
2149 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
2150 static struct netup_card_info cinfo;
2151
2152 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2153 memcpy(port->frontends.adapter.proposed_mac,
2154 cinfo.port[port->nr - 1].mac, 6);
be395157 2155 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
2156 port->nr, port->frontends.adapter.proposed_mac);
5a23b076
IL		 2157
2158 netup_ci_init(port);
2159 break;
2160 }
78db8547
IL		 2161 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2162 struct altera_ci_config netup_ci_cfg = {
2163 .dev = dev,/* magic number to identify*/
2164 .adapter = &port->frontends.adapter,/* for CI */
2165 .demux = &fe0->dvb.demux,/* for hw pid filter */
2166 .fpga_rw = netup_altera_fpga_rw,
2167 };
2168
2169 altera_ci_init(&netup_ci_cfg, port->nr);
2170 break;
2171 }
16bfdaa4
PG		 2172 case CX23885_BOARD_TEVII_S470: {
2173 u8 eeprom[256]; /* 24C02 i2c eeprom */
2174
2175 if (port->nr != 1)
2176 break;
2177
2178 /* Read entire EEPROM */
2179 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2180 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
5cac1f66 2181 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
16bfdaa4
PG		 2182 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
2183 break;
2184 }
cba5480c 2185 case CX23885_BOARD_DVBSKY_T9580:
c29d6a83 2186 case CX23885_BOARD_DVBSKY_S950:
c02ef64a
NM		 2187 case CX23885_BOARD_DVBSKY_S952:
2188 case CX23885_BOARD_DVBSKY_T982: {
29442266
OS		 2189 u8 eeprom[256]; /* 24C02 i2c eeprom */
2190
2191 if (port->nr > 2)
2192 break;
2193
2194 /* Read entire EEPROM */
2195 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2196 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
2197 sizeof(eeprom));
cba5480c 2198 printk(KERN_INFO "%s port %d MAC address: %pM\n",
2199 cx23885_boards[dev->board].name, port->nr,
2200 eeprom + 0xc0 + (port->nr-1) * 8);
29442266
OS		 2201 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
2202 (port->nr-1) * 8, 6);
2203 break;
2204 }
0e6c7b01 2205 case CX23885_BOARD_DVBSKY_S950C:
61b103e8
OS		 2206 case CX23885_BOARD_DVBSKY_T980C:
2207 case CX23885_BOARD_TT_CT2_4500_CI: {
82c10276
OS		 2208 u8 eeprom[256]; /* 24C02 i2c eeprom */
2209
24e77409
OS		 2210 /* attach CI */
2211 memset(&sp2_config, 0, sizeof(sp2_config));
2212 sp2_config.dvb_adap = &port->frontends.adapter;
2213 sp2_config.priv = port;
2214 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
2215 memset(&info, 0, sizeof(struct i2c_board_info));
2216 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
2217 info.addr = 0x40;
2218 info.platform_data = &sp2_config;
2219 request_module(info.type);
2220 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
a593f2cf 2221 if (client_ci == NULL || client_ci->dev.driver == NULL) {
0e6c7b01 2222 if (client_tuner) {
2223 module_put(client_tuner->dev.driver->owner);
2224 i2c_unregister_device(client_tuner);
2225 }
2226 if (client_demod) {
2227 module_put(client_demod->dev.driver->owner);
2228 i2c_unregister_device(client_demod);
2229 }
24e77409
OS		 2230 goto frontend_detach;
2231 }
2232 if (!try_module_get(client_ci->dev.driver->owner)) {
2233 i2c_unregister_device(client_ci);
0e6c7b01 2234 if (client_tuner) {
2235 module_put(client_tuner->dev.driver->owner);
2236 i2c_unregister_device(client_tuner);
2237 }
2238 if (client_demod) {
2239 module_put(client_demod->dev.driver->owner);
2240 i2c_unregister_device(client_demod);
2241 }
24e77409
OS		 2242 goto frontend_detach;
2243 }
2244 port->i2c_client_ci = client_ci;
2245
82c10276
OS		 2246 if (port->nr != 1)
2247 break;
2248
2249 /* Read entire EEPROM */
2250 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2251 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
2252 sizeof(eeprom));
61b103e8
OS		 2253 printk(KERN_INFO "%s MAC address: %pM\n",
2254 cx23885_boards[dev->board].name, eeprom + 0xc0);
82c10276
OS		 2255 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
2256 break;
2257 }
5a23b076
IL		 2258 }
2259
2260 return ret;
78db8547
IL		 2261
2262frontend_detach:
2263 port->gate_ctrl = NULL;
453afdd9 2264 vb2_dvb_dealloc_frontends(&port->frontends);
78db8547 2265 return -EINVAL;
d19770e5
ST		 2266}
2267
2268int cx23885_dvb_register(struct cx23885_tsport *port)
2269{
363c35fc 2270
453afdd9 2271 struct vb2_dvb_frontend *fe0;
d19770e5 2272 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST		 2273 int err, i;
2274
2275 /* Here we need to allocate the correct number of frontends,
af901ca1 2276 * as reflected in the cards struct. The reality is that currently
eb0c58bb
ST		 2277 * no cx23885 boards support this - yet. But, if we don't modify this
2278 * code then the second frontend would never be allocated (later)
2279 * and fail with error before the attach in dvb_register().
2280 * Without these changes we risk an OOPS later. The changes here
2281 * are for safety, and should provide a good foundation for the
2282 * future addition of any multi-frontend cx23885 based boards.
2283 */
2284 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2285 port->num_frontends);
d19770e5 2286
eb0c58bb 2287 for (i = 1; i <= port->num_frontends; i++) {
453afdd9
HV		 2288 struct vb2_queue *q;
2289
2290 if (vb2_dvb_alloc_frontend(
9c8ced51 2291 &port->frontends, i) == NULL) {
eb0c58bb
ST		 2292 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2293 return -ENOMEM;
2294 }
2295
453afdd9 2296 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
eb0c58bb 2297 if (!fe0)
ed3da2bf 2298 return -EINVAL;
363c35fc 2299
eb0c58bb 2300 dprintk(1, "%s\n", __func__);
9c8ced51 2301 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST		 2302 dev->board,
2303 dev->name,
2304 dev->pci_bus,
2305 dev->pci_slot);
d19770e5 2306
eb0c58bb 2307 err = -ENODEV;
d19770e5 2308
eb0c58bb
ST		 2309 /* dvb stuff */
2310 /* We have to init the queue for each frontend on a port. */
9c8ced51 2311 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
453afdd9
HV		 2312 q = &fe0->dvb.dvbq;
2313 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2314 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2315 q->gfp_flags = GFP_DMA32;
2316 q->min_buffers_needed = 2;
2317 q->drv_priv = port;
2318 q->buf_struct_size = sizeof(struct cx23885_buffer);
2319 q->ops = &dvb_qops;
2320 q->mem_ops = &vb2_dma_sg_memops;
2321 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2322 q->lock = &dev->lock;
2323
2324 err = vb2_queue_init(q);
2325 if (err < 0)
2326 return err;
eb0c58bb 2327 }
d19770e5
ST		 2328 err = dvb_register(port);
2329 if (err != 0)
9c8ced51
ST		 2330 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2331 __func__, err);
d19770e5 2332
d19770e5
ST		 2333 return err;
2334}
2335
2336int cx23885_dvb_unregister(struct cx23885_tsport *port)
2337{
453afdd9 2338 struct vb2_dvb_frontend *fe0;
b0b12e63
OS		 2339 struct i2c_client *client;
2340
e450de45
OS		 2341 /* remove I2C client for CI */
2342 client = port->i2c_client_ci;
2343 if (client) {
2344 module_put(client->dev.driver->owner);
2345 i2c_unregister_device(client);
2346 }
2347
b0b12e63
OS		 2348 /* remove I2C client for tuner */
2349 client = port->i2c_client_tuner;
2350 if (client) {
2351 module_put(client->dev.driver->owner);
2352 i2c_unregister_device(client);
2353 }
2354
2355 /* remove I2C client for demodulator */
2356 client = port->i2c_client_demod;
2357 if (client) {
2358 module_put(client->dev.driver->owner);
2359 i2c_unregister_device(client);
2360 }
363c35fc 2361
453afdd9 2362 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
b0b12e63 2363
e66131ce 2364 if (fe0 && fe0->dvb.frontend)
453afdd9 2365 vb2_dvb_unregister_bus(&port->frontends);
d19770e5 2366
afd96668
HV		 2367 switch (port->dev->board) {
2368 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2369 netup_ci_exit(port);
2370 break;
78db8547
IL		 2371 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2372 altera_ci_release(port->dev, port->nr);
2373 break;
afd96668 2374 }
5a23b076 2375
78db8547
IL		 2376 port->gate_ctrl = NULL;
2377
d19770e5
ST		 2378 return 0;
2379}
Linux kernel - Deliverables
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