Commit | Line | Data |
---|---|---|
d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
d19770e5 ST |
16 | */ |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/fs.h> | |
22 | #include <linux/kthread.h> | |
23 | #include <linux/file.h> | |
24 | #include <linux/suspend.h> | |
25 | ||
26 | #include "cx23885.h" | |
d19770e5 ST |
27 | #include <media/v4l2-common.h> |
28 | ||
5a23b076 | 29 | #include "dvb_ca_en50221.h" |
d19770e5 | 30 | #include "s5h1409.h" |
52b50450 | 31 | #include "s5h1411.h" |
d19770e5 | 32 | #include "mt2131.h" |
3ba71d21 | 33 | #include "tda8290.h" |
4041f1a5 | 34 | #include "tda18271.h" |
9bc37caa | 35 | #include "lgdt330x.h" |
0cf8af57 | 36 | #include "xc4000.h" |
d1987d55 | 37 | #include "xc5000.h" |
ea5697fe | 38 | #include "max2165.h" |
b3ea0166 | 39 | #include "tda10048.h" |
07b4a835 | 40 | #include "tuner-xc2028.h" |
827855d3 | 41 | #include "tuner-simple.h" |
66762373 | 42 | #include "dib7000p.h" |
46b21bba | 43 | #include "dib0070.h" |
66762373 | 44 | #include "dibx000_common.h" |
aef2d186 | 45 | #include "zl10353.h" |
5a23b076 | 46 | #include "stv0900.h" |
f867c3f4 | 47 | #include "stv0900_reg.h" |
5a23b076 IL |
48 | #include "stv6110.h" |
49 | #include "lnbh24.h" | |
96318d0c | 50 | #include "cx24116.h" |
e6001482 | 51 | #include "cx24117.h" |
5a23b076 | 52 | #include "cimax2.h" |
493b7127 | 53 | #include "lgs8gxx.h" |
5a23b076 IL |
54 | #include "netup-eeprom.h" |
55 | #include "netup-init.h" | |
a5dbf457 | 56 | #include "lgdt3305.h" |
ea5697fe | 57 | #include "atbm8830.h" |
73f0af44 | 58 | #include "ts2020.h" |
09ea33e5 IL |
59 | #include "ds3000.h" |
60 | #include "cx23885-f300.h" | |
78db8547 IL |
61 | #include "altera-ci.h" |
62 | #include "stv0367.h" | |
722c90eb SR |
63 | #include "drxk.h" |
64 | #include "mt2063.h" | |
f667190b MB |
65 | #include "stv090x.h" |
66 | #include "stb6100.h" | |
67 | #include "stb6100_cfg.h" | |
7c62f5a1 MK |
68 | #include "tda10071.h" |
69 | #include "a8293.h" | |
0d1b5265 | 70 | #include "mb86a20s.h" |
36efec48 | 71 | #include "si2165.h" |
29442266 OS |
72 | #include "si2168.h" |
73 | #include "si2157.h" | |
24e77409 | 74 | #include "sp2.h" |
29442266 OS |
75 | #include "m88ds3103.h" |
76 | #include "m88ts2022.h" | |
d19770e5 | 77 | |
4513fc69 | 78 | static unsigned int debug; |
d19770e5 | 79 | |
4513fc69 ST |
80 | #define dprintk(level, fmt, arg...)\ |
81 | do { if (debug >= level)\ | |
82 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
83 | } while (0) | |
d19770e5 ST |
84 | |
85 | /* ------------------------------------------------------------------ */ | |
86 | ||
3ba71d21 MK |
87 | static unsigned int alt_tuner; |
88 | module_param(alt_tuner, int, 0644); | |
89 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
90 | ||
78e92006 JG |
91 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
92 | ||
3ba71d21 MK |
93 | /* ------------------------------------------------------------------ */ |
94 | ||
453afdd9 HV |
95 | static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt, |
96 | unsigned int *num_buffers, unsigned int *num_planes, | |
97 | unsigned int sizes[], void *alloc_ctxs[]) | |
d19770e5 | 98 | { |
453afdd9 | 99 | struct cx23885_tsport *port = q->drv_priv; |
d19770e5 ST |
100 | |
101 | port->ts_packet_size = 188 * 4; | |
102 | port->ts_packet_count = 32; | |
453afdd9 HV |
103 | *num_planes = 1; |
104 | sizes[0] = port->ts_packet_size * port->ts_packet_count; | |
105 | *num_buffers = 32; | |
d19770e5 ST |
106 | return 0; |
107 | } | |
108 | ||
453afdd9 HV |
109 | |
110 | static int buffer_prepare(struct vb2_buffer *vb) | |
d19770e5 | 111 | { |
453afdd9 HV |
112 | struct cx23885_tsport *port = vb->vb2_queue->drv_priv; |
113 | struct cx23885_buffer *buf = | |
114 | container_of(vb, struct cx23885_buffer, vb); | |
115 | ||
116 | return cx23885_buf_prepare(buf, port); | |
d19770e5 ST |
117 | } |
118 | ||
453afdd9 | 119 | static void buffer_finish(struct vb2_buffer *vb) |
d19770e5 | 120 | { |
453afdd9 HV |
121 | struct cx23885_tsport *port = vb->vb2_queue->drv_priv; |
122 | struct cx23885_dev *dev = port->dev; | |
123 | struct cx23885_buffer *buf = container_of(vb, | |
124 | struct cx23885_buffer, vb); | |
125 | struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0); | |
126 | ||
127 | cx23885_free_buffer(dev, buf); | |
128 | ||
129 | dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE); | |
d19770e5 ST |
130 | } |
131 | ||
453afdd9 | 132 | static void buffer_queue(struct vb2_buffer *vb) |
d19770e5 | 133 | { |
453afdd9 HV |
134 | struct cx23885_tsport *port = vb->vb2_queue->drv_priv; |
135 | struct cx23885_buffer *buf = container_of(vb, | |
136 | struct cx23885_buffer, vb); | |
137 | ||
138 | cx23885_buf_queue(port, buf); | |
d19770e5 ST |
139 | } |
140 | ||
78db8547 IL |
141 | static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open) |
142 | { | |
453afdd9 HV |
143 | struct vb2_dvb_frontends *f; |
144 | struct vb2_dvb_frontend *fe; | |
78db8547 IL |
145 | |
146 | f = &port->frontends; | |
147 | ||
148 | if (f->gate <= 1) /* undefined or fe0 */ | |
453afdd9 | 149 | fe = vb2_dvb_get_frontend(f, 1); |
78db8547 | 150 | else |
453afdd9 | 151 | fe = vb2_dvb_get_frontend(f, f->gate); |
78db8547 IL |
152 | |
153 | if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) | |
154 | fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); | |
155 | } | |
156 | ||
453afdd9 HV |
157 | static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count) |
158 | { | |
159 | struct cx23885_tsport *port = q->drv_priv; | |
160 | struct cx23885_dmaqueue *dmaq = &port->mpegq; | |
161 | struct cx23885_buffer *buf = list_entry(dmaq->active.next, | |
162 | struct cx23885_buffer, queue); | |
163 | ||
164 | cx23885_start_dma(port, dmaq, buf); | |
165 | return 0; | |
166 | } | |
167 | ||
168 | static void cx23885_stop_streaming(struct vb2_queue *q) | |
169 | { | |
170 | struct cx23885_tsport *port = q->drv_priv; | |
171 | ||
172 | cx23885_cancel_buffers(port); | |
173 | } | |
174 | ||
175 | static struct vb2_ops dvb_qops = { | |
176 | .queue_setup = queue_setup, | |
177 | .buf_prepare = buffer_prepare, | |
178 | .buf_finish = buffer_finish, | |
179 | .buf_queue = buffer_queue, | |
180 | .wait_prepare = vb2_ops_wait_prepare, | |
181 | .wait_finish = vb2_ops_wait_finish, | |
182 | .start_streaming = cx23885_start_streaming, | |
183 | .stop_streaming = cx23885_stop_streaming, | |
d19770e5 ST |
184 | }; |
185 | ||
86184e06 | 186 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
187 | .demod_address = 0x32 >> 1, |
188 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
189 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 190 | .qam_if = 44000, |
fc959bef | 191 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
192 | .status_mode = S5H1409_DEMODLOCKING, |
193 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
194 | }; |
195 | ||
b3ea0166 ST |
196 | static struct tda10048_config hauppauge_hvr1200_config = { |
197 | .demod_address = 0x10 >> 1, | |
198 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
199 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
484d9e05 | 200 | .inversion = TDA10048_INVERSION_ON, |
8816bef5 ST |
201 | .dtv6_if_freq_khz = TDA10048_IF_3300, |
202 | .dtv7_if_freq_khz = TDA10048_IF_3800, | |
203 | .dtv8_if_freq_khz = TDA10048_IF_4300, | |
484d9e05 | 204 | .clk_freq_khz = TDA10048_CLK_16000, |
b3ea0166 ST |
205 | }; |
206 | ||
6b926eca MK |
207 | static struct tda10048_config hauppauge_hvr1210_config = { |
208 | .demod_address = 0x10 >> 1, | |
209 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
210 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
211 | .inversion = TDA10048_INVERSION_ON, | |
c27586e4 MK |
212 | .dtv6_if_freq_khz = TDA10048_IF_3300, |
213 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
214 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
6b926eca MK |
215 | .clk_freq_khz = TDA10048_CLK_16000, |
216 | }; | |
217 | ||
3ba71d21 MK |
218 | static struct s5h1409_config hauppauge_ezqam_config = { |
219 | .demod_address = 0x32 >> 1, | |
220 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
221 | .gpio = S5H1409_GPIO_OFF, | |
222 | .qam_if = 4000, | |
223 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
224 | .status_mode = S5H1409_DEMODLOCKING, |
225 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
226 | }; |
227 | ||
fc959bef | 228 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
229 | .demod_address = 0x32 >> 1, |
230 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
231 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 232 | .qam_if = 44000, |
fe475163 | 233 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
234 | .status_mode = S5H1409_DEMODLOCKING, |
235 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
236 | }; |
237 | ||
07b4a835 MK |
238 | static struct s5h1409_config hauppauge_hvr1500_config = { |
239 | .demod_address = 0x32 >> 1, | |
240 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
241 | .gpio = S5H1409_GPIO_OFF, | |
242 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
243 | .status_mode = S5H1409_DEMODLOCKING, |
244 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
245 | }; |
246 | ||
86184e06 | 247 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
248 | 0x61 |
249 | }; | |
250 | ||
9bc37caa MK |
251 | static struct lgdt330x_config fusionhdtv_5_express = { |
252 | .demod_address = 0x0e, | |
253 | .demod_chip = LGDT3303, | |
254 | .serial_mpeg = 0x40, | |
255 | }; | |
256 | ||
d1987d55 ST |
257 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
258 | .demod_address = 0x32 >> 1, | |
259 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
260 | .gpio = S5H1409_GPIO_ON, | |
261 | .qam_if = 44000, | |
262 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
263 | .status_mode = S5H1409_DEMODLOCKING, |
264 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
265 | }; |
266 | ||
335377b7 MK |
267 | static struct s5h1409_config dvico_s5h1409_config = { |
268 | .demod_address = 0x32 >> 1, | |
269 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
270 | .gpio = S5H1409_GPIO_ON, | |
271 | .qam_if = 44000, | |
272 | .inversion = S5H1409_INVERSION_OFF, | |
273 | .status_mode = S5H1409_DEMODLOCKING, | |
274 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
275 | }; | |
276 | ||
52b50450 MK |
277 | static struct s5h1411_config dvico_s5h1411_config = { |
278 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
279 | .gpio = S5H1411_GPIO_ON, | |
280 | .qam_if = S5H1411_IF_44000, | |
281 | .vsb_if = S5H1411_IF_44000, | |
282 | .inversion = S5H1411_INVERSION_OFF, | |
283 | .status_mode = S5H1411_DEMODLOCKING, | |
284 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
285 | }; | |
286 | ||
19bc5796 MK |
287 | static struct s5h1411_config hcw_s5h1411_config = { |
288 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
289 | .gpio = S5H1411_GPIO_OFF, | |
290 | .vsb_if = S5H1411_IF_44000, | |
291 | .qam_if = S5H1411_IF_4000, | |
292 | .inversion = S5H1411_INVERSION_ON, | |
293 | .status_mode = S5H1411_DEMODLOCKING, | |
294 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
295 | }; | |
296 | ||
d1987d55 | 297 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { |
e12671cf ST |
298 | .i2c_address = 0x61, |
299 | .if_khz = 5380, | |
d1987d55 ST |
300 | }; |
301 | ||
335377b7 MK |
302 | static struct xc5000_config dvico_xc5000_tunerconfig = { |
303 | .i2c_address = 0x64, | |
304 | .if_khz = 5380, | |
335377b7 MK |
305 | }; |
306 | ||
4041f1a5 MK |
307 | static struct tda829x_config tda829x_no_probe = { |
308 | .probe_tuner = TDA829X_DONT_PROBE, | |
309 | }; | |
310 | ||
f21e0d7f | 311 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
312 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
313 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
314 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
315 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
316 | }; |
317 | ||
b34cdc36 MK |
318 | static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = { |
319 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
320 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
321 | .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, | |
322 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
323 | .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, | |
324 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
325 | }; | |
326 | ||
f21e0d7f MK |
327 | static struct tda18271_config hauppauge_tda18271_config = { |
328 | .std_map = &hauppauge_tda18271_std_map, | |
329 | .gate = TDA18271_GATE_ANALOG, | |
04a68baa | 330 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
f21e0d7f MK |
331 | }; |
332 | ||
b3ea0166 | 333 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
b34cdc36 | 334 | .std_map = &hauppauge_hvr1200_tda18271_std_map, |
b3ea0166 | 335 | .gate = TDA18271_GATE_ANALOG, |
04a68baa | 336 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
b3ea0166 ST |
337 | }; |
338 | ||
6b926eca MK |
339 | static struct tda18271_config hauppauge_hvr1210_tuner_config = { |
340 | .gate = TDA18271_GATE_DIGITAL, | |
04a68baa | 341 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
6b926eca MK |
342 | }; |
343 | ||
36efec48 MS |
344 | static struct tda18271_config hauppauge_hvr4400_tuner_config = { |
345 | .gate = TDA18271_GATE_DIGITAL, | |
346 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
347 | }; | |
348 | ||
247bc540 | 349 | static struct tda18271_std_map hauppauge_hvr127x_std_map = { |
a5dbf457 MK |
350 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, |
351 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
352 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
353 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
354 | }; | |
355 | ||
247bc540 MK |
356 | static struct tda18271_config hauppauge_hvr127x_config = { |
357 | .std_map = &hauppauge_hvr127x_std_map, | |
04a68baa | 358 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
a5dbf457 MK |
359 | }; |
360 | ||
247bc540 | 361 | static struct lgdt3305_config hauppauge_lgdt3305_config = { |
a5dbf457 MK |
362 | .i2c_addr = 0x0e, |
363 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
364 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
365 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
366 | .deny_i2c_rptr = 1, | |
367 | .spectral_inversion = 1, | |
368 | .qam_if_khz = 4000, | |
369 | .vsb_if_khz = 3250, | |
370 | }; | |
371 | ||
b1721d0d | 372 | static struct dibx000_agc_config xc3028_agc_config = { |
66762373 ST |
373 | BAND_VHF | BAND_UHF, /* band_caps */ |
374 | ||
375 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
376 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
377 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
378 | * P_agc_nb_est=2, P_agc_write=0 | |
379 | */ | |
380 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
381 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
382 | ||
383 | 712, /* inv_gain */ | |
384 | 21, /* time_stabiliz */ | |
385 | ||
386 | 0, /* alpha_level */ | |
387 | 118, /* thlock */ | |
388 | ||
389 | 0, /* wbd_inv */ | |
390 | 2867, /* wbd_ref */ | |
391 | 0, /* wbd_sel */ | |
392 | 2, /* wbd_alpha */ | |
393 | ||
394 | 0, /* agc1_max */ | |
395 | 0, /* agc1_min */ | |
396 | 39718, /* agc2_max */ | |
397 | 9930, /* agc2_min */ | |
398 | 0, /* agc1_pt1 */ | |
399 | 0, /* agc1_pt2 */ | |
400 | 0, /* agc1_pt3 */ | |
401 | 0, /* agc1_slope1 */ | |
402 | 0, /* agc1_slope2 */ | |
403 | 0, /* agc2_pt1 */ | |
404 | 128, /* agc2_pt2 */ | |
405 | 29, /* agc2_slope1 */ | |
406 | 29, /* agc2_slope2 */ | |
407 | ||
408 | 17, /* alpha_mant */ | |
409 | 27, /* alpha_exp */ | |
410 | 23, /* beta_mant */ | |
411 | 51, /* beta_exp */ | |
412 | ||
413 | 1, /* perform_agc_softsplit */ | |
414 | }; | |
415 | ||
416 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
417 | * With external clock = 30.000000 */ | |
b1721d0d | 418 | static struct dibx000_bandwidth_config xc3028_bw_config = { |
66762373 ST |
419 | 60000, /* internal */ |
420 | 30000, /* sampling */ | |
421 | 1, /* pll_cfg: prediv */ | |
422 | 8, /* pll_cfg: ratio */ | |
423 | 3, /* pll_cfg: range */ | |
424 | 1, /* pll_cfg: reset */ | |
425 | 0, /* pll_cfg: bypass */ | |
426 | 0, /* misc: refdiv */ | |
427 | 0, /* misc: bypclk_div */ | |
428 | 1, /* misc: IO_CLK_en_core */ | |
429 | 1, /* misc: ADClkSrc */ | |
430 | 0, /* misc: modulo */ | |
431 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
432 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
433 | 20452225, /* timf */ | |
434 | 30000000 /* xtal_hz */ | |
435 | }; | |
436 | ||
437 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
438 | .output_mpeg2_in_188_bytes = 1, | |
439 | .hostbus_diversity = 1, | |
440 | .tuner_is_baseband = 0, | |
441 | .update_lna = NULL, | |
442 | ||
443 | .agc_config_count = 1, | |
444 | .agc = &xc3028_agc_config, | |
445 | .bw = &xc3028_bw_config, | |
446 | ||
447 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
448 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
449 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
450 | ||
451 | .pwm_freq_div = 0, | |
452 | .agc_control = NULL, | |
453 | .spur_protect = 0, | |
454 | ||
455 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
456 | }; | |
457 | ||
aef2d186 ST |
458 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
459 | .demod_address = 0x0f, | |
460 | .if2 = 45600, | |
461 | .no_tuner = 1, | |
d4dc673d | 462 | .disable_i2c_gate_ctrl = 1, |
aef2d186 ST |
463 | }; |
464 | ||
f867c3f4 IL |
465 | static struct stv0900_reg stv0900_ts_regs[] = { |
466 | { R0900_TSGENERAL, 0x00 }, | |
467 | { R0900_P1_TSSPEED, 0x40 }, | |
468 | { R0900_P2_TSSPEED, 0x40 }, | |
469 | { R0900_P1_TSCFGM, 0xc0 }, | |
470 | { R0900_P2_TSCFGM, 0xc0 }, | |
471 | { R0900_P1_TSCFGH, 0xe0 }, | |
472 | { R0900_P2_TSCFGH, 0xe0 }, | |
473 | { R0900_P1_TSCFGL, 0x20 }, | |
474 | { R0900_P2_TSCFGL, 0x20 }, | |
475 | { 0xffff, 0xff }, /* terminate */ | |
476 | }; | |
477 | ||
5a23b076 IL |
478 | static struct stv0900_config netup_stv0900_config = { |
479 | .demod_address = 0x68, | |
29372a8d | 480 | .demod_mode = 1, /* dual */ |
644c7ef0 | 481 | .xtal = 8000000, |
5a23b076 IL |
482 | .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ |
483 | .diseqc_mode = 2,/* 2/3 PWM */ | |
f867c3f4 | 484 | .ts_config_regs = stv0900_ts_regs, |
5a23b076 IL |
485 | .tun1_maddress = 0,/* 0x60 */ |
486 | .tun2_maddress = 3,/* 0x63 */ | |
487 | .tun1_adc = 1,/* 1 Vpp */ | |
488 | .tun2_adc = 1,/* 1 Vpp */ | |
489 | }; | |
490 | ||
491 | static struct stv6110_config netup_stv6110_tunerconfig_a = { | |
492 | .i2c_address = 0x60, | |
644c7ef0 AO |
493 | .mclk = 16000000, |
494 | .clk_div = 1, | |
873688cd | 495 | .gain = 8, /* +16 dB - maximum gain */ |
5a23b076 IL |
496 | }; |
497 | ||
498 | static struct stv6110_config netup_stv6110_tunerconfig_b = { | |
499 | .i2c_address = 0x63, | |
644c7ef0 AO |
500 | .mclk = 16000000, |
501 | .clk_div = 1, | |
873688cd | 502 | .gain = 8, /* +16 dB - maximum gain */ |
5a23b076 IL |
503 | }; |
504 | ||
96318d0c | 505 | static struct cx24116_config tbs_cx24116_config = { |
09ea33e5 | 506 | .demod_address = 0x55, |
96318d0c IL |
507 | }; |
508 | ||
e6001482 LA |
509 | static struct cx24117_config tbs_cx24117_config = { |
510 | .demod_address = 0x55, | |
511 | }; | |
512 | ||
09ea33e5 IL |
513 | static struct ds3000_config tevii_ds3000_config = { |
514 | .demod_address = 0x68, | |
579943f5 IL |
515 | }; |
516 | ||
73f0af44 KD |
517 | static struct ts2020_config tevii_ts2020_config = { |
518 | .tuner_address = 0x60, | |
b858c331 | 519 | .clk_out_div = 1, |
8d2b0229 | 520 | .frequency_div = 1146000, |
73f0af44 KD |
521 | }; |
522 | ||
c9b8b04b IL |
523 | static struct cx24116_config dvbworld_cx24116_config = { |
524 | .demod_address = 0x05, | |
525 | }; | |
526 | ||
493b7127 DW |
527 | static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = { |
528 | .prod = LGS8GXX_PROD_LGS8GL5, | |
529 | .demod_address = 0x19, | |
530 | .serial_ts = 0, | |
531 | .ts_clk_pol = 1, | |
532 | .ts_clk_gated = 1, | |
533 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
534 | .if_freq = 5380, /* 5.38 MHz */ | |
535 | .if_neg_center = 1, | |
536 | .ext_adc = 0, | |
537 | .adc_signed = 0, | |
538 | .if_neg_edge = 0, | |
539 | }; | |
540 | ||
541 | static struct xc5000_config mygica_x8506_xc5000_config = { | |
542 | .i2c_address = 0x61, | |
543 | .if_khz = 5380, | |
544 | }; | |
545 | ||
0d1b5265 MCC |
546 | static struct mb86a20s_config mygica_x8507_mb86a20s_config = { |
547 | .demod_address = 0x10, | |
548 | }; | |
549 | ||
550 | static struct xc5000_config mygica_x8507_xc5000_config = { | |
551 | .i2c_address = 0x61, | |
552 | .if_khz = 4000, | |
553 | }; | |
554 | ||
f667190b | 555 | static struct stv090x_config prof_8000_stv090x_config = { |
b858c331 IL |
556 | .device = STV0903, |
557 | .demod_mode = STV090x_SINGLE, | |
558 | .clk_mode = STV090x_CLK_EXT, | |
559 | .xtal = 27000000, | |
560 | .address = 0x6A, | |
561 | .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, | |
562 | .repeater_level = STV090x_RPTLEVEL_64, | |
563 | .adc1_range = STV090x_ADC_2Vpp, | |
564 | .diseqc_envelope_mode = false, | |
565 | ||
566 | .tuner_get_frequency = stb6100_get_frequency, | |
567 | .tuner_set_frequency = stb6100_set_frequency, | |
568 | .tuner_set_bandwidth = stb6100_set_bandwidth, | |
569 | .tuner_get_bandwidth = stb6100_get_bandwidth, | |
f667190b MB |
570 | }; |
571 | ||
572 | static struct stb6100_config prof_8000_stb6100_config = { | |
573 | .tuner_address = 0x60, | |
574 | .refclock = 27000000, | |
575 | }; | |
576 | ||
577 | static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
578 | { | |
579 | struct cx23885_tsport *port = fe->dvb->priv; | |
580 | struct cx23885_dev *dev = port->dev; | |
581 | ||
582 | if (voltage == SEC_VOLTAGE_18) | |
583 | cx_write(MC417_RWD, 0x00001e00); | |
584 | else if (voltage == SEC_VOLTAGE_13) | |
585 | cx_write(MC417_RWD, 0x00001a00); | |
586 | else | |
587 | cx_write(MC417_RWD, 0x00001800); | |
588 | return 0; | |
589 | } | |
590 | ||
29442266 OS |
591 | static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe, |
592 | fe_sec_voltage_t voltage) | |
593 | { | |
594 | struct cx23885_tsport *port = fe->dvb->priv; | |
595 | struct cx23885_dev *dev = port->dev; | |
596 | ||
597 | cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); | |
598 | ||
599 | switch (voltage) { | |
600 | case SEC_VOLTAGE_13: | |
601 | cx23885_gpio_set(dev, GPIO_1); | |
602 | cx23885_gpio_clear(dev, GPIO_0); | |
603 | break; | |
604 | case SEC_VOLTAGE_18: | |
605 | cx23885_gpio_set(dev, GPIO_1); | |
606 | cx23885_gpio_set(dev, GPIO_0); | |
607 | break; | |
608 | case SEC_VOLTAGE_OFF: | |
609 | cx23885_gpio_clear(dev, GPIO_1); | |
610 | cx23885_gpio_clear(dev, GPIO_0); | |
611 | break; | |
612 | } | |
613 | ||
614 | /* call the frontend set_voltage function */ | |
615 | port->fe_set_voltage(fe, voltage); | |
616 | ||
617 | return 0; | |
618 | } | |
619 | ||
24e77409 OS |
620 | static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr, |
621 | u8 data, int *mem) | |
622 | { | |
623 | /* MC417 */ | |
624 | #define SP2_DATA 0x000000ff | |
625 | #define SP2_WR 0x00008000 | |
626 | #define SP2_RD 0x00004000 | |
627 | #define SP2_ACK 0x00001000 | |
628 | #define SP2_ADHI 0x00000800 | |
629 | #define SP2_ADLO 0x00000400 | |
630 | #define SP2_CS1 0x00000200 | |
631 | #define SP2_CS0 0x00000100 | |
632 | #define SP2_EN_ALL 0x00001000 | |
633 | #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD) | |
634 | ||
635 | struct cx23885_tsport *port = priv; | |
636 | struct cx23885_dev *dev = port->dev; | |
637 | int ret; | |
638 | int tmp; | |
639 | unsigned long timeout; | |
640 | ||
641 | mutex_lock(&dev->gpio_lock); | |
642 | ||
643 | /* write addr */ | |
644 | cx_write(MC417_OEN, SP2_EN_ALL); | |
645 | cx_write(MC417_RWD, SP2_CTRL_OFF | | |
646 | SP2_ADLO | (0xff & addr)); | |
647 | cx_clear(MC417_RWD, SP2_ADLO); | |
648 | cx_write(MC417_RWD, SP2_CTRL_OFF | | |
649 | SP2_ADHI | (0xff & (addr >> 8))); | |
650 | cx_clear(MC417_RWD, SP2_ADHI); | |
651 | ||
652 | if (read) | |
653 | /* data in */ | |
654 | cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA); | |
655 | else | |
656 | /* data out */ | |
657 | cx_write(MC417_RWD, SP2_CTRL_OFF | data); | |
658 | ||
659 | /* chip select 0 */ | |
660 | cx_clear(MC417_RWD, SP2_CS0); | |
661 | ||
662 | /* read/write */ | |
663 | cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR); | |
664 | ||
665 | /* wait for a maximum of 1 msec */ | |
666 | timeout = jiffies + msecs_to_jiffies(1); | |
667 | while (!time_after(jiffies, timeout)) { | |
668 | tmp = cx_read(MC417_RWD); | |
669 | if ((tmp & SP2_ACK) == 0) | |
670 | break; | |
671 | usleep_range(50, 100); | |
672 | } | |
673 | ||
674 | cx_set(MC417_RWD, SP2_CTRL_OFF); | |
675 | *mem = tmp & 0xff; | |
676 | ||
677 | mutex_unlock(&dev->gpio_lock); | |
678 | ||
679 | if (!read) { | |
680 | if (*mem < 0) { | |
681 | ret = -EREMOTEIO; | |
682 | goto err; | |
683 | } | |
684 | } | |
685 | ||
686 | return 0; | |
687 | err: | |
688 | return ret; | |
689 | } | |
690 | ||
a7d44baa | 691 | static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) |
f35b9e80 | 692 | { |
a7d44baa | 693 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
f35b9e80 MK |
694 | struct cx23885_tsport *port = fe->dvb->priv; |
695 | struct cx23885_dev *dev = port->dev; | |
696 | ||
697 | switch (dev->board) { | |
698 | case CX23885_BOARD_HAUPPAUGE_HVR1275: | |
a7d44baa | 699 | switch (p->modulation) { |
f35b9e80 MK |
700 | case VSB_8: |
701 | cx23885_gpio_clear(dev, GPIO_5); | |
702 | break; | |
703 | case QAM_64: | |
704 | case QAM_256: | |
705 | default: | |
706 | cx23885_gpio_set(dev, GPIO_5); | |
707 | break; | |
708 | } | |
709 | break; | |
6f0d8c02 | 710 | case CX23885_BOARD_MYGICA_X8506: |
0d1b5265 | 711 | case CX23885_BOARD_MYGICA_X8507: |
6f0d8c02 DW |
712 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
713 | /* Select Digital TV */ | |
714 | cx23885_gpio_set(dev, GPIO_0); | |
715 | break; | |
f35b9e80 | 716 | } |
15472faf MCC |
717 | |
718 | /* Call the real set_frontend */ | |
719 | if (port->set_frontend) | |
720 | return port->set_frontend(fe); | |
721 | ||
5bdd3962 | 722 | return 0; |
f35b9e80 MK |
723 | } |
724 | ||
15472faf MCC |
725 | static void cx23885_set_frontend_hook(struct cx23885_tsport *port, |
726 | struct dvb_frontend *fe) | |
727 | { | |
728 | port->set_frontend = fe->ops.set_frontend; | |
729 | fe->ops.set_frontend = cx23885_dvb_set_frontend; | |
730 | } | |
731 | ||
2365b2d3 DW |
732 | static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = { |
733 | .prod = LGS8GXX_PROD_LGS8G75, | |
734 | .demod_address = 0x19, | |
735 | .serial_ts = 0, | |
736 | .ts_clk_pol = 1, | |
737 | .ts_clk_gated = 1, | |
738 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
739 | .if_freq = 6500, /* 6.50 MHz */ | |
740 | .if_neg_center = 1, | |
741 | .ext_adc = 0, | |
742 | .adc_signed = 1, | |
743 | .adc_vpp = 2, /* 1.6 Vpp */ | |
744 | .if_neg_edge = 1, | |
745 | }; | |
746 | ||
747 | static struct xc5000_config magicpro_prohdtve2_xc5000_config = { | |
748 | .i2c_address = 0x61, | |
749 | .if_khz = 6500, | |
750 | }; | |
751 | ||
ea5697fe DW |
752 | static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = { |
753 | .prod = ATBM8830_PROD_8830, | |
754 | .demod_address = 0x44, | |
755 | .serial_ts = 0, | |
756 | .ts_sampling_edge = 1, | |
757 | .ts_clk_gated = 0, | |
758 | .osc_clk_freq = 30400, /* in kHz */ | |
759 | .if_freq = 0, /* zero IF */ | |
760 | .zif_swap_iq = 1, | |
c245c75c DW |
761 | .agc_min = 0x2E, |
762 | .agc_max = 0xFF, | |
763 | .agc_hold_loop = 0, | |
ea5697fe DW |
764 | }; |
765 | ||
766 | static struct max2165_config mygic_x8558pro_max2165_cfg1 = { | |
767 | .i2c_address = 0x60, | |
768 | .osc_clk = 20 | |
769 | }; | |
770 | ||
771 | static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = { | |
772 | .prod = ATBM8830_PROD_8830, | |
773 | .demod_address = 0x44, | |
774 | .serial_ts = 1, | |
775 | .ts_sampling_edge = 1, | |
776 | .ts_clk_gated = 0, | |
777 | .osc_clk_freq = 30400, /* in kHz */ | |
778 | .if_freq = 0, /* zero IF */ | |
779 | .zif_swap_iq = 1, | |
c245c75c DW |
780 | .agc_min = 0x2E, |
781 | .agc_max = 0xFF, | |
782 | .agc_hold_loop = 0, | |
ea5697fe DW |
783 | }; |
784 | ||
785 | static struct max2165_config mygic_x8558pro_max2165_cfg2 = { | |
786 | .i2c_address = 0x60, | |
787 | .osc_clk = 20 | |
788 | }; | |
78db8547 IL |
789 | static struct stv0367_config netup_stv0367_config[] = { |
790 | { | |
791 | .demod_address = 0x1c, | |
792 | .xtal = 27000000, | |
793 | .if_khz = 4500, | |
794 | .if_iq_mode = 0, | |
795 | .ts_mode = 1, | |
796 | .clk_pol = 0, | |
797 | }, { | |
798 | .demod_address = 0x1d, | |
799 | .xtal = 27000000, | |
800 | .if_khz = 4500, | |
801 | .if_iq_mode = 0, | |
802 | .ts_mode = 1, | |
803 | .clk_pol = 0, | |
804 | }, | |
805 | }; | |
806 | ||
807 | static struct xc5000_config netup_xc5000_config[] = { | |
808 | { | |
809 | .i2c_address = 0x61, | |
810 | .if_khz = 4500, | |
811 | }, { | |
812 | .i2c_address = 0x64, | |
813 | .if_khz = 4500, | |
814 | }, | |
815 | }; | |
816 | ||
722c90eb SR |
817 | static struct drxk_config terratec_drxk_config[] = { |
818 | { | |
819 | .adr = 0x29, | |
820 | .no_i2c_bridge = 1, | |
821 | }, { | |
822 | .adr = 0x2a, | |
823 | .no_i2c_bridge = 1, | |
824 | }, | |
825 | }; | |
826 | ||
827 | static struct mt2063_config terratec_mt2063_config[] = { | |
828 | { | |
829 | .tuner_address = 0x60, | |
830 | }, { | |
831 | .tuner_address = 0x67, | |
832 | }, | |
833 | }; | |
834 | ||
7c62f5a1 | 835 | static const struct tda10071_config hauppauge_tda10071_config = { |
41f55d57 | 836 | .demod_i2c_addr = 0x05, |
7c62f5a1 MK |
837 | .tuner_i2c_addr = 0x54, |
838 | .i2c_wr_max = 64, | |
839 | .ts_mode = TDA10071_TS_SERIAL, | |
840 | .spec_inv = 0, | |
841 | .xtal = 40444000, /* 40.444 MHz */ | |
842 | .pll_multiplier = 20, | |
843 | }; | |
844 | ||
845 | static const struct a8293_config hauppauge_a8293_config = { | |
846 | .i2c_addr = 0x0b, | |
847 | }; | |
848 | ||
36efec48 MS |
849 | static const struct si2165_config hauppauge_hvr4400_si2165_config = { |
850 | .i2c_addr = 0x64, | |
851 | .chip_mode = SI2165_MODE_PLL_XTAL, | |
852 | .ref_freq_Hz = 16000000, | |
853 | }; | |
854 | ||
29442266 OS |
855 | static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = { |
856 | .i2c_addr = 0x68, | |
857 | .clock = 27000000, | |
858 | .i2c_wr_max = 33, | |
859 | .clock_out = 0, | |
860 | .ts_mode = M88DS3103_TS_PARALLEL, | |
861 | .ts_clk = 16000, | |
862 | .ts_clk_pol = 1, | |
863 | .lnb_en_pol = 1, | |
864 | .lnb_hv_pol = 0, | |
865 | .agc = 0x99, | |
866 | }; | |
867 | ||
ada73eee | 868 | static int netup_altera_fpga_rw(void *device, int flag, int data, int read) |
78db8547 IL |
869 | { |
870 | struct cx23885_dev *dev = (struct cx23885_dev *)device; | |
871 | unsigned long timeout = jiffies + msecs_to_jiffies(1); | |
d164460f | 872 | uint32_t mem = 0; |
78db8547 | 873 | |
d164460f | 874 | mem = cx_read(MC417_RWD); |
78db8547 IL |
875 | if (read) |
876 | cx_set(MC417_OEN, ALT_DATA); | |
877 | else { | |
878 | cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ | |
78db8547 IL |
879 | mem &= ~ALT_DATA; |
880 | mem |= (data & ALT_DATA); | |
78db8547 IL |
881 | } |
882 | ||
883 | if (flag) | |
d164460f | 884 | mem |= ALT_AD_RG; |
78db8547 | 885 | else |
d164460f | 886 | mem &= ~ALT_AD_RG; |
78db8547 | 887 | |
d164460f | 888 | mem &= ~ALT_CS; |
78db8547 | 889 | if (read) |
d164460f | 890 | mem = (mem & ~ALT_RD) | ALT_WR; |
78db8547 | 891 | else |
d164460f AO |
892 | mem = (mem & ~ALT_WR) | ALT_RD; |
893 | ||
894 | cx_write(MC417_RWD, mem); /* start RW cycle */ | |
78db8547 IL |
895 | |
896 | for (;;) { | |
897 | mem = cx_read(MC417_RWD); | |
898 | if ((mem & ALT_RDY) == 0) | |
899 | break; | |
900 | if (time_after(jiffies, timeout)) | |
901 | break; | |
902 | udelay(1); | |
903 | } | |
904 | ||
905 | cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); | |
906 | if (read) | |
907 | return mem & ALT_DATA; | |
908 | ||
909 | return 0; | |
910 | }; | |
ea5697fe | 911 | |
46b21bba JH |
912 | static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff) |
913 | { | |
914 | struct dib7000p_ops *dib7000p_ops = fe->sec_priv; | |
915 | ||
916 | return dib7000p_ops->set_gpio(fe, 8, 0, !onoff); | |
917 | } | |
918 | ||
919 | static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff) | |
920 | { | |
921 | return 0; | |
922 | } | |
923 | ||
924 | static struct dib0070_config dib7070p_dib0070_config = { | |
925 | .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, | |
926 | .reset = dib7070_tuner_reset, | |
927 | .sleep = dib7070_tuner_sleep, | |
928 | .clock_khz = 12000, | |
46b21bba JH |
929 | .freq_offset_khz_vhf = 550, |
930 | /* .flip_chip = 1, */ | |
931 | }; | |
932 | ||
933 | /* DIB7070 generic */ | |
934 | static struct dibx000_agc_config dib7070_agc_config = { | |
935 | .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, | |
936 | ||
937 | /* | |
938 | * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, | |
939 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, | |
940 | * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 | |
941 | */ | |
942 | .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | | |
943 | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), | |
944 | .inv_gain = 600, | |
945 | .time_stabiliz = 10, | |
946 | .alpha_level = 0, | |
947 | .thlock = 118, | |
948 | .wbd_inv = 0, | |
949 | .wbd_ref = 3530, | |
950 | .wbd_sel = 1, | |
951 | .wbd_alpha = 5, | |
952 | .agc1_max = 65535, | |
953 | .agc1_min = 0, | |
954 | .agc2_max = 65535, | |
955 | .agc2_min = 0, | |
956 | .agc1_pt1 = 0, | |
957 | .agc1_pt2 = 40, | |
958 | .agc1_pt3 = 183, | |
959 | .agc1_slope1 = 206, | |
960 | .agc1_slope2 = 255, | |
961 | .agc2_pt1 = 72, | |
962 | .agc2_pt2 = 152, | |
963 | .agc2_slope1 = 88, | |
964 | .agc2_slope2 = 90, | |
965 | .alpha_mant = 17, | |
966 | .alpha_exp = 27, | |
967 | .beta_mant = 23, | |
968 | .beta_exp = 51, | |
969 | .perform_agc_softsplit = 0, | |
970 | }; | |
971 | ||
972 | static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = { | |
973 | .internal = 60000, | |
974 | .sampling = 15000, | |
975 | .pll_prediv = 1, | |
976 | .pll_ratio = 20, | |
977 | .pll_range = 3, | |
978 | .pll_reset = 1, | |
979 | .pll_bypass = 0, | |
980 | .enable_refdiv = 0, | |
981 | .bypclk_div = 0, | |
982 | .IO_CLK_en_core = 1, | |
983 | .ADClkSrc = 1, | |
984 | .modulo = 2, | |
985 | /* refsel, sel, freq_15k */ | |
986 | .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), | |
987 | .ifreq = (0 << 25) | 0, | |
988 | .timf = 20452225, | |
989 | .xtal_hz = 12000000, | |
990 | }; | |
991 | ||
992 | static struct dib7000p_config dib7070p_dib7000p_config = { | |
993 | /* .output_mode = OUTMODE_MPEG2_FIFO, */ | |
994 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
995 | /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */ | |
996 | .output_mpeg2_in_188_bytes = 1, | |
997 | ||
998 | .agc_config_count = 1, | |
999 | .agc = &dib7070_agc_config, | |
1000 | .bw = &dib7070_bw_config_12_mhz, | |
1001 | .tuner_is_baseband = 1, | |
1002 | .spur_protect = 1, | |
1003 | ||
1004 | .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */ | |
1005 | .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */ | |
1006 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
1007 | ||
1008 | .hostbus_diversity = 1, | |
1009 | }; | |
1010 | ||
d19770e5 ST |
1011 | static int dvb_register(struct cx23885_tsport *port) |
1012 | { | |
8abe4a0a | 1013 | struct dib7000p_ops dib7000p_ops; |
d19770e5 | 1014 | struct cx23885_dev *dev = port->dev; |
493b7127 | 1015 | struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL; |
453afdd9 | 1016 | struct vb2_dvb_frontend *fe0, *fe1 = NULL; |
29442266 OS |
1017 | struct si2168_config si2168_config; |
1018 | struct si2157_config si2157_config; | |
24e77409 | 1019 | struct sp2_config sp2_config; |
29442266 OS |
1020 | struct m88ts2022_config m88ts2022_config; |
1021 | struct i2c_board_info info; | |
1022 | struct i2c_adapter *adapter; | |
24e77409 | 1023 | struct i2c_client *client_demod, *client_tuner, *client_ci; |
78db8547 | 1024 | int mfe_shared = 0; /* bus not shared by default */ |
5a23b076 | 1025 | int ret; |
363c35fc | 1026 | |
f972e0bd | 1027 | /* Get the first frontend */ |
453afdd9 | 1028 | fe0 = vb2_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
1029 | if (!fe0) |
1030 | return -EINVAL; | |
d19770e5 | 1031 | |
453afdd9 | 1032 | /* init struct vb2_dvb */ |
363c35fc | 1033 | fe0->dvb.name = dev->name; |
d19770e5 | 1034 | |
78db8547 IL |
1035 | /* multi-frontend gate control is undefined or defaults to fe0 */ |
1036 | port->frontends.gate = 0; | |
1037 | ||
1038 | /* Sets the gate control callback to be used by i2c command calls */ | |
1039 | port->gate_ctrl = cx23885_dvb_gate_ctrl; | |
1040 | ||
d19770e5 ST |
1041 | /* init frontend */ |
1042 | switch (dev->board) { | |
a77743bc | 1043 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 1044 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1045 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 1046 | &hauppauge_generic_config, |
f139fa71 | 1047 | &i2c_bus->i2c_adap); |
363c35fc ST |
1048 | if (fe0->dvb.frontend != NULL) { |
1049 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 1050 | &i2c_bus->i2c_adap, |
86184e06 | 1051 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
1052 | } |
1053 | break; | |
a5dbf457 | 1054 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 1055 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
a5dbf457 MK |
1056 | i2c_bus = &dev->i2c_bus[0]; |
1057 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, | |
247bc540 | 1058 | &hauppauge_lgdt3305_config, |
a5dbf457 MK |
1059 | &i2c_bus->i2c_adap); |
1060 | if (fe0->dvb.frontend != NULL) { | |
1061 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1062 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
247bc540 | 1063 | &hauppauge_hvr127x_config); |
a5dbf457 | 1064 | } |
15472faf MCC |
1065 | if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275) |
1066 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); | |
a5dbf457 | 1067 | break; |
19bc5796 | 1068 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
0ac60acb | 1069 | case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: |
19bc5796 MK |
1070 | i2c_bus = &dev->i2c_bus[0]; |
1071 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1072 | &hcw_s5h1411_config, | |
1073 | &i2c_bus->i2c_adap); | |
1074 | if (fe0->dvb.frontend != NULL) { | |
1075 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1076 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1077 | &hauppauge_tda18271_config); | |
1078 | } | |
0ac60acb DH |
1079 | |
1080 | tda18271_attach(&dev->ts1.analog_fe, | |
1081 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1082 | &hauppauge_tda18271_config); | |
1083 | ||
19bc5796 | 1084 | break; |
3ba71d21 MK |
1085 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
1086 | i2c_bus = &dev->i2c_bus[0]; | |
92abe9ee | 1087 | switch (alt_tuner) { |
3ba71d21 | 1088 | case 1: |
363c35fc | 1089 | fe0->dvb.frontend = |
3ba71d21 MK |
1090 | dvb_attach(s5h1409_attach, |
1091 | &hauppauge_ezqam_config, | |
1092 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1093 | if (fe0->dvb.frontend != NULL) { |
1094 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
3ba71d21 | 1095 | &dev->i2c_bus[1].i2c_adap, 0x42, |
4041f1a5 | 1096 | &tda829x_no_probe); |
363c35fc | 1097 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
4041f1a5 | 1098 | 0x60, &dev->i2c_bus[1].i2c_adap, |
f21e0d7f | 1099 | &hauppauge_tda18271_config); |
3ba71d21 MK |
1100 | } |
1101 | break; | |
1102 | case 0: | |
1103 | default: | |
363c35fc | 1104 | fe0->dvb.frontend = |
3ba71d21 MK |
1105 | dvb_attach(s5h1409_attach, |
1106 | &hauppauge_generic_config, | |
1107 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1108 | if (fe0->dvb.frontend != NULL) |
1109 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
3ba71d21 MK |
1110 | &i2c_bus->i2c_adap, |
1111 | &hauppauge_generic_tunerconfig, 0); | |
1112 | break; | |
1113 | } | |
1114 | break; | |
fc959bef | 1115 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 1116 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1117 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
fc959bef | 1118 | &hauppauge_hvr1800lp_config, |
f139fa71 | 1119 | &i2c_bus->i2c_adap); |
363c35fc ST |
1120 | if (fe0->dvb.frontend != NULL) { |
1121 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 1122 | &i2c_bus->i2c_adap, |
fc959bef ST |
1123 | &hauppauge_generic_tunerconfig, 0); |
1124 | } | |
1125 | break; | |
9bc37caa | 1126 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 1127 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1128 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
9bc37caa | 1129 | &fusionhdtv_5_express, |
f139fa71 | 1130 | &i2c_bus->i2c_adap); |
363c35fc ST |
1131 | if (fe0->dvb.frontend != NULL) { |
1132 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
827855d3 MK |
1133 | &i2c_bus->i2c_adap, 0x61, |
1134 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
1135 | } |
1136 | break; | |
d1987d55 ST |
1137 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
1138 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 1139 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
d1987d55 ST |
1140 | &hauppauge_hvr1500q_config, |
1141 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc ST |
1142 | if (fe0->dvb.frontend != NULL) |
1143 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
1144 | &i2c_bus->i2c_adap, |
1145 | &hauppauge_hvr1500q_tunerconfig); | |
d1987d55 | 1146 | break; |
07b4a835 MK |
1147 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
1148 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 1149 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
07b4a835 MK |
1150 | &hauppauge_hvr1500_config, |
1151 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc | 1152 | if (fe0->dvb.frontend != NULL) { |
07b4a835 MK |
1153 | struct dvb_frontend *fe; |
1154 | struct xc2028_config cfg = { | |
1155 | .i2c_adap = &i2c_bus->i2c_adap, | |
1156 | .i2c_addr = 0x61, | |
07b4a835 MK |
1157 | }; |
1158 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1159 | .fname = XC2028_DEFAULT_FIRMWARE, |
07b4a835 | 1160 | .max_len = 64, |
52c3d29c | 1161 | .demod = XC3028_FE_OREN538, |
07b4a835 MK |
1162 | }; |
1163 | ||
1164 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 1165 | fe0->dvb.frontend, &cfg); |
07b4a835 MK |
1166 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
1167 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1168 | } | |
1169 | break; | |
b3ea0166 | 1170 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 1171 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 | 1172 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1173 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
b3ea0166 ST |
1174 | &hauppauge_hvr1200_config, |
1175 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1176 | if (fe0->dvb.frontend != NULL) { |
1177 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
b3ea0166 ST |
1178 | &dev->i2c_bus[1].i2c_adap, 0x42, |
1179 | &tda829x_no_probe); | |
363c35fc | 1180 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
b3ea0166 ST |
1181 | 0x60, &dev->i2c_bus[1].i2c_adap, |
1182 | &hauppauge_hvr1200_tuner_config); | |
6b926eca MK |
1183 | } |
1184 | break; | |
1185 | case CX23885_BOARD_HAUPPAUGE_HVR1210: | |
1186 | i2c_bus = &dev->i2c_bus[0]; | |
1187 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1188 | &hauppauge_hvr1210_config, | |
1189 | &i2c_bus->i2c_adap); | |
1190 | if (fe0->dvb.frontend != NULL) { | |
1191 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1192 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1193 | &hauppauge_hvr1210_tuner_config); | |
b3ea0166 ST |
1194 | } |
1195 | break; | |
66762373 ST |
1196 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
1197 | i2c_bus = &dev->i2c_bus[0]; | |
8abe4a0a MCC |
1198 | |
1199 | if (!dvb_attach(dib7000p_attach, &dib7000p_ops)) | |
1200 | return -ENODEV; | |
1201 | ||
1202 | fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, | |
66762373 | 1203 | 0x12, &hauppauge_hvr1400_dib7000_config); |
363c35fc | 1204 | if (fe0->dvb.frontend != NULL) { |
66762373 ST |
1205 | struct dvb_frontend *fe; |
1206 | struct xc2028_config cfg = { | |
1207 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
1208 | .i2c_addr = 0x64, | |
66762373 ST |
1209 | }; |
1210 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1211 | .fname = XC3028L_DEFAULT_FIRMWARE, |
66762373 | 1212 | .max_len = 64, |
9bed77ee | 1213 | .demod = XC3028_FE_DIBCOM52, |
9c8ced51 ST |
1214 | /* This is true for all demods with |
1215 | v36 firmware? */ | |
0975fc68 | 1216 | .type = XC2028_D2633, |
66762373 ST |
1217 | }; |
1218 | ||
1219 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 1220 | fe0->dvb.frontend, &cfg); |
66762373 ST |
1221 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
1222 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1223 | } | |
1224 | break; | |
335377b7 MK |
1225 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
1226 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
1227 | ||
363c35fc | 1228 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
335377b7 MK |
1229 | &dvico_s5h1409_config, |
1230 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1231 | if (fe0->dvb.frontend == NULL) |
1232 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
52b50450 MK |
1233 | &dvico_s5h1411_config, |
1234 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1235 | if (fe0->dvb.frontend != NULL) |
1236 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
1237 | &i2c_bus->i2c_adap, |
1238 | &dvico_xc5000_tunerconfig); | |
335377b7 | 1239 | break; |
aef2d186 ST |
1240 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { |
1241 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
1242 | ||
363c35fc | 1243 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
aef2d186 ST |
1244 | &dvico_fusionhdtv_xc3028, |
1245 | &i2c_bus->i2c_adap); | |
363c35fc | 1246 | if (fe0->dvb.frontend != NULL) { |
aef2d186 ST |
1247 | struct dvb_frontend *fe; |
1248 | struct xc2028_config cfg = { | |
1249 | .i2c_adap = &i2c_bus->i2c_adap, | |
1250 | .i2c_addr = 0x61, | |
aef2d186 ST |
1251 | }; |
1252 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1253 | .fname = XC2028_DEFAULT_FIRMWARE, |
aef2d186 ST |
1254 | .max_len = 64, |
1255 | .demod = XC3028_FE_ZARLINK456, | |
1256 | }; | |
1257 | ||
363c35fc | 1258 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
aef2d186 ST |
1259 | &cfg); |
1260 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
1261 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1262 | } | |
1263 | break; | |
46b21bba JH |
1264 | } |
1265 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: { | |
1266 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
1267 | /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */ | |
1268 | /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */ | |
1269 | ||
1270 | if (!dvb_attach(dib7000p_attach, &dib7000p_ops)) | |
1271 | return -ENODEV; | |
1272 | ||
1273 | if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) { | |
1274 | printk(KERN_WARNING "Unable to enumerate dib7000p\n"); | |
1275 | return -ENODEV; | |
1276 | } | |
1277 | fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config); | |
1278 | if (fe0->dvb.frontend != NULL) { | |
1279 | struct i2c_adapter *tun_i2c; | |
1280 | ||
1281 | fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL); | |
1282 | memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops)); | |
1283 | tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1); | |
1284 | if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config)) | |
1285 | return -ENODEV; | |
1286 | } | |
1287 | break; | |
aef2d186 | 1288 | } |
4c56b04a | 1289 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
9bb1b7e8 | 1290 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
34e383dd | 1291 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
4c56b04a ST |
1292 | i2c_bus = &dev->i2c_bus[0]; |
1293 | ||
363c35fc | 1294 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
4c56b04a ST |
1295 | &dvico_fusionhdtv_xc3028, |
1296 | &i2c_bus->i2c_adap); | |
363c35fc | 1297 | if (fe0->dvb.frontend != NULL) { |
4c56b04a ST |
1298 | struct dvb_frontend *fe; |
1299 | struct xc2028_config cfg = { | |
1300 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
1301 | .i2c_addr = 0x61, | |
4c56b04a ST |
1302 | }; |
1303 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1304 | .fname = XC2028_DEFAULT_FIRMWARE, |
4c56b04a ST |
1305 | .max_len = 64, |
1306 | .demod = XC3028_FE_ZARLINK456, | |
1307 | }; | |
1308 | ||
363c35fc | 1309 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
4c56b04a ST |
1310 | &cfg); |
1311 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
1312 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1313 | } | |
96318d0c | 1314 | break; |
0cf8af57 | 1315 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: |
1316 | i2c_bus = &dev->i2c_bus[0]; | |
1317 | ||
1318 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1319 | &dvico_fusionhdtv_xc3028, | |
1320 | &i2c_bus->i2c_adap); | |
1321 | if (fe0->dvb.frontend != NULL) { | |
1322 | struct dvb_frontend *fe; | |
1323 | struct xc4000_config cfg = { | |
1324 | .i2c_address = 0x61, | |
1325 | .default_pm = 0, | |
1326 | .dvb_amplitude = 134, | |
1327 | .set_smoothedcvbs = 1, | |
1328 | .if_khz = 4560 | |
1329 | }; | |
1330 | ||
1331 | fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, | |
1332 | &dev->i2c_bus[1].i2c_adap, &cfg); | |
a7c8aada MS |
1333 | if (!fe) { |
1334 | printk(KERN_ERR "%s/2: xc4000 attach failed\n", | |
1335 | dev->name); | |
1336 | goto frontend_detach; | |
1337 | } | |
0cf8af57 | 1338 | } |
1339 | break; | |
96318d0c | 1340 | case CX23885_BOARD_TBS_6920: |
09ea33e5 | 1341 | i2c_bus = &dev->i2c_bus[1]; |
96318d0c IL |
1342 | |
1343 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
09ea33e5 IL |
1344 | &tbs_cx24116_config, |
1345 | &i2c_bus->i2c_adap); | |
96318d0c | 1346 | if (fe0->dvb.frontend != NULL) |
09ea33e5 | 1347 | fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; |
96318d0c | 1348 | |
579943f5 | 1349 | break; |
e6001482 LA |
1350 | case CX23885_BOARD_TBS_6980: |
1351 | case CX23885_BOARD_TBS_6981: | |
1352 | i2c_bus = &dev->i2c_bus[1]; | |
1353 | ||
1354 | switch (port->nr) { | |
1355 | /* PORT B */ | |
1356 | case 1: | |
1357 | fe0->dvb.frontend = dvb_attach(cx24117_attach, | |
1358 | &tbs_cx24117_config, | |
d10e8280 | 1359 | &i2c_bus->i2c_adap); |
e6001482 LA |
1360 | break; |
1361 | /* PORT C */ | |
1362 | case 2: | |
e6001482 LA |
1363 | fe0->dvb.frontend = dvb_attach(cx24117_attach, |
1364 | &tbs_cx24117_config, | |
d10e8280 | 1365 | &i2c_bus->i2c_adap); |
e6001482 LA |
1366 | break; |
1367 | } | |
1368 | break; | |
579943f5 IL |
1369 | case CX23885_BOARD_TEVII_S470: |
1370 | i2c_bus = &dev->i2c_bus[1]; | |
1371 | ||
09ea33e5 IL |
1372 | fe0->dvb.frontend = dvb_attach(ds3000_attach, |
1373 | &tevii_ds3000_config, | |
1374 | &i2c_bus->i2c_adap); | |
73f0af44 KD |
1375 | if (fe0->dvb.frontend != NULL) { |
1376 | dvb_attach(ts2020_attach, fe0->dvb.frontend, | |
1377 | &tevii_ts2020_config, &i2c_bus->i2c_adap); | |
09ea33e5 | 1378 | fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; |
73f0af44 | 1379 | } |
579943f5 | 1380 | |
4c56b04a | 1381 | break; |
c9b8b04b IL |
1382 | case CX23885_BOARD_DVBWORLD_2005: |
1383 | i2c_bus = &dev->i2c_bus[1]; | |
1384 | ||
1385 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
1386 | &dvbworld_cx24116_config, | |
1387 | &i2c_bus->i2c_adap); | |
1388 | break; | |
5a23b076 IL |
1389 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
1390 | i2c_bus = &dev->i2c_bus[0]; | |
1391 | switch (port->nr) { | |
1392 | /* port B */ | |
1393 | case 1: | |
1394 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
1395 | &netup_stv0900_config, | |
1396 | &i2c_bus->i2c_adap, 0); | |
1397 | if (fe0->dvb.frontend != NULL) { | |
1398 | if (dvb_attach(stv6110_attach, | |
1399 | fe0->dvb.frontend, | |
1400 | &netup_stv6110_tunerconfig_a, | |
1401 | &i2c_bus->i2c_adap)) { | |
1402 | if (!dvb_attach(lnbh24_attach, | |
1403 | fe0->dvb.frontend, | |
1404 | &i2c_bus->i2c_adap, | |
9329fb5b AO |
1405 | LNBH24_PCL | LNBH24_TTX, |
1406 | LNBH24_TEN, 0x09)) | |
5a23b076 IL |
1407 | printk(KERN_ERR |
1408 | "No LNBH24 found!\n"); | |
1409 | ||
1410 | } | |
1411 | } | |
1412 | break; | |
1413 | /* port C */ | |
1414 | case 2: | |
1415 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
1416 | &netup_stv0900_config, | |
1417 | &i2c_bus->i2c_adap, 1); | |
1418 | if (fe0->dvb.frontend != NULL) { | |
1419 | if (dvb_attach(stv6110_attach, | |
1420 | fe0->dvb.frontend, | |
1421 | &netup_stv6110_tunerconfig_b, | |
1422 | &i2c_bus->i2c_adap)) { | |
1423 | if (!dvb_attach(lnbh24_attach, | |
1424 | fe0->dvb.frontend, | |
1425 | &i2c_bus->i2c_adap, | |
9329fb5b AO |
1426 | LNBH24_PCL | LNBH24_TTX, |
1427 | LNBH24_TEN, 0x0a)) | |
5a23b076 IL |
1428 | printk(KERN_ERR |
1429 | "No LNBH24 found!\n"); | |
1430 | ||
1431 | } | |
1432 | } | |
1433 | break; | |
1434 | } | |
1435 | break; | |
493b7127 DW |
1436 | case CX23885_BOARD_MYGICA_X8506: |
1437 | i2c_bus = &dev->i2c_bus[0]; | |
1438 | i2c_bus2 = &dev->i2c_bus[1]; | |
1439 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
1440 | &mygica_x8506_lgs8gl5_config, | |
1441 | &i2c_bus->i2c_adap); | |
1442 | if (fe0->dvb.frontend != NULL) { | |
1443 | dvb_attach(xc5000_attach, | |
1444 | fe0->dvb.frontend, | |
1445 | &i2c_bus2->i2c_adap, | |
1446 | &mygica_x8506_xc5000_config); | |
1447 | } | |
15472faf | 1448 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); |
493b7127 | 1449 | break; |
0d1b5265 MCC |
1450 | case CX23885_BOARD_MYGICA_X8507: |
1451 | i2c_bus = &dev->i2c_bus[0]; | |
1452 | i2c_bus2 = &dev->i2c_bus[1]; | |
1453 | fe0->dvb.frontend = dvb_attach(mb86a20s_attach, | |
1454 | &mygica_x8507_mb86a20s_config, | |
1455 | &i2c_bus->i2c_adap); | |
1456 | if (fe0->dvb.frontend != NULL) { | |
1457 | dvb_attach(xc5000_attach, | |
1458 | fe0->dvb.frontend, | |
1459 | &i2c_bus2->i2c_adap, | |
1460 | &mygica_x8507_xc5000_config); | |
1461 | } | |
1462 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); | |
1463 | break; | |
2365b2d3 DW |
1464 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
1465 | i2c_bus = &dev->i2c_bus[0]; | |
1466 | i2c_bus2 = &dev->i2c_bus[1]; | |
1467 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
1468 | &magicpro_prohdtve2_lgs8g75_config, | |
1469 | &i2c_bus->i2c_adap); | |
1470 | if (fe0->dvb.frontend != NULL) { | |
1471 | dvb_attach(xc5000_attach, | |
1472 | fe0->dvb.frontend, | |
1473 | &i2c_bus2->i2c_adap, | |
1474 | &magicpro_prohdtve2_xc5000_config); | |
1475 | } | |
15472faf | 1476 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); |
2365b2d3 | 1477 | break; |
13697380 | 1478 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
35045137 ST |
1479 | i2c_bus = &dev->i2c_bus[0]; |
1480 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1481 | &hcw_s5h1411_config, | |
1482 | &i2c_bus->i2c_adap); | |
1483 | if (fe0->dvb.frontend != NULL) | |
1484 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1485 | 0x60, &dev->i2c_bus[0].i2c_adap, | |
1486 | &hauppauge_tda18271_config); | |
1487 | ||
1488 | tda18271_attach(&dev->ts1.analog_fe, | |
1489 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1490 | &hauppauge_tda18271_config); | |
1491 | ||
1492 | break; | |
aee0b24c | 1493 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
13697380 ST |
1494 | i2c_bus = &dev->i2c_bus[0]; |
1495 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1496 | &hcw_s5h1411_config, | |
1497 | &i2c_bus->i2c_adap); | |
1498 | if (fe0->dvb.frontend != NULL) | |
1499 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1500 | 0x60, &dev->i2c_bus[0].i2c_adap, | |
1501 | &hauppauge_tda18271_config); | |
1502 | break; | |
ea5697fe DW |
1503 | case CX23885_BOARD_MYGICA_X8558PRO: |
1504 | switch (port->nr) { | |
1505 | /* port B */ | |
1506 | case 1: | |
1507 | i2c_bus = &dev->i2c_bus[0]; | |
1508 | fe0->dvb.frontend = dvb_attach(atbm8830_attach, | |
1509 | &mygica_x8558pro_atbm8830_cfg1, | |
1510 | &i2c_bus->i2c_adap); | |
1511 | if (fe0->dvb.frontend != NULL) { | |
1512 | dvb_attach(max2165_attach, | |
1513 | fe0->dvb.frontend, | |
1514 | &i2c_bus->i2c_adap, | |
1515 | &mygic_x8558pro_max2165_cfg1); | |
1516 | } | |
1517 | break; | |
1518 | /* port C */ | |
1519 | case 2: | |
1520 | i2c_bus = &dev->i2c_bus[1]; | |
1521 | fe0->dvb.frontend = dvb_attach(atbm8830_attach, | |
1522 | &mygica_x8558pro_atbm8830_cfg2, | |
1523 | &i2c_bus->i2c_adap); | |
1524 | if (fe0->dvb.frontend != NULL) { | |
1525 | dvb_attach(max2165_attach, | |
1526 | fe0->dvb.frontend, | |
1527 | &i2c_bus->i2c_adap, | |
1528 | &mygic_x8558pro_max2165_cfg2); | |
1529 | } | |
1530 | break; | |
1531 | } | |
1532 | break; | |
78db8547 IL |
1533 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
1534 | i2c_bus = &dev->i2c_bus[0]; | |
1535 | mfe_shared = 1;/* MFE */ | |
1536 | port->frontends.gate = 0;/* not clear for me yet */ | |
1537 | /* ports B, C */ | |
1538 | /* MFE frontend 1 DVB-T */ | |
1539 | fe0->dvb.frontend = dvb_attach(stv0367ter_attach, | |
1540 | &netup_stv0367_config[port->nr - 1], | |
1541 | &i2c_bus->i2c_adap); | |
4174ebf5 | 1542 | if (fe0->dvb.frontend != NULL) { |
78db8547 IL |
1543 | if (NULL == dvb_attach(xc5000_attach, |
1544 | fe0->dvb.frontend, | |
1545 | &i2c_bus->i2c_adap, | |
1546 | &netup_xc5000_config[port->nr - 1])) | |
1547 | goto frontend_detach; | |
4174ebf5 AO |
1548 | /* load xc5000 firmware */ |
1549 | fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend); | |
1550 | } | |
78db8547 | 1551 | /* MFE frontend 2 */ |
453afdd9 | 1552 | fe1 = vb2_dvb_get_frontend(&port->frontends, 2); |
78db8547 IL |
1553 | if (fe1 == NULL) |
1554 | goto frontend_detach; | |
1555 | /* DVB-C init */ | |
1556 | fe1->dvb.frontend = dvb_attach(stv0367cab_attach, | |
1557 | &netup_stv0367_config[port->nr - 1], | |
1558 | &i2c_bus->i2c_adap); | |
1559 | if (fe1->dvb.frontend != NULL) { | |
1560 | fe1->dvb.frontend->id = 1; | |
1561 | if (NULL == dvb_attach(xc5000_attach, | |
1562 | fe1->dvb.frontend, | |
1563 | &i2c_bus->i2c_adap, | |
1564 | &netup_xc5000_config[port->nr - 1])) | |
1565 | goto frontend_detach; | |
1566 | } | |
1567 | break; | |
722c90eb SR |
1568 | case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: |
1569 | i2c_bus = &dev->i2c_bus[0]; | |
1570 | i2c_bus2 = &dev->i2c_bus[1]; | |
1571 | ||
1572 | switch (port->nr) { | |
1573 | /* port b */ | |
1574 | case 1: | |
1575 | fe0->dvb.frontend = dvb_attach(drxk_attach, | |
1576 | &terratec_drxk_config[0], | |
1577 | &i2c_bus->i2c_adap); | |
1578 | if (fe0->dvb.frontend != NULL) { | |
1579 | if (!dvb_attach(mt2063_attach, | |
1580 | fe0->dvb.frontend, | |
1581 | &terratec_mt2063_config[0], | |
1582 | &i2c_bus2->i2c_adap)) | |
1583 | goto frontend_detach; | |
1584 | } | |
1585 | break; | |
1586 | /* port c */ | |
1587 | case 2: | |
1588 | fe0->dvb.frontend = dvb_attach(drxk_attach, | |
1589 | &terratec_drxk_config[1], | |
1590 | &i2c_bus->i2c_adap); | |
1591 | if (fe0->dvb.frontend != NULL) { | |
1592 | if (!dvb_attach(mt2063_attach, | |
1593 | fe0->dvb.frontend, | |
1594 | &terratec_mt2063_config[1], | |
1595 | &i2c_bus2->i2c_adap)) | |
1596 | goto frontend_detach; | |
1597 | } | |
1598 | break; | |
1599 | } | |
1600 | break; | |
7b134e85 IL |
1601 | case CX23885_BOARD_TEVII_S471: |
1602 | i2c_bus = &dev->i2c_bus[1]; | |
1603 | ||
1604 | fe0->dvb.frontend = dvb_attach(ds3000_attach, | |
1605 | &tevii_ds3000_config, | |
1606 | &i2c_bus->i2c_adap); | |
b43ea806 JK |
1607 | if (fe0->dvb.frontend != NULL) { |
1608 | dvb_attach(ts2020_attach, fe0->dvb.frontend, | |
1609 | &tevii_ts2020_config, &i2c_bus->i2c_adap); | |
1610 | } | |
7b134e85 | 1611 | break; |
f667190b MB |
1612 | case CX23885_BOARD_PROF_8000: |
1613 | i2c_bus = &dev->i2c_bus[0]; | |
1614 | ||
1615 | fe0->dvb.frontend = dvb_attach(stv090x_attach, | |
1616 | &prof_8000_stv090x_config, | |
1617 | &i2c_bus->i2c_adap, | |
1618 | STV090x_DEMODULATOR_0); | |
1619 | if (fe0->dvb.frontend != NULL) { | |
1620 | if (!dvb_attach(stb6100_attach, | |
1621 | fe0->dvb.frontend, | |
1622 | &prof_8000_stb6100_config, | |
1623 | &i2c_bus->i2c_adap)) | |
1624 | goto frontend_detach; | |
1625 | ||
1626 | fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; | |
1627 | } | |
1628 | break; | |
7c62f5a1 MK |
1629 | case CX23885_BOARD_HAUPPAUGE_HVR4400: |
1630 | i2c_bus = &dev->i2c_bus[0]; | |
36efec48 MS |
1631 | i2c_bus2 = &dev->i2c_bus[1]; |
1632 | switch (port->nr) { | |
1633 | /* port b */ | |
1634 | case 1: | |
1635 | fe0->dvb.frontend = dvb_attach(tda10071_attach, | |
7c62f5a1 MK |
1636 | &hauppauge_tda10071_config, |
1637 | &i2c_bus->i2c_adap); | |
36efec48 MS |
1638 | if (fe0->dvb.frontend != NULL) { |
1639 | if (!dvb_attach(a8293_attach, fe0->dvb.frontend, | |
1640 | &i2c_bus->i2c_adap, | |
1641 | &hauppauge_a8293_config)) | |
1642 | goto frontend_detach; | |
1643 | } | |
1644 | break; | |
1645 | /* port c */ | |
1646 | case 2: | |
1647 | fe0->dvb.frontend = dvb_attach(si2165_attach, | |
1648 | &hauppauge_hvr4400_si2165_config, | |
1649 | &i2c_bus->i2c_adap); | |
1650 | if (fe0->dvb.frontend != NULL) { | |
711c3119 | 1651 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; |
36efec48 MS |
1652 | if (!dvb_attach(tda18271_attach, |
1653 | fe0->dvb.frontend, | |
1654 | 0x60, &i2c_bus2->i2c_adap, | |
1655 | &hauppauge_hvr4400_tuner_config)) | |
1656 | goto frontend_detach; | |
1657 | } | |
1658 | break; | |
7c62f5a1 MK |
1659 | } |
1660 | break; | |
29442266 OS |
1661 | case CX23885_BOARD_DVBSKY_T9580: |
1662 | i2c_bus = &dev->i2c_bus[0]; | |
1663 | i2c_bus2 = &dev->i2c_bus[1]; | |
1664 | switch (port->nr) { | |
1665 | /* port b - satellite */ | |
1666 | case 1: | |
1667 | /* attach frontend */ | |
1668 | fe0->dvb.frontend = dvb_attach(m88ds3103_attach, | |
1669 | &dvbsky_t9580_m88ds3103_config, | |
1670 | &i2c_bus2->i2c_adap, &adapter); | |
1671 | if (fe0->dvb.frontend == NULL) | |
1672 | break; | |
1673 | ||
1674 | /* attach tuner */ | |
143800a5 | 1675 | memset(&m88ts2022_config, 0, sizeof(m88ts2022_config)); |
29442266 OS |
1676 | m88ts2022_config.fe = fe0->dvb.frontend; |
1677 | m88ts2022_config.clock = 27000000; | |
1678 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1679 | strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE); | |
1680 | info.addr = 0x60; | |
1681 | info.platform_data = &m88ts2022_config; | |
1682 | request_module(info.type); | |
1683 | client_tuner = i2c_new_device(adapter, &info); | |
1684 | if (client_tuner == NULL || | |
1685 | client_tuner->dev.driver == NULL) | |
1686 | goto frontend_detach; | |
1687 | if (!try_module_get(client_tuner->dev.driver->owner)) { | |
1688 | i2c_unregister_device(client_tuner); | |
1689 | goto frontend_detach; | |
1690 | } | |
1691 | ||
1692 | /* delegate signal strength measurement to tuner */ | |
1693 | fe0->dvb.frontend->ops.read_signal_strength = | |
1694 | fe0->dvb.frontend->ops.tuner_ops.get_rf_strength; | |
1695 | ||
1696 | /* | |
1697 | * for setting the voltage we need to set GPIOs on | |
1698 | * the card. | |
1699 | */ | |
1700 | port->fe_set_voltage = | |
1701 | fe0->dvb.frontend->ops.set_voltage; | |
1702 | fe0->dvb.frontend->ops.set_voltage = | |
1703 | dvbsky_t9580_set_voltage; | |
1704 | ||
1705 | port->i2c_client_tuner = client_tuner; | |
1706 | ||
1707 | break; | |
1708 | /* port c - terrestrial/cable */ | |
1709 | case 2: | |
1710 | /* attach frontend */ | |
143800a5 | 1711 | memset(&si2168_config, 0, sizeof(si2168_config)); |
29442266 OS |
1712 | si2168_config.i2c_adapter = &adapter; |
1713 | si2168_config.fe = &fe0->dvb.frontend; | |
1714 | si2168_config.ts_mode = SI2168_TS_SERIAL; | |
1715 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1716 | strlcpy(info.type, "si2168", I2C_NAME_SIZE); | |
1717 | info.addr = 0x64; | |
1718 | info.platform_data = &si2168_config; | |
1719 | request_module(info.type); | |
1720 | client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); | |
1721 | if (client_demod == NULL || | |
1722 | client_demod->dev.driver == NULL) | |
1723 | goto frontend_detach; | |
1724 | if (!try_module_get(client_demod->dev.driver->owner)) { | |
1725 | i2c_unregister_device(client_demod); | |
1726 | goto frontend_detach; | |
1727 | } | |
1728 | port->i2c_client_demod = client_demod; | |
1729 | ||
1730 | /* attach tuner */ | |
143800a5 | 1731 | memset(&si2157_config, 0, sizeof(si2157_config)); |
29442266 OS |
1732 | si2157_config.fe = fe0->dvb.frontend; |
1733 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1734 | strlcpy(info.type, "si2157", I2C_NAME_SIZE); | |
1735 | info.addr = 0x60; | |
1736 | info.platform_data = &si2157_config; | |
1737 | request_module(info.type); | |
1738 | client_tuner = i2c_new_device(adapter, &info); | |
1739 | if (client_tuner == NULL || | |
1740 | client_tuner->dev.driver == NULL) { | |
1741 | module_put(client_demod->dev.driver->owner); | |
1742 | i2c_unregister_device(client_demod); | |
1743 | goto frontend_detach; | |
1744 | } | |
1745 | if (!try_module_get(client_tuner->dev.driver->owner)) { | |
1746 | i2c_unregister_device(client_tuner); | |
1747 | module_put(client_demod->dev.driver->owner); | |
1748 | i2c_unregister_device(client_demod); | |
1749 | goto frontend_detach; | |
1750 | } | |
1751 | port->i2c_client_tuner = client_tuner; | |
1752 | break; | |
1753 | } | |
1754 | break; | |
82c10276 OS |
1755 | case CX23885_BOARD_DVBSKY_T980C: |
1756 | i2c_bus = &dev->i2c_bus[1]; | |
24e77409 | 1757 | i2c_bus2 = &dev->i2c_bus[0]; |
82c10276 OS |
1758 | |
1759 | /* attach frontend */ | |
1760 | memset(&si2168_config, 0, sizeof(si2168_config)); | |
1761 | si2168_config.i2c_adapter = &adapter; | |
1762 | si2168_config.fe = &fe0->dvb.frontend; | |
1763 | si2168_config.ts_mode = SI2168_TS_PARALLEL; | |
1764 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1765 | strlcpy(info.type, "si2168", I2C_NAME_SIZE); | |
1766 | info.addr = 0x64; | |
1767 | info.platform_data = &si2168_config; | |
1768 | request_module(info.type); | |
1769 | client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); | |
1770 | if (client_demod == NULL || | |
1771 | client_demod->dev.driver == NULL) | |
1772 | goto frontend_detach; | |
1773 | if (!try_module_get(client_demod->dev.driver->owner)) { | |
1774 | i2c_unregister_device(client_demod); | |
1775 | goto frontend_detach; | |
1776 | } | |
1777 | port->i2c_client_demod = client_demod; | |
1778 | ||
1779 | /* attach tuner */ | |
1780 | memset(&si2157_config, 0, sizeof(si2157_config)); | |
1781 | si2157_config.fe = fe0->dvb.frontend; | |
1782 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1783 | strlcpy(info.type, "si2157", I2C_NAME_SIZE); | |
1784 | info.addr = 0x60; | |
1785 | info.platform_data = &si2157_config; | |
1786 | request_module(info.type); | |
1787 | client_tuner = i2c_new_device(adapter, &info); | |
1788 | if (client_tuner == NULL || | |
1789 | client_tuner->dev.driver == NULL) { | |
1790 | module_put(client_demod->dev.driver->owner); | |
1791 | i2c_unregister_device(client_demod); | |
1792 | goto frontend_detach; | |
1793 | } | |
1794 | if (!try_module_get(client_tuner->dev.driver->owner)) { | |
1795 | i2c_unregister_device(client_tuner); | |
1796 | module_put(client_demod->dev.driver->owner); | |
1797 | i2c_unregister_device(client_demod); | |
1798 | goto frontend_detach; | |
1799 | } | |
1800 | port->i2c_client_tuner = client_tuner; | |
1801 | break; | |
d19770e5 | 1802 | default: |
9c8ced51 ST |
1803 | printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " |
1804 | " isn't supported yet\n", | |
d19770e5 ST |
1805 | dev->name); |
1806 | break; | |
1807 | } | |
78db8547 IL |
1808 | |
1809 | if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) { | |
9c8ced51 | 1810 | printk(KERN_ERR "%s: frontend initialization failed\n", |
78db8547 IL |
1811 | dev->name); |
1812 | goto frontend_detach; | |
d19770e5 | 1813 | } |
78db8547 | 1814 | |
d7cba043 | 1815 | /* define general-purpose callback pointer */ |
363c35fc | 1816 | fe0->dvb.frontend->callback = cx23885_tuner_callback; |
78db8547 IL |
1817 | if (fe1) |
1818 | fe1->dvb.frontend->callback = cx23885_tuner_callback; | |
1819 | #if 0 | |
1820 | /* Ensure all frontends negotiate bus access */ | |
1821 | fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl; | |
1822 | if (fe1) | |
1823 | fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl; | |
1824 | #endif | |
d19770e5 ST |
1825 | |
1826 | /* Put the analog decoder in standby to keep it quiet */ | |
622b828a | 1827 | call_all(dev, core, s_power, 0); |
d19770e5 | 1828 | |
363c35fc ST |
1829 | if (fe0->dvb.frontend->ops.analog_ops.standby) |
1830 | fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); | |
3ba71d21 | 1831 | |
d19770e5 | 1832 | /* register everything */ |
453afdd9 | 1833 | ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port, |
9adf6132 | 1834 | &dev->pci->dev, adapter_nr, mfe_shared); |
bee30192 | 1835 | if (ret) |
78db8547 | 1836 | goto frontend_detach; |
363c35fc | 1837 | |
5a23b076 IL |
1838 | /* init CI & MAC */ |
1839 | switch (dev->board) { | |
1840 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { | |
1841 | static struct netup_card_info cinfo; | |
1842 | ||
1843 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); | |
1844 | memcpy(port->frontends.adapter.proposed_mac, | |
1845 | cinfo.port[port->nr - 1].mac, 6); | |
be395157 | 1846 | printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", |
1847 | port->nr, port->frontends.adapter.proposed_mac); | |
5a23b076 IL |
1848 | |
1849 | netup_ci_init(port); | |
1850 | break; | |
1851 | } | |
78db8547 IL |
1852 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { |
1853 | struct altera_ci_config netup_ci_cfg = { | |
1854 | .dev = dev,/* magic number to identify*/ | |
1855 | .adapter = &port->frontends.adapter,/* for CI */ | |
1856 | .demux = &fe0->dvb.demux,/* for hw pid filter */ | |
1857 | .fpga_rw = netup_altera_fpga_rw, | |
1858 | }; | |
1859 | ||
1860 | altera_ci_init(&netup_ci_cfg, port->nr); | |
1861 | break; | |
1862 | } | |
16bfdaa4 PG |
1863 | case CX23885_BOARD_TEVII_S470: { |
1864 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1865 | ||
1866 | if (port->nr != 1) | |
1867 | break; | |
1868 | ||
1869 | /* Read entire EEPROM */ | |
1870 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1871 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); | |
5cac1f66 | 1872 | printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0); |
16bfdaa4 PG |
1873 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); |
1874 | break; | |
1875 | } | |
29442266 OS |
1876 | case CX23885_BOARD_DVBSKY_T9580: { |
1877 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1878 | ||
1879 | if (port->nr > 2) | |
1880 | break; | |
1881 | ||
1882 | /* Read entire EEPROM */ | |
1883 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1884 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, | |
1885 | sizeof(eeprom)); | |
1886 | printk(KERN_INFO "DVBSky T9580 port %d MAC address: %pM\n", | |
1887 | port->nr, eeprom + 0xc0 + (port->nr-1) * 8); | |
1888 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + | |
1889 | (port->nr-1) * 8, 6); | |
1890 | break; | |
1891 | } | |
82c10276 OS |
1892 | case CX23885_BOARD_DVBSKY_T980C: { |
1893 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1894 | ||
24e77409 OS |
1895 | /* attach CI */ |
1896 | memset(&sp2_config, 0, sizeof(sp2_config)); | |
1897 | sp2_config.dvb_adap = &port->frontends.adapter; | |
1898 | sp2_config.priv = port; | |
1899 | sp2_config.ci_control = cx23885_sp2_ci_ctrl; | |
1900 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1901 | strlcpy(info.type, "sp2", I2C_NAME_SIZE); | |
1902 | info.addr = 0x40; | |
1903 | info.platform_data = &sp2_config; | |
1904 | request_module(info.type); | |
1905 | client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info); | |
1906 | if (client_ci == NULL || | |
1907 | client_ci->dev.driver == NULL) { | |
1908 | module_put(client_tuner->dev.driver->owner); | |
1909 | i2c_unregister_device(client_tuner); | |
1910 | module_put(client_demod->dev.driver->owner); | |
1911 | i2c_unregister_device(client_demod); | |
1912 | goto frontend_detach; | |
1913 | } | |
1914 | if (!try_module_get(client_ci->dev.driver->owner)) { | |
1915 | i2c_unregister_device(client_ci); | |
1916 | module_put(client_tuner->dev.driver->owner); | |
1917 | i2c_unregister_device(client_tuner); | |
1918 | module_put(client_demod->dev.driver->owner); | |
1919 | i2c_unregister_device(client_demod); | |
1920 | goto frontend_detach; | |
1921 | } | |
1922 | port->i2c_client_ci = client_ci; | |
1923 | ||
82c10276 OS |
1924 | if (port->nr != 1) |
1925 | break; | |
1926 | ||
1927 | /* Read entire EEPROM */ | |
1928 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1929 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, | |
1930 | sizeof(eeprom)); | |
1931 | printk(KERN_INFO "DVBSky T980C MAC address: %pM\n", | |
1932 | eeprom + 0xc0); | |
1933 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6); | |
1934 | break; | |
1935 | } | |
5a23b076 IL |
1936 | } |
1937 | ||
1938 | return ret; | |
78db8547 IL |
1939 | |
1940 | frontend_detach: | |
1941 | port->gate_ctrl = NULL; | |
453afdd9 | 1942 | vb2_dvb_dealloc_frontends(&port->frontends); |
78db8547 | 1943 | return -EINVAL; |
d19770e5 ST |
1944 | } |
1945 | ||
1946 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
1947 | { | |
363c35fc | 1948 | |
453afdd9 | 1949 | struct vb2_dvb_frontend *fe0; |
d19770e5 | 1950 | struct cx23885_dev *dev = port->dev; |
eb0c58bb ST |
1951 | int err, i; |
1952 | ||
1953 | /* Here we need to allocate the correct number of frontends, | |
af901ca1 | 1954 | * as reflected in the cards struct. The reality is that currently |
eb0c58bb ST |
1955 | * no cx23885 boards support this - yet. But, if we don't modify this |
1956 | * code then the second frontend would never be allocated (later) | |
1957 | * and fail with error before the attach in dvb_register(). | |
1958 | * Without these changes we risk an OOPS later. The changes here | |
1959 | * are for safety, and should provide a good foundation for the | |
1960 | * future addition of any multi-frontend cx23885 based boards. | |
1961 | */ | |
1962 | printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, | |
1963 | port->num_frontends); | |
d19770e5 | 1964 | |
eb0c58bb | 1965 | for (i = 1; i <= port->num_frontends; i++) { |
453afdd9 HV |
1966 | struct vb2_queue *q; |
1967 | ||
1968 | if (vb2_dvb_alloc_frontend( | |
9c8ced51 | 1969 | &port->frontends, i) == NULL) { |
eb0c58bb ST |
1970 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1971 | return -ENOMEM; | |
1972 | } | |
1973 | ||
453afdd9 | 1974 | fe0 = vb2_dvb_get_frontend(&port->frontends, i); |
eb0c58bb ST |
1975 | if (!fe0) |
1976 | err = -EINVAL; | |
363c35fc | 1977 | |
eb0c58bb | 1978 | dprintk(1, "%s\n", __func__); |
9c8ced51 | 1979 | dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", |
eb0c58bb ST |
1980 | dev->board, |
1981 | dev->name, | |
1982 | dev->pci_bus, | |
1983 | dev->pci_slot); | |
d19770e5 | 1984 | |
eb0c58bb | 1985 | err = -ENODEV; |
d19770e5 | 1986 | |
eb0c58bb ST |
1987 | /* dvb stuff */ |
1988 | /* We have to init the queue for each frontend on a port. */ | |
9c8ced51 | 1989 | printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); |
453afdd9 HV |
1990 | q = &fe0->dvb.dvbq; |
1991 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1992 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | |
1993 | q->gfp_flags = GFP_DMA32; | |
1994 | q->min_buffers_needed = 2; | |
1995 | q->drv_priv = port; | |
1996 | q->buf_struct_size = sizeof(struct cx23885_buffer); | |
1997 | q->ops = &dvb_qops; | |
1998 | q->mem_ops = &vb2_dma_sg_memops; | |
1999 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
2000 | q->lock = &dev->lock; | |
2001 | ||
2002 | err = vb2_queue_init(q); | |
2003 | if (err < 0) | |
2004 | return err; | |
eb0c58bb | 2005 | } |
d19770e5 ST |
2006 | err = dvb_register(port); |
2007 | if (err != 0) | |
9c8ced51 ST |
2008 | printk(KERN_ERR "%s() dvb_register failed err = %d\n", |
2009 | __func__, err); | |
d19770e5 | 2010 | |
d19770e5 ST |
2011 | return err; |
2012 | } | |
2013 | ||
2014 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
2015 | { | |
453afdd9 | 2016 | struct vb2_dvb_frontend *fe0; |
b0b12e63 OS |
2017 | struct i2c_client *client; |
2018 | ||
e450de45 OS |
2019 | /* remove I2C client for CI */ |
2020 | client = port->i2c_client_ci; | |
2021 | if (client) { | |
2022 | module_put(client->dev.driver->owner); | |
2023 | i2c_unregister_device(client); | |
2024 | } | |
2025 | ||
b0b12e63 OS |
2026 | /* remove I2C client for tuner */ |
2027 | client = port->i2c_client_tuner; | |
2028 | if (client) { | |
2029 | module_put(client->dev.driver->owner); | |
2030 | i2c_unregister_device(client); | |
2031 | } | |
2032 | ||
2033 | /* remove I2C client for demodulator */ | |
2034 | client = port->i2c_client_demod; | |
2035 | if (client) { | |
2036 | module_put(client->dev.driver->owner); | |
2037 | i2c_unregister_device(client); | |
2038 | } | |
363c35fc | 2039 | |
453afdd9 | 2040 | fe0 = vb2_dvb_get_frontend(&port->frontends, 1); |
b0b12e63 | 2041 | |
e66131ce | 2042 | if (fe0 && fe0->dvb.frontend) |
453afdd9 | 2043 | vb2_dvb_unregister_bus(&port->frontends); |
d19770e5 | 2044 | |
afd96668 HV |
2045 | switch (port->dev->board) { |
2046 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | |
2047 | netup_ci_exit(port); | |
2048 | break; | |
78db8547 IL |
2049 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
2050 | altera_ci_release(port->dev, port->nr); | |
2051 | break; | |
afd96668 | 2052 | } |
5a23b076 | 2053 | |
78db8547 IL |
2054 | port->gate_ctrl = NULL; |
2055 | ||
d19770e5 ST |
2056 | return 0; |
2057 | } |