[media] cx23885: Hauppauge WinTV Starburst bind I2C demod and SEC
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST
1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST
16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/fs.h>
22#include <linux/kthread.h>
23#include <linux/file.h>
24#include <linux/suspend.h>
25
26#include "cx23885.h"
d19770e5
ST
27#include <media/v4l2-common.h>
28
5a23b076 29#include "dvb_ca_en50221.h"
d19770e5 30#include "s5h1409.h"
52b50450 31#include "s5h1411.h"
d19770e5 32#include "mt2131.h"
3ba71d21 33#include "tda8290.h"
4041f1a5 34#include "tda18271.h"
9bc37caa 35#include "lgdt330x.h"
0cf8af57 36#include "xc4000.h"
d1987d55 37#include "xc5000.h"
ea5697fe 38#include "max2165.h"
b3ea0166 39#include "tda10048.h"
07b4a835 40#include "tuner-xc2028.h"
827855d3 41#include "tuner-simple.h"
66762373 42#include "dib7000p.h"
46b21bba 43#include "dib0070.h"
66762373 44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
5a23b076 46#include "stv0900.h"
f867c3f4 47#include "stv0900_reg.h"
5a23b076
IL
48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
e6001482 51#include "cx24117.h"
5a23b076 52#include "cimax2.h"
493b7127 53#include "lgs8gxx.h"
5a23b076
IL
54#include "netup-eeprom.h"
55#include "netup-init.h"
a5dbf457 56#include "lgdt3305.h"
ea5697fe 57#include "atbm8830.h"
73f0af44 58#include "ts2020.h"
09ea33e5
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59#include "ds3000.h"
60#include "cx23885-f300.h"
78db8547
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61#include "altera-ci.h"
62#include "stv0367.h"
722c90eb
SR
63#include "drxk.h"
64#include "mt2063.h"
f667190b
MB
65#include "stv090x.h"
66#include "stb6100.h"
67#include "stb6100_cfg.h"
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68#include "tda10071.h"
69#include "a8293.h"
0d1b5265 70#include "mb86a20s.h"
36efec48 71#include "si2165.h"
29442266
OS
72#include "si2168.h"
73#include "si2157.h"
24e77409 74#include "sp2.h"
29442266 75#include "m88ds3103.h"
1fc77d01 76#include "m88rs6000t.h"
d19770e5 77
4513fc69 78static unsigned int debug;
d19770e5 79
4513fc69
ST
80#define dprintk(level, fmt, arg...)\
81 do { if (debug >= level)\
82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
83 } while (0)
d19770e5
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84
85/* ------------------------------------------------------------------ */
86
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87static unsigned int alt_tuner;
88module_param(alt_tuner, int, 0644);
89MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90
78e92006
JG
91DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92
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93/* ------------------------------------------------------------------ */
94
453afdd9
HV
95static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
96 unsigned int *num_buffers, unsigned int *num_planes,
97 unsigned int sizes[], void *alloc_ctxs[])
d19770e5 98{
453afdd9 99 struct cx23885_tsport *port = q->drv_priv;
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100
101 port->ts_packet_size = 188 * 4;
102 port->ts_packet_count = 32;
453afdd9
HV
103 *num_planes = 1;
104 sizes[0] = port->ts_packet_size * port->ts_packet_count;
0c3a14c1 105 alloc_ctxs[0] = port->dev->alloc_ctx;
453afdd9 106 *num_buffers = 32;
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107 return 0;
108}
109
453afdd9
HV
110
111static int buffer_prepare(struct vb2_buffer *vb)
d19770e5 112{
453afdd9
HV
113 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
114 struct cx23885_buffer *buf =
115 container_of(vb, struct cx23885_buffer, vb);
116
117 return cx23885_buf_prepare(buf, port);
d19770e5
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118}
119
453afdd9 120static void buffer_finish(struct vb2_buffer *vb)
d19770e5 121{
453afdd9
HV
122 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
123 struct cx23885_dev *dev = port->dev;
124 struct cx23885_buffer *buf = container_of(vb,
125 struct cx23885_buffer, vb);
453afdd9
HV
126
127 cx23885_free_buffer(dev, buf);
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128}
129
453afdd9 130static void buffer_queue(struct vb2_buffer *vb)
d19770e5 131{
453afdd9
HV
132 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
133 struct cx23885_buffer *buf = container_of(vb,
134 struct cx23885_buffer, vb);
135
136 cx23885_buf_queue(port, buf);
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137}
138
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IL
139static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
140{
453afdd9
HV
141 struct vb2_dvb_frontends *f;
142 struct vb2_dvb_frontend *fe;
78db8547
IL
143
144 f = &port->frontends;
145
146 if (f->gate <= 1) /* undefined or fe0 */
453afdd9 147 fe = vb2_dvb_get_frontend(f, 1);
78db8547 148 else
453afdd9 149 fe = vb2_dvb_get_frontend(f, f->gate);
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IL
150
151 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
152 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
153}
154
453afdd9
HV
155static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
156{
157 struct cx23885_tsport *port = q->drv_priv;
158 struct cx23885_dmaqueue *dmaq = &port->mpegq;
159 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
160 struct cx23885_buffer, queue);
161
162 cx23885_start_dma(port, dmaq, buf);
163 return 0;
164}
165
166static void cx23885_stop_streaming(struct vb2_queue *q)
167{
168 struct cx23885_tsport *port = q->drv_priv;
169
170 cx23885_cancel_buffers(port);
171}
172
173static struct vb2_ops dvb_qops = {
174 .queue_setup = queue_setup,
175 .buf_prepare = buffer_prepare,
176 .buf_finish = buffer_finish,
177 .buf_queue = buffer_queue,
178 .wait_prepare = vb2_ops_wait_prepare,
179 .wait_finish = vb2_ops_wait_finish,
180 .start_streaming = cx23885_start_streaming,
181 .stop_streaming = cx23885_stop_streaming,
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182};
183
86184e06 184static struct s5h1409_config hauppauge_generic_config = {
fc959bef
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185 .demod_address = 0x32 >> 1,
186 .output_mode = S5H1409_SERIAL_OUTPUT,
187 .gpio = S5H1409_GPIO_ON,
2b03238a 188 .qam_if = 44000,
fc959bef 189 .inversion = S5H1409_INVERSION_OFF,
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190 .status_mode = S5H1409_DEMODLOCKING,
191 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
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192};
193
b3ea0166
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194static struct tda10048_config hauppauge_hvr1200_config = {
195 .demod_address = 0x10 >> 1,
196 .output_mode = TDA10048_SERIAL_OUTPUT,
197 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05 198 .inversion = TDA10048_INVERSION_ON,
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199 .dtv6_if_freq_khz = TDA10048_IF_3300,
200 .dtv7_if_freq_khz = TDA10048_IF_3800,
201 .dtv8_if_freq_khz = TDA10048_IF_4300,
484d9e05 202 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST
203};
204
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205static struct tda10048_config hauppauge_hvr1210_config = {
206 .demod_address = 0x10 >> 1,
207 .output_mode = TDA10048_SERIAL_OUTPUT,
208 .fwbulkwritelen = TDA10048_BULKWRITE_200,
209 .inversion = TDA10048_INVERSION_ON,
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210 .dtv6_if_freq_khz = TDA10048_IF_3300,
211 .dtv7_if_freq_khz = TDA10048_IF_3500,
212 .dtv8_if_freq_khz = TDA10048_IF_4000,
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213 .clk_freq_khz = TDA10048_CLK_16000,
214};
215
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216static struct s5h1409_config hauppauge_ezqam_config = {
217 .demod_address = 0x32 >> 1,
218 .output_mode = S5H1409_SERIAL_OUTPUT,
219 .gpio = S5H1409_GPIO_OFF,
220 .qam_if = 4000,
221 .inversion = S5H1409_INVERSION_ON,
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ST
222 .status_mode = S5H1409_DEMODLOCKING,
223 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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224};
225
fc959bef 226static struct s5h1409_config hauppauge_hvr1800lp_config = {
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227 .demod_address = 0x32 >> 1,
228 .output_mode = S5H1409_SERIAL_OUTPUT,
229 .gpio = S5H1409_GPIO_OFF,
2b03238a 230 .qam_if = 44000,
fe475163 231 .inversion = S5H1409_INVERSION_OFF,
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232 .status_mode = S5H1409_DEMODLOCKING,
233 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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234};
235
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236static struct s5h1409_config hauppauge_hvr1500_config = {
237 .demod_address = 0x32 >> 1,
238 .output_mode = S5H1409_SERIAL_OUTPUT,
239 .gpio = S5H1409_GPIO_OFF,
240 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
241 .status_mode = S5H1409_DEMODLOCKING,
242 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
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MK
243};
244
86184e06 245static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST
246 0x61
247};
248
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MK
249static struct lgdt330x_config fusionhdtv_5_express = {
250 .demod_address = 0x0e,
251 .demod_chip = LGDT3303,
252 .serial_mpeg = 0x40,
253};
254
d1987d55
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255static struct s5h1409_config hauppauge_hvr1500q_config = {
256 .demod_address = 0x32 >> 1,
257 .output_mode = S5H1409_SERIAL_OUTPUT,
258 .gpio = S5H1409_GPIO_ON,
259 .qam_if = 44000,
260 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST
261 .status_mode = S5H1409_DEMODLOCKING,
262 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST
263};
264
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265static struct s5h1409_config dvico_s5h1409_config = {
266 .demod_address = 0x32 >> 1,
267 .output_mode = S5H1409_SERIAL_OUTPUT,
268 .gpio = S5H1409_GPIO_ON,
269 .qam_if = 44000,
270 .inversion = S5H1409_INVERSION_OFF,
271 .status_mode = S5H1409_DEMODLOCKING,
272 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
273};
274
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MK
275static struct s5h1411_config dvico_s5h1411_config = {
276 .output_mode = S5H1411_SERIAL_OUTPUT,
277 .gpio = S5H1411_GPIO_ON,
278 .qam_if = S5H1411_IF_44000,
279 .vsb_if = S5H1411_IF_44000,
280 .inversion = S5H1411_INVERSION_OFF,
281 .status_mode = S5H1411_DEMODLOCKING,
282 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
283};
284
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MK
285static struct s5h1411_config hcw_s5h1411_config = {
286 .output_mode = S5H1411_SERIAL_OUTPUT,
287 .gpio = S5H1411_GPIO_OFF,
288 .vsb_if = S5H1411_IF_44000,
289 .qam_if = S5H1411_IF_4000,
290 .inversion = S5H1411_INVERSION_ON,
291 .status_mode = S5H1411_DEMODLOCKING,
292 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
293};
294
d1987d55 295static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST
296 .i2c_address = 0x61,
297 .if_khz = 5380,
d1987d55
ST
298};
299
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MK
300static struct xc5000_config dvico_xc5000_tunerconfig = {
301 .i2c_address = 0x64,
302 .if_khz = 5380,
335377b7
MK
303};
304
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MK
305static struct tda829x_config tda829x_no_probe = {
306 .probe_tuner = TDA829X_DONT_PROBE,
307};
308
f21e0d7f 309static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK
310 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
311 .if_lvl = 6, .rfagc_top = 0x37 },
312 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
313 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK
314};
315
b34cdc36
MK
316static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
317 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
318 .if_lvl = 1, .rfagc_top = 0x37, },
319 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
320 .if_lvl = 1, .rfagc_top = 0x37, },
321 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
322 .if_lvl = 1, .rfagc_top = 0x37, },
323};
324
f21e0d7f
MK
325static struct tda18271_config hauppauge_tda18271_config = {
326 .std_map = &hauppauge_tda18271_std_map,
327 .gate = TDA18271_GATE_ANALOG,
04a68baa 328 .output_opt = TDA18271_OUTPUT_LT_OFF,
f21e0d7f
MK
329};
330
b3ea0166 331static struct tda18271_config hauppauge_hvr1200_tuner_config = {
b34cdc36 332 .std_map = &hauppauge_hvr1200_tda18271_std_map,
b3ea0166 333 .gate = TDA18271_GATE_ANALOG,
04a68baa 334 .output_opt = TDA18271_OUTPUT_LT_OFF,
b3ea0166
ST
335};
336
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MK
337static struct tda18271_config hauppauge_hvr1210_tuner_config = {
338 .gate = TDA18271_GATE_DIGITAL,
04a68baa 339 .output_opt = TDA18271_OUTPUT_LT_OFF,
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MK
340};
341
36efec48
MS
342static struct tda18271_config hauppauge_hvr4400_tuner_config = {
343 .gate = TDA18271_GATE_DIGITAL,
344 .output_opt = TDA18271_OUTPUT_LT_OFF,
345};
346
247bc540 347static struct tda18271_std_map hauppauge_hvr127x_std_map = {
a5dbf457
MK
348 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
349 .if_lvl = 1, .rfagc_top = 0x58 },
350 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
351 .if_lvl = 1, .rfagc_top = 0x58 },
352};
353
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MK
354static struct tda18271_config hauppauge_hvr127x_config = {
355 .std_map = &hauppauge_hvr127x_std_map,
04a68baa 356 .output_opt = TDA18271_OUTPUT_LT_OFF,
a5dbf457
MK
357};
358
247bc540 359static struct lgdt3305_config hauppauge_lgdt3305_config = {
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MK
360 .i2c_addr = 0x0e,
361 .mpeg_mode = LGDT3305_MPEG_SERIAL,
362 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
363 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
364 .deny_i2c_rptr = 1,
365 .spectral_inversion = 1,
366 .qam_if_khz = 4000,
367 .vsb_if_khz = 3250,
368};
369
b1721d0d 370static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST
371 BAND_VHF | BAND_UHF, /* band_caps */
372
373 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
374 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
375 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
376 * P_agc_nb_est=2, P_agc_write=0
377 */
378 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
379 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
380
381 712, /* inv_gain */
382 21, /* time_stabiliz */
383
384 0, /* alpha_level */
385 118, /* thlock */
386
387 0, /* wbd_inv */
388 2867, /* wbd_ref */
389 0, /* wbd_sel */
390 2, /* wbd_alpha */
391
392 0, /* agc1_max */
393 0, /* agc1_min */
394 39718, /* agc2_max */
395 9930, /* agc2_min */
396 0, /* agc1_pt1 */
397 0, /* agc1_pt2 */
398 0, /* agc1_pt3 */
399 0, /* agc1_slope1 */
400 0, /* agc1_slope2 */
401 0, /* agc2_pt1 */
402 128, /* agc2_pt2 */
403 29, /* agc2_slope1 */
404 29, /* agc2_slope2 */
405
406 17, /* alpha_mant */
407 27, /* alpha_exp */
408 23, /* beta_mant */
409 51, /* beta_exp */
410
411 1, /* perform_agc_softsplit */
412};
413
414/* PLL Configuration for COFDM BW_MHz = 8.000000
415 * With external clock = 30.000000 */
b1721d0d 416static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST
417 60000, /* internal */
418 30000, /* sampling */
419 1, /* pll_cfg: prediv */
420 8, /* pll_cfg: ratio */
421 3, /* pll_cfg: range */
422 1, /* pll_cfg: reset */
423 0, /* pll_cfg: bypass */
424 0, /* misc: refdiv */
425 0, /* misc: bypclk_div */
426 1, /* misc: IO_CLK_en_core */
427 1, /* misc: ADClkSrc */
428 0, /* misc: modulo */
429 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
430 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
431 20452225, /* timf */
432 30000000 /* xtal_hz */
433};
434
435static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
436 .output_mpeg2_in_188_bytes = 1,
437 .hostbus_diversity = 1,
438 .tuner_is_baseband = 0,
439 .update_lna = NULL,
440
441 .agc_config_count = 1,
442 .agc = &xc3028_agc_config,
443 .bw = &xc3028_bw_config,
444
445 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
446 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
447 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
448
449 .pwm_freq_div = 0,
450 .agc_control = NULL,
451 .spur_protect = 0,
452
453 .output_mode = OUTMODE_MPEG2_SERIAL,
454};
455
aef2d186
ST
456static struct zl10353_config dvico_fusionhdtv_xc3028 = {
457 .demod_address = 0x0f,
458 .if2 = 45600,
459 .no_tuner = 1,
d4dc673d 460 .disable_i2c_gate_ctrl = 1,
aef2d186
ST
461};
462
f867c3f4
IL
463static struct stv0900_reg stv0900_ts_regs[] = {
464 { R0900_TSGENERAL, 0x00 },
465 { R0900_P1_TSSPEED, 0x40 },
466 { R0900_P2_TSSPEED, 0x40 },
467 { R0900_P1_TSCFGM, 0xc0 },
468 { R0900_P2_TSCFGM, 0xc0 },
469 { R0900_P1_TSCFGH, 0xe0 },
470 { R0900_P2_TSCFGH, 0xe0 },
471 { R0900_P1_TSCFGL, 0x20 },
472 { R0900_P2_TSCFGL, 0x20 },
473 { 0xffff, 0xff }, /* terminate */
474};
475
5a23b076
IL
476static struct stv0900_config netup_stv0900_config = {
477 .demod_address = 0x68,
29372a8d 478 .demod_mode = 1, /* dual */
644c7ef0 479 .xtal = 8000000,
5a23b076
IL
480 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
481 .diseqc_mode = 2,/* 2/3 PWM */
f867c3f4 482 .ts_config_regs = stv0900_ts_regs,
5a23b076
IL
483 .tun1_maddress = 0,/* 0x60 */
484 .tun2_maddress = 3,/* 0x63 */
485 .tun1_adc = 1,/* 1 Vpp */
486 .tun2_adc = 1,/* 1 Vpp */
487};
488
489static struct stv6110_config netup_stv6110_tunerconfig_a = {
490 .i2c_address = 0x60,
644c7ef0
AO
491 .mclk = 16000000,
492 .clk_div = 1,
873688cd 493 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL
494};
495
496static struct stv6110_config netup_stv6110_tunerconfig_b = {
497 .i2c_address = 0x63,
644c7ef0
AO
498 .mclk = 16000000,
499 .clk_div = 1,
873688cd 500 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL
501};
502
96318d0c 503static struct cx24116_config tbs_cx24116_config = {
09ea33e5 504 .demod_address = 0x55,
96318d0c
IL
505};
506
e6001482
LA
507static struct cx24117_config tbs_cx24117_config = {
508 .demod_address = 0x55,
509};
510
09ea33e5
IL
511static struct ds3000_config tevii_ds3000_config = {
512 .demod_address = 0x68,
579943f5
IL
513};
514
73f0af44
KD
515static struct ts2020_config tevii_ts2020_config = {
516 .tuner_address = 0x60,
b858c331 517 .clk_out_div = 1,
8d2b0229 518 .frequency_div = 1146000,
73f0af44
KD
519};
520
c9b8b04b
IL
521static struct cx24116_config dvbworld_cx24116_config = {
522 .demod_address = 0x05,
523};
524
493b7127
DW
525static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
526 .prod = LGS8GXX_PROD_LGS8GL5,
527 .demod_address = 0x19,
528 .serial_ts = 0,
529 .ts_clk_pol = 1,
530 .ts_clk_gated = 1,
531 .if_clk_freq = 30400, /* 30.4 MHz */
532 .if_freq = 5380, /* 5.38 MHz */
533 .if_neg_center = 1,
534 .ext_adc = 0,
535 .adc_signed = 0,
536 .if_neg_edge = 0,
537};
538
539static struct xc5000_config mygica_x8506_xc5000_config = {
540 .i2c_address = 0x61,
541 .if_khz = 5380,
542};
543
0d1b5265
MCC
544static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
545 .demod_address = 0x10,
546};
547
548static struct xc5000_config mygica_x8507_xc5000_config = {
549 .i2c_address = 0x61,
550 .if_khz = 4000,
551};
552
f667190b 553static struct stv090x_config prof_8000_stv090x_config = {
b858c331
IL
554 .device = STV0903,
555 .demod_mode = STV090x_SINGLE,
556 .clk_mode = STV090x_CLK_EXT,
557 .xtal = 27000000,
558 .address = 0x6A,
559 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
560 .repeater_level = STV090x_RPTLEVEL_64,
561 .adc1_range = STV090x_ADC_2Vpp,
562 .diseqc_envelope_mode = false,
563
564 .tuner_get_frequency = stb6100_get_frequency,
565 .tuner_set_frequency = stb6100_set_frequency,
566 .tuner_set_bandwidth = stb6100_set_bandwidth,
567 .tuner_get_bandwidth = stb6100_get_bandwidth,
f667190b
MB
568};
569
570static struct stb6100_config prof_8000_stb6100_config = {
571 .tuner_address = 0x60,
572 .refclock = 27000000,
573};
574
575static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
576{
577 struct cx23885_tsport *port = fe->dvb->priv;
578 struct cx23885_dev *dev = port->dev;
579
580 if (voltage == SEC_VOLTAGE_18)
581 cx_write(MC417_RWD, 0x00001e00);
582 else if (voltage == SEC_VOLTAGE_13)
583 cx_write(MC417_RWD, 0x00001a00);
584 else
585 cx_write(MC417_RWD, 0x00001800);
586 return 0;
587}
588
29442266
OS
589static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
590 fe_sec_voltage_t voltage)
591{
592 struct cx23885_tsport *port = fe->dvb->priv;
593 struct cx23885_dev *dev = port->dev;
594
595 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
596
597 switch (voltage) {
598 case SEC_VOLTAGE_13:
599 cx23885_gpio_set(dev, GPIO_1);
600 cx23885_gpio_clear(dev, GPIO_0);
601 break;
602 case SEC_VOLTAGE_18:
603 cx23885_gpio_set(dev, GPIO_1);
604 cx23885_gpio_set(dev, GPIO_0);
605 break;
606 case SEC_VOLTAGE_OFF:
607 cx23885_gpio_clear(dev, GPIO_1);
608 cx23885_gpio_clear(dev, GPIO_0);
609 break;
610 }
611
612 /* call the frontend set_voltage function */
613 port->fe_set_voltage(fe, voltage);
614
615 return 0;
616}
617
c29d6a83 618static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe,
619 fe_sec_voltage_t voltage)
620{
621 struct cx23885_tsport *port = fe->dvb->priv;
622 struct cx23885_dev *dev = port->dev;
623
624 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1);
625
626 switch (voltage) {
627 case SEC_VOLTAGE_13:
628 cx23885_gpio_set(dev, GPIO_13);
629 cx23885_gpio_clear(dev, GPIO_12);
630 break;
631 case SEC_VOLTAGE_18:
632 cx23885_gpio_set(dev, GPIO_13);
633 cx23885_gpio_set(dev, GPIO_12);
634 break;
635 case SEC_VOLTAGE_OFF:
636 cx23885_gpio_clear(dev, GPIO_13);
637 cx23885_gpio_clear(dev, GPIO_12);
638 break;
639 }
640 /* call the frontend set_voltage function */
641 return port->fe_set_voltage(fe, voltage);
642}
643
24e77409
OS
644static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
645 u8 data, int *mem)
646{
647 /* MC417 */
648 #define SP2_DATA 0x000000ff
649 #define SP2_WR 0x00008000
650 #define SP2_RD 0x00004000
651 #define SP2_ACK 0x00001000
652 #define SP2_ADHI 0x00000800
653 #define SP2_ADLO 0x00000400
654 #define SP2_CS1 0x00000200
655 #define SP2_CS0 0x00000100
656 #define SP2_EN_ALL 0x00001000
657 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
658
659 struct cx23885_tsport *port = priv;
660 struct cx23885_dev *dev = port->dev;
661 int ret;
0e6c7b01 662 int tmp = 0;
24e77409
OS
663 unsigned long timeout;
664
665 mutex_lock(&dev->gpio_lock);
666
667 /* write addr */
668 cx_write(MC417_OEN, SP2_EN_ALL);
669 cx_write(MC417_RWD, SP2_CTRL_OFF |
670 SP2_ADLO | (0xff & addr));
671 cx_clear(MC417_RWD, SP2_ADLO);
672 cx_write(MC417_RWD, SP2_CTRL_OFF |
673 SP2_ADHI | (0xff & (addr >> 8)));
674 cx_clear(MC417_RWD, SP2_ADHI);
675
676 if (read)
677 /* data in */
678 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
679 else
680 /* data out */
681 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
682
683 /* chip select 0 */
684 cx_clear(MC417_RWD, SP2_CS0);
685
686 /* read/write */
687 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
688
689 /* wait for a maximum of 1 msec */
690 timeout = jiffies + msecs_to_jiffies(1);
691 while (!time_after(jiffies, timeout)) {
692 tmp = cx_read(MC417_RWD);
693 if ((tmp & SP2_ACK) == 0)
694 break;
695 usleep_range(50, 100);
696 }
697
698 cx_set(MC417_RWD, SP2_CTRL_OFF);
699 *mem = tmp & 0xff;
700
701 mutex_unlock(&dev->gpio_lock);
702
703 if (!read) {
704 if (*mem < 0) {
705 ret = -EREMOTEIO;
706 goto err;
707 }
708 }
709
710 return 0;
711err:
712 return ret;
713}
714
a7d44baa 715static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
f35b9e80 716{
a7d44baa 717 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
f35b9e80
MK
718 struct cx23885_tsport *port = fe->dvb->priv;
719 struct cx23885_dev *dev = port->dev;
720
721 switch (dev->board) {
722 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a7d44baa 723 switch (p->modulation) {
f35b9e80
MK
724 case VSB_8:
725 cx23885_gpio_clear(dev, GPIO_5);
726 break;
727 case QAM_64:
728 case QAM_256:
729 default:
730 cx23885_gpio_set(dev, GPIO_5);
731 break;
732 }
733 break;
6f0d8c02 734 case CX23885_BOARD_MYGICA_X8506:
0d1b5265 735 case CX23885_BOARD_MYGICA_X8507:
6f0d8c02
DW
736 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
737 /* Select Digital TV */
738 cx23885_gpio_set(dev, GPIO_0);
739 break;
f35b9e80 740 }
15472faf
MCC
741
742 /* Call the real set_frontend */
743 if (port->set_frontend)
744 return port->set_frontend(fe);
745
5bdd3962 746 return 0;
f35b9e80
MK
747}
748
15472faf
MCC
749static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
750 struct dvb_frontend *fe)
751{
752 port->set_frontend = fe->ops.set_frontend;
753 fe->ops.set_frontend = cx23885_dvb_set_frontend;
754}
755
2365b2d3
DW
756static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
757 .prod = LGS8GXX_PROD_LGS8G75,
758 .demod_address = 0x19,
759 .serial_ts = 0,
760 .ts_clk_pol = 1,
761 .ts_clk_gated = 1,
762 .if_clk_freq = 30400, /* 30.4 MHz */
763 .if_freq = 6500, /* 6.50 MHz */
764 .if_neg_center = 1,
765 .ext_adc = 0,
766 .adc_signed = 1,
767 .adc_vpp = 2, /* 1.6 Vpp */
768 .if_neg_edge = 1,
769};
770
771static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
772 .i2c_address = 0x61,
773 .if_khz = 6500,
774};
775
ea5697fe
DW
776static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
777 .prod = ATBM8830_PROD_8830,
778 .demod_address = 0x44,
779 .serial_ts = 0,
780 .ts_sampling_edge = 1,
781 .ts_clk_gated = 0,
782 .osc_clk_freq = 30400, /* in kHz */
783 .if_freq = 0, /* zero IF */
784 .zif_swap_iq = 1,
c245c75c
DW
785 .agc_min = 0x2E,
786 .agc_max = 0xFF,
787 .agc_hold_loop = 0,
ea5697fe
DW
788};
789
790static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
791 .i2c_address = 0x60,
792 .osc_clk = 20
793};
794
795static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
796 .prod = ATBM8830_PROD_8830,
797 .demod_address = 0x44,
798 .serial_ts = 1,
799 .ts_sampling_edge = 1,
800 .ts_clk_gated = 0,
801 .osc_clk_freq = 30400, /* in kHz */
802 .if_freq = 0, /* zero IF */
803 .zif_swap_iq = 1,
c245c75c
DW
804 .agc_min = 0x2E,
805 .agc_max = 0xFF,
806 .agc_hold_loop = 0,
ea5697fe
DW
807};
808
809static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
810 .i2c_address = 0x60,
811 .osc_clk = 20
812};
78db8547
IL
813static struct stv0367_config netup_stv0367_config[] = {
814 {
815 .demod_address = 0x1c,
816 .xtal = 27000000,
817 .if_khz = 4500,
818 .if_iq_mode = 0,
819 .ts_mode = 1,
820 .clk_pol = 0,
821 }, {
822 .demod_address = 0x1d,
823 .xtal = 27000000,
824 .if_khz = 4500,
825 .if_iq_mode = 0,
826 .ts_mode = 1,
827 .clk_pol = 0,
828 },
829};
830
831static struct xc5000_config netup_xc5000_config[] = {
832 {
833 .i2c_address = 0x61,
834 .if_khz = 4500,
835 }, {
836 .i2c_address = 0x64,
837 .if_khz = 4500,
838 },
839};
840
722c90eb
SR
841static struct drxk_config terratec_drxk_config[] = {
842 {
843 .adr = 0x29,
844 .no_i2c_bridge = 1,
845 }, {
846 .adr = 0x2a,
847 .no_i2c_bridge = 1,
848 },
849};
850
851static struct mt2063_config terratec_mt2063_config[] = {
852 {
853 .tuner_address = 0x60,
854 }, {
855 .tuner_address = 0x67,
856 },
857};
858
7c62f5a1 859static const struct tda10071_config hauppauge_tda10071_config = {
41f55d57 860 .demod_i2c_addr = 0x05,
7c62f5a1
MK
861 .tuner_i2c_addr = 0x54,
862 .i2c_wr_max = 64,
863 .ts_mode = TDA10071_TS_SERIAL,
864 .spec_inv = 0,
865 .xtal = 40444000, /* 40.444 MHz */
866 .pll_multiplier = 20,
867};
868
49bf0e67
AP
869static const struct tda10071_platform_data hauppauge_tda10071_pdata = {
870 .clk = 40444000, /* 40.444 MHz */
871 .i2c_wr_max = 64,
872 .ts_mode = TDA10071_TS_SERIAL,
873 .pll_multiplier = 20,
874 .tuner_i2c_addr = 0x54,
875};
876
7c62f5a1
MK
877static const struct a8293_config hauppauge_a8293_config = {
878 .i2c_addr = 0x0b,
879};
880
36efec48
MS
881static const struct si2165_config hauppauge_hvr4400_si2165_config = {
882 .i2c_addr = 0x64,
883 .chip_mode = SI2165_MODE_PLL_XTAL,
884 .ref_freq_Hz = 16000000,
885};
886
29442266
OS
887static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
888 .i2c_addr = 0x68,
889 .clock = 27000000,
890 .i2c_wr_max = 33,
891 .clock_out = 0,
892 .ts_mode = M88DS3103_TS_PARALLEL,
893 .ts_clk = 16000,
894 .ts_clk_pol = 1,
895 .lnb_en_pol = 1,
896 .lnb_hv_pol = 0,
897 .agc = 0x99,
898};
899
0e6c7b01 900static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
901 .i2c_addr = 0x68,
902 .clock = 27000000,
903 .i2c_wr_max = 33,
904 .clock_out = 0,
905 .ts_mode = M88DS3103_TS_CI,
906 .ts_clk = 10000,
907 .ts_clk_pol = 1,
908 .lnb_en_pol = 1,
909 .lnb_hv_pol = 0,
910 .agc = 0x99,
911};
912
c29d6a83 913static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = {
914 .i2c_addr = 0x68,
915 .clock = 27000000,
916 .i2c_wr_max = 33,
917 .clock_out = 0,
918 .ts_mode = M88DS3103_TS_SERIAL,
919 .ts_clk = 96000,
920 .ts_clk_pol = 0,
921 .lnb_en_pol = 1,
922 .lnb_hv_pol = 0,
923 .agc = 0x99,
924};
925
1fc77d01
AP
926static const struct m88ds3103_config hauppauge_hvr5525_m88ds3103_config = {
927 .i2c_addr = 0x69,
928 .clock = 27000000,
929 .i2c_wr_max = 33,
930 .ts_mode = M88DS3103_TS_PARALLEL,
931 .ts_clk = 16000,
932 .ts_clk_pol = 1,
933 .agc = 0x99,
934};
935
ada73eee 936static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
78db8547
IL
937{
938 struct cx23885_dev *dev = (struct cx23885_dev *)device;
939 unsigned long timeout = jiffies + msecs_to_jiffies(1);
d164460f 940 uint32_t mem = 0;
78db8547 941
d164460f 942 mem = cx_read(MC417_RWD);
78db8547
IL
943 if (read)
944 cx_set(MC417_OEN, ALT_DATA);
945 else {
946 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
78db8547
IL
947 mem &= ~ALT_DATA;
948 mem |= (data & ALT_DATA);
78db8547
IL
949 }
950
951 if (flag)
d164460f 952 mem |= ALT_AD_RG;
78db8547 953 else
d164460f 954 mem &= ~ALT_AD_RG;
78db8547 955
d164460f 956 mem &= ~ALT_CS;
78db8547 957 if (read)
d164460f 958 mem = (mem & ~ALT_RD) | ALT_WR;
78db8547 959 else
d164460f
AO
960 mem = (mem & ~ALT_WR) | ALT_RD;
961
962 cx_write(MC417_RWD, mem); /* start RW cycle */
78db8547
IL
963
964 for (;;) {
965 mem = cx_read(MC417_RWD);
966 if ((mem & ALT_RDY) == 0)
967 break;
968 if (time_after(jiffies, timeout))
969 break;
970 udelay(1);
971 }
972
973 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
974 if (read)
975 return mem & ALT_DATA;
976
977 return 0;
978};
ea5697fe 979
46b21bba
JH
980static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
981{
982 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
983
984 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
985}
986
987static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
988{
989 return 0;
990}
991
992static struct dib0070_config dib7070p_dib0070_config = {
993 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
994 .reset = dib7070_tuner_reset,
995 .sleep = dib7070_tuner_sleep,
996 .clock_khz = 12000,
46b21bba
JH
997 .freq_offset_khz_vhf = 550,
998 /* .flip_chip = 1, */
999};
1000
1001/* DIB7070 generic */
1002static struct dibx000_agc_config dib7070_agc_config = {
1003 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
1004
1005 /*
1006 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
1007 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1008 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
1009 */
1010 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
1011 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1012 .inv_gain = 600,
1013 .time_stabiliz = 10,
1014 .alpha_level = 0,
1015 .thlock = 118,
1016 .wbd_inv = 0,
1017 .wbd_ref = 3530,
1018 .wbd_sel = 1,
1019 .wbd_alpha = 5,
1020 .agc1_max = 65535,
1021 .agc1_min = 0,
1022 .agc2_max = 65535,
1023 .agc2_min = 0,
1024 .agc1_pt1 = 0,
1025 .agc1_pt2 = 40,
1026 .agc1_pt3 = 183,
1027 .agc1_slope1 = 206,
1028 .agc1_slope2 = 255,
1029 .agc2_pt1 = 72,
1030 .agc2_pt2 = 152,
1031 .agc2_slope1 = 88,
1032 .agc2_slope2 = 90,
1033 .alpha_mant = 17,
1034 .alpha_exp = 27,
1035 .beta_mant = 23,
1036 .beta_exp = 51,
1037 .perform_agc_softsplit = 0,
1038};
1039
1040static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
1041 .internal = 60000,
1042 .sampling = 15000,
1043 .pll_prediv = 1,
1044 .pll_ratio = 20,
1045 .pll_range = 3,
1046 .pll_reset = 1,
1047 .pll_bypass = 0,
1048 .enable_refdiv = 0,
1049 .bypclk_div = 0,
1050 .IO_CLK_en_core = 1,
1051 .ADClkSrc = 1,
1052 .modulo = 2,
1053 /* refsel, sel, freq_15k */
1054 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1055 .ifreq = (0 << 25) | 0,
1056 .timf = 20452225,
1057 .xtal_hz = 12000000,
1058};
1059
1060static struct dib7000p_config dib7070p_dib7000p_config = {
1061 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1062 .output_mode = OUTMODE_MPEG2_SERIAL,
1063 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1064 .output_mpeg2_in_188_bytes = 1,
1065
1066 .agc_config_count = 1,
1067 .agc = &dib7070_agc_config,
1068 .bw = &dib7070_bw_config_12_mhz,
1069 .tuner_is_baseband = 1,
1070 .spur_protect = 1,
1071
1072 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1073 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1074 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1075
1076 .hostbus_diversity = 1,
1077};
1078
2b0aac30
MCC
1079static int dvb_register_ci_mac(struct cx23885_tsport *port)
1080{
1081 struct cx23885_dev *dev = port->dev;
1082 struct i2c_client *client_ci = NULL;
1083 struct vb2_dvb_frontend *fe0;
1084
1085 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1086 if (!fe0)
1087 return -EINVAL;
1088
1089 switch (dev->board) {
1090 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1091 static struct netup_card_info cinfo;
1092
1093 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1094 memcpy(port->frontends.adapter.proposed_mac,
1095 cinfo.port[port->nr - 1].mac, 6);
1096 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1097 port->nr, port->frontends.adapter.proposed_mac);
1098
1099 netup_ci_init(port);
1100 return 0;
1101 }
1102 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1103 struct altera_ci_config netup_ci_cfg = {
1104 .dev = dev,/* magic number to identify*/
1105 .adapter = &port->frontends.adapter,/* for CI */
1106 .demux = &fe0->dvb.demux,/* for hw pid filter */
1107 .fpga_rw = netup_altera_fpga_rw,
1108 };
1109
1110 altera_ci_init(&netup_ci_cfg, port->nr);
1111 return 0;
1112 }
1113 case CX23885_BOARD_TEVII_S470: {
1114 u8 eeprom[256]; /* 24C02 i2c eeprom */
1115
1116 if (port->nr != 1)
1117 return 0;
1118
1119 /* Read entire EEPROM */
1120 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1121 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1122 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1123 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1124 return 0;
1125 }
1126 case CX23885_BOARD_DVBSKY_T9580:
1127 case CX23885_BOARD_DVBSKY_S950:
1128 case CX23885_BOARD_DVBSKY_S952:
1129 case CX23885_BOARD_DVBSKY_T982: {
1130 u8 eeprom[256]; /* 24C02 i2c eeprom */
1131
1132 if (port->nr > 2)
1133 return 0;
1134
1135 /* Read entire EEPROM */
1136 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1137 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1138 sizeof(eeprom));
1139 printk(KERN_INFO "%s port %d MAC address: %pM\n",
1140 cx23885_boards[dev->board].name, port->nr,
1141 eeprom + 0xc0 + (port->nr-1) * 8);
1142 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1143 (port->nr-1) * 8, 6);
1144 return 0;
1145 }
1146 case CX23885_BOARD_DVBSKY_S950C:
1147 case CX23885_BOARD_DVBSKY_T980C:
1148 case CX23885_BOARD_TT_CT2_4500_CI: {
1149 u8 eeprom[256]; /* 24C02 i2c eeprom */
1150 struct sp2_config sp2_config;
1151 struct i2c_board_info info;
1152 struct cx23885_i2c *i2c_bus2 = &dev->i2c_bus[1];
1153
1154 /* attach CI */
1155 memset(&sp2_config, 0, sizeof(sp2_config));
1156 sp2_config.dvb_adap = &port->frontends.adapter;
1157 sp2_config.priv = port;
1158 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
1159 memset(&info, 0, sizeof(struct i2c_board_info));
1160 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
1161 info.addr = 0x40;
1162 info.platform_data = &sp2_config;
1163 request_module(info.type);
1164 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
1165 if (client_ci == NULL || client_ci->dev.driver == NULL)
1166 return -ENODEV;
1167 if (!try_module_get(client_ci->dev.driver->owner)) {
1168 i2c_unregister_device(client_ci);
1169 return -ENODEV;
1170 }
1171 port->i2c_client_ci = client_ci;
1172
1173 if (port->nr != 1)
1174 return 0;
1175
1176 /* Read entire EEPROM */
1177 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1178 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1179 sizeof(eeprom));
1180 printk(KERN_INFO "%s MAC address: %pM\n",
1181 cx23885_boards[dev->board].name, eeprom + 0xc0);
1182 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
1183 return 0;
1184 }
1185 }
1186 return 0;
1187}
1188
d19770e5
ST
1189static int dvb_register(struct cx23885_tsport *port)
1190{
8abe4a0a 1191 struct dib7000p_ops dib7000p_ops;
d19770e5 1192 struct cx23885_dev *dev = port->dev;
493b7127 1193 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
453afdd9 1194 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
29442266
OS
1195 struct si2168_config si2168_config;
1196 struct si2157_config si2157_config;
d76e0878 1197 struct ts2020_config ts2020_config;
29442266
OS
1198 struct i2c_board_info info;
1199 struct i2c_adapter *adapter;
2b0aac30 1200 struct i2c_client *client_demod = NULL, *client_tuner = NULL;
bf5e3ef0 1201 struct i2c_client *client_sec = NULL;
c29d6a83 1202 const struct m88ds3103_config *p_m88ds3103_config = NULL;
1203 int (*p_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage) = NULL;
78db8547 1204 int mfe_shared = 0; /* bus not shared by default */
5a23b076 1205 int ret;
363c35fc 1206
f972e0bd 1207 /* Get the first frontend */
453afdd9 1208 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST
1209 if (!fe0)
1210 return -EINVAL;
d19770e5 1211
453afdd9 1212 /* init struct vb2_dvb */
363c35fc 1213 fe0->dvb.name = dev->name;
d19770e5 1214
78db8547
IL
1215 /* multi-frontend gate control is undefined or defaults to fe0 */
1216 port->frontends.gate = 0;
1217
1218 /* Sets the gate control callback to be used by i2c command calls */
1219 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1220
d19770e5
ST
1221 /* init frontend */
1222 switch (dev->board) {
a77743bc 1223 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 1224 i2c_bus = &dev->i2c_bus[0];
363c35fc 1225 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 1226 &hauppauge_generic_config,
f139fa71 1227 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1228 if (fe0->dvb.frontend == NULL)
1229 break;
1230 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1231 &i2c_bus->i2c_adap,
1232 &hauppauge_generic_tunerconfig, 0);
d19770e5 1233 break;
a5dbf457 1234 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1235 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK
1236 i2c_bus = &dev->i2c_bus[0];
1237 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
247bc540 1238 &hauppauge_lgdt3305_config,
a5dbf457 1239 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1240 if (fe0->dvb.frontend == NULL)
1241 break;
1242 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1243 0x60, &dev->i2c_bus[1].i2c_adap,
1244 &hauppauge_hvr127x_config);
15472faf
MCC
1245 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1246 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
a5dbf457 1247 break;
19bc5796 1248 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1249 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
19bc5796
MK
1250 i2c_bus = &dev->i2c_bus[0];
1251 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1252 &hcw_s5h1411_config,
1253 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1254 if (fe0->dvb.frontend == NULL)
1255 break;
1256
1257 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1258 0x60, &dev->i2c_bus[1].i2c_adap,
1259 &hauppauge_tda18271_config);
0ac60acb
DH
1260
1261 tda18271_attach(&dev->ts1.analog_fe,
1262 0x60, &dev->i2c_bus[1].i2c_adap,
1263 &hauppauge_tda18271_config);
1264
19bc5796 1265 break;
3ba71d21
MK
1266 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1267 i2c_bus = &dev->i2c_bus[0];
92abe9ee 1268 switch (alt_tuner) {
3ba71d21 1269 case 1:
363c35fc 1270 fe0->dvb.frontend =
3ba71d21
MK
1271 dvb_attach(s5h1409_attach,
1272 &hauppauge_ezqam_config,
1273 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1274 if (fe0->dvb.frontend == NULL)
1275 break;
1276
1277 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1278 &dev->i2c_bus[1].i2c_adap, 0x42,
1279 &tda829x_no_probe);
1280 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1281 0x60, &dev->i2c_bus[1].i2c_adap,
1282 &hauppauge_tda18271_config);
3ba71d21
MK
1283 break;
1284 case 0:
1285 default:
363c35fc 1286 fe0->dvb.frontend =
3ba71d21
MK
1287 dvb_attach(s5h1409_attach,
1288 &hauppauge_generic_config,
1289 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1290 if (fe0->dvb.frontend == NULL)
1291 break;
1292 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1293 &i2c_bus->i2c_adap,
1294 &hauppauge_generic_tunerconfig, 0);
3ba71d21
MK
1295 }
1296 break;
fc959bef 1297 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 1298 i2c_bus = &dev->i2c_bus[0];
363c35fc 1299 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 1300 &hauppauge_hvr1800lp_config,
f139fa71 1301 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1302 if (fe0->dvb.frontend == NULL)
1303 break;
1304 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1305 &i2c_bus->i2c_adap,
1306 &hauppauge_generic_tunerconfig, 0);
fc959bef 1307 break;
9bc37caa 1308 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 1309 i2c_bus = &dev->i2c_bus[0];
363c35fc 1310 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 1311 &fusionhdtv_5_express,
f139fa71 1312 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1313 if (fe0->dvb.frontend == NULL)
1314 break;
1315 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1316 &i2c_bus->i2c_adap, 0x61,
1317 TUNER_LG_TDVS_H06XF);
9bc37caa 1318 break;
d1987d55
ST
1319 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1320 i2c_bus = &dev->i2c_bus[1];
363c35fc 1321 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST
1322 &hauppauge_hvr1500q_config,
1323 &dev->i2c_bus[0].i2c_adap);
ed3da2bf
MCC
1324 if (fe0->dvb.frontend == NULL)
1325 break;
1326 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1327 &i2c_bus->i2c_adap,
1328 &hauppauge_hvr1500q_tunerconfig);
d1987d55 1329 break;
07b4a835
MK
1330 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1331 i2c_bus = &dev->i2c_bus[1];
363c35fc 1332 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK
1333 &hauppauge_hvr1500_config,
1334 &dev->i2c_bus[0].i2c_adap);
363c35fc 1335 if (fe0->dvb.frontend != NULL) {
07b4a835
MK
1336 struct dvb_frontend *fe;
1337 struct xc2028_config cfg = {
1338 .i2c_adap = &i2c_bus->i2c_adap,
1339 .i2c_addr = 0x61,
07b4a835
MK
1340 };
1341 static struct xc2028_ctrl ctl = {
ef80bfeb 1342 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 1343 .max_len = 64,
52c3d29c 1344 .demod = XC3028_FE_OREN538,
07b4a835
MK
1345 };
1346
1347 fe = dvb_attach(xc2028_attach,
363c35fc 1348 fe0->dvb.frontend, &cfg);
07b4a835
MK
1349 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1350 fe->ops.tuner_ops.set_config(fe, &ctl);
1351 }
1352 break;
b3ea0166 1353 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1354 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 1355 i2c_bus = &dev->i2c_bus[0];
363c35fc 1356 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST
1357 &hauppauge_hvr1200_config,
1358 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1359 if (fe0->dvb.frontend == NULL)
1360 break;
1361 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1362 &dev->i2c_bus[1].i2c_adap, 0x42,
1363 &tda829x_no_probe);
1364 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1365 0x60, &dev->i2c_bus[1].i2c_adap,
1366 &hauppauge_hvr1200_tuner_config);
6b926eca
MK
1367 break;
1368 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1369 i2c_bus = &dev->i2c_bus[0];
1370 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1371 &hauppauge_hvr1210_config,
1372 &i2c_bus->i2c_adap);
1373 if (fe0->dvb.frontend != NULL) {
1374 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1375 0x60, &dev->i2c_bus[1].i2c_adap,
1376 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST
1377 }
1378 break;
66762373
ST
1379 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1380 i2c_bus = &dev->i2c_bus[0];
8abe4a0a
MCC
1381
1382 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1383 return -ENODEV;
1384
1385 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
66762373 1386 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 1387 if (fe0->dvb.frontend != NULL) {
66762373
ST
1388 struct dvb_frontend *fe;
1389 struct xc2028_config cfg = {
1390 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1391 .i2c_addr = 0x64,
66762373
ST
1392 };
1393 static struct xc2028_ctrl ctl = {
ef80bfeb 1394 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373 1395 .max_len = 64,
9bed77ee 1396 .demod = XC3028_FE_DIBCOM52,
9c8ced51
ST
1397 /* This is true for all demods with
1398 v36 firmware? */
0975fc68 1399 .type = XC2028_D2633,
66762373
ST
1400 };
1401
1402 fe = dvb_attach(xc2028_attach,
363c35fc 1403 fe0->dvb.frontend, &cfg);
66762373
ST
1404 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1405 fe->ops.tuner_ops.set_config(fe, &ctl);
1406 }
1407 break;
335377b7
MK
1408 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1409 i2c_bus = &dev->i2c_bus[port->nr - 1];
1410
363c35fc 1411 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK
1412 &dvico_s5h1409_config,
1413 &i2c_bus->i2c_adap);
363c35fc
ST
1414 if (fe0->dvb.frontend == NULL)
1415 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK
1416 &dvico_s5h1411_config,
1417 &i2c_bus->i2c_adap);
363c35fc
ST
1418 if (fe0->dvb.frontend != NULL)
1419 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK
1420 &i2c_bus->i2c_adap,
1421 &dvico_xc5000_tunerconfig);
335377b7 1422 break;
aef2d186
ST
1423 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1424 i2c_bus = &dev->i2c_bus[port->nr - 1];
1425
363c35fc 1426 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST
1427 &dvico_fusionhdtv_xc3028,
1428 &i2c_bus->i2c_adap);
363c35fc 1429 if (fe0->dvb.frontend != NULL) {
aef2d186
ST
1430 struct dvb_frontend *fe;
1431 struct xc2028_config cfg = {
1432 .i2c_adap = &i2c_bus->i2c_adap,
1433 .i2c_addr = 0x61,
aef2d186
ST
1434 };
1435 static struct xc2028_ctrl ctl = {
ef80bfeb 1436 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST
1437 .max_len = 64,
1438 .demod = XC3028_FE_ZARLINK456,
1439 };
1440
363c35fc 1441 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST
1442 &cfg);
1443 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1444 fe->ops.tuner_ops.set_config(fe, &ctl);
1445 }
1446 break;
46b21bba
JH
1447 }
1448 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1449 i2c_bus = &dev->i2c_bus[port->nr - 1];
1450 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1451 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1452
1453 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1454 return -ENODEV;
1455
1456 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1457 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1458 return -ENODEV;
1459 }
1460 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1461 if (fe0->dvb.frontend != NULL) {
1462 struct i2c_adapter *tun_i2c;
1463
1464 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1465 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1466 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1467 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1468 return -ENODEV;
1469 }
1470 break;
aef2d186 1471 }
4c56b04a 1472 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1473 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1474 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST
1475 i2c_bus = &dev->i2c_bus[0];
1476
363c35fc 1477 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST
1478 &dvico_fusionhdtv_xc3028,
1479 &i2c_bus->i2c_adap);
363c35fc 1480 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST
1481 struct dvb_frontend *fe;
1482 struct xc2028_config cfg = {
1483 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1484 .i2c_addr = 0x61,
4c56b04a
ST
1485 };
1486 static struct xc2028_ctrl ctl = {
ef80bfeb 1487 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST
1488 .max_len = 64,
1489 .demod = XC3028_FE_ZARLINK456,
1490 };
1491
363c35fc 1492 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST
1493 &cfg);
1494 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1495 fe->ops.tuner_ops.set_config(fe, &ctl);
1496 }
96318d0c 1497 break;
0cf8af57 1498 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1499 i2c_bus = &dev->i2c_bus[0];
1500
1501 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1502 &dvico_fusionhdtv_xc3028,
1503 &i2c_bus->i2c_adap);
1504 if (fe0->dvb.frontend != NULL) {
1505 struct dvb_frontend *fe;
1506 struct xc4000_config cfg = {
1507 .i2c_address = 0x61,
1508 .default_pm = 0,
1509 .dvb_amplitude = 134,
1510 .set_smoothedcvbs = 1,
1511 .if_khz = 4560
1512 };
1513
1514 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1515 &dev->i2c_bus[1].i2c_adap, &cfg);
a7c8aada
MS
1516 if (!fe) {
1517 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1518 dev->name);
1519 goto frontend_detach;
1520 }
0cf8af57 1521 }
1522 break;
96318d0c 1523 case CX23885_BOARD_TBS_6920:
09ea33e5 1524 i2c_bus = &dev->i2c_bus[1];
96318d0c
IL
1525
1526 fe0->dvb.frontend = dvb_attach(cx24116_attach,
09ea33e5
IL
1527 &tbs_cx24116_config,
1528 &i2c_bus->i2c_adap);
96318d0c 1529 if (fe0->dvb.frontend != NULL)
09ea33e5 1530 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
96318d0c 1531
579943f5 1532 break;
e6001482
LA
1533 case CX23885_BOARD_TBS_6980:
1534 case CX23885_BOARD_TBS_6981:
1535 i2c_bus = &dev->i2c_bus[1];
1536
1537 switch (port->nr) {
1538 /* PORT B */
1539 case 1:
1540 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1541 &tbs_cx24117_config,
d10e8280 1542 &i2c_bus->i2c_adap);
e6001482
LA
1543 break;
1544 /* PORT C */
1545 case 2:
e6001482
LA
1546 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1547 &tbs_cx24117_config,
d10e8280 1548 &i2c_bus->i2c_adap);
e6001482
LA
1549 break;
1550 }
1551 break;
579943f5
IL
1552 case CX23885_BOARD_TEVII_S470:
1553 i2c_bus = &dev->i2c_bus[1];
1554
09ea33e5
IL
1555 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1556 &tevii_ds3000_config,
1557 &i2c_bus->i2c_adap);
73f0af44
KD
1558 if (fe0->dvb.frontend != NULL) {
1559 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1560 &tevii_ts2020_config, &i2c_bus->i2c_adap);
09ea33e5 1561 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
73f0af44 1562 }
579943f5 1563
4c56b04a 1564 break;
c9b8b04b
IL
1565 case CX23885_BOARD_DVBWORLD_2005:
1566 i2c_bus = &dev->i2c_bus[1];
1567
1568 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1569 &dvbworld_cx24116_config,
1570 &i2c_bus->i2c_adap);
1571 break;
5a23b076
IL
1572 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1573 i2c_bus = &dev->i2c_bus[0];
1574 switch (port->nr) {
1575 /* port B */
1576 case 1:
1577 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1578 &netup_stv0900_config,
1579 &i2c_bus->i2c_adap, 0);
1580 if (fe0->dvb.frontend != NULL) {
1581 if (dvb_attach(stv6110_attach,
1582 fe0->dvb.frontend,
1583 &netup_stv6110_tunerconfig_a,
1584 &i2c_bus->i2c_adap)) {
1585 if (!dvb_attach(lnbh24_attach,
1586 fe0->dvb.frontend,
1587 &i2c_bus->i2c_adap,
9329fb5b
AO
1588 LNBH24_PCL | LNBH24_TTX,
1589 LNBH24_TEN, 0x09))
5a23b076
IL
1590 printk(KERN_ERR
1591 "No LNBH24 found!\n");
1592
1593 }
1594 }
1595 break;
1596 /* port C */
1597 case 2:
1598 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1599 &netup_stv0900_config,
1600 &i2c_bus->i2c_adap, 1);
1601 if (fe0->dvb.frontend != NULL) {
1602 if (dvb_attach(stv6110_attach,
1603 fe0->dvb.frontend,
1604 &netup_stv6110_tunerconfig_b,
1605 &i2c_bus->i2c_adap)) {
1606 if (!dvb_attach(lnbh24_attach,
1607 fe0->dvb.frontend,
1608 &i2c_bus->i2c_adap,
9329fb5b
AO
1609 LNBH24_PCL | LNBH24_TTX,
1610 LNBH24_TEN, 0x0a))
5a23b076
IL
1611 printk(KERN_ERR
1612 "No LNBH24 found!\n");
1613
1614 }
1615 }
1616 break;
1617 }
1618 break;
493b7127
DW
1619 case CX23885_BOARD_MYGICA_X8506:
1620 i2c_bus = &dev->i2c_bus[0];
1621 i2c_bus2 = &dev->i2c_bus[1];
1622 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1623 &mygica_x8506_lgs8gl5_config,
1624 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1625 if (fe0->dvb.frontend == NULL)
1626 break;
1627 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1628 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config);
15472faf 1629 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
493b7127 1630 break;
0d1b5265
MCC
1631 case CX23885_BOARD_MYGICA_X8507:
1632 i2c_bus = &dev->i2c_bus[0];
1633 i2c_bus2 = &dev->i2c_bus[1];
1634 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1635 &mygica_x8507_mb86a20s_config,
1636 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1637 if (fe0->dvb.frontend == NULL)
1638 break;
1639
1640 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1641 &i2c_bus2->i2c_adap,
1642 &mygica_x8507_xc5000_config);
0d1b5265
MCC
1643 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1644 break;
2365b2d3
DW
1645 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1646 i2c_bus = &dev->i2c_bus[0];
1647 i2c_bus2 = &dev->i2c_bus[1];
1648 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1649 &magicpro_prohdtve2_lgs8g75_config,
1650 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1651 if (fe0->dvb.frontend == NULL)
1652 break;
1653 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1654 &i2c_bus2->i2c_adap,
1655 &magicpro_prohdtve2_xc5000_config);
15472faf 1656 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
2365b2d3 1657 break;
13697380 1658 case CX23885_BOARD_HAUPPAUGE_HVR1850:
35045137
ST
1659 i2c_bus = &dev->i2c_bus[0];
1660 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1661 &hcw_s5h1411_config,
1662 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1663 if (fe0->dvb.frontend == NULL)
1664 break;
1665 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1666 0x60, &dev->i2c_bus[0].i2c_adap,
1667 &hauppauge_tda18271_config);
35045137
ST
1668
1669 tda18271_attach(&dev->ts1.analog_fe,
1670 0x60, &dev->i2c_bus[1].i2c_adap,
1671 &hauppauge_tda18271_config);
1672
1673 break;
aee0b24c 1674 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST
1675 i2c_bus = &dev->i2c_bus[0];
1676 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1677 &hcw_s5h1411_config,
1678 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1679 if (fe0->dvb.frontend == NULL)
1680 break;
1681 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1682 0x60, &dev->i2c_bus[0].i2c_adap,
1683 &hauppauge_tda18271_config);
13697380 1684 break;
ea5697fe
DW
1685 case CX23885_BOARD_MYGICA_X8558PRO:
1686 switch (port->nr) {
1687 /* port B */
1688 case 1:
1689 i2c_bus = &dev->i2c_bus[0];
1690 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1691 &mygica_x8558pro_atbm8830_cfg1,
1692 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1693 if (fe0->dvb.frontend == NULL)
1694 break;
1695 dvb_attach(max2165_attach, fe0->dvb.frontend,
1696 &i2c_bus->i2c_adap,
1697 &mygic_x8558pro_max2165_cfg1);
ea5697fe
DW
1698 break;
1699 /* port C */
1700 case 2:
1701 i2c_bus = &dev->i2c_bus[1];
1702 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1703 &mygica_x8558pro_atbm8830_cfg2,
1704 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1705 if (fe0->dvb.frontend == NULL)
1706 break;
1707 dvb_attach(max2165_attach, fe0->dvb.frontend,
1708 &i2c_bus->i2c_adap,
1709 &mygic_x8558pro_max2165_cfg2);
ea5697fe
DW
1710 }
1711 break;
78db8547
IL
1712 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1713 i2c_bus = &dev->i2c_bus[0];
1714 mfe_shared = 1;/* MFE */
1715 port->frontends.gate = 0;/* not clear for me yet */
1716 /* ports B, C */
1717 /* MFE frontend 1 DVB-T */
1718 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1719 &netup_stv0367_config[port->nr - 1],
1720 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1721 if (fe0->dvb.frontend == NULL)
1722 break;
1723 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend,
78db8547
IL
1724 &i2c_bus->i2c_adap,
1725 &netup_xc5000_config[port->nr - 1]))
ed3da2bf
MCC
1726 goto frontend_detach;
1727 /* load xc5000 firmware */
1728 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1729
78db8547 1730 /* MFE frontend 2 */
453afdd9 1731 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
78db8547
IL
1732 if (fe1 == NULL)
1733 goto frontend_detach;
1734 /* DVB-C init */
1735 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1736 &netup_stv0367_config[port->nr - 1],
1737 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1738 if (fe1->dvb.frontend == NULL)
1739 break;
1740
1741 fe1->dvb.frontend->id = 1;
1742 if (NULL == dvb_attach(xc5000_attach,
1743 fe1->dvb.frontend,
1744 &i2c_bus->i2c_adap,
1745 &netup_xc5000_config[port->nr - 1]))
1746 goto frontend_detach;
78db8547 1747 break;
722c90eb
SR
1748 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1749 i2c_bus = &dev->i2c_bus[0];
1750 i2c_bus2 = &dev->i2c_bus[1];
1751
1752 switch (port->nr) {
1753 /* port b */
1754 case 1:
1755 fe0->dvb.frontend = dvb_attach(drxk_attach,
1756 &terratec_drxk_config[0],
1757 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1758 if (fe0->dvb.frontend == NULL)
1759 break;
1760 if (!dvb_attach(mt2063_attach,
1761 fe0->dvb.frontend,
1762 &terratec_mt2063_config[0],
1763 &i2c_bus2->i2c_adap))
1764 goto frontend_detach;
722c90eb
SR
1765 break;
1766 /* port c */
1767 case 2:
1768 fe0->dvb.frontend = dvb_attach(drxk_attach,
1769 &terratec_drxk_config[1],
1770 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1771 if (fe0->dvb.frontend == NULL)
1772 break;
1773 if (!dvb_attach(mt2063_attach,
1774 fe0->dvb.frontend,
1775 &terratec_mt2063_config[1],
1776 &i2c_bus2->i2c_adap))
1777 goto frontend_detach;
722c90eb
SR
1778 break;
1779 }
1780 break;
7b134e85
IL
1781 case CX23885_BOARD_TEVII_S471:
1782 i2c_bus = &dev->i2c_bus[1];
1783
1784 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1785 &tevii_ds3000_config,
1786 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1787 if (fe0->dvb.frontend == NULL)
1788 break;
1789 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1790 &tevii_ts2020_config, &i2c_bus->i2c_adap);
7b134e85 1791 break;
f667190b
MB
1792 case CX23885_BOARD_PROF_8000:
1793 i2c_bus = &dev->i2c_bus[0];
1794
1795 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1796 &prof_8000_stv090x_config,
1797 &i2c_bus->i2c_adap,
1798 STV090x_DEMODULATOR_0);
ed3da2bf
MCC
1799 if (fe0->dvb.frontend == NULL)
1800 break;
1801 if (!dvb_attach(stb6100_attach,
1802 fe0->dvb.frontend,
1803 &prof_8000_stb6100_config,
1804 &i2c_bus->i2c_adap))
1805 goto frontend_detach;
f667190b 1806
ed3da2bf 1807 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
f667190b 1808 break;
7c62f5a1
MK
1809 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1810 i2c_bus = &dev->i2c_bus[0];
36efec48
MS
1811 i2c_bus2 = &dev->i2c_bus[1];
1812 switch (port->nr) {
1813 /* port b */
1814 case 1:
1815 fe0->dvb.frontend = dvb_attach(tda10071_attach,
7c62f5a1
MK
1816 &hauppauge_tda10071_config,
1817 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1818 if (fe0->dvb.frontend == NULL)
1819 break;
1820 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
1821 &i2c_bus->i2c_adap,
1822 &hauppauge_a8293_config))
1823 goto frontend_detach;
36efec48
MS
1824 break;
1825 /* port c */
1826 case 2:
1827 fe0->dvb.frontend = dvb_attach(si2165_attach,
1828 &hauppauge_hvr4400_si2165_config,
1829 &i2c_bus->i2c_adap);
ed3da2bf
MCC
1830 if (fe0->dvb.frontend == NULL)
1831 break;
1832 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1833 if (!dvb_attach(tda18271_attach,
1834 fe0->dvb.frontend,
1835 0x60, &i2c_bus2->i2c_adap,
1836 &hauppauge_hvr4400_tuner_config))
1837 goto frontend_detach;
36efec48 1838 break;
7c62f5a1
MK
1839 }
1840 break;
49bf0e67
AP
1841 case CX23885_BOARD_HAUPPAUGE_STARBURST: {
1842 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1843 struct a8293_platform_data a8293_pdata = {};
1844
721f3223 1845 i2c_bus = &dev->i2c_bus[0];
49bf0e67
AP
1846
1847 /* attach demod + tuner combo */
1848 memset(&info, 0, sizeof(info));
1849 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1850 info.addr = 0x05;
1851 info.platform_data = &tda10071_pdata;
1852 request_module("tda10071");
1853 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1854 if (!client_demod || !client_demod->dev.driver)
1855 goto frontend_detach;
1856 if (!try_module_get(client_demod->dev.driver->owner)) {
1857 i2c_unregister_device(client_demod);
1858 goto frontend_detach;
721f3223 1859 }
49bf0e67
AP
1860 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1861 port->i2c_client_demod = client_demod;
1862
1863 /* attach SEC */
1864 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1865 memset(&info, 0, sizeof(info));
1866 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1867 info.addr = 0x0b;
1868 info.platform_data = &a8293_pdata;
1869 request_module("a8293");
1870 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1871 if (!client_sec || !client_sec->dev.driver)
1872 goto frontend_detach;
1873 if (!try_module_get(client_sec->dev.driver->owner)) {
1874 i2c_unregister_device(client_sec);
1875 goto frontend_detach;
1876 }
1877 port->i2c_client_sec = client_sec;
721f3223 1878 break;
49bf0e67 1879 }
29442266 1880 case CX23885_BOARD_DVBSKY_T9580:
cba5480c 1881 case CX23885_BOARD_DVBSKY_S950:
29442266
OS
1882 i2c_bus = &dev->i2c_bus[0];
1883 i2c_bus2 = &dev->i2c_bus[1];
1884 switch (port->nr) {
1885 /* port b - satellite */
1886 case 1:
1887 /* attach frontend */
1888 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1889 &dvbsky_t9580_m88ds3103_config,
1890 &i2c_bus2->i2c_adap, &adapter);
1891 if (fe0->dvb.frontend == NULL)
1892 break;
1893
1894 /* attach tuner */
d76e0878
AP
1895 memset(&ts2020_config, 0, sizeof(ts2020_config));
1896 ts2020_config.fe = fe0->dvb.frontend;
29442266 1897 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 1898 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
29442266 1899 info.addr = 0x60;
d76e0878 1900 info.platform_data = &ts2020_config;
29442266
OS
1901 request_module(info.type);
1902 client_tuner = i2c_new_device(adapter, &info);
1903 if (client_tuner == NULL ||
1904 client_tuner->dev.driver == NULL)
1905 goto frontend_detach;
1906 if (!try_module_get(client_tuner->dev.driver->owner)) {
1907 i2c_unregister_device(client_tuner);
1908 goto frontend_detach;
1909 }
1910
1911 /* delegate signal strength measurement to tuner */
1912 fe0->dvb.frontend->ops.read_signal_strength =
1913 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1914
1915 /*
1916 * for setting the voltage we need to set GPIOs on
1917 * the card.
1918 */
1919 port->fe_set_voltage =
1920 fe0->dvb.frontend->ops.set_voltage;
1921 fe0->dvb.frontend->ops.set_voltage =
1922 dvbsky_t9580_set_voltage;
1923
1924 port->i2c_client_tuner = client_tuner;
1925
1926 break;
1927 /* port c - terrestrial/cable */
1928 case 2:
1929 /* attach frontend */
143800a5 1930 memset(&si2168_config, 0, sizeof(si2168_config));
29442266
OS
1931 si2168_config.i2c_adapter = &adapter;
1932 si2168_config.fe = &fe0->dvb.frontend;
1933 si2168_config.ts_mode = SI2168_TS_SERIAL;
1934 memset(&info, 0, sizeof(struct i2c_board_info));
1935 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1936 info.addr = 0x64;
1937 info.platform_data = &si2168_config;
1938 request_module(info.type);
1939 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1940 if (client_demod == NULL ||
1941 client_demod->dev.driver == NULL)
1942 goto frontend_detach;
1943 if (!try_module_get(client_demod->dev.driver->owner)) {
1944 i2c_unregister_device(client_demod);
1945 goto frontend_detach;
1946 }
1947 port->i2c_client_demod = client_demod;
1948
1949 /* attach tuner */
143800a5 1950 memset(&si2157_config, 0, sizeof(si2157_config));
29442266 1951 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 1952 si2157_config.if_port = 1;
29442266
OS
1953 memset(&info, 0, sizeof(struct i2c_board_info));
1954 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1955 info.addr = 0x60;
1956 info.platform_data = &si2157_config;
1957 request_module(info.type);
1958 client_tuner = i2c_new_device(adapter, &info);
1959 if (client_tuner == NULL ||
2b0aac30 1960 client_tuner->dev.driver == NULL)
29442266 1961 goto frontend_detach;
2b0aac30 1962
29442266
OS
1963 if (!try_module_get(client_tuner->dev.driver->owner)) {
1964 i2c_unregister_device(client_tuner);
29442266
OS
1965 goto frontend_detach;
1966 }
1967 port->i2c_client_tuner = client_tuner;
1968 break;
1969 }
1970 break;
82c10276 1971 case CX23885_BOARD_DVBSKY_T980C:
61b103e8 1972 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276 1973 i2c_bus = &dev->i2c_bus[1];
24e77409 1974 i2c_bus2 = &dev->i2c_bus[0];
82c10276
OS
1975
1976 /* attach frontend */
1977 memset(&si2168_config, 0, sizeof(si2168_config));
1978 si2168_config.i2c_adapter = &adapter;
1979 si2168_config.fe = &fe0->dvb.frontend;
1980 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1981 memset(&info, 0, sizeof(struct i2c_board_info));
1982 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1983 info.addr = 0x64;
1984 info.platform_data = &si2168_config;
1985 request_module(info.type);
1986 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 1987 if (client_demod == NULL || client_demod->dev.driver == NULL)
82c10276
OS
1988 goto frontend_detach;
1989 if (!try_module_get(client_demod->dev.driver->owner)) {
1990 i2c_unregister_device(client_demod);
1991 goto frontend_detach;
1992 }
1993 port->i2c_client_demod = client_demod;
1994
1995 /* attach tuner */
1996 memset(&si2157_config, 0, sizeof(si2157_config));
1997 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 1998 si2157_config.if_port = 1;
82c10276
OS
1999 memset(&info, 0, sizeof(struct i2c_board_info));
2000 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2001 info.addr = 0x60;
2002 info.platform_data = &si2157_config;
2003 request_module(info.type);
2004 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC
2005 if (client_tuner == NULL ||
2006 client_tuner->dev.driver == NULL)
82c10276 2007 goto frontend_detach;
82c10276
OS
2008 if (!try_module_get(client_tuner->dev.driver->owner)) {
2009 i2c_unregister_device(client_tuner);
82c10276
OS
2010 goto frontend_detach;
2011 }
0e6c7b01 2012 port->i2c_client_tuner = client_tuner;
2013 break;
2014 case CX23885_BOARD_DVBSKY_S950C:
2015 i2c_bus = &dev->i2c_bus[1];
2016 i2c_bus2 = &dev->i2c_bus[0];
2017
2018 /* attach frontend */
2019 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2020 &dvbsky_s950c_m88ds3103_config,
2021 &i2c_bus->i2c_adap, &adapter);
2022 if (fe0->dvb.frontend == NULL)
2023 break;
2024
2025 /* attach tuner */
d76e0878
AP
2026 memset(&ts2020_config, 0, sizeof(ts2020_config));
2027 ts2020_config.fe = fe0->dvb.frontend;
0e6c7b01 2028 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2029 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
0e6c7b01 2030 info.addr = 0x60;
d76e0878 2031 info.platform_data = &ts2020_config;
0e6c7b01 2032 request_module(info.type);
2033 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2034 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
0e6c7b01 2035 goto frontend_detach;
2036 if (!try_module_get(client_tuner->dev.driver->owner)) {
2037 i2c_unregister_device(client_tuner);
2038 goto frontend_detach;
2039 }
2040
2041 /* delegate signal strength measurement to tuner */
2042 fe0->dvb.frontend->ops.read_signal_strength =
2043 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2044
c29d6a83 2045 port->i2c_client_tuner = client_tuner;
2046 break;
2047 case CX23885_BOARD_DVBSKY_S952:
2048 switch (port->nr) {
2049 /* port b */
2050 case 1:
2051 i2c_bus = &dev->i2c_bus[1];
2052 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config;
2053 p_set_voltage = dvbsky_t9580_set_voltage;
2054 break;
2055 /* port c */
2056 case 2:
2057 i2c_bus = &dev->i2c_bus[0];
2058 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config;
2059 p_set_voltage = dvbsky_s952_portc_set_voltage;
2060 break;
2061 }
2062
2063 /* attach frontend */
2064 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2065 p_m88ds3103_config,
2066 &i2c_bus->i2c_adap, &adapter);
2067 if (fe0->dvb.frontend == NULL)
2068 break;
2069
2070 /* attach tuner */
d76e0878
AP
2071 memset(&ts2020_config, 0, sizeof(ts2020_config));
2072 ts2020_config.fe = fe0->dvb.frontend;
c29d6a83 2073 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2074 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
c29d6a83 2075 info.addr = 0x60;
d76e0878 2076 info.platform_data = &ts2020_config;
c29d6a83 2077 request_module(info.type);
2078 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2079 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
c29d6a83 2080 goto frontend_detach;
2081 if (!try_module_get(client_tuner->dev.driver->owner)) {
2082 i2c_unregister_device(client_tuner);
2083 goto frontend_detach;
2084 }
2085
2086 /* delegate signal strength measurement to tuner */
2087 fe0->dvb.frontend->ops.read_signal_strength =
2088 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2089
2090 /*
2091 * for setting the voltage we need to set GPIOs on
2092 * the card.
2093 */
2094 port->fe_set_voltage =
2095 fe0->dvb.frontend->ops.set_voltage;
2096 fe0->dvb.frontend->ops.set_voltage = p_set_voltage;
2097
c02ef64a
NM
2098 port->i2c_client_tuner = client_tuner;
2099 break;
2100 case CX23885_BOARD_DVBSKY_T982:
2101 memset(&si2168_config, 0, sizeof(si2168_config));
2102 switch (port->nr) {
2103 /* port b */
2104 case 1:
2105 i2c_bus = &dev->i2c_bus[1];
2106 si2168_config.ts_mode = SI2168_TS_PARALLEL;
2107 break;
2108 /* port c */
2109 case 2:
2110 i2c_bus = &dev->i2c_bus[0];
2111 si2168_config.ts_mode = SI2168_TS_SERIAL;
2112 break;
2113 }
2114
2115 /* attach frontend */
2116 si2168_config.i2c_adapter = &adapter;
2117 si2168_config.fe = &fe0->dvb.frontend;
2118 memset(&info, 0, sizeof(struct i2c_board_info));
2119 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2120 info.addr = 0x64;
2121 info.platform_data = &si2168_config;
2122 request_module(info.type);
2123 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 2124 if (client_demod == NULL || client_demod->dev.driver == NULL)
c02ef64a
NM
2125 goto frontend_detach;
2126 if (!try_module_get(client_demod->dev.driver->owner)) {
2127 i2c_unregister_device(client_demod);
2128 goto frontend_detach;
2129 }
2130 port->i2c_client_demod = client_demod;
2131
2132 /* attach tuner */
2133 memset(&si2157_config, 0, sizeof(si2157_config));
2134 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2135 si2157_config.if_port = 1;
c02ef64a
NM
2136 memset(&info, 0, sizeof(struct i2c_board_info));
2137 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2138 info.addr = 0x60;
2139 info.platform_data = &si2157_config;
2140 request_module(info.type);
2141 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC
2142 if (client_tuner == NULL ||
2143 client_tuner->dev.driver == NULL)
c02ef64a 2144 goto frontend_detach;
c02ef64a
NM
2145 if (!try_module_get(client_tuner->dev.driver->owner)) {
2146 i2c_unregister_device(client_tuner);
c02ef64a
NM
2147 goto frontend_detach;
2148 }
82c10276
OS
2149 port->i2c_client_tuner = client_tuner;
2150 break;
1fc77d01
AP
2151 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2152 switch (port->nr) {
2153 struct m88rs6000t_config m88rs6000t_config;
2154
2155 /* port b - satellite */
2156 case 1:
2157 /* attach frontend */
2158 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2159 &hauppauge_hvr5525_m88ds3103_config,
2160 &dev->i2c_bus[0].i2c_adap, &adapter);
2161 if (fe0->dvb.frontend == NULL)
2162 break;
2163
2164 /* attach SEC */
2165 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
2166 &dev->i2c_bus[0].i2c_adap,
2167 &hauppauge_a8293_config))
2168 goto frontend_detach;
2169
2170 /* attach tuner */
2171 memset(&m88rs6000t_config, 0, sizeof(m88rs6000t_config));
2172 m88rs6000t_config.fe = fe0->dvb.frontend;
2173 memset(&info, 0, sizeof(struct i2c_board_info));
2174 strlcpy(info.type, "m88rs6000t", I2C_NAME_SIZE);
2175 info.addr = 0x21;
2176 info.platform_data = &m88rs6000t_config;
2177 request_module("%s", info.type);
2178 client_tuner = i2c_new_device(adapter, &info);
2179 if (!client_tuner || !client_tuner->dev.driver)
2180 goto frontend_detach;
2181 if (!try_module_get(client_tuner->dev.driver->owner)) {
2182 i2c_unregister_device(client_tuner);
2183 goto frontend_detach;
2184 }
2185 port->i2c_client_tuner = client_tuner;
2186
2187 /* delegate signal strength measurement to tuner */
2188 fe0->dvb.frontend->ops.read_signal_strength =
2189 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2190 break;
2191 /* port c - terrestrial/cable */
2192 case 2:
2193 /* attach frontend */
2194 memset(&si2168_config, 0, sizeof(si2168_config));
2195 si2168_config.i2c_adapter = &adapter;
2196 si2168_config.fe = &fe0->dvb.frontend;
2197 si2168_config.ts_mode = SI2168_TS_SERIAL;
2198 memset(&info, 0, sizeof(struct i2c_board_info));
2199 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2200 info.addr = 0x64;
2201 info.platform_data = &si2168_config;
2202 request_module("%s", info.type);
2203 client_demod = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2204 if (!client_demod || !client_demod->dev.driver)
2205 goto frontend_detach;
2206 if (!try_module_get(client_demod->dev.driver->owner)) {
2207 i2c_unregister_device(client_demod);
2208 goto frontend_detach;
2209 }
2210 port->i2c_client_demod = client_demod;
2211
2212 /* attach tuner */
2213 memset(&si2157_config, 0, sizeof(si2157_config));
2214 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2215 si2157_config.if_port = 1;
1fc77d01
AP
2216 memset(&info, 0, sizeof(struct i2c_board_info));
2217 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2218 info.addr = 0x60;
2219 info.platform_data = &si2157_config;
2220 request_module("%s", info.type);
2221 client_tuner = i2c_new_device(&dev->i2c_bus[1].i2c_adap, &info);
2222 if (!client_tuner || !client_tuner->dev.driver) {
2223 module_put(client_demod->dev.driver->owner);
2224 i2c_unregister_device(client_demod);
2225 port->i2c_client_demod = NULL;
2226 goto frontend_detach;
2227 }
2228 if (!try_module_get(client_tuner->dev.driver->owner)) {
2229 i2c_unregister_device(client_tuner);
2230 module_put(client_demod->dev.driver->owner);
2231 i2c_unregister_device(client_demod);
2232 port->i2c_client_demod = NULL;
2233 goto frontend_detach;
2234 }
2235 port->i2c_client_tuner = client_tuner;
2236 break;
2237 }
2238 break;
d19770e5 2239 default:
9c8ced51
ST
2240 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
2241 " isn't supported yet\n",
d19770e5
ST
2242 dev->name);
2243 break;
2244 }
78db8547
IL
2245
2246 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
9c8ced51 2247 printk(KERN_ERR "%s: frontend initialization failed\n",
78db8547
IL
2248 dev->name);
2249 goto frontend_detach;
d19770e5 2250 }
78db8547 2251
d7cba043 2252 /* define general-purpose callback pointer */
363c35fc 2253 fe0->dvb.frontend->callback = cx23885_tuner_callback;
78db8547
IL
2254 if (fe1)
2255 fe1->dvb.frontend->callback = cx23885_tuner_callback;
2256#if 0
2257 /* Ensure all frontends negotiate bus access */
2258 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2259 if (fe1)
2260 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2261#endif
d19770e5
ST
2262
2263 /* Put the analog decoder in standby to keep it quiet */
622b828a 2264 call_all(dev, core, s_power, 0);
d19770e5 2265
363c35fc
ST
2266 if (fe0->dvb.frontend->ops.analog_ops.standby)
2267 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 2268
d19770e5 2269 /* register everything */
453afdd9 2270 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
9adf6132 2271 &dev->pci->dev, adapter_nr, mfe_shared);
bee30192 2272 if (ret)
78db8547 2273 goto frontend_detach;
363c35fc 2274
2b0aac30
MCC
2275 ret = dvb_register_ci_mac(port);
2276 if (ret)
2277 goto frontend_detach;
24e77409 2278
2b0aac30 2279 return 0;
82c10276 2280
2b0aac30 2281frontend_detach:
bf5e3ef0
AP
2282 /* remove I2C client for SEC */
2283 client_sec = port->i2c_client_sec;
2284 if (client_sec) {
2285 module_put(client_sec->dev.driver->owner);
2286 i2c_unregister_device(client_sec);
2287 port->i2c_client_sec = NULL;
2288 }
2289
2b0aac30
MCC
2290 /* remove I2C client for tuner */
2291 client_tuner = port->i2c_client_tuner;
2292 if (client_tuner) {
2293 module_put(client_tuner->dev.driver->owner);
2294 i2c_unregister_device(client_tuner);
2295 port->i2c_client_tuner = NULL;
5a23b076
IL
2296 }
2297
2b0aac30
MCC
2298 /* remove I2C client for demodulator */
2299 client_demod = port->i2c_client_demod;
2300 if (client_demod) {
2301 module_put(client_demod->dev.driver->owner);
2302 i2c_unregister_device(client_demod);
2303 port->i2c_client_demod = NULL;
2304 }
78db8547 2305
78db8547 2306 port->gate_ctrl = NULL;
453afdd9 2307 vb2_dvb_dealloc_frontends(&port->frontends);
78db8547 2308 return -EINVAL;
d19770e5
ST
2309}
2310
2311int cx23885_dvb_register(struct cx23885_tsport *port)
2312{
363c35fc 2313
453afdd9 2314 struct vb2_dvb_frontend *fe0;
d19770e5 2315 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST
2316 int err, i;
2317
2318 /* Here we need to allocate the correct number of frontends,
af901ca1 2319 * as reflected in the cards struct. The reality is that currently
eb0c58bb
ST
2320 * no cx23885 boards support this - yet. But, if we don't modify this
2321 * code then the second frontend would never be allocated (later)
2322 * and fail with error before the attach in dvb_register().
2323 * Without these changes we risk an OOPS later. The changes here
2324 * are for safety, and should provide a good foundation for the
2325 * future addition of any multi-frontend cx23885 based boards.
2326 */
2327 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2328 port->num_frontends);
d19770e5 2329
eb0c58bb 2330 for (i = 1; i <= port->num_frontends; i++) {
453afdd9
HV
2331 struct vb2_queue *q;
2332
2333 if (vb2_dvb_alloc_frontend(
9c8ced51 2334 &port->frontends, i) == NULL) {
eb0c58bb
ST
2335 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2336 return -ENOMEM;
2337 }
2338
453afdd9 2339 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
eb0c58bb 2340 if (!fe0)
ed3da2bf 2341 return -EINVAL;
363c35fc 2342
eb0c58bb 2343 dprintk(1, "%s\n", __func__);
9c8ced51 2344 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST
2345 dev->board,
2346 dev->name,
2347 dev->pci_bus,
2348 dev->pci_slot);
d19770e5 2349
eb0c58bb 2350 err = -ENODEV;
d19770e5 2351
eb0c58bb
ST
2352 /* dvb stuff */
2353 /* We have to init the queue for each frontend on a port. */
9c8ced51 2354 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
453afdd9
HV
2355 q = &fe0->dvb.dvbq;
2356 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2357 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2358 q->gfp_flags = GFP_DMA32;
2359 q->min_buffers_needed = 2;
2360 q->drv_priv = port;
2361 q->buf_struct_size = sizeof(struct cx23885_buffer);
2362 q->ops = &dvb_qops;
2363 q->mem_ops = &vb2_dma_sg_memops;
2364 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2365 q->lock = &dev->lock;
2366
2367 err = vb2_queue_init(q);
2368 if (err < 0)
2369 return err;
eb0c58bb 2370 }
d19770e5
ST
2371 err = dvb_register(port);
2372 if (err != 0)
9c8ced51
ST
2373 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2374 __func__, err);
d19770e5 2375
d19770e5
ST
2376 return err;
2377}
2378
2379int cx23885_dvb_unregister(struct cx23885_tsport *port)
2380{
453afdd9 2381 struct vb2_dvb_frontend *fe0;
b0b12e63
OS
2382 struct i2c_client *client;
2383
e450de45
OS
2384 /* remove I2C client for CI */
2385 client = port->i2c_client_ci;
2386 if (client) {
2387 module_put(client->dev.driver->owner);
2388 i2c_unregister_device(client);
2389 }
2390
bf5e3ef0
AP
2391 /* remove I2C client for SEC */
2392 client = port->i2c_client_sec;
2393 if (client) {
2394 module_put(client->dev.driver->owner);
2395 i2c_unregister_device(client);
2396 }
2397
b0b12e63
OS
2398 /* remove I2C client for tuner */
2399 client = port->i2c_client_tuner;
2400 if (client) {
2401 module_put(client->dev.driver->owner);
2402 i2c_unregister_device(client);
2403 }
2404
2405 /* remove I2C client for demodulator */
2406 client = port->i2c_client_demod;
2407 if (client) {
2408 module_put(client->dev.driver->owner);
2409 i2c_unregister_device(client);
2410 }
363c35fc 2411
453afdd9 2412 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
b0b12e63 2413
e66131ce 2414 if (fe0 && fe0->dvb.frontend)
453afdd9 2415 vb2_dvb_unregister_bus(&port->frontends);
d19770e5 2416
afd96668
HV
2417 switch (port->dev->board) {
2418 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2419 netup_ci_exit(port);
2420 break;
78db8547
IL
2421 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2422 altera_ci_release(port->dev, port->nr);
2423 break;
afd96668 2424 }
5a23b076 2425
78db8547
IL
2426 port->gate_ctrl = NULL;
2427
d19770e5
ST
2428 return 0;
2429}
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