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[media] cx23885: fix I2C scan printout
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST		 16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/fs.h>
22#include <linux/kthread.h>
23#include <linux/file.h>
24#include <linux/suspend.h>
25
26#include "cx23885.h"
d19770e5
ST		 27#include <media/v4l2-common.h>
28
5a23b076 29#include "dvb_ca_en50221.h"
d19770e5 30#include "s5h1409.h"
52b50450 31#include "s5h1411.h"
d19770e5 32#include "mt2131.h"
3ba71d21 33#include "tda8290.h"
4041f1a5 34#include "tda18271.h"
9bc37caa 35#include "lgdt330x.h"
0cf8af57 36#include "xc4000.h"
d1987d55 37#include "xc5000.h"
ea5697fe 38#include "max2165.h"
b3ea0166 39#include "tda10048.h"
07b4a835 40#include "tuner-xc2028.h"
827855d3 41#include "tuner-simple.h"
66762373 42#include "dib7000p.h"
46b21bba 43#include "dib0070.h"
66762373 44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
5a23b076 46#include "stv0900.h"
f867c3f4 47#include "stv0900_reg.h"
5a23b076
IL		 48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
e6001482 51#include "cx24117.h"
5a23b076 52#include "cimax2.h"
493b7127 53#include "lgs8gxx.h"
5a23b076
IL		 54#include "netup-eeprom.h"
55#include "netup-init.h"
a5dbf457 56#include "lgdt3305.h"
ea5697fe 57#include "atbm8830.h"
73f0af44 58#include "ts2020.h"
09ea33e5
IL		 59#include "ds3000.h"
60#include "cx23885-f300.h"
78db8547
IL		 61#include "altera-ci.h"
62#include "stv0367.h"
722c90eb
SR		 63#include "drxk.h"
64#include "mt2063.h"
f667190b
MB		 65#include "stv090x.h"
66#include "stb6100.h"
67#include "stb6100_cfg.h"
7c62f5a1
MK		 68#include "tda10071.h"
69#include "a8293.h"
0d1b5265 70#include "mb86a20s.h"
36efec48 71#include "si2165.h"
29442266
OS		 72#include "si2168.h"
73#include "si2157.h"
24e77409 74#include "sp2.h"
29442266
OS		 75#include "m88ds3103.h"
76#include "m88ts2022.h"
d19770e5 77
4513fc69 78static unsigned int debug;
d19770e5 79
4513fc69
ST		 80#define dprintk(level, fmt, arg...)\
81 do { if (debug >= level)\
82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
83 } while (0)
d19770e5
ST		 84
85/* ------------------------------------------------------------------ */
86
3ba71d21
MK		 87static unsigned int alt_tuner;
88module_param(alt_tuner, int, 0644);
89MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90
78e92006
JG		 91DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92
3ba71d21
MK		 93/* ------------------------------------------------------------------ */
94
453afdd9
HV		 95static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
96 unsigned int *num_buffers, unsigned int *num_planes,
97 unsigned int sizes[], void *alloc_ctxs[])
d19770e5 98{
453afdd9 99 struct cx23885_tsport *port = q->drv_priv;
d19770e5
ST		 100
101 port->ts_packet_size = 188 * 4;
102 port->ts_packet_count = 32;
453afdd9
HV		 103 *num_planes = 1;
104 sizes[0] = port->ts_packet_size * port->ts_packet_count;
0c3a14c1 105 alloc_ctxs[0] = port->dev->alloc_ctx;
453afdd9 106 *num_buffers = 32;
d19770e5
ST		 107 return 0;
108}
109
453afdd9
HV		 110
111static int buffer_prepare(struct vb2_buffer *vb)
d19770e5 112{
453afdd9
HV		 113 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
114 struct cx23885_buffer *buf =
115 container_of(vb, struct cx23885_buffer, vb);
116
117 return cx23885_buf_prepare(buf, port);
d19770e5
ST		 118}
119
453afdd9 120static void buffer_finish(struct vb2_buffer *vb)
d19770e5 121{
453afdd9
HV		 122 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
123 struct cx23885_dev *dev = port->dev;
124 struct cx23885_buffer *buf = container_of(vb,
125 struct cx23885_buffer, vb);
453afdd9
HV		 126
127 cx23885_free_buffer(dev, buf);
d19770e5
ST		 128}
129
453afdd9 130static void buffer_queue(struct vb2_buffer *vb)
d19770e5 131{
453afdd9
HV		 132 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
133 struct cx23885_buffer *buf = container_of(vb,
134 struct cx23885_buffer, vb);
135
136 cx23885_buf_queue(port, buf);
d19770e5
ST		 137}
138
78db8547
IL		 139static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
140{
453afdd9
HV		 141 struct vb2_dvb_frontends *f;
142 struct vb2_dvb_frontend *fe;
78db8547
IL		 143
144 f = &port->frontends;
145
146 if (f->gate <= 1) /* undefined or fe0 */
453afdd9 147 fe = vb2_dvb_get_frontend(f, 1);
78db8547 148 else
453afdd9 149 fe = vb2_dvb_get_frontend(f, f->gate);
78db8547
IL		 150
151 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
152 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
153}
154
453afdd9
HV		 155static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
156{
157 struct cx23885_tsport *port = q->drv_priv;
158 struct cx23885_dmaqueue *dmaq = &port->mpegq;
159 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
160 struct cx23885_buffer, queue);
161
162 cx23885_start_dma(port, dmaq, buf);
163 return 0;
164}
165
166static void cx23885_stop_streaming(struct vb2_queue *q)
167{
168 struct cx23885_tsport *port = q->drv_priv;
169
170 cx23885_cancel_buffers(port);
171}
172
173static struct vb2_ops dvb_qops = {
174 .queue_setup = queue_setup,
175 .buf_prepare = buffer_prepare,
176 .buf_finish = buffer_finish,
177 .buf_queue = buffer_queue,
178 .wait_prepare = vb2_ops_wait_prepare,
179 .wait_finish = vb2_ops_wait_finish,
180 .start_streaming = cx23885_start_streaming,
181 .stop_streaming = cx23885_stop_streaming,
d19770e5
ST		 182};
183
86184e06 184static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST		 185 .demod_address = 0x32 >> 1,
186 .output_mode = S5H1409_SERIAL_OUTPUT,
187 .gpio = S5H1409_GPIO_ON,
2b03238a 188 .qam_if = 44000,
fc959bef 189 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 190 .status_mode = S5H1409_DEMODLOCKING,
191 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST		 192};
193
b3ea0166
ST		 194static struct tda10048_config hauppauge_hvr1200_config = {
195 .demod_address = 0x10 >> 1,
196 .output_mode = TDA10048_SERIAL_OUTPUT,
197 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05 198 .inversion = TDA10048_INVERSION_ON,
8816bef5
ST		 199 .dtv6_if_freq_khz = TDA10048_IF_3300,
200 .dtv7_if_freq_khz = TDA10048_IF_3800,
201 .dtv8_if_freq_khz = TDA10048_IF_4300,
484d9e05 202 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST		 203};
204
6b926eca
MK		 205static struct tda10048_config hauppauge_hvr1210_config = {
206 .demod_address = 0x10 >> 1,
207 .output_mode = TDA10048_SERIAL_OUTPUT,
208 .fwbulkwritelen = TDA10048_BULKWRITE_200,
209 .inversion = TDA10048_INVERSION_ON,
c27586e4
MK		 210 .dtv6_if_freq_khz = TDA10048_IF_3300,
211 .dtv7_if_freq_khz = TDA10048_IF_3500,
212 .dtv8_if_freq_khz = TDA10048_IF_4000,
6b926eca
MK		 213 .clk_freq_khz = TDA10048_CLK_16000,
214};
215
3ba71d21
MK		 216static struct s5h1409_config hauppauge_ezqam_config = {
217 .demod_address = 0x32 >> 1,
218 .output_mode = S5H1409_SERIAL_OUTPUT,
219 .gpio = S5H1409_GPIO_OFF,
220 .qam_if = 4000,
221 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST		 222 .status_mode = S5H1409_DEMODLOCKING,
223 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK		 224};
225
fc959bef 226static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST		 227 .demod_address = 0x32 >> 1,
228 .output_mode = S5H1409_SERIAL_OUTPUT,
229 .gpio = S5H1409_GPIO_OFF,
2b03238a 230 .qam_if = 44000,
fe475163 231 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 232 .status_mode = S5H1409_DEMODLOCKING,
233 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST		 234};
235
07b4a835
MK		 236static struct s5h1409_config hauppauge_hvr1500_config = {
237 .demod_address = 0x32 >> 1,
238 .output_mode = S5H1409_SERIAL_OUTPUT,
239 .gpio = S5H1409_GPIO_OFF,
240 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 241 .status_mode = S5H1409_DEMODLOCKING,
242 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK		 243};
244
86184e06 245static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST		 246 0x61
247};
248
9bc37caa
MK		 249static struct lgdt330x_config fusionhdtv_5_express = {
250 .demod_address = 0x0e,
251 .demod_chip = LGDT3303,
252 .serial_mpeg = 0x40,
253};
254
d1987d55
ST		 255static struct s5h1409_config hauppauge_hvr1500q_config = {
256 .demod_address = 0x32 >> 1,
257 .output_mode = S5H1409_SERIAL_OUTPUT,
258 .gpio = S5H1409_GPIO_ON,
259 .qam_if = 44000,
260 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 261 .status_mode = S5H1409_DEMODLOCKING,
262 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST		 263};
264
335377b7
MK		 265static struct s5h1409_config dvico_s5h1409_config = {
266 .demod_address = 0x32 >> 1,
267 .output_mode = S5H1409_SERIAL_OUTPUT,
268 .gpio = S5H1409_GPIO_ON,
269 .qam_if = 44000,
270 .inversion = S5H1409_INVERSION_OFF,
271 .status_mode = S5H1409_DEMODLOCKING,
272 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
273};
274
52b50450
MK		 275static struct s5h1411_config dvico_s5h1411_config = {
276 .output_mode = S5H1411_SERIAL_OUTPUT,
277 .gpio = S5H1411_GPIO_ON,
278 .qam_if = S5H1411_IF_44000,
279 .vsb_if = S5H1411_IF_44000,
280 .inversion = S5H1411_INVERSION_OFF,
281 .status_mode = S5H1411_DEMODLOCKING,
282 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
283};
284
19bc5796
MK		 285static struct s5h1411_config hcw_s5h1411_config = {
286 .output_mode = S5H1411_SERIAL_OUTPUT,
287 .gpio = S5H1411_GPIO_OFF,
288 .vsb_if = S5H1411_IF_44000,
289 .qam_if = S5H1411_IF_4000,
290 .inversion = S5H1411_INVERSION_ON,
291 .status_mode = S5H1411_DEMODLOCKING,
292 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
293};
294
d1987d55 295static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST		 296 .i2c_address = 0x61,
297 .if_khz = 5380,
d1987d55
ST		 298};
299
335377b7
MK		 300static struct xc5000_config dvico_xc5000_tunerconfig = {
301 .i2c_address = 0x64,
302 .if_khz = 5380,
335377b7
MK		 303};
304
4041f1a5
MK		 305static struct tda829x_config tda829x_no_probe = {
306 .probe_tuner = TDA829X_DONT_PROBE,
307};
308
f21e0d7f 309static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK		 310 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
311 .if_lvl = 6, .rfagc_top = 0x37 },
312 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
313 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK		 314};
315
b34cdc36
MK		 316static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
317 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
318 .if_lvl = 1, .rfagc_top = 0x37, },
319 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
320 .if_lvl = 1, .rfagc_top = 0x37, },
321 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
322 .if_lvl = 1, .rfagc_top = 0x37, },
323};
324
f21e0d7f
MK		 325static struct tda18271_config hauppauge_tda18271_config = {
326 .std_map = &hauppauge_tda18271_std_map,
327 .gate = TDA18271_GATE_ANALOG,
04a68baa 328 .output_opt = TDA18271_OUTPUT_LT_OFF,
f21e0d7f
MK		 329};
330
b3ea0166 331static struct tda18271_config hauppauge_hvr1200_tuner_config = {
b34cdc36 332 .std_map = &hauppauge_hvr1200_tda18271_std_map,
b3ea0166 333 .gate = TDA18271_GATE_ANALOG,
04a68baa 334 .output_opt = TDA18271_OUTPUT_LT_OFF,
b3ea0166
ST		 335};
336
6b926eca
MK		 337static struct tda18271_config hauppauge_hvr1210_tuner_config = {
338 .gate = TDA18271_GATE_DIGITAL,
04a68baa 339 .output_opt = TDA18271_OUTPUT_LT_OFF,
6b926eca
MK		 340};
341
36efec48
MS		 342static struct tda18271_config hauppauge_hvr4400_tuner_config = {
343 .gate = TDA18271_GATE_DIGITAL,
344 .output_opt = TDA18271_OUTPUT_LT_OFF,
345};
346
247bc540 347static struct tda18271_std_map hauppauge_hvr127x_std_map = {
a5dbf457
MK		 348 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
349 .if_lvl = 1, .rfagc_top = 0x58 },
350 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
351 .if_lvl = 1, .rfagc_top = 0x58 },
352};
353
247bc540
MK		 354static struct tda18271_config hauppauge_hvr127x_config = {
355 .std_map = &hauppauge_hvr127x_std_map,
04a68baa 356 .output_opt = TDA18271_OUTPUT_LT_OFF,
a5dbf457
MK		 357};
358
247bc540 359static struct lgdt3305_config hauppauge_lgdt3305_config = {
a5dbf457
MK		 360 .i2c_addr = 0x0e,
361 .mpeg_mode = LGDT3305_MPEG_SERIAL,
362 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
363 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
364 .deny_i2c_rptr = 1,
365 .spectral_inversion = 1,
366 .qam_if_khz = 4000,
367 .vsb_if_khz = 3250,
368};
369
b1721d0d 370static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST		 371 BAND_VHF | BAND_UHF, /* band_caps */
372
373 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
374 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
375 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
376 * P_agc_nb_est=2, P_agc_write=0
377 */
378 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
379 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
380
381 712, /* inv_gain */
382 21, /* time_stabiliz */
383
384 0, /* alpha_level */
385 118, /* thlock */
386
387 0, /* wbd_inv */
388 2867, /* wbd_ref */
389 0, /* wbd_sel */
390 2, /* wbd_alpha */
391
392 0, /* agc1_max */
393 0, /* agc1_min */
394 39718, /* agc2_max */
395 9930, /* agc2_min */
396 0, /* agc1_pt1 */
397 0, /* agc1_pt2 */
398 0, /* agc1_pt3 */
399 0, /* agc1_slope1 */
400 0, /* agc1_slope2 */
401 0, /* agc2_pt1 */
402 128, /* agc2_pt2 */
403 29, /* agc2_slope1 */
404 29, /* agc2_slope2 */
405
406 17, /* alpha_mant */
407 27, /* alpha_exp */
408 23, /* beta_mant */
409 51, /* beta_exp */
410
411 1, /* perform_agc_softsplit */
412};
413
414/* PLL Configuration for COFDM BW_MHz = 8.000000
415 * With external clock = 30.000000 */
b1721d0d 416static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST		 417 60000, /* internal */
418 30000, /* sampling */
419 1, /* pll_cfg: prediv */
420 8, /* pll_cfg: ratio */
421 3, /* pll_cfg: range */
422 1, /* pll_cfg: reset */
423 0, /* pll_cfg: bypass */
424 0, /* misc: refdiv */
425 0, /* misc: bypclk_div */
426 1, /* misc: IO_CLK_en_core */
427 1, /* misc: ADClkSrc */
428 0, /* misc: modulo */
429 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
430 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
431 20452225, /* timf */
432 30000000 /* xtal_hz */
433};
434
435static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
436 .output_mpeg2_in_188_bytes = 1,
437 .hostbus_diversity = 1,
438 .tuner_is_baseband = 0,
439 .update_lna = NULL,
440
441 .agc_config_count = 1,
442 .agc = &xc3028_agc_config,
443 .bw = &xc3028_bw_config,
444
445 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
446 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
447 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
448
449 .pwm_freq_div = 0,
450 .agc_control = NULL,
451 .spur_protect = 0,
452
453 .output_mode = OUTMODE_MPEG2_SERIAL,
454};
455
aef2d186
ST		 456static struct zl10353_config dvico_fusionhdtv_xc3028 = {
457 .demod_address = 0x0f,
458 .if2 = 45600,
459 .no_tuner = 1,
d4dc673d 460 .disable_i2c_gate_ctrl = 1,
aef2d186
ST		 461};
462
f867c3f4
IL		 463static struct stv0900_reg stv0900_ts_regs[] = {
464 { R0900_TSGENERAL, 0x00 },
465 { R0900_P1_TSSPEED, 0x40 },
466 { R0900_P2_TSSPEED, 0x40 },
467 { R0900_P1_TSCFGM, 0xc0 },
468 { R0900_P2_TSCFGM, 0xc0 },
469 { R0900_P1_TSCFGH, 0xe0 },
470 { R0900_P2_TSCFGH, 0xe0 },
471 { R0900_P1_TSCFGL, 0x20 },
472 { R0900_P2_TSCFGL, 0x20 },
473 { 0xffff, 0xff }, /* terminate */
474};
475
5a23b076
IL		 476static struct stv0900_config netup_stv0900_config = {
477 .demod_address = 0x68,
29372a8d 478 .demod_mode = 1, /* dual */
644c7ef0 479 .xtal = 8000000,
5a23b076
IL		 480 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
481 .diseqc_mode = 2,/* 2/3 PWM */
f867c3f4 482 .ts_config_regs = stv0900_ts_regs,
5a23b076
IL		 483 .tun1_maddress = 0,/* 0x60 */
484 .tun2_maddress = 3,/* 0x63 */
485 .tun1_adc = 1,/* 1 Vpp */
486 .tun2_adc = 1,/* 1 Vpp */
487};
488
489static struct stv6110_config netup_stv6110_tunerconfig_a = {
490 .i2c_address = 0x60,
644c7ef0
AO		 491 .mclk = 16000000,
492 .clk_div = 1,
873688cd 493 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 494};
495
496static struct stv6110_config netup_stv6110_tunerconfig_b = {
497 .i2c_address = 0x63,
644c7ef0
AO		 498 .mclk = 16000000,
499 .clk_div = 1,
873688cd 500 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 501};
502
96318d0c 503static struct cx24116_config tbs_cx24116_config = {
09ea33e5 504 .demod_address = 0x55,
96318d0c
IL		 505};
506
e6001482
LA		 507static struct cx24117_config tbs_cx24117_config = {
508 .demod_address = 0x55,
509};
510
09ea33e5
IL		 511static struct ds3000_config tevii_ds3000_config = {
512 .demod_address = 0x68,
579943f5
IL		 513};
514
73f0af44
KD		 515static struct ts2020_config tevii_ts2020_config = {
516 .tuner_address = 0x60,
b858c331 517 .clk_out_div = 1,
8d2b0229 518 .frequency_div = 1146000,
73f0af44
KD		 519};
520
c9b8b04b
IL		 521static struct cx24116_config dvbworld_cx24116_config = {
522 .demod_address = 0x05,
523};
524
493b7127
DW		 525static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
526 .prod = LGS8GXX_PROD_LGS8GL5,
527 .demod_address = 0x19,
528 .serial_ts = 0,
529 .ts_clk_pol = 1,
530 .ts_clk_gated = 1,
531 .if_clk_freq = 30400, /* 30.4 MHz */
532 .if_freq = 5380, /* 5.38 MHz */
533 .if_neg_center = 1,
534 .ext_adc = 0,
535 .adc_signed = 0,
536 .if_neg_edge = 0,
537};
538
539static struct xc5000_config mygica_x8506_xc5000_config = {
540 .i2c_address = 0x61,
541 .if_khz = 5380,
542};
543
0d1b5265
MCC		 544static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
545 .demod_address = 0x10,
546};
547
548static struct xc5000_config mygica_x8507_xc5000_config = {
549 .i2c_address = 0x61,
550 .if_khz = 4000,
551};
552
f667190b 553static struct stv090x_config prof_8000_stv090x_config = {
b858c331
IL		 554 .device = STV0903,
555 .demod_mode = STV090x_SINGLE,
556 .clk_mode = STV090x_CLK_EXT,
557 .xtal = 27000000,
558 .address = 0x6A,
559 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
560 .repeater_level = STV090x_RPTLEVEL_64,
561 .adc1_range = STV090x_ADC_2Vpp,
562 .diseqc_envelope_mode = false,
563
564 .tuner_get_frequency = stb6100_get_frequency,
565 .tuner_set_frequency = stb6100_set_frequency,
566 .tuner_set_bandwidth = stb6100_set_bandwidth,
567 .tuner_get_bandwidth = stb6100_get_bandwidth,
f667190b
MB		 568};
569
570static struct stb6100_config prof_8000_stb6100_config = {
571 .tuner_address = 0x60,
572 .refclock = 27000000,
573};
574
575static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
576{
577 struct cx23885_tsport *port = fe->dvb->priv;
578 struct cx23885_dev *dev = port->dev;
579
580 if (voltage == SEC_VOLTAGE_18)
581 cx_write(MC417_RWD, 0x00001e00);
582 else if (voltage == SEC_VOLTAGE_13)
583 cx_write(MC417_RWD, 0x00001a00);
584 else
585 cx_write(MC417_RWD, 0x00001800);
586 return 0;
587}
588
29442266
OS		 589static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
590 fe_sec_voltage_t voltage)
591{
592 struct cx23885_tsport *port = fe->dvb->priv;
593 struct cx23885_dev *dev = port->dev;
594
595 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
596
597 switch (voltage) {
598 case SEC_VOLTAGE_13:
599 cx23885_gpio_set(dev, GPIO_1);
600 cx23885_gpio_clear(dev, GPIO_0);
601 break;
602 case SEC_VOLTAGE_18:
603 cx23885_gpio_set(dev, GPIO_1);
604 cx23885_gpio_set(dev, GPIO_0);
605 break;
606 case SEC_VOLTAGE_OFF:
607 cx23885_gpio_clear(dev, GPIO_1);
608 cx23885_gpio_clear(dev, GPIO_0);
609 break;
610 }
611
612 /* call the frontend set_voltage function */
613 port->fe_set_voltage(fe, voltage);
614
615 return 0;
616}
617
c29d6a83 618static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe,
619 fe_sec_voltage_t voltage)
620{
621 struct cx23885_tsport *port = fe->dvb->priv;
622 struct cx23885_dev *dev = port->dev;
623
624 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1);
625
626 switch (voltage) {
627 case SEC_VOLTAGE_13:
628 cx23885_gpio_set(dev, GPIO_13);
629 cx23885_gpio_clear(dev, GPIO_12);
630 break;
631 case SEC_VOLTAGE_18:
632 cx23885_gpio_set(dev, GPIO_13);
633 cx23885_gpio_set(dev, GPIO_12);
634 break;
635 case SEC_VOLTAGE_OFF:
636 cx23885_gpio_clear(dev, GPIO_13);
637 cx23885_gpio_clear(dev, GPIO_12);
638 break;
639 }
640 /* call the frontend set_voltage function */
641 return port->fe_set_voltage(fe, voltage);
642}
643
24e77409
OS		 644static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
645 u8 data, int *mem)
646{
647 /* MC417 */
648 #define SP2_DATA 0x000000ff
649 #define SP2_WR 0x00008000
650 #define SP2_RD 0x00004000
651 #define SP2_ACK 0x00001000
652 #define SP2_ADHI 0x00000800
653 #define SP2_ADLO 0x00000400
654 #define SP2_CS1 0x00000200
655 #define SP2_CS0 0x00000100
656 #define SP2_EN_ALL 0x00001000
657 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
658
659 struct cx23885_tsport *port = priv;
660 struct cx23885_dev *dev = port->dev;
661 int ret;
0e6c7b01 662 int tmp = 0;
24e77409
OS		 663 unsigned long timeout;
664
665 mutex_lock(&dev->gpio_lock);
666
667 /* write addr */
668 cx_write(MC417_OEN, SP2_EN_ALL);
669 cx_write(MC417_RWD, SP2_CTRL_OFF |
670 SP2_ADLO | (0xff & addr));
671 cx_clear(MC417_RWD, SP2_ADLO);
672 cx_write(MC417_RWD, SP2_CTRL_OFF |
673 SP2_ADHI | (0xff & (addr >> 8)));
674 cx_clear(MC417_RWD, SP2_ADHI);
675
676 if (read)
677 /* data in */
678 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
679 else
680 /* data out */
681 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
682
683 /* chip select 0 */
684 cx_clear(MC417_RWD, SP2_CS0);
685
686 /* read/write */
687 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
688
689 /* wait for a maximum of 1 msec */
690 timeout = jiffies + msecs_to_jiffies(1);
691 while (!time_after(jiffies, timeout)) {
692 tmp = cx_read(MC417_RWD);
693 if ((tmp & SP2_ACK) == 0)
694 break;
695 usleep_range(50, 100);
696 }
697
698 cx_set(MC417_RWD, SP2_CTRL_OFF);
699 *mem = tmp & 0xff;
700
701 mutex_unlock(&dev->gpio_lock);
702
703 if (!read) {
704 if (*mem < 0) {
705 ret = -EREMOTEIO;
706 goto err;
707 }
708 }
709
710 return 0;
711err:
712 return ret;
713}
714
a7d44baa 715static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
f35b9e80 716{
a7d44baa 717 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
f35b9e80
MK		 718 struct cx23885_tsport *port = fe->dvb->priv;
719 struct cx23885_dev *dev = port->dev;
720
721 switch (dev->board) {
722 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a7d44baa 723 switch (p->modulation) {
f35b9e80
MK		 724 case VSB_8:
725 cx23885_gpio_clear(dev, GPIO_5);
726 break;
727 case QAM_64:
728 case QAM_256:
729 default:
730 cx23885_gpio_set(dev, GPIO_5);
731 break;
732 }
733 break;
6f0d8c02 734 case CX23885_BOARD_MYGICA_X8506:
0d1b5265 735 case CX23885_BOARD_MYGICA_X8507:
6f0d8c02
DW		 736 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
737 /* Select Digital TV */
738 cx23885_gpio_set(dev, GPIO_0);
739 break;
f35b9e80 740 }
15472faf
MCC		 741
742 /* Call the real set_frontend */
743 if (port->set_frontend)
744 return port->set_frontend(fe);
745
5bdd3962 746 return 0;
f35b9e80
MK		 747}
748
15472faf
MCC		 749static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
750 struct dvb_frontend *fe)
751{
752 port->set_frontend = fe->ops.set_frontend;
753 fe->ops.set_frontend = cx23885_dvb_set_frontend;
754}
755
2365b2d3
DW		 756static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
757 .prod = LGS8GXX_PROD_LGS8G75,
758 .demod_address = 0x19,
759 .serial_ts = 0,
760 .ts_clk_pol = 1,
761 .ts_clk_gated = 1,
762 .if_clk_freq = 30400, /* 30.4 MHz */
763 .if_freq = 6500, /* 6.50 MHz */
764 .if_neg_center = 1,
765 .ext_adc = 0,
766 .adc_signed = 1,
767 .adc_vpp = 2, /* 1.6 Vpp */
768 .if_neg_edge = 1,
769};
770
771static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
772 .i2c_address = 0x61,
773 .if_khz = 6500,
774};
775
ea5697fe
DW		 776static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
777 .prod = ATBM8830_PROD_8830,
778 .demod_address = 0x44,
779 .serial_ts = 0,
780 .ts_sampling_edge = 1,
781 .ts_clk_gated = 0,
782 .osc_clk_freq = 30400, /* in kHz */
783 .if_freq = 0, /* zero IF */
784 .zif_swap_iq = 1,
c245c75c
DW		 785 .agc_min = 0x2E,
786 .agc_max = 0xFF,
787 .agc_hold_loop = 0,
ea5697fe
DW		 788};
789
790static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
791 .i2c_address = 0x60,
792 .osc_clk = 20
793};
794
795static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
796 .prod = ATBM8830_PROD_8830,
797 .demod_address = 0x44,
798 .serial_ts = 1,
799 .ts_sampling_edge = 1,
800 .ts_clk_gated = 0,
801 .osc_clk_freq = 30400, /* in kHz */
802 .if_freq = 0, /* zero IF */
803 .zif_swap_iq = 1,
c245c75c
DW		 804 .agc_min = 0x2E,
805 .agc_max = 0xFF,
806 .agc_hold_loop = 0,
ea5697fe
DW		 807};
808
809static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
810 .i2c_address = 0x60,
811 .osc_clk = 20
812};
78db8547
IL		 813static struct stv0367_config netup_stv0367_config[] = {
814 {
815 .demod_address = 0x1c,
816 .xtal = 27000000,
817 .if_khz = 4500,
818 .if_iq_mode = 0,
819 .ts_mode = 1,
820 .clk_pol = 0,
821 }, {
822 .demod_address = 0x1d,
823 .xtal = 27000000,
824 .if_khz = 4500,
825 .if_iq_mode = 0,
826 .ts_mode = 1,
827 .clk_pol = 0,
828 },
829};
830
831static struct xc5000_config netup_xc5000_config[] = {
832 {
833 .i2c_address = 0x61,
834 .if_khz = 4500,
835 }, {
836 .i2c_address = 0x64,
837 .if_khz = 4500,
838 },
839};
840
722c90eb
SR		 841static struct drxk_config terratec_drxk_config[] = {
842 {
843 .adr = 0x29,
844 .no_i2c_bridge = 1,
845 }, {
846 .adr = 0x2a,
847 .no_i2c_bridge = 1,
848 },
849};
850
851static struct mt2063_config terratec_mt2063_config[] = {
852 {
853 .tuner_address = 0x60,
854 }, {
855 .tuner_address = 0x67,
856 },
857};
858
7c62f5a1 859static const struct tda10071_config hauppauge_tda10071_config = {
41f55d57 860 .demod_i2c_addr = 0x05,
7c62f5a1
MK		 861 .tuner_i2c_addr = 0x54,
862 .i2c_wr_max = 64,
863 .ts_mode = TDA10071_TS_SERIAL,
864 .spec_inv = 0,
865 .xtal = 40444000, /* 40.444 MHz */
866 .pll_multiplier = 20,
867};
868
869static const struct a8293_config hauppauge_a8293_config = {
870 .i2c_addr = 0x0b,
871};
872
36efec48
MS		 873static const struct si2165_config hauppauge_hvr4400_si2165_config = {
874 .i2c_addr = 0x64,
875 .chip_mode = SI2165_MODE_PLL_XTAL,
876 .ref_freq_Hz = 16000000,
877};
878
29442266
OS		 879static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
880 .i2c_addr = 0x68,
881 .clock = 27000000,
882 .i2c_wr_max = 33,
883 .clock_out = 0,
884 .ts_mode = M88DS3103_TS_PARALLEL,
885 .ts_clk = 16000,
886 .ts_clk_pol = 1,
887 .lnb_en_pol = 1,
888 .lnb_hv_pol = 0,
889 .agc = 0x99,
890};
891
0e6c7b01 892static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
893 .i2c_addr = 0x68,
894 .clock = 27000000,
895 .i2c_wr_max = 33,
896 .clock_out = 0,
897 .ts_mode = M88DS3103_TS_CI,
898 .ts_clk = 10000,
899 .ts_clk_pol = 1,
900 .lnb_en_pol = 1,
901 .lnb_hv_pol = 0,
902 .agc = 0x99,
903};
904
c29d6a83 905static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = {
906 .i2c_addr = 0x68,
907 .clock = 27000000,
908 .i2c_wr_max = 33,
909 .clock_out = 0,
910 .ts_mode = M88DS3103_TS_SERIAL,
911 .ts_clk = 96000,
912 .ts_clk_pol = 0,
913 .lnb_en_pol = 1,
914 .lnb_hv_pol = 0,
915 .agc = 0x99,
916};
917
ada73eee 918static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
78db8547
IL		 919{
920 struct cx23885_dev *dev = (struct cx23885_dev *)device;
921 unsigned long timeout = jiffies + msecs_to_jiffies(1);
d164460f 922 uint32_t mem = 0;
78db8547 923
d164460f 924 mem = cx_read(MC417_RWD);
78db8547
IL		 925 if (read)
926 cx_set(MC417_OEN, ALT_DATA);
927 else {
928 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
78db8547
IL		 929 mem &= ~ALT_DATA;
930 mem |= (data & ALT_DATA);
78db8547
IL		 931 }
932
933 if (flag)
d164460f 934 mem |= ALT_AD_RG;
78db8547 935 else
d164460f 936 mem &= ~ALT_AD_RG;
78db8547 937
d164460f 938 mem &= ~ALT_CS;
78db8547 939 if (read)
d164460f 940 mem = (mem & ~ALT_RD) | ALT_WR;
78db8547 941 else
d164460f
AO		 942 mem = (mem & ~ALT_WR) | ALT_RD;
943
944 cx_write(MC417_RWD, mem); /* start RW cycle */
78db8547
IL		 945
946 for (;;) {
947 mem = cx_read(MC417_RWD);
948 if ((mem & ALT_RDY) == 0)
949 break;
950 if (time_after(jiffies, timeout))
951 break;
952 udelay(1);
953 }
954
955 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
956 if (read)
957 return mem & ALT_DATA;
958
959 return 0;
960};
ea5697fe 961
46b21bba
JH		 962static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
963{
964 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
965
966 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
967}
968
969static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
970{
971 return 0;
972}
973
974static struct dib0070_config dib7070p_dib0070_config = {
975 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
976 .reset = dib7070_tuner_reset,
977 .sleep = dib7070_tuner_sleep,
978 .clock_khz = 12000,
46b21bba
JH		 979 .freq_offset_khz_vhf = 550,
980 /* .flip_chip = 1, */
981};
982
983/* DIB7070 generic */
984static struct dibx000_agc_config dib7070_agc_config = {
985 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
986
987 /*
988 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
989 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
990 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
991 */
992 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
993 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
994 .inv_gain = 600,
995 .time_stabiliz = 10,
996 .alpha_level = 0,
997 .thlock = 118,
998 .wbd_inv = 0,
999 .wbd_ref = 3530,
1000 .wbd_sel = 1,
1001 .wbd_alpha = 5,
1002 .agc1_max = 65535,
1003 .agc1_min = 0,
1004 .agc2_max = 65535,
1005 .agc2_min = 0,
1006 .agc1_pt1 = 0,
1007 .agc1_pt2 = 40,
1008 .agc1_pt3 = 183,
1009 .agc1_slope1 = 206,
1010 .agc1_slope2 = 255,
1011 .agc2_pt1 = 72,
1012 .agc2_pt2 = 152,
1013 .agc2_slope1 = 88,
1014 .agc2_slope2 = 90,
1015 .alpha_mant = 17,
1016 .alpha_exp = 27,
1017 .beta_mant = 23,
1018 .beta_exp = 51,
1019 .perform_agc_softsplit = 0,
1020};
1021
1022static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
1023 .internal = 60000,
1024 .sampling = 15000,
1025 .pll_prediv = 1,
1026 .pll_ratio = 20,
1027 .pll_range = 3,
1028 .pll_reset = 1,
1029 .pll_bypass = 0,
1030 .enable_refdiv = 0,
1031 .bypclk_div = 0,
1032 .IO_CLK_en_core = 1,
1033 .ADClkSrc = 1,
1034 .modulo = 2,
1035 /* refsel, sel, freq_15k */
1036 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1037 .ifreq = (0 << 25) | 0,
1038 .timf = 20452225,
1039 .xtal_hz = 12000000,
1040};
1041
1042static struct dib7000p_config dib7070p_dib7000p_config = {
1043 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1044 .output_mode = OUTMODE_MPEG2_SERIAL,
1045 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1046 .output_mpeg2_in_188_bytes = 1,
1047
1048 .agc_config_count = 1,
1049 .agc = &dib7070_agc_config,
1050 .bw = &dib7070_bw_config_12_mhz,
1051 .tuner_is_baseband = 1,
1052 .spur_protect = 1,
1053
1054 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1055 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1056 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1057
1058 .hostbus_diversity = 1,
1059};
1060
d19770e5
ST		 1061static int dvb_register(struct cx23885_tsport *port)
1062{
8abe4a0a 1063 struct dib7000p_ops dib7000p_ops;
d19770e5 1064 struct cx23885_dev *dev = port->dev;
493b7127 1065 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
453afdd9 1066 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
29442266
OS		 1067 struct si2168_config si2168_config;
1068 struct si2157_config si2157_config;
24e77409 1069 struct sp2_config sp2_config;
29442266
OS		 1070 struct m88ts2022_config m88ts2022_config;
1071 struct i2c_board_info info;
1072 struct i2c_adapter *adapter;
0e6c7b01 1073 struct i2c_client *client_demod = NULL, *client_tuner = NULL, *client_ci = NULL;
c29d6a83 1074 const struct m88ds3103_config *p_m88ds3103_config = NULL;
1075 int (*p_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage) = NULL;
78db8547 1076 int mfe_shared = 0; /* bus not shared by default */
5a23b076 1077 int ret;
363c35fc 1078
f972e0bd 1079 /* Get the first frontend */
453afdd9 1080 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST		 1081 if (!fe0)
1082 return -EINVAL;
d19770e5 1083
453afdd9 1084 /* init struct vb2_dvb */
363c35fc 1085 fe0->dvb.name = dev->name;
d19770e5 1086
78db8547
IL		 1087 /* multi-frontend gate control is undefined or defaults to fe0 */
1088 port->frontends.gate = 0;
1089
1090 /* Sets the gate control callback to be used by i2c command calls */
1091 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1092
d19770e5
ST		 1093 /* init frontend */
1094 switch (dev->board) {
a77743bc 1095 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 1096 i2c_bus = &dev->i2c_bus[0];
363c35fc 1097 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 1098 &hauppauge_generic_config,
f139fa71 1099 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1100 if (fe0->dvb.frontend == NULL)
1101 break;
1102 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1103 &i2c_bus->i2c_adap,
1104 &hauppauge_generic_tunerconfig, 0);
d19770e5 1105 break;
a5dbf457 1106 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1107 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK		 1108 i2c_bus = &dev->i2c_bus[0];
1109 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
247bc540 1110 &hauppauge_lgdt3305_config,
a5dbf457 1111 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1112 if (fe0->dvb.frontend == NULL)
1113 break;
1114 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1115 0x60, &dev->i2c_bus[1].i2c_adap,
1116 &hauppauge_hvr127x_config);
15472faf
MCC		 1117 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1118 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
a5dbf457 1119 break;
19bc5796 1120 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1121 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
19bc5796
MK		 1122 i2c_bus = &dev->i2c_bus[0];
1123 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1124 &hcw_s5h1411_config,
1125 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1126 if (fe0->dvb.frontend == NULL)
1127 break;
1128
1129 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1130 0x60, &dev->i2c_bus[1].i2c_adap,
1131 &hauppauge_tda18271_config);
0ac60acb
DH		 1132
1133 tda18271_attach(&dev->ts1.analog_fe,
1134 0x60, &dev->i2c_bus[1].i2c_adap,
1135 &hauppauge_tda18271_config);
1136
19bc5796 1137 break;
3ba71d21
MK		 1138 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1139 i2c_bus = &dev->i2c_bus[0];
92abe9ee 1140 switch (alt_tuner) {
3ba71d21 1141 case 1:
363c35fc 1142 fe0->dvb.frontend =
3ba71d21
MK		 1143 dvb_attach(s5h1409_attach,
1144 &hauppauge_ezqam_config,
1145 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1146 if (fe0->dvb.frontend == NULL)
1147 break;
1148
1149 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1150 &dev->i2c_bus[1].i2c_adap, 0x42,
1151 &tda829x_no_probe);
1152 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1153 0x60, &dev->i2c_bus[1].i2c_adap,
1154 &hauppauge_tda18271_config);
3ba71d21
MK		 1155 break;
1156 case 0:
1157 default:
363c35fc 1158 fe0->dvb.frontend =
3ba71d21
MK		 1159 dvb_attach(s5h1409_attach,
1160 &hauppauge_generic_config,
1161 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1162 if (fe0->dvb.frontend == NULL)
1163 break;
1164 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1165 &i2c_bus->i2c_adap,
1166 &hauppauge_generic_tunerconfig, 0);
3ba71d21
MK		 1167 }
1168 break;
fc959bef 1169 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 1170 i2c_bus = &dev->i2c_bus[0];
363c35fc 1171 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 1172 &hauppauge_hvr1800lp_config,
f139fa71 1173 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1174 if (fe0->dvb.frontend == NULL)
1175 break;
1176 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1177 &i2c_bus->i2c_adap,
1178 &hauppauge_generic_tunerconfig, 0);
fc959bef 1179 break;
9bc37caa 1180 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 1181 i2c_bus = &dev->i2c_bus[0];
363c35fc 1182 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 1183 &fusionhdtv_5_express,
f139fa71 1184 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1185 if (fe0->dvb.frontend == NULL)
1186 break;
1187 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1188 &i2c_bus->i2c_adap, 0x61,
1189 TUNER_LG_TDVS_H06XF);
9bc37caa 1190 break;
d1987d55
ST		 1191 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1192 i2c_bus = &dev->i2c_bus[1];
363c35fc 1193 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST		 1194 &hauppauge_hvr1500q_config,
1195 &dev->i2c_bus[0].i2c_adap);
ed3da2bf
MCC		 1196 if (fe0->dvb.frontend == NULL)
1197 break;
1198 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1199 &i2c_bus->i2c_adap,
1200 &hauppauge_hvr1500q_tunerconfig);
d1987d55 1201 break;
07b4a835
MK		 1202 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1203 i2c_bus = &dev->i2c_bus[1];
363c35fc 1204 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK		 1205 &hauppauge_hvr1500_config,
1206 &dev->i2c_bus[0].i2c_adap);
363c35fc 1207 if (fe0->dvb.frontend != NULL) {
07b4a835
MK		 1208 struct dvb_frontend *fe;
1209 struct xc2028_config cfg = {
1210 .i2c_adap = &i2c_bus->i2c_adap,
1211 .i2c_addr = 0x61,
07b4a835
MK		 1212 };
1213 static struct xc2028_ctrl ctl = {
ef80bfeb 1214 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 1215 .max_len = 64,
52c3d29c 1216 .demod = XC3028_FE_OREN538,
07b4a835
MK		 1217 };
1218
1219 fe = dvb_attach(xc2028_attach,
363c35fc 1220 fe0->dvb.frontend, &cfg);
07b4a835
MK		 1221 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1222 fe->ops.tuner_ops.set_config(fe, &ctl);
1223 }
1224 break;
b3ea0166 1225 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1226 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 1227 i2c_bus = &dev->i2c_bus[0];
363c35fc 1228 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST		 1229 &hauppauge_hvr1200_config,
1230 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1231 if (fe0->dvb.frontend == NULL)
1232 break;
1233 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1234 &dev->i2c_bus[1].i2c_adap, 0x42,
1235 &tda829x_no_probe);
1236 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1237 0x60, &dev->i2c_bus[1].i2c_adap,
1238 &hauppauge_hvr1200_tuner_config);
6b926eca
MK		 1239 break;
1240 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1241 i2c_bus = &dev->i2c_bus[0];
1242 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1243 &hauppauge_hvr1210_config,
1244 &i2c_bus->i2c_adap);
1245 if (fe0->dvb.frontend != NULL) {
1246 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1247 0x60, &dev->i2c_bus[1].i2c_adap,
1248 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST		 1249 }
1250 break;
66762373
ST		 1251 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1252 i2c_bus = &dev->i2c_bus[0];
8abe4a0a
MCC		 1253
1254 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1255 return -ENODEV;
1256
1257 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
66762373 1258 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 1259 if (fe0->dvb.frontend != NULL) {
66762373
ST		 1260 struct dvb_frontend *fe;
1261 struct xc2028_config cfg = {
1262 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1263 .i2c_addr = 0x64,
66762373
ST		 1264 };
1265 static struct xc2028_ctrl ctl = {
ef80bfeb 1266 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373 1267 .max_len = 64,
9bed77ee 1268 .demod = XC3028_FE_DIBCOM52,
9c8ced51
ST		 1269 /* This is true for all demods with
1270 v36 firmware? */
0975fc68 1271 .type = XC2028_D2633,
66762373
ST		 1272 };
1273
1274 fe = dvb_attach(xc2028_attach,
363c35fc 1275 fe0->dvb.frontend, &cfg);
66762373
ST		 1276 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1277 fe->ops.tuner_ops.set_config(fe, &ctl);
1278 }
1279 break;
335377b7
MK		 1280 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1281 i2c_bus = &dev->i2c_bus[port->nr - 1];
1282
363c35fc 1283 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK		 1284 &dvico_s5h1409_config,
1285 &i2c_bus->i2c_adap);
363c35fc
ST		 1286 if (fe0->dvb.frontend == NULL)
1287 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK		 1288 &dvico_s5h1411_config,
1289 &i2c_bus->i2c_adap);
363c35fc
ST		 1290 if (fe0->dvb.frontend != NULL)
1291 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 1292 &i2c_bus->i2c_adap,
1293 &dvico_xc5000_tunerconfig);
335377b7 1294 break;
aef2d186
ST		 1295 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1296 i2c_bus = &dev->i2c_bus[port->nr - 1];
1297
363c35fc 1298 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST		 1299 &dvico_fusionhdtv_xc3028,
1300 &i2c_bus->i2c_adap);
363c35fc 1301 if (fe0->dvb.frontend != NULL) {
aef2d186
ST		 1302 struct dvb_frontend *fe;
1303 struct xc2028_config cfg = {
1304 .i2c_adap = &i2c_bus->i2c_adap,
1305 .i2c_addr = 0x61,
aef2d186
ST		 1306 };
1307 static struct xc2028_ctrl ctl = {
ef80bfeb 1308 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST		 1309 .max_len = 64,
1310 .demod = XC3028_FE_ZARLINK456,
1311 };
1312
363c35fc 1313 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST		 1314 &cfg);
1315 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1316 fe->ops.tuner_ops.set_config(fe, &ctl);
1317 }
1318 break;
46b21bba
JH		 1319 }
1320 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1321 i2c_bus = &dev->i2c_bus[port->nr - 1];
1322 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1323 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1324
1325 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1326 return -ENODEV;
1327
1328 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1329 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1330 return -ENODEV;
1331 }
1332 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1333 if (fe0->dvb.frontend != NULL) {
1334 struct i2c_adapter *tun_i2c;
1335
1336 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1337 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1338 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1339 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1340 return -ENODEV;
1341 }
1342 break;
aef2d186 1343 }
4c56b04a 1344 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1345 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1346 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 1347 i2c_bus = &dev->i2c_bus[0];
1348
363c35fc 1349 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST		 1350 &dvico_fusionhdtv_xc3028,
1351 &i2c_bus->i2c_adap);
363c35fc 1352 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST		 1353 struct dvb_frontend *fe;
1354 struct xc2028_config cfg = {
1355 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1356 .i2c_addr = 0x61,
4c56b04a
ST		 1357 };
1358 static struct xc2028_ctrl ctl = {
ef80bfeb 1359 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST		 1360 .max_len = 64,
1361 .demod = XC3028_FE_ZARLINK456,
1362 };
1363
363c35fc 1364 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST		 1365 &cfg);
1366 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1367 fe->ops.tuner_ops.set_config(fe, &ctl);
1368 }
96318d0c 1369 break;
0cf8af57 1370 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1371 i2c_bus = &dev->i2c_bus[0];
1372
1373 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1374 &dvico_fusionhdtv_xc3028,
1375 &i2c_bus->i2c_adap);
1376 if (fe0->dvb.frontend != NULL) {
1377 struct dvb_frontend *fe;
1378 struct xc4000_config cfg = {
1379 .i2c_address = 0x61,
1380 .default_pm = 0,
1381 .dvb_amplitude = 134,
1382 .set_smoothedcvbs = 1,
1383 .if_khz = 4560
1384 };
1385
1386 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1387 &dev->i2c_bus[1].i2c_adap, &cfg);
a7c8aada
MS		 1388 if (!fe) {
1389 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1390 dev->name);
1391 goto frontend_detach;
1392 }
0cf8af57 1393 }
1394 break;
96318d0c 1395 case CX23885_BOARD_TBS_6920:
09ea33e5 1396 i2c_bus = &dev->i2c_bus[1];
96318d0c
IL		 1397
1398 fe0->dvb.frontend = dvb_attach(cx24116_attach,
09ea33e5
IL		 1399 &tbs_cx24116_config,
1400 &i2c_bus->i2c_adap);
96318d0c 1401 if (fe0->dvb.frontend != NULL)
09ea33e5 1402 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
96318d0c 1403
579943f5 1404 break;
e6001482
LA		 1405 case CX23885_BOARD_TBS_6980:
1406 case CX23885_BOARD_TBS_6981:
1407 i2c_bus = &dev->i2c_bus[1];
1408
1409 switch (port->nr) {
1410 /* PORT B */
1411 case 1:
1412 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1413 &tbs_cx24117_config,
d10e8280 1414 &i2c_bus->i2c_adap);
e6001482
LA		 1415 break;
1416 /* PORT C */
1417 case 2:
e6001482
LA		 1418 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1419 &tbs_cx24117_config,
d10e8280 1420 &i2c_bus->i2c_adap);
e6001482
LA		 1421 break;
1422 }
1423 break;
579943f5
IL		 1424 case CX23885_BOARD_TEVII_S470:
1425 i2c_bus = &dev->i2c_bus[1];
1426
09ea33e5
IL		 1427 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1428 &tevii_ds3000_config,
1429 &i2c_bus->i2c_adap);
73f0af44
KD		 1430 if (fe0->dvb.frontend != NULL) {
1431 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1432 &tevii_ts2020_config, &i2c_bus->i2c_adap);
09ea33e5 1433 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
73f0af44 1434 }
579943f5 1435
4c56b04a 1436 break;
c9b8b04b
IL		 1437 case CX23885_BOARD_DVBWORLD_2005:
1438 i2c_bus = &dev->i2c_bus[1];
1439
1440 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1441 &dvbworld_cx24116_config,
1442 &i2c_bus->i2c_adap);
1443 break;
5a23b076
IL		 1444 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1445 i2c_bus = &dev->i2c_bus[0];
1446 switch (port->nr) {
1447 /* port B */
1448 case 1:
1449 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1450 &netup_stv0900_config,
1451 &i2c_bus->i2c_adap, 0);
1452 if (fe0->dvb.frontend != NULL) {
1453 if (dvb_attach(stv6110_attach,
1454 fe0->dvb.frontend,
1455 &netup_stv6110_tunerconfig_a,
1456 &i2c_bus->i2c_adap)) {
1457 if (!dvb_attach(lnbh24_attach,
1458 fe0->dvb.frontend,
1459 &i2c_bus->i2c_adap,
9329fb5b
AO		 1460 LNBH24_PCL | LNBH24_TTX,
1461 LNBH24_TEN, 0x09))
5a23b076
IL		 1462 printk(KERN_ERR
1463 "No LNBH24 found!\n");
1464
1465 }
1466 }
1467 break;
1468 /* port C */
1469 case 2:
1470 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1471 &netup_stv0900_config,
1472 &i2c_bus->i2c_adap, 1);
1473 if (fe0->dvb.frontend != NULL) {
1474 if (dvb_attach(stv6110_attach,
1475 fe0->dvb.frontend,
1476 &netup_stv6110_tunerconfig_b,
1477 &i2c_bus->i2c_adap)) {
1478 if (!dvb_attach(lnbh24_attach,
1479 fe0->dvb.frontend,
1480 &i2c_bus->i2c_adap,
9329fb5b
AO		 1481 LNBH24_PCL | LNBH24_TTX,
1482 LNBH24_TEN, 0x0a))
5a23b076
IL		 1483 printk(KERN_ERR
1484 "No LNBH24 found!\n");
1485
1486 }
1487 }
1488 break;
1489 }
1490 break;
493b7127
DW		 1491 case CX23885_BOARD_MYGICA_X8506:
1492 i2c_bus = &dev->i2c_bus[0];
1493 i2c_bus2 = &dev->i2c_bus[1];
1494 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1495 &mygica_x8506_lgs8gl5_config,
1496 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1497 if (fe0->dvb.frontend == NULL)
1498 break;
1499 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1500 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config);
15472faf 1501 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
493b7127 1502 break;
0d1b5265
MCC		 1503 case CX23885_BOARD_MYGICA_X8507:
1504 i2c_bus = &dev->i2c_bus[0];
1505 i2c_bus2 = &dev->i2c_bus[1];
1506 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1507 &mygica_x8507_mb86a20s_config,
1508 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1509 if (fe0->dvb.frontend == NULL)
1510 break;
1511
1512 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1513 &i2c_bus2->i2c_adap,
1514 &mygica_x8507_xc5000_config);
0d1b5265
MCC		 1515 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1516 break;
2365b2d3
DW		 1517 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1518 i2c_bus = &dev->i2c_bus[0];
1519 i2c_bus2 = &dev->i2c_bus[1];
1520 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1521 &magicpro_prohdtve2_lgs8g75_config,
1522 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1523 if (fe0->dvb.frontend == NULL)
1524 break;
1525 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1526 &i2c_bus2->i2c_adap,
1527 &magicpro_prohdtve2_xc5000_config);
15472faf 1528 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
2365b2d3 1529 break;
13697380 1530 case CX23885_BOARD_HAUPPAUGE_HVR1850:
35045137
ST		 1531 i2c_bus = &dev->i2c_bus[0];
1532 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1533 &hcw_s5h1411_config,
1534 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1535 if (fe0->dvb.frontend == NULL)
1536 break;
1537 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1538 0x60, &dev->i2c_bus[0].i2c_adap,
1539 &hauppauge_tda18271_config);
35045137
ST		 1540
1541 tda18271_attach(&dev->ts1.analog_fe,
1542 0x60, &dev->i2c_bus[1].i2c_adap,
1543 &hauppauge_tda18271_config);
1544
1545 break;
aee0b24c 1546 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 1547 i2c_bus = &dev->i2c_bus[0];
1548 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1549 &hcw_s5h1411_config,
1550 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1551 if (fe0->dvb.frontend == NULL)
1552 break;
1553 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1554 0x60, &dev->i2c_bus[0].i2c_adap,
1555 &hauppauge_tda18271_config);
13697380 1556 break;
ea5697fe
DW		 1557 case CX23885_BOARD_MYGICA_X8558PRO:
1558 switch (port->nr) {
1559 /* port B */
1560 case 1:
1561 i2c_bus = &dev->i2c_bus[0];
1562 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1563 &mygica_x8558pro_atbm8830_cfg1,
1564 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1565 if (fe0->dvb.frontend == NULL)
1566 break;
1567 dvb_attach(max2165_attach, fe0->dvb.frontend,
1568 &i2c_bus->i2c_adap,
1569 &mygic_x8558pro_max2165_cfg1);
ea5697fe
DW		 1570 break;
1571 /* port C */
1572 case 2:
1573 i2c_bus = &dev->i2c_bus[1];
1574 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1575 &mygica_x8558pro_atbm8830_cfg2,
1576 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1577 if (fe0->dvb.frontend == NULL)
1578 break;
1579 dvb_attach(max2165_attach, fe0->dvb.frontend,
1580 &i2c_bus->i2c_adap,
1581 &mygic_x8558pro_max2165_cfg2);
ea5697fe
DW		 1582 }
1583 break;
78db8547
IL		 1584 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1585 i2c_bus = &dev->i2c_bus[0];
1586 mfe_shared = 1;/* MFE */
1587 port->frontends.gate = 0;/* not clear for me yet */
1588 /* ports B, C */
1589 /* MFE frontend 1 DVB-T */
1590 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1591 &netup_stv0367_config[port->nr - 1],
1592 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1593 if (fe0->dvb.frontend == NULL)
1594 break;
1595 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend,
78db8547
IL		 1596 &i2c_bus->i2c_adap,
1597 &netup_xc5000_config[port->nr - 1]))
ed3da2bf
MCC		 1598 goto frontend_detach;
1599 /* load xc5000 firmware */
1600 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1601
78db8547 1602 /* MFE frontend 2 */
453afdd9 1603 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
78db8547
IL		 1604 if (fe1 == NULL)
1605 goto frontend_detach;
1606 /* DVB-C init */
1607 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1608 &netup_stv0367_config[port->nr - 1],
1609 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1610 if (fe1->dvb.frontend == NULL)
1611 break;
1612
1613 fe1->dvb.frontend->id = 1;
1614 if (NULL == dvb_attach(xc5000_attach,
1615 fe1->dvb.frontend,
1616 &i2c_bus->i2c_adap,
1617 &netup_xc5000_config[port->nr - 1]))
1618 goto frontend_detach;
78db8547 1619 break;
722c90eb
SR		 1620 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1621 i2c_bus = &dev->i2c_bus[0];
1622 i2c_bus2 = &dev->i2c_bus[1];
1623
1624 switch (port->nr) {
1625 /* port b */
1626 case 1:
1627 fe0->dvb.frontend = dvb_attach(drxk_attach,
1628 &terratec_drxk_config[0],
1629 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1630 if (fe0->dvb.frontend == NULL)
1631 break;
1632 if (!dvb_attach(mt2063_attach,
1633 fe0->dvb.frontend,
1634 &terratec_mt2063_config[0],
1635 &i2c_bus2->i2c_adap))
1636 goto frontend_detach;
722c90eb
SR		 1637 break;
1638 /* port c */
1639 case 2:
1640 fe0->dvb.frontend = dvb_attach(drxk_attach,
1641 &terratec_drxk_config[1],
1642 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1643 if (fe0->dvb.frontend == NULL)
1644 break;
1645 if (!dvb_attach(mt2063_attach,
1646 fe0->dvb.frontend,
1647 &terratec_mt2063_config[1],
1648 &i2c_bus2->i2c_adap))
1649 goto frontend_detach;
722c90eb
SR		 1650 break;
1651 }
1652 break;
7b134e85
IL		 1653 case CX23885_BOARD_TEVII_S471:
1654 i2c_bus = &dev->i2c_bus[1];
1655
1656 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1657 &tevii_ds3000_config,
1658 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1659 if (fe0->dvb.frontend == NULL)
1660 break;
1661 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1662 &tevii_ts2020_config, &i2c_bus->i2c_adap);
7b134e85 1663 break;
f667190b
MB		 1664 case CX23885_BOARD_PROF_8000:
1665 i2c_bus = &dev->i2c_bus[0];
1666
1667 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1668 &prof_8000_stv090x_config,
1669 &i2c_bus->i2c_adap,
1670 STV090x_DEMODULATOR_0);
ed3da2bf
MCC		 1671 if (fe0->dvb.frontend == NULL)
1672 break;
1673 if (!dvb_attach(stb6100_attach,
1674 fe0->dvb.frontend,
1675 &prof_8000_stb6100_config,
1676 &i2c_bus->i2c_adap))
1677 goto frontend_detach;
f667190b 1678
ed3da2bf 1679 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
f667190b 1680 break;
7c62f5a1
MK		 1681 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1682 i2c_bus = &dev->i2c_bus[0];
36efec48
MS		 1683 i2c_bus2 = &dev->i2c_bus[1];
1684 switch (port->nr) {
1685 /* port b */
1686 case 1:
1687 fe0->dvb.frontend = dvb_attach(tda10071_attach,
7c62f5a1
MK		 1688 &hauppauge_tda10071_config,
1689 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1690 if (fe0->dvb.frontend == NULL)
1691 break;
1692 if (!dvb_attach(a8293_attach, fe0->dvb.frontend,
1693 &i2c_bus->i2c_adap,
1694 &hauppauge_a8293_config))
1695 goto frontend_detach;
36efec48
MS		 1696 break;
1697 /* port c */
1698 case 2:
1699 fe0->dvb.frontend = dvb_attach(si2165_attach,
1700 &hauppauge_hvr4400_si2165_config,
1701 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1702 if (fe0->dvb.frontend == NULL)
1703 break;
1704 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1705 if (!dvb_attach(tda18271_attach,
1706 fe0->dvb.frontend,
1707 0x60, &i2c_bus2->i2c_adap,
1708 &hauppauge_hvr4400_tuner_config))
1709 goto frontend_detach;
36efec48 1710 break;
7c62f5a1
MK		 1711 }
1712 break;
29442266 1713 case CX23885_BOARD_DVBSKY_T9580:
cba5480c 1714 case CX23885_BOARD_DVBSKY_S950:
29442266
OS		 1715 i2c_bus = &dev->i2c_bus[0];
1716 i2c_bus2 = &dev->i2c_bus[1];
1717 switch (port->nr) {
1718 /* port b - satellite */
1719 case 1:
1720 /* attach frontend */
1721 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1722 &dvbsky_t9580_m88ds3103_config,
1723 &i2c_bus2->i2c_adap, &adapter);
1724 if (fe0->dvb.frontend == NULL)
1725 break;
1726
1727 /* attach tuner */
143800a5 1728 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
29442266
OS		 1729 m88ts2022_config.fe = fe0->dvb.frontend;
1730 m88ts2022_config.clock = 27000000;
1731 memset(&info, 0, sizeof(struct i2c_board_info));
1732 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1733 info.addr = 0x60;
1734 info.platform_data = &m88ts2022_config;
1735 request_module(info.type);
1736 client_tuner = i2c_new_device(adapter, &info);
1737 if (client_tuner == NULL ||
1738 client_tuner->dev.driver == NULL)
1739 goto frontend_detach;
1740 if (!try_module_get(client_tuner->dev.driver->owner)) {
1741 i2c_unregister_device(client_tuner);
1742 goto frontend_detach;
1743 }
1744
1745 /* delegate signal strength measurement to tuner */
1746 fe0->dvb.frontend->ops.read_signal_strength =
1747 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1748
1749 /*
1750 * for setting the voltage we need to set GPIOs on
1751 * the card.
1752 */
1753 port->fe_set_voltage =
1754 fe0->dvb.frontend->ops.set_voltage;
1755 fe0->dvb.frontend->ops.set_voltage =
1756 dvbsky_t9580_set_voltage;
1757
1758 port->i2c_client_tuner = client_tuner;
1759
1760 break;
1761 /* port c - terrestrial/cable */
1762 case 2:
1763 /* attach frontend */
143800a5 1764 memset(&si2168_config, 0, sizeof(si2168_config));
29442266
OS		 1765 si2168_config.i2c_adapter = &adapter;
1766 si2168_config.fe = &fe0->dvb.frontend;
1767 si2168_config.ts_mode = SI2168_TS_SERIAL;
1768 memset(&info, 0, sizeof(struct i2c_board_info));
1769 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1770 info.addr = 0x64;
1771 info.platform_data = &si2168_config;
1772 request_module(info.type);
1773 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1774 if (client_demod == NULL ||
1775 client_demod->dev.driver == NULL)
1776 goto frontend_detach;
1777 if (!try_module_get(client_demod->dev.driver->owner)) {
1778 i2c_unregister_device(client_demod);
1779 goto frontend_detach;
1780 }
1781 port->i2c_client_demod = client_demod;
1782
1783 /* attach tuner */
143800a5 1784 memset(&si2157_config, 0, sizeof(si2157_config));
29442266
OS		 1785 si2157_config.fe = fe0->dvb.frontend;
1786 memset(&info, 0, sizeof(struct i2c_board_info));
1787 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1788 info.addr = 0x60;
1789 info.platform_data = &si2157_config;
1790 request_module(info.type);
1791 client_tuner = i2c_new_device(adapter, &info);
1792 if (client_tuner == NULL ||
1793 client_tuner->dev.driver == NULL) {
1794 module_put(client_demod->dev.driver->owner);
1795 i2c_unregister_device(client_demod);
3b952436 1796 port->i2c_client_demod = NULL;
29442266
OS		 1797 goto frontend_detach;
1798 }
1799 if (!try_module_get(client_tuner->dev.driver->owner)) {
1800 i2c_unregister_device(client_tuner);
1801 module_put(client_demod->dev.driver->owner);
1802 i2c_unregister_device(client_demod);
3b952436 1803 port->i2c_client_demod = NULL;
29442266
OS		 1804 goto frontend_detach;
1805 }
1806 port->i2c_client_tuner = client_tuner;
1807 break;
1808 }
1809 break;
82c10276 1810 case CX23885_BOARD_DVBSKY_T980C:
61b103e8 1811 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276 1812 i2c_bus = &dev->i2c_bus[1];
24e77409 1813 i2c_bus2 = &dev->i2c_bus[0];
82c10276
OS		 1814
1815 /* attach frontend */
1816 memset(&si2168_config, 0, sizeof(si2168_config));
1817 si2168_config.i2c_adapter = &adapter;
1818 si2168_config.fe = &fe0->dvb.frontend;
1819 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1820 memset(&info, 0, sizeof(struct i2c_board_info));
1821 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1822 info.addr = 0x64;
1823 info.platform_data = &si2168_config;
1824 request_module(info.type);
1825 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 1826 if (client_demod == NULL || client_demod->dev.driver == NULL)
82c10276
OS		 1827 goto frontend_detach;
1828 if (!try_module_get(client_demod->dev.driver->owner)) {
1829 i2c_unregister_device(client_demod);
1830 goto frontend_detach;
1831 }
1832 port->i2c_client_demod = client_demod;
1833
1834 /* attach tuner */
1835 memset(&si2157_config, 0, sizeof(si2157_config));
1836 si2157_config.fe = fe0->dvb.frontend;
1837 memset(&info, 0, sizeof(struct i2c_board_info));
1838 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1839 info.addr = 0x60;
1840 info.platform_data = &si2157_config;
1841 request_module(info.type);
1842 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1843 if (client_tuner == NULL || client_tuner->dev.driver == NULL) {
82c10276
OS		 1844 module_put(client_demod->dev.driver->owner);
1845 i2c_unregister_device(client_demod);
3b952436 1846 port->i2c_client_demod = NULL;
82c10276
OS		 1847 goto frontend_detach;
1848 }
1849 if (!try_module_get(client_tuner->dev.driver->owner)) {
1850 i2c_unregister_device(client_tuner);
1851 module_put(client_demod->dev.driver->owner);
1852 i2c_unregister_device(client_demod);
3b952436 1853 port->i2c_client_demod = NULL;
82c10276
OS		 1854 goto frontend_detach;
1855 }
0e6c7b01 1856 port->i2c_client_tuner = client_tuner;
1857 break;
1858 case CX23885_BOARD_DVBSKY_S950C:
1859 i2c_bus = &dev->i2c_bus[1];
1860 i2c_bus2 = &dev->i2c_bus[0];
1861
1862 /* attach frontend */
1863 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1864 &dvbsky_s950c_m88ds3103_config,
1865 &i2c_bus->i2c_adap, &adapter);
1866 if (fe0->dvb.frontend == NULL)
1867 break;
1868
1869 /* attach tuner */
1870 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1871 m88ts2022_config.fe = fe0->dvb.frontend;
1872 m88ts2022_config.clock = 27000000;
1873 memset(&info, 0, sizeof(struct i2c_board_info));
1874 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1875 info.addr = 0x60;
1876 info.platform_data = &m88ts2022_config;
1877 request_module(info.type);
1878 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1879 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
0e6c7b01 1880 goto frontend_detach;
1881 if (!try_module_get(client_tuner->dev.driver->owner)) {
1882 i2c_unregister_device(client_tuner);
1883 goto frontend_detach;
1884 }
1885
1886 /* delegate signal strength measurement to tuner */
1887 fe0->dvb.frontend->ops.read_signal_strength =
1888 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1889
c29d6a83 1890 port->i2c_client_tuner = client_tuner;
1891 break;
1892 case CX23885_BOARD_DVBSKY_S952:
1893 switch (port->nr) {
1894 /* port b */
1895 case 1:
1896 i2c_bus = &dev->i2c_bus[1];
1897 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config;
1898 p_set_voltage = dvbsky_t9580_set_voltage;
1899 break;
1900 /* port c */
1901 case 2:
1902 i2c_bus = &dev->i2c_bus[0];
1903 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config;
1904 p_set_voltage = dvbsky_s952_portc_set_voltage;
1905 break;
1906 }
1907
1908 /* attach frontend */
1909 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1910 p_m88ds3103_config,
1911 &i2c_bus->i2c_adap, &adapter);
1912 if (fe0->dvb.frontend == NULL)
1913 break;
1914
1915 /* attach tuner */
1916 memset(&m88ts2022_config, 0, sizeof(m88ts2022_config));
1917 m88ts2022_config.fe = fe0->dvb.frontend;
1918 m88ts2022_config.clock = 27000000;
1919 memset(&info, 0, sizeof(struct i2c_board_info));
1920 strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE);
1921 info.addr = 0x60;
1922 info.platform_data = &m88ts2022_config;
1923 request_module(info.type);
1924 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1925 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
c29d6a83 1926 goto frontend_detach;
1927 if (!try_module_get(client_tuner->dev.driver->owner)) {
1928 i2c_unregister_device(client_tuner);
1929 goto frontend_detach;
1930 }
1931
1932 /* delegate signal strength measurement to tuner */
1933 fe0->dvb.frontend->ops.read_signal_strength =
1934 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1935
1936 /*
1937 * for setting the voltage we need to set GPIOs on
1938 * the card.
1939 */
1940 port->fe_set_voltage =
1941 fe0->dvb.frontend->ops.set_voltage;
1942 fe0->dvb.frontend->ops.set_voltage = p_set_voltage;
1943
c02ef64a
NM		 1944 port->i2c_client_tuner = client_tuner;
1945 break;
1946 case CX23885_BOARD_DVBSKY_T982:
1947 memset(&si2168_config, 0, sizeof(si2168_config));
1948 switch (port->nr) {
1949 /* port b */
1950 case 1:
1951 i2c_bus = &dev->i2c_bus[1];
1952 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1953 break;
1954 /* port c */
1955 case 2:
1956 i2c_bus = &dev->i2c_bus[0];
1957 si2168_config.ts_mode = SI2168_TS_SERIAL;
1958 break;
1959 }
1960
1961 /* attach frontend */
1962 si2168_config.i2c_adapter = &adapter;
1963 si2168_config.fe = &fe0->dvb.frontend;
1964 memset(&info, 0, sizeof(struct i2c_board_info));
1965 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1966 info.addr = 0x64;
1967 info.platform_data = &si2168_config;
1968 request_module(info.type);
1969 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 1970 if (client_demod == NULL || client_demod->dev.driver == NULL)
c02ef64a
NM		 1971 goto frontend_detach;
1972 if (!try_module_get(client_demod->dev.driver->owner)) {
1973 i2c_unregister_device(client_demod);
1974 goto frontend_detach;
1975 }
1976 port->i2c_client_demod = client_demod;
1977
1978 /* attach tuner */
1979 memset(&si2157_config, 0, sizeof(si2157_config));
1980 si2157_config.fe = fe0->dvb.frontend;
1981 memset(&info, 0, sizeof(struct i2c_board_info));
1982 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1983 info.addr = 0x60;
1984 info.platform_data = &si2157_config;
1985 request_module(info.type);
1986 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 1987 if (client_tuner == NULL || client_tuner->dev.driver == NULL) {
c02ef64a
NM		 1988 module_put(client_demod->dev.driver->owner);
1989 i2c_unregister_device(client_demod);
3b952436 1990 port->i2c_client_demod = NULL;
c02ef64a
NM		 1991 goto frontend_detach;
1992 }
1993 if (!try_module_get(client_tuner->dev.driver->owner)) {
1994 i2c_unregister_device(client_tuner);
1995 module_put(client_demod->dev.driver->owner);
1996 i2c_unregister_device(client_demod);
1997 port->i2c_client_demod = NULL;
1998 goto frontend_detach;
1999 }
82c10276
OS		 2000 port->i2c_client_tuner = client_tuner;
2001 break;
d19770e5 2002 default:
9c8ced51
ST		 2003 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
2004 " isn't supported yet\n",
d19770e5
ST		 2005 dev->name);
2006 break;
2007 }
78db8547
IL		 2008
2009 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
9c8ced51 2010 printk(KERN_ERR "%s: frontend initialization failed\n",
78db8547
IL		 2011 dev->name);
2012 goto frontend_detach;
d19770e5 2013 }
78db8547 2014
d7cba043 2015 /* define general-purpose callback pointer */
363c35fc 2016 fe0->dvb.frontend->callback = cx23885_tuner_callback;
78db8547
IL		 2017 if (fe1)
2018 fe1->dvb.frontend->callback = cx23885_tuner_callback;
2019#if 0
2020 /* Ensure all frontends negotiate bus access */
2021 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2022 if (fe1)
2023 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2024#endif
d19770e5
ST		 2025
2026 /* Put the analog decoder in standby to keep it quiet */
622b828a 2027 call_all(dev, core, s_power, 0);
d19770e5 2028
363c35fc
ST		 2029 if (fe0->dvb.frontend->ops.analog_ops.standby)
2030 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 2031
d19770e5 2032 /* register everything */
453afdd9 2033 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
9adf6132 2034 &dev->pci->dev, adapter_nr, mfe_shared);
bee30192 2035 if (ret)
78db8547 2036 goto frontend_detach;
363c35fc 2037
5a23b076
IL		 2038 /* init CI & MAC */
2039 switch (dev->board) {
2040 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
2041 static struct netup_card_info cinfo;
2042
2043 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
2044 memcpy(port->frontends.adapter.proposed_mac,
2045 cinfo.port[port->nr - 1].mac, 6);
be395157 2046 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
2047 port->nr, port->frontends.adapter.proposed_mac);
5a23b076
IL		 2048
2049 netup_ci_init(port);
2050 break;
2051 }
78db8547
IL		 2052 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
2053 struct altera_ci_config netup_ci_cfg = {
2054 .dev = dev,/* magic number to identify*/
2055 .adapter = &port->frontends.adapter,/* for CI */
2056 .demux = &fe0->dvb.demux,/* for hw pid filter */
2057 .fpga_rw = netup_altera_fpga_rw,
2058 };
2059
2060 altera_ci_init(&netup_ci_cfg, port->nr);
2061 break;
2062 }
16bfdaa4
PG		 2063 case CX23885_BOARD_TEVII_S470: {
2064 u8 eeprom[256]; /* 24C02 i2c eeprom */
2065
2066 if (port->nr != 1)
2067 break;
2068
2069 /* Read entire EEPROM */
2070 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2071 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
5cac1f66 2072 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
16bfdaa4
PG		 2073 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
2074 break;
2075 }
cba5480c 2076 case CX23885_BOARD_DVBSKY_T9580:
c29d6a83 2077 case CX23885_BOARD_DVBSKY_S950:
c02ef64a
NM		 2078 case CX23885_BOARD_DVBSKY_S952:
2079 case CX23885_BOARD_DVBSKY_T982: {
29442266
OS		 2080 u8 eeprom[256]; /* 24C02 i2c eeprom */
2081
2082 if (port->nr > 2)
2083 break;
2084
2085 /* Read entire EEPROM */
2086 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2087 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
2088 sizeof(eeprom));
cba5480c 2089 printk(KERN_INFO "%s port %d MAC address: %pM\n",
2090 cx23885_boards[dev->board].name, port->nr,
2091 eeprom + 0xc0 + (port->nr-1) * 8);
29442266
OS		 2092 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
2093 (port->nr-1) * 8, 6);
2094 break;
2095 }
0e6c7b01 2096 case CX23885_BOARD_DVBSKY_S950C:
61b103e8
OS		 2097 case CX23885_BOARD_DVBSKY_T980C:
2098 case CX23885_BOARD_TT_CT2_4500_CI: {
82c10276
OS		 2099 u8 eeprom[256]; /* 24C02 i2c eeprom */
2100
24e77409
OS		 2101 /* attach CI */
2102 memset(&sp2_config, 0, sizeof(sp2_config));
2103 sp2_config.dvb_adap = &port->frontends.adapter;
2104 sp2_config.priv = port;
2105 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
2106 memset(&info, 0, sizeof(struct i2c_board_info));
2107 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
2108 info.addr = 0x40;
2109 info.platform_data = &sp2_config;
2110 request_module(info.type);
2111 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
a593f2cf 2112 if (client_ci == NULL || client_ci->dev.driver == NULL) {
0e6c7b01 2113 if (client_tuner) {
2114 module_put(client_tuner->dev.driver->owner);
2115 i2c_unregister_device(client_tuner);
2116 }
2117 if (client_demod) {
2118 module_put(client_demod->dev.driver->owner);
2119 i2c_unregister_device(client_demod);
2120 }
24e77409
OS		 2121 goto frontend_detach;
2122 }
2123 if (!try_module_get(client_ci->dev.driver->owner)) {
2124 i2c_unregister_device(client_ci);
0e6c7b01 2125 if (client_tuner) {
2126 module_put(client_tuner->dev.driver->owner);
2127 i2c_unregister_device(client_tuner);
2128 }
2129 if (client_demod) {
2130 module_put(client_demod->dev.driver->owner);
2131 i2c_unregister_device(client_demod);
2132 }
24e77409
OS		 2133 goto frontend_detach;
2134 }
2135 port->i2c_client_ci = client_ci;
2136
82c10276
OS		 2137 if (port->nr != 1)
2138 break;
2139
2140 /* Read entire EEPROM */
2141 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
2142 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
2143 sizeof(eeprom));
61b103e8
OS		 2144 printk(KERN_INFO "%s MAC address: %pM\n",
2145 cx23885_boards[dev->board].name, eeprom + 0xc0);
82c10276
OS		 2146 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
2147 break;
2148 }
5a23b076
IL		 2149 }
2150
2151 return ret;
78db8547
IL		 2152
2153frontend_detach:
2154 port->gate_ctrl = NULL;
453afdd9 2155 vb2_dvb_dealloc_frontends(&port->frontends);
78db8547 2156 return -EINVAL;
d19770e5
ST		 2157}
2158
2159int cx23885_dvb_register(struct cx23885_tsport *port)
2160{
363c35fc 2161
453afdd9 2162 struct vb2_dvb_frontend *fe0;
d19770e5 2163 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST		 2164 int err, i;
2165
2166 /* Here we need to allocate the correct number of frontends,
af901ca1 2167 * as reflected in the cards struct. The reality is that currently
eb0c58bb
ST		 2168 * no cx23885 boards support this - yet. But, if we don't modify this
2169 * code then the second frontend would never be allocated (later)
2170 * and fail with error before the attach in dvb_register().
2171 * Without these changes we risk an OOPS later. The changes here
2172 * are for safety, and should provide a good foundation for the
2173 * future addition of any multi-frontend cx23885 based boards.
2174 */
2175 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2176 port->num_frontends);
d19770e5 2177
eb0c58bb 2178 for (i = 1; i <= port->num_frontends; i++) {
453afdd9
HV		 2179 struct vb2_queue *q;
2180
2181 if (vb2_dvb_alloc_frontend(
9c8ced51 2182 &port->frontends, i) == NULL) {
eb0c58bb
ST		 2183 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2184 return -ENOMEM;
2185 }
2186
453afdd9 2187 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
eb0c58bb 2188 if (!fe0)
ed3da2bf 2189 return -EINVAL;
363c35fc 2190
eb0c58bb 2191 dprintk(1, "%s\n", __func__);
9c8ced51 2192 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST		 2193 dev->board,
2194 dev->name,
2195 dev->pci_bus,
2196 dev->pci_slot);
d19770e5 2197
eb0c58bb 2198 err = -ENODEV;
d19770e5 2199
eb0c58bb
ST		 2200 /* dvb stuff */
2201 /* We have to init the queue for each frontend on a port. */
9c8ced51 2202 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
453afdd9
HV		 2203 q = &fe0->dvb.dvbq;
2204 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2205 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2206 q->gfp_flags = GFP_DMA32;
2207 q->min_buffers_needed = 2;
2208 q->drv_priv = port;
2209 q->buf_struct_size = sizeof(struct cx23885_buffer);
2210 q->ops = &dvb_qops;
2211 q->mem_ops = &vb2_dma_sg_memops;
2212 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2213 q->lock = &dev->lock;
2214
2215 err = vb2_queue_init(q);
2216 if (err < 0)
2217 return err;
eb0c58bb 2218 }
d19770e5
ST		 2219 err = dvb_register(port);
2220 if (err != 0)
9c8ced51
ST		 2221 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2222 __func__, err);
d19770e5 2223
d19770e5
ST		 2224 return err;
2225}
2226
2227int cx23885_dvb_unregister(struct cx23885_tsport *port)
2228{
453afdd9 2229 struct vb2_dvb_frontend *fe0;
b0b12e63
OS		 2230 struct i2c_client *client;
2231
e450de45
OS		 2232 /* remove I2C client for CI */
2233 client = port->i2c_client_ci;
2234 if (client) {
2235 module_put(client->dev.driver->owner);
2236 i2c_unregister_device(client);
2237 }
2238
b0b12e63
OS		 2239 /* remove I2C client for tuner */
2240 client = port->i2c_client_tuner;
2241 if (client) {
2242 module_put(client->dev.driver->owner);
2243 i2c_unregister_device(client);
2244 }
2245
2246 /* remove I2C client for demodulator */
2247 client = port->i2c_client_demod;
2248 if (client) {
2249 module_put(client->dev.driver->owner);
2250 i2c_unregister_device(client);
2251 }
363c35fc 2252
453afdd9 2253 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
b0b12e63 2254
e66131ce 2255 if (fe0 && fe0->dvb.frontend)
453afdd9 2256 vb2_dvb_unregister_bus(&port->frontends);
d19770e5 2257
afd96668
HV		 2258 switch (port->dev->board) {
2259 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2260 netup_ci_exit(port);
2261 break;
78db8547
IL		 2262 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2263 altera_ci_release(port->dev, port->nr);
2264 break;
afd96668 2265 }
5a23b076 2266
78db8547
IL		 2267 port->gate_ctrl = NULL;
2268
d19770e5
ST		 2269 return 0;
2270}
Linux kernel - Deliverables
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