Commit | Line | Data |
---|---|---|
d19770e5 ST |
1 | /* |
2 | * Driver for the Conexant CX23885 PCIe bridge | |
3 | * | |
6d897616 | 4 | * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> |
d19770e5 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
d19770e5 ST |
16 | */ |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/fs.h> | |
22 | #include <linux/kthread.h> | |
23 | #include <linux/file.h> | |
24 | #include <linux/suspend.h> | |
25 | ||
26 | #include "cx23885.h" | |
d19770e5 ST |
27 | #include <media/v4l2-common.h> |
28 | ||
5a23b076 | 29 | #include "dvb_ca_en50221.h" |
d19770e5 | 30 | #include "s5h1409.h" |
52b50450 | 31 | #include "s5h1411.h" |
d19770e5 | 32 | #include "mt2131.h" |
3ba71d21 | 33 | #include "tda8290.h" |
4041f1a5 | 34 | #include "tda18271.h" |
9bc37caa | 35 | #include "lgdt330x.h" |
0cf8af57 | 36 | #include "xc4000.h" |
d1987d55 | 37 | #include "xc5000.h" |
ea5697fe | 38 | #include "max2165.h" |
b3ea0166 | 39 | #include "tda10048.h" |
07b4a835 | 40 | #include "tuner-xc2028.h" |
827855d3 | 41 | #include "tuner-simple.h" |
66762373 | 42 | #include "dib7000p.h" |
46b21bba | 43 | #include "dib0070.h" |
66762373 | 44 | #include "dibx000_common.h" |
aef2d186 | 45 | #include "zl10353.h" |
5a23b076 | 46 | #include "stv0900.h" |
f867c3f4 | 47 | #include "stv0900_reg.h" |
5a23b076 IL |
48 | #include "stv6110.h" |
49 | #include "lnbh24.h" | |
96318d0c | 50 | #include "cx24116.h" |
e6001482 | 51 | #include "cx24117.h" |
5a23b076 | 52 | #include "cimax2.h" |
493b7127 | 53 | #include "lgs8gxx.h" |
5a23b076 IL |
54 | #include "netup-eeprom.h" |
55 | #include "netup-init.h" | |
a5dbf457 | 56 | #include "lgdt3305.h" |
ea5697fe | 57 | #include "atbm8830.h" |
73f0af44 | 58 | #include "ts2020.h" |
09ea33e5 IL |
59 | #include "ds3000.h" |
60 | #include "cx23885-f300.h" | |
78db8547 IL |
61 | #include "altera-ci.h" |
62 | #include "stv0367.h" | |
722c90eb SR |
63 | #include "drxk.h" |
64 | #include "mt2063.h" | |
f667190b MB |
65 | #include "stv090x.h" |
66 | #include "stb6100.h" | |
67 | #include "stb6100_cfg.h" | |
7c62f5a1 MK |
68 | #include "tda10071.h" |
69 | #include "a8293.h" | |
0d1b5265 | 70 | #include "mb86a20s.h" |
36efec48 | 71 | #include "si2165.h" |
29442266 OS |
72 | #include "si2168.h" |
73 | #include "si2157.h" | |
74 | #include "m88ds3103.h" | |
75 | #include "m88ts2022.h" | |
d19770e5 | 76 | |
4513fc69 | 77 | static unsigned int debug; |
d19770e5 | 78 | |
4513fc69 ST |
79 | #define dprintk(level, fmt, arg...)\ |
80 | do { if (debug >= level)\ | |
81 | printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\ | |
82 | } while (0) | |
d19770e5 ST |
83 | |
84 | /* ------------------------------------------------------------------ */ | |
85 | ||
3ba71d21 MK |
86 | static unsigned int alt_tuner; |
87 | module_param(alt_tuner, int, 0644); | |
88 | MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration"); | |
89 | ||
78e92006 JG |
90 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
91 | ||
3ba71d21 MK |
92 | /* ------------------------------------------------------------------ */ |
93 | ||
453afdd9 HV |
94 | static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt, |
95 | unsigned int *num_buffers, unsigned int *num_planes, | |
96 | unsigned int sizes[], void *alloc_ctxs[]) | |
d19770e5 | 97 | { |
453afdd9 | 98 | struct cx23885_tsport *port = q->drv_priv; |
d19770e5 ST |
99 | |
100 | port->ts_packet_size = 188 * 4; | |
101 | port->ts_packet_count = 32; | |
453afdd9 HV |
102 | *num_planes = 1; |
103 | sizes[0] = port->ts_packet_size * port->ts_packet_count; | |
104 | *num_buffers = 32; | |
d19770e5 ST |
105 | return 0; |
106 | } | |
107 | ||
453afdd9 HV |
108 | |
109 | static int buffer_prepare(struct vb2_buffer *vb) | |
d19770e5 | 110 | { |
453afdd9 HV |
111 | struct cx23885_tsport *port = vb->vb2_queue->drv_priv; |
112 | struct cx23885_buffer *buf = | |
113 | container_of(vb, struct cx23885_buffer, vb); | |
114 | ||
115 | return cx23885_buf_prepare(buf, port); | |
d19770e5 ST |
116 | } |
117 | ||
453afdd9 | 118 | static void buffer_finish(struct vb2_buffer *vb) |
d19770e5 | 119 | { |
453afdd9 HV |
120 | struct cx23885_tsport *port = vb->vb2_queue->drv_priv; |
121 | struct cx23885_dev *dev = port->dev; | |
122 | struct cx23885_buffer *buf = container_of(vb, | |
123 | struct cx23885_buffer, vb); | |
124 | struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0); | |
125 | ||
126 | cx23885_free_buffer(dev, buf); | |
127 | ||
128 | dma_unmap_sg(&dev->pci->dev, sgt->sgl, sgt->nents, DMA_FROM_DEVICE); | |
d19770e5 ST |
129 | } |
130 | ||
453afdd9 | 131 | static void buffer_queue(struct vb2_buffer *vb) |
d19770e5 | 132 | { |
453afdd9 HV |
133 | struct cx23885_tsport *port = vb->vb2_queue->drv_priv; |
134 | struct cx23885_buffer *buf = container_of(vb, | |
135 | struct cx23885_buffer, vb); | |
136 | ||
137 | cx23885_buf_queue(port, buf); | |
d19770e5 ST |
138 | } |
139 | ||
78db8547 IL |
140 | static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open) |
141 | { | |
453afdd9 HV |
142 | struct vb2_dvb_frontends *f; |
143 | struct vb2_dvb_frontend *fe; | |
78db8547 IL |
144 | |
145 | f = &port->frontends; | |
146 | ||
147 | if (f->gate <= 1) /* undefined or fe0 */ | |
453afdd9 | 148 | fe = vb2_dvb_get_frontend(f, 1); |
78db8547 | 149 | else |
453afdd9 | 150 | fe = vb2_dvb_get_frontend(f, f->gate); |
78db8547 IL |
151 | |
152 | if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) | |
153 | fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); | |
154 | } | |
155 | ||
453afdd9 HV |
156 | static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count) |
157 | { | |
158 | struct cx23885_tsport *port = q->drv_priv; | |
159 | struct cx23885_dmaqueue *dmaq = &port->mpegq; | |
160 | struct cx23885_buffer *buf = list_entry(dmaq->active.next, | |
161 | struct cx23885_buffer, queue); | |
162 | ||
163 | cx23885_start_dma(port, dmaq, buf); | |
164 | return 0; | |
165 | } | |
166 | ||
167 | static void cx23885_stop_streaming(struct vb2_queue *q) | |
168 | { | |
169 | struct cx23885_tsport *port = q->drv_priv; | |
170 | ||
171 | cx23885_cancel_buffers(port); | |
172 | } | |
173 | ||
174 | static struct vb2_ops dvb_qops = { | |
175 | .queue_setup = queue_setup, | |
176 | .buf_prepare = buffer_prepare, | |
177 | .buf_finish = buffer_finish, | |
178 | .buf_queue = buffer_queue, | |
179 | .wait_prepare = vb2_ops_wait_prepare, | |
180 | .wait_finish = vb2_ops_wait_finish, | |
181 | .start_streaming = cx23885_start_streaming, | |
182 | .stop_streaming = cx23885_stop_streaming, | |
d19770e5 ST |
183 | }; |
184 | ||
86184e06 | 185 | static struct s5h1409_config hauppauge_generic_config = { |
fc959bef ST |
186 | .demod_address = 0x32 >> 1, |
187 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
188 | .gpio = S5H1409_GPIO_ON, | |
2b03238a | 189 | .qam_if = 44000, |
fc959bef | 190 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
191 | .status_mode = S5H1409_DEMODLOCKING, |
192 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
fc959bef ST |
193 | }; |
194 | ||
b3ea0166 ST |
195 | static struct tda10048_config hauppauge_hvr1200_config = { |
196 | .demod_address = 0x10 >> 1, | |
197 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
198 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
484d9e05 | 199 | .inversion = TDA10048_INVERSION_ON, |
8816bef5 ST |
200 | .dtv6_if_freq_khz = TDA10048_IF_3300, |
201 | .dtv7_if_freq_khz = TDA10048_IF_3800, | |
202 | .dtv8_if_freq_khz = TDA10048_IF_4300, | |
484d9e05 | 203 | .clk_freq_khz = TDA10048_CLK_16000, |
b3ea0166 ST |
204 | }; |
205 | ||
6b926eca MK |
206 | static struct tda10048_config hauppauge_hvr1210_config = { |
207 | .demod_address = 0x10 >> 1, | |
208 | .output_mode = TDA10048_SERIAL_OUTPUT, | |
209 | .fwbulkwritelen = TDA10048_BULKWRITE_200, | |
210 | .inversion = TDA10048_INVERSION_ON, | |
c27586e4 MK |
211 | .dtv6_if_freq_khz = TDA10048_IF_3300, |
212 | .dtv7_if_freq_khz = TDA10048_IF_3500, | |
213 | .dtv8_if_freq_khz = TDA10048_IF_4000, | |
6b926eca MK |
214 | .clk_freq_khz = TDA10048_CLK_16000, |
215 | }; | |
216 | ||
3ba71d21 MK |
217 | static struct s5h1409_config hauppauge_ezqam_config = { |
218 | .demod_address = 0x32 >> 1, | |
219 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
220 | .gpio = S5H1409_GPIO_OFF, | |
221 | .qam_if = 4000, | |
222 | .inversion = S5H1409_INVERSION_ON, | |
dfc1c08a ST |
223 | .status_mode = S5H1409_DEMODLOCKING, |
224 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
3ba71d21 MK |
225 | }; |
226 | ||
fc959bef | 227 | static struct s5h1409_config hauppauge_hvr1800lp_config = { |
d19770e5 ST |
228 | .demod_address = 0x32 >> 1, |
229 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
230 | .gpio = S5H1409_GPIO_OFF, | |
2b03238a | 231 | .qam_if = 44000, |
fe475163 | 232 | .inversion = S5H1409_INVERSION_OFF, |
dfc1c08a ST |
233 | .status_mode = S5H1409_DEMODLOCKING, |
234 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d19770e5 ST |
235 | }; |
236 | ||
07b4a835 MK |
237 | static struct s5h1409_config hauppauge_hvr1500_config = { |
238 | .demod_address = 0x32 >> 1, | |
239 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
240 | .gpio = S5H1409_GPIO_OFF, | |
241 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
242 | .status_mode = S5H1409_DEMODLOCKING, |
243 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
07b4a835 MK |
244 | }; |
245 | ||
86184e06 | 246 | static struct mt2131_config hauppauge_generic_tunerconfig = { |
a77743bc ST |
247 | 0x61 |
248 | }; | |
249 | ||
9bc37caa MK |
250 | static struct lgdt330x_config fusionhdtv_5_express = { |
251 | .demod_address = 0x0e, | |
252 | .demod_chip = LGDT3303, | |
253 | .serial_mpeg = 0x40, | |
254 | }; | |
255 | ||
d1987d55 ST |
256 | static struct s5h1409_config hauppauge_hvr1500q_config = { |
257 | .demod_address = 0x32 >> 1, | |
258 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
259 | .gpio = S5H1409_GPIO_ON, | |
260 | .qam_if = 44000, | |
261 | .inversion = S5H1409_INVERSION_OFF, | |
dfc1c08a ST |
262 | .status_mode = S5H1409_DEMODLOCKING, |
263 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
d1987d55 ST |
264 | }; |
265 | ||
335377b7 MK |
266 | static struct s5h1409_config dvico_s5h1409_config = { |
267 | .demod_address = 0x32 >> 1, | |
268 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
269 | .gpio = S5H1409_GPIO_ON, | |
270 | .qam_if = 44000, | |
271 | .inversion = S5H1409_INVERSION_OFF, | |
272 | .status_mode = S5H1409_DEMODLOCKING, | |
273 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
274 | }; | |
275 | ||
52b50450 MK |
276 | static struct s5h1411_config dvico_s5h1411_config = { |
277 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
278 | .gpio = S5H1411_GPIO_ON, | |
279 | .qam_if = S5H1411_IF_44000, | |
280 | .vsb_if = S5H1411_IF_44000, | |
281 | .inversion = S5H1411_INVERSION_OFF, | |
282 | .status_mode = S5H1411_DEMODLOCKING, | |
283 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
284 | }; | |
285 | ||
19bc5796 MK |
286 | static struct s5h1411_config hcw_s5h1411_config = { |
287 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
288 | .gpio = S5H1411_GPIO_OFF, | |
289 | .vsb_if = S5H1411_IF_44000, | |
290 | .qam_if = S5H1411_IF_4000, | |
291 | .inversion = S5H1411_INVERSION_ON, | |
292 | .status_mode = S5H1411_DEMODLOCKING, | |
293 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
294 | }; | |
295 | ||
d1987d55 | 296 | static struct xc5000_config hauppauge_hvr1500q_tunerconfig = { |
e12671cf ST |
297 | .i2c_address = 0x61, |
298 | .if_khz = 5380, | |
d1987d55 ST |
299 | }; |
300 | ||
335377b7 MK |
301 | static struct xc5000_config dvico_xc5000_tunerconfig = { |
302 | .i2c_address = 0x64, | |
303 | .if_khz = 5380, | |
335377b7 MK |
304 | }; |
305 | ||
4041f1a5 MK |
306 | static struct tda829x_config tda829x_no_probe = { |
307 | .probe_tuner = TDA829X_DONT_PROBE, | |
308 | }; | |
309 | ||
f21e0d7f | 310 | static struct tda18271_std_map hauppauge_tda18271_std_map = { |
c0dc0c11 MK |
311 | .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, |
312 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
313 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, | |
314 | .if_lvl = 6, .rfagc_top = 0x37 }, | |
f21e0d7f MK |
315 | }; |
316 | ||
b34cdc36 MK |
317 | static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = { |
318 | .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4, | |
319 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
320 | .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5, | |
321 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
322 | .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6, | |
323 | .if_lvl = 1, .rfagc_top = 0x37, }, | |
324 | }; | |
325 | ||
f21e0d7f MK |
326 | static struct tda18271_config hauppauge_tda18271_config = { |
327 | .std_map = &hauppauge_tda18271_std_map, | |
328 | .gate = TDA18271_GATE_ANALOG, | |
04a68baa | 329 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
f21e0d7f MK |
330 | }; |
331 | ||
b3ea0166 | 332 | static struct tda18271_config hauppauge_hvr1200_tuner_config = { |
b34cdc36 | 333 | .std_map = &hauppauge_hvr1200_tda18271_std_map, |
b3ea0166 | 334 | .gate = TDA18271_GATE_ANALOG, |
04a68baa | 335 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
b3ea0166 ST |
336 | }; |
337 | ||
6b926eca MK |
338 | static struct tda18271_config hauppauge_hvr1210_tuner_config = { |
339 | .gate = TDA18271_GATE_DIGITAL, | |
04a68baa | 340 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
6b926eca MK |
341 | }; |
342 | ||
36efec48 MS |
343 | static struct tda18271_config hauppauge_hvr4400_tuner_config = { |
344 | .gate = TDA18271_GATE_DIGITAL, | |
345 | .output_opt = TDA18271_OUTPUT_LT_OFF, | |
346 | }; | |
347 | ||
247bc540 | 348 | static struct tda18271_std_map hauppauge_hvr127x_std_map = { |
a5dbf457 MK |
349 | .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4, |
350 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
351 | .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5, | |
352 | .if_lvl = 1, .rfagc_top = 0x58 }, | |
353 | }; | |
354 | ||
247bc540 MK |
355 | static struct tda18271_config hauppauge_hvr127x_config = { |
356 | .std_map = &hauppauge_hvr127x_std_map, | |
04a68baa | 357 | .output_opt = TDA18271_OUTPUT_LT_OFF, |
a5dbf457 MK |
358 | }; |
359 | ||
247bc540 | 360 | static struct lgdt3305_config hauppauge_lgdt3305_config = { |
a5dbf457 MK |
361 | .i2c_addr = 0x0e, |
362 | .mpeg_mode = LGDT3305_MPEG_SERIAL, | |
363 | .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE, | |
364 | .tpvalid_polarity = LGDT3305_TP_VALID_HIGH, | |
365 | .deny_i2c_rptr = 1, | |
366 | .spectral_inversion = 1, | |
367 | .qam_if_khz = 4000, | |
368 | .vsb_if_khz = 3250, | |
369 | }; | |
370 | ||
b1721d0d | 371 | static struct dibx000_agc_config xc3028_agc_config = { |
66762373 ST |
372 | BAND_VHF | BAND_UHF, /* band_caps */ |
373 | ||
374 | /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0, | |
375 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, | |
376 | * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, | |
377 | * P_agc_nb_est=2, P_agc_write=0 | |
378 | */ | |
379 | (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | | |
380 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */ | |
381 | ||
382 | 712, /* inv_gain */ | |
383 | 21, /* time_stabiliz */ | |
384 | ||
385 | 0, /* alpha_level */ | |
386 | 118, /* thlock */ | |
387 | ||
388 | 0, /* wbd_inv */ | |
389 | 2867, /* wbd_ref */ | |
390 | 0, /* wbd_sel */ | |
391 | 2, /* wbd_alpha */ | |
392 | ||
393 | 0, /* agc1_max */ | |
394 | 0, /* agc1_min */ | |
395 | 39718, /* agc2_max */ | |
396 | 9930, /* agc2_min */ | |
397 | 0, /* agc1_pt1 */ | |
398 | 0, /* agc1_pt2 */ | |
399 | 0, /* agc1_pt3 */ | |
400 | 0, /* agc1_slope1 */ | |
401 | 0, /* agc1_slope2 */ | |
402 | 0, /* agc2_pt1 */ | |
403 | 128, /* agc2_pt2 */ | |
404 | 29, /* agc2_slope1 */ | |
405 | 29, /* agc2_slope2 */ | |
406 | ||
407 | 17, /* alpha_mant */ | |
408 | 27, /* alpha_exp */ | |
409 | 23, /* beta_mant */ | |
410 | 51, /* beta_exp */ | |
411 | ||
412 | 1, /* perform_agc_softsplit */ | |
413 | }; | |
414 | ||
415 | /* PLL Configuration for COFDM BW_MHz = 8.000000 | |
416 | * With external clock = 30.000000 */ | |
b1721d0d | 417 | static struct dibx000_bandwidth_config xc3028_bw_config = { |
66762373 ST |
418 | 60000, /* internal */ |
419 | 30000, /* sampling */ | |
420 | 1, /* pll_cfg: prediv */ | |
421 | 8, /* pll_cfg: ratio */ | |
422 | 3, /* pll_cfg: range */ | |
423 | 1, /* pll_cfg: reset */ | |
424 | 0, /* pll_cfg: bypass */ | |
425 | 0, /* misc: refdiv */ | |
426 | 0, /* misc: bypclk_div */ | |
427 | 1, /* misc: IO_CLK_en_core */ | |
428 | 1, /* misc: ADClkSrc */ | |
429 | 0, /* misc: modulo */ | |
430 | (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */ | |
431 | (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */ | |
432 | 20452225, /* timf */ | |
433 | 30000000 /* xtal_hz */ | |
434 | }; | |
435 | ||
436 | static struct dib7000p_config hauppauge_hvr1400_dib7000_config = { | |
437 | .output_mpeg2_in_188_bytes = 1, | |
438 | .hostbus_diversity = 1, | |
439 | .tuner_is_baseband = 0, | |
440 | .update_lna = NULL, | |
441 | ||
442 | .agc_config_count = 1, | |
443 | .agc = &xc3028_agc_config, | |
444 | .bw = &xc3028_bw_config, | |
445 | ||
446 | .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS, | |
447 | .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES, | |
448 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
449 | ||
450 | .pwm_freq_div = 0, | |
451 | .agc_control = NULL, | |
452 | .spur_protect = 0, | |
453 | ||
454 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
455 | }; | |
456 | ||
aef2d186 ST |
457 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
458 | .demod_address = 0x0f, | |
459 | .if2 = 45600, | |
460 | .no_tuner = 1, | |
d4dc673d | 461 | .disable_i2c_gate_ctrl = 1, |
aef2d186 ST |
462 | }; |
463 | ||
f867c3f4 IL |
464 | static struct stv0900_reg stv0900_ts_regs[] = { |
465 | { R0900_TSGENERAL, 0x00 }, | |
466 | { R0900_P1_TSSPEED, 0x40 }, | |
467 | { R0900_P2_TSSPEED, 0x40 }, | |
468 | { R0900_P1_TSCFGM, 0xc0 }, | |
469 | { R0900_P2_TSCFGM, 0xc0 }, | |
470 | { R0900_P1_TSCFGH, 0xe0 }, | |
471 | { R0900_P2_TSCFGH, 0xe0 }, | |
472 | { R0900_P1_TSCFGL, 0x20 }, | |
473 | { R0900_P2_TSCFGL, 0x20 }, | |
474 | { 0xffff, 0xff }, /* terminate */ | |
475 | }; | |
476 | ||
5a23b076 IL |
477 | static struct stv0900_config netup_stv0900_config = { |
478 | .demod_address = 0x68, | |
29372a8d | 479 | .demod_mode = 1, /* dual */ |
644c7ef0 | 480 | .xtal = 8000000, |
5a23b076 IL |
481 | .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ |
482 | .diseqc_mode = 2,/* 2/3 PWM */ | |
f867c3f4 | 483 | .ts_config_regs = stv0900_ts_regs, |
5a23b076 IL |
484 | .tun1_maddress = 0,/* 0x60 */ |
485 | .tun2_maddress = 3,/* 0x63 */ | |
486 | .tun1_adc = 1,/* 1 Vpp */ | |
487 | .tun2_adc = 1,/* 1 Vpp */ | |
488 | }; | |
489 | ||
490 | static struct stv6110_config netup_stv6110_tunerconfig_a = { | |
491 | .i2c_address = 0x60, | |
644c7ef0 AO |
492 | .mclk = 16000000, |
493 | .clk_div = 1, | |
873688cd | 494 | .gain = 8, /* +16 dB - maximum gain */ |
5a23b076 IL |
495 | }; |
496 | ||
497 | static struct stv6110_config netup_stv6110_tunerconfig_b = { | |
498 | .i2c_address = 0x63, | |
644c7ef0 AO |
499 | .mclk = 16000000, |
500 | .clk_div = 1, | |
873688cd | 501 | .gain = 8, /* +16 dB - maximum gain */ |
5a23b076 IL |
502 | }; |
503 | ||
96318d0c | 504 | static struct cx24116_config tbs_cx24116_config = { |
09ea33e5 | 505 | .demod_address = 0x55, |
96318d0c IL |
506 | }; |
507 | ||
e6001482 LA |
508 | static struct cx24117_config tbs_cx24117_config = { |
509 | .demod_address = 0x55, | |
510 | }; | |
511 | ||
09ea33e5 IL |
512 | static struct ds3000_config tevii_ds3000_config = { |
513 | .demod_address = 0x68, | |
579943f5 IL |
514 | }; |
515 | ||
73f0af44 KD |
516 | static struct ts2020_config tevii_ts2020_config = { |
517 | .tuner_address = 0x60, | |
b858c331 | 518 | .clk_out_div = 1, |
8d2b0229 | 519 | .frequency_div = 1146000, |
73f0af44 KD |
520 | }; |
521 | ||
c9b8b04b IL |
522 | static struct cx24116_config dvbworld_cx24116_config = { |
523 | .demod_address = 0x05, | |
524 | }; | |
525 | ||
493b7127 DW |
526 | static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = { |
527 | .prod = LGS8GXX_PROD_LGS8GL5, | |
528 | .demod_address = 0x19, | |
529 | .serial_ts = 0, | |
530 | .ts_clk_pol = 1, | |
531 | .ts_clk_gated = 1, | |
532 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
533 | .if_freq = 5380, /* 5.38 MHz */ | |
534 | .if_neg_center = 1, | |
535 | .ext_adc = 0, | |
536 | .adc_signed = 0, | |
537 | .if_neg_edge = 0, | |
538 | }; | |
539 | ||
540 | static struct xc5000_config mygica_x8506_xc5000_config = { | |
541 | .i2c_address = 0x61, | |
542 | .if_khz = 5380, | |
543 | }; | |
544 | ||
0d1b5265 MCC |
545 | static struct mb86a20s_config mygica_x8507_mb86a20s_config = { |
546 | .demod_address = 0x10, | |
547 | }; | |
548 | ||
549 | static struct xc5000_config mygica_x8507_xc5000_config = { | |
550 | .i2c_address = 0x61, | |
551 | .if_khz = 4000, | |
552 | }; | |
553 | ||
f667190b | 554 | static struct stv090x_config prof_8000_stv090x_config = { |
b858c331 IL |
555 | .device = STV0903, |
556 | .demod_mode = STV090x_SINGLE, | |
557 | .clk_mode = STV090x_CLK_EXT, | |
558 | .xtal = 27000000, | |
559 | .address = 0x6A, | |
560 | .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED, | |
561 | .repeater_level = STV090x_RPTLEVEL_64, | |
562 | .adc1_range = STV090x_ADC_2Vpp, | |
563 | .diseqc_envelope_mode = false, | |
564 | ||
565 | .tuner_get_frequency = stb6100_get_frequency, | |
566 | .tuner_set_frequency = stb6100_set_frequency, | |
567 | .tuner_set_bandwidth = stb6100_set_bandwidth, | |
568 | .tuner_get_bandwidth = stb6100_get_bandwidth, | |
f667190b MB |
569 | }; |
570 | ||
571 | static struct stb6100_config prof_8000_stb6100_config = { | |
572 | .tuner_address = 0x60, | |
573 | .refclock = 27000000, | |
574 | }; | |
575 | ||
576 | static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
577 | { | |
578 | struct cx23885_tsport *port = fe->dvb->priv; | |
579 | struct cx23885_dev *dev = port->dev; | |
580 | ||
581 | if (voltage == SEC_VOLTAGE_18) | |
582 | cx_write(MC417_RWD, 0x00001e00); | |
583 | else if (voltage == SEC_VOLTAGE_13) | |
584 | cx_write(MC417_RWD, 0x00001a00); | |
585 | else | |
586 | cx_write(MC417_RWD, 0x00001800); | |
587 | return 0; | |
588 | } | |
589 | ||
29442266 OS |
590 | static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe, |
591 | fe_sec_voltage_t voltage) | |
592 | { | |
593 | struct cx23885_tsport *port = fe->dvb->priv; | |
594 | struct cx23885_dev *dev = port->dev; | |
595 | ||
596 | cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1); | |
597 | ||
598 | switch (voltage) { | |
599 | case SEC_VOLTAGE_13: | |
600 | cx23885_gpio_set(dev, GPIO_1); | |
601 | cx23885_gpio_clear(dev, GPIO_0); | |
602 | break; | |
603 | case SEC_VOLTAGE_18: | |
604 | cx23885_gpio_set(dev, GPIO_1); | |
605 | cx23885_gpio_set(dev, GPIO_0); | |
606 | break; | |
607 | case SEC_VOLTAGE_OFF: | |
608 | cx23885_gpio_clear(dev, GPIO_1); | |
609 | cx23885_gpio_clear(dev, GPIO_0); | |
610 | break; | |
611 | } | |
612 | ||
613 | /* call the frontend set_voltage function */ | |
614 | port->fe_set_voltage(fe, voltage); | |
615 | ||
616 | return 0; | |
617 | } | |
618 | ||
a7d44baa | 619 | static int cx23885_dvb_set_frontend(struct dvb_frontend *fe) |
f35b9e80 | 620 | { |
a7d44baa | 621 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
f35b9e80 MK |
622 | struct cx23885_tsport *port = fe->dvb->priv; |
623 | struct cx23885_dev *dev = port->dev; | |
624 | ||
625 | switch (dev->board) { | |
626 | case CX23885_BOARD_HAUPPAUGE_HVR1275: | |
a7d44baa | 627 | switch (p->modulation) { |
f35b9e80 MK |
628 | case VSB_8: |
629 | cx23885_gpio_clear(dev, GPIO_5); | |
630 | break; | |
631 | case QAM_64: | |
632 | case QAM_256: | |
633 | default: | |
634 | cx23885_gpio_set(dev, GPIO_5); | |
635 | break; | |
636 | } | |
637 | break; | |
6f0d8c02 | 638 | case CX23885_BOARD_MYGICA_X8506: |
0d1b5265 | 639 | case CX23885_BOARD_MYGICA_X8507: |
6f0d8c02 DW |
640 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
641 | /* Select Digital TV */ | |
642 | cx23885_gpio_set(dev, GPIO_0); | |
643 | break; | |
f35b9e80 | 644 | } |
15472faf MCC |
645 | |
646 | /* Call the real set_frontend */ | |
647 | if (port->set_frontend) | |
648 | return port->set_frontend(fe); | |
649 | ||
5bdd3962 | 650 | return 0; |
f35b9e80 MK |
651 | } |
652 | ||
15472faf MCC |
653 | static void cx23885_set_frontend_hook(struct cx23885_tsport *port, |
654 | struct dvb_frontend *fe) | |
655 | { | |
656 | port->set_frontend = fe->ops.set_frontend; | |
657 | fe->ops.set_frontend = cx23885_dvb_set_frontend; | |
658 | } | |
659 | ||
2365b2d3 DW |
660 | static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = { |
661 | .prod = LGS8GXX_PROD_LGS8G75, | |
662 | .demod_address = 0x19, | |
663 | .serial_ts = 0, | |
664 | .ts_clk_pol = 1, | |
665 | .ts_clk_gated = 1, | |
666 | .if_clk_freq = 30400, /* 30.4 MHz */ | |
667 | .if_freq = 6500, /* 6.50 MHz */ | |
668 | .if_neg_center = 1, | |
669 | .ext_adc = 0, | |
670 | .adc_signed = 1, | |
671 | .adc_vpp = 2, /* 1.6 Vpp */ | |
672 | .if_neg_edge = 1, | |
673 | }; | |
674 | ||
675 | static struct xc5000_config magicpro_prohdtve2_xc5000_config = { | |
676 | .i2c_address = 0x61, | |
677 | .if_khz = 6500, | |
678 | }; | |
679 | ||
ea5697fe DW |
680 | static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = { |
681 | .prod = ATBM8830_PROD_8830, | |
682 | .demod_address = 0x44, | |
683 | .serial_ts = 0, | |
684 | .ts_sampling_edge = 1, | |
685 | .ts_clk_gated = 0, | |
686 | .osc_clk_freq = 30400, /* in kHz */ | |
687 | .if_freq = 0, /* zero IF */ | |
688 | .zif_swap_iq = 1, | |
c245c75c DW |
689 | .agc_min = 0x2E, |
690 | .agc_max = 0xFF, | |
691 | .agc_hold_loop = 0, | |
ea5697fe DW |
692 | }; |
693 | ||
694 | static struct max2165_config mygic_x8558pro_max2165_cfg1 = { | |
695 | .i2c_address = 0x60, | |
696 | .osc_clk = 20 | |
697 | }; | |
698 | ||
699 | static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = { | |
700 | .prod = ATBM8830_PROD_8830, | |
701 | .demod_address = 0x44, | |
702 | .serial_ts = 1, | |
703 | .ts_sampling_edge = 1, | |
704 | .ts_clk_gated = 0, | |
705 | .osc_clk_freq = 30400, /* in kHz */ | |
706 | .if_freq = 0, /* zero IF */ | |
707 | .zif_swap_iq = 1, | |
c245c75c DW |
708 | .agc_min = 0x2E, |
709 | .agc_max = 0xFF, | |
710 | .agc_hold_loop = 0, | |
ea5697fe DW |
711 | }; |
712 | ||
713 | static struct max2165_config mygic_x8558pro_max2165_cfg2 = { | |
714 | .i2c_address = 0x60, | |
715 | .osc_clk = 20 | |
716 | }; | |
78db8547 IL |
717 | static struct stv0367_config netup_stv0367_config[] = { |
718 | { | |
719 | .demod_address = 0x1c, | |
720 | .xtal = 27000000, | |
721 | .if_khz = 4500, | |
722 | .if_iq_mode = 0, | |
723 | .ts_mode = 1, | |
724 | .clk_pol = 0, | |
725 | }, { | |
726 | .demod_address = 0x1d, | |
727 | .xtal = 27000000, | |
728 | .if_khz = 4500, | |
729 | .if_iq_mode = 0, | |
730 | .ts_mode = 1, | |
731 | .clk_pol = 0, | |
732 | }, | |
733 | }; | |
734 | ||
735 | static struct xc5000_config netup_xc5000_config[] = { | |
736 | { | |
737 | .i2c_address = 0x61, | |
738 | .if_khz = 4500, | |
739 | }, { | |
740 | .i2c_address = 0x64, | |
741 | .if_khz = 4500, | |
742 | }, | |
743 | }; | |
744 | ||
722c90eb SR |
745 | static struct drxk_config terratec_drxk_config[] = { |
746 | { | |
747 | .adr = 0x29, | |
748 | .no_i2c_bridge = 1, | |
749 | }, { | |
750 | .adr = 0x2a, | |
751 | .no_i2c_bridge = 1, | |
752 | }, | |
753 | }; | |
754 | ||
755 | static struct mt2063_config terratec_mt2063_config[] = { | |
756 | { | |
757 | .tuner_address = 0x60, | |
758 | }, { | |
759 | .tuner_address = 0x67, | |
760 | }, | |
761 | }; | |
762 | ||
7c62f5a1 | 763 | static const struct tda10071_config hauppauge_tda10071_config = { |
41f55d57 | 764 | .demod_i2c_addr = 0x05, |
7c62f5a1 MK |
765 | .tuner_i2c_addr = 0x54, |
766 | .i2c_wr_max = 64, | |
767 | .ts_mode = TDA10071_TS_SERIAL, | |
768 | .spec_inv = 0, | |
769 | .xtal = 40444000, /* 40.444 MHz */ | |
770 | .pll_multiplier = 20, | |
771 | }; | |
772 | ||
773 | static const struct a8293_config hauppauge_a8293_config = { | |
774 | .i2c_addr = 0x0b, | |
775 | }; | |
776 | ||
36efec48 MS |
777 | static const struct si2165_config hauppauge_hvr4400_si2165_config = { |
778 | .i2c_addr = 0x64, | |
779 | .chip_mode = SI2165_MODE_PLL_XTAL, | |
780 | .ref_freq_Hz = 16000000, | |
781 | }; | |
782 | ||
29442266 OS |
783 | static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = { |
784 | .i2c_addr = 0x68, | |
785 | .clock = 27000000, | |
786 | .i2c_wr_max = 33, | |
787 | .clock_out = 0, | |
788 | .ts_mode = M88DS3103_TS_PARALLEL, | |
789 | .ts_clk = 16000, | |
790 | .ts_clk_pol = 1, | |
791 | .lnb_en_pol = 1, | |
792 | .lnb_hv_pol = 0, | |
793 | .agc = 0x99, | |
794 | }; | |
795 | ||
ada73eee | 796 | static int netup_altera_fpga_rw(void *device, int flag, int data, int read) |
78db8547 IL |
797 | { |
798 | struct cx23885_dev *dev = (struct cx23885_dev *)device; | |
799 | unsigned long timeout = jiffies + msecs_to_jiffies(1); | |
d164460f | 800 | uint32_t mem = 0; |
78db8547 | 801 | |
d164460f | 802 | mem = cx_read(MC417_RWD); |
78db8547 IL |
803 | if (read) |
804 | cx_set(MC417_OEN, ALT_DATA); | |
805 | else { | |
806 | cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ | |
78db8547 IL |
807 | mem &= ~ALT_DATA; |
808 | mem |= (data & ALT_DATA); | |
78db8547 IL |
809 | } |
810 | ||
811 | if (flag) | |
d164460f | 812 | mem |= ALT_AD_RG; |
78db8547 | 813 | else |
d164460f | 814 | mem &= ~ALT_AD_RG; |
78db8547 | 815 | |
d164460f | 816 | mem &= ~ALT_CS; |
78db8547 | 817 | if (read) |
d164460f | 818 | mem = (mem & ~ALT_RD) | ALT_WR; |
78db8547 | 819 | else |
d164460f AO |
820 | mem = (mem & ~ALT_WR) | ALT_RD; |
821 | ||
822 | cx_write(MC417_RWD, mem); /* start RW cycle */ | |
78db8547 IL |
823 | |
824 | for (;;) { | |
825 | mem = cx_read(MC417_RWD); | |
826 | if ((mem & ALT_RDY) == 0) | |
827 | break; | |
828 | if (time_after(jiffies, timeout)) | |
829 | break; | |
830 | udelay(1); | |
831 | } | |
832 | ||
833 | cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); | |
834 | if (read) | |
835 | return mem & ALT_DATA; | |
836 | ||
837 | return 0; | |
838 | }; | |
ea5697fe | 839 | |
46b21bba JH |
840 | static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff) |
841 | { | |
842 | struct dib7000p_ops *dib7000p_ops = fe->sec_priv; | |
843 | ||
844 | return dib7000p_ops->set_gpio(fe, 8, 0, !onoff); | |
845 | } | |
846 | ||
847 | static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff) | |
848 | { | |
849 | return 0; | |
850 | } | |
851 | ||
852 | static struct dib0070_config dib7070p_dib0070_config = { | |
853 | .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS, | |
854 | .reset = dib7070_tuner_reset, | |
855 | .sleep = dib7070_tuner_sleep, | |
856 | .clock_khz = 12000, | |
46b21bba JH |
857 | .freq_offset_khz_vhf = 550, |
858 | /* .flip_chip = 1, */ | |
859 | }; | |
860 | ||
861 | /* DIB7070 generic */ | |
862 | static struct dibx000_agc_config dib7070_agc_config = { | |
863 | .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND, | |
864 | ||
865 | /* | |
866 | * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, | |
867 | * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0, | |
868 | * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 | |
869 | */ | |
870 | .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | | |
871 | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0), | |
872 | .inv_gain = 600, | |
873 | .time_stabiliz = 10, | |
874 | .alpha_level = 0, | |
875 | .thlock = 118, | |
876 | .wbd_inv = 0, | |
877 | .wbd_ref = 3530, | |
878 | .wbd_sel = 1, | |
879 | .wbd_alpha = 5, | |
880 | .agc1_max = 65535, | |
881 | .agc1_min = 0, | |
882 | .agc2_max = 65535, | |
883 | .agc2_min = 0, | |
884 | .agc1_pt1 = 0, | |
885 | .agc1_pt2 = 40, | |
886 | .agc1_pt3 = 183, | |
887 | .agc1_slope1 = 206, | |
888 | .agc1_slope2 = 255, | |
889 | .agc2_pt1 = 72, | |
890 | .agc2_pt2 = 152, | |
891 | .agc2_slope1 = 88, | |
892 | .agc2_slope2 = 90, | |
893 | .alpha_mant = 17, | |
894 | .alpha_exp = 27, | |
895 | .beta_mant = 23, | |
896 | .beta_exp = 51, | |
897 | .perform_agc_softsplit = 0, | |
898 | }; | |
899 | ||
900 | static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = { | |
901 | .internal = 60000, | |
902 | .sampling = 15000, | |
903 | .pll_prediv = 1, | |
904 | .pll_ratio = 20, | |
905 | .pll_range = 3, | |
906 | .pll_reset = 1, | |
907 | .pll_bypass = 0, | |
908 | .enable_refdiv = 0, | |
909 | .bypclk_div = 0, | |
910 | .IO_CLK_en_core = 1, | |
911 | .ADClkSrc = 1, | |
912 | .modulo = 2, | |
913 | /* refsel, sel, freq_15k */ | |
914 | .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), | |
915 | .ifreq = (0 << 25) | 0, | |
916 | .timf = 20452225, | |
917 | .xtal_hz = 12000000, | |
918 | }; | |
919 | ||
920 | static struct dib7000p_config dib7070p_dib7000p_config = { | |
921 | /* .output_mode = OUTMODE_MPEG2_FIFO, */ | |
922 | .output_mode = OUTMODE_MPEG2_SERIAL, | |
923 | /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */ | |
924 | .output_mpeg2_in_188_bytes = 1, | |
925 | ||
926 | .agc_config_count = 1, | |
927 | .agc = &dib7070_agc_config, | |
928 | .bw = &dib7070_bw_config_12_mhz, | |
929 | .tuner_is_baseband = 1, | |
930 | .spur_protect = 1, | |
931 | ||
932 | .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */ | |
933 | .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */ | |
934 | .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS, | |
935 | ||
936 | .hostbus_diversity = 1, | |
937 | }; | |
938 | ||
d19770e5 ST |
939 | static int dvb_register(struct cx23885_tsport *port) |
940 | { | |
8abe4a0a | 941 | struct dib7000p_ops dib7000p_ops; |
d19770e5 | 942 | struct cx23885_dev *dev = port->dev; |
493b7127 | 943 | struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL; |
453afdd9 | 944 | struct vb2_dvb_frontend *fe0, *fe1 = NULL; |
29442266 OS |
945 | struct si2168_config si2168_config; |
946 | struct si2157_config si2157_config; | |
947 | struct m88ts2022_config m88ts2022_config; | |
948 | struct i2c_board_info info; | |
949 | struct i2c_adapter *adapter; | |
950 | struct i2c_client *client_demod; | |
951 | struct i2c_client *client_tuner; | |
78db8547 | 952 | int mfe_shared = 0; /* bus not shared by default */ |
5a23b076 | 953 | int ret; |
363c35fc | 954 | |
f972e0bd | 955 | /* Get the first frontend */ |
453afdd9 | 956 | fe0 = vb2_dvb_get_frontend(&port->frontends, 1); |
363c35fc ST |
957 | if (!fe0) |
958 | return -EINVAL; | |
d19770e5 | 959 | |
453afdd9 | 960 | /* init struct vb2_dvb */ |
363c35fc | 961 | fe0->dvb.name = dev->name; |
d19770e5 | 962 | |
78db8547 IL |
963 | /* multi-frontend gate control is undefined or defaults to fe0 */ |
964 | port->frontends.gate = 0; | |
965 | ||
966 | /* Sets the gate control callback to be used by i2c command calls */ | |
967 | port->gate_ctrl = cx23885_dvb_gate_ctrl; | |
968 | ||
d19770e5 ST |
969 | /* init frontend */ |
970 | switch (dev->board) { | |
a77743bc | 971 | case CX23885_BOARD_HAUPPAUGE_HVR1250: |
f139fa71 | 972 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 973 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
86184e06 | 974 | &hauppauge_generic_config, |
f139fa71 | 975 | &i2c_bus->i2c_adap); |
363c35fc ST |
976 | if (fe0->dvb.frontend != NULL) { |
977 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 978 | &i2c_bus->i2c_adap, |
86184e06 | 979 | &hauppauge_generic_tunerconfig, 0); |
d19770e5 ST |
980 | } |
981 | break; | |
a5dbf457 | 982 | case CX23885_BOARD_HAUPPAUGE_HVR1270: |
d099becb | 983 | case CX23885_BOARD_HAUPPAUGE_HVR1275: |
a5dbf457 MK |
984 | i2c_bus = &dev->i2c_bus[0]; |
985 | fe0->dvb.frontend = dvb_attach(lgdt3305_attach, | |
247bc540 | 986 | &hauppauge_lgdt3305_config, |
a5dbf457 MK |
987 | &i2c_bus->i2c_adap); |
988 | if (fe0->dvb.frontend != NULL) { | |
989 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
990 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
247bc540 | 991 | &hauppauge_hvr127x_config); |
a5dbf457 | 992 | } |
15472faf MCC |
993 | if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275) |
994 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); | |
a5dbf457 | 995 | break; |
19bc5796 | 996 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
0ac60acb | 997 | case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: |
19bc5796 MK |
998 | i2c_bus = &dev->i2c_bus[0]; |
999 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1000 | &hcw_s5h1411_config, | |
1001 | &i2c_bus->i2c_adap); | |
1002 | if (fe0->dvb.frontend != NULL) { | |
1003 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1004 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1005 | &hauppauge_tda18271_config); | |
1006 | } | |
0ac60acb DH |
1007 | |
1008 | tda18271_attach(&dev->ts1.analog_fe, | |
1009 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1010 | &hauppauge_tda18271_config); | |
1011 | ||
19bc5796 | 1012 | break; |
3ba71d21 MK |
1013 | case CX23885_BOARD_HAUPPAUGE_HVR1800: |
1014 | i2c_bus = &dev->i2c_bus[0]; | |
92abe9ee | 1015 | switch (alt_tuner) { |
3ba71d21 | 1016 | case 1: |
363c35fc | 1017 | fe0->dvb.frontend = |
3ba71d21 MK |
1018 | dvb_attach(s5h1409_attach, |
1019 | &hauppauge_ezqam_config, | |
1020 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1021 | if (fe0->dvb.frontend != NULL) { |
1022 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
3ba71d21 | 1023 | &dev->i2c_bus[1].i2c_adap, 0x42, |
4041f1a5 | 1024 | &tda829x_no_probe); |
363c35fc | 1025 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
4041f1a5 | 1026 | 0x60, &dev->i2c_bus[1].i2c_adap, |
f21e0d7f | 1027 | &hauppauge_tda18271_config); |
3ba71d21 MK |
1028 | } |
1029 | break; | |
1030 | case 0: | |
1031 | default: | |
363c35fc | 1032 | fe0->dvb.frontend = |
3ba71d21 MK |
1033 | dvb_attach(s5h1409_attach, |
1034 | &hauppauge_generic_config, | |
1035 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1036 | if (fe0->dvb.frontend != NULL) |
1037 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
3ba71d21 MK |
1038 | &i2c_bus->i2c_adap, |
1039 | &hauppauge_generic_tunerconfig, 0); | |
1040 | break; | |
1041 | } | |
1042 | break; | |
fc959bef | 1043 | case CX23885_BOARD_HAUPPAUGE_HVR1800lp: |
f139fa71 | 1044 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1045 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
fc959bef | 1046 | &hauppauge_hvr1800lp_config, |
f139fa71 | 1047 | &i2c_bus->i2c_adap); |
363c35fc ST |
1048 | if (fe0->dvb.frontend != NULL) { |
1049 | dvb_attach(mt2131_attach, fe0->dvb.frontend, | |
f139fa71 | 1050 | &i2c_bus->i2c_adap, |
fc959bef ST |
1051 | &hauppauge_generic_tunerconfig, 0); |
1052 | } | |
1053 | break; | |
9bc37caa | 1054 | case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP: |
f139fa71 | 1055 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1056 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
9bc37caa | 1057 | &fusionhdtv_5_express, |
f139fa71 | 1058 | &i2c_bus->i2c_adap); |
363c35fc ST |
1059 | if (fe0->dvb.frontend != NULL) { |
1060 | dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
827855d3 MK |
1061 | &i2c_bus->i2c_adap, 0x61, |
1062 | TUNER_LG_TDVS_H06XF); | |
9bc37caa MK |
1063 | } |
1064 | break; | |
d1987d55 ST |
1065 | case CX23885_BOARD_HAUPPAUGE_HVR1500Q: |
1066 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 1067 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
d1987d55 ST |
1068 | &hauppauge_hvr1500q_config, |
1069 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc ST |
1070 | if (fe0->dvb.frontend != NULL) |
1071 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
1072 | &i2c_bus->i2c_adap, |
1073 | &hauppauge_hvr1500q_tunerconfig); | |
d1987d55 | 1074 | break; |
07b4a835 MK |
1075 | case CX23885_BOARD_HAUPPAUGE_HVR1500: |
1076 | i2c_bus = &dev->i2c_bus[1]; | |
363c35fc | 1077 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
07b4a835 MK |
1078 | &hauppauge_hvr1500_config, |
1079 | &dev->i2c_bus[0].i2c_adap); | |
363c35fc | 1080 | if (fe0->dvb.frontend != NULL) { |
07b4a835 MK |
1081 | struct dvb_frontend *fe; |
1082 | struct xc2028_config cfg = { | |
1083 | .i2c_adap = &i2c_bus->i2c_adap, | |
1084 | .i2c_addr = 0x61, | |
07b4a835 MK |
1085 | }; |
1086 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1087 | .fname = XC2028_DEFAULT_FIRMWARE, |
07b4a835 | 1088 | .max_len = 64, |
52c3d29c | 1089 | .demod = XC3028_FE_OREN538, |
07b4a835 MK |
1090 | }; |
1091 | ||
1092 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 1093 | fe0->dvb.frontend, &cfg); |
07b4a835 MK |
1094 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
1095 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1096 | } | |
1097 | break; | |
b3ea0166 | 1098 | case CX23885_BOARD_HAUPPAUGE_HVR1200: |
a780a31c | 1099 | case CX23885_BOARD_HAUPPAUGE_HVR1700: |
b3ea0166 | 1100 | i2c_bus = &dev->i2c_bus[0]; |
363c35fc | 1101 | fe0->dvb.frontend = dvb_attach(tda10048_attach, |
b3ea0166 ST |
1102 | &hauppauge_hvr1200_config, |
1103 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1104 | if (fe0->dvb.frontend != NULL) { |
1105 | dvb_attach(tda829x_attach, fe0->dvb.frontend, | |
b3ea0166 ST |
1106 | &dev->i2c_bus[1].i2c_adap, 0x42, |
1107 | &tda829x_no_probe); | |
363c35fc | 1108 | dvb_attach(tda18271_attach, fe0->dvb.frontend, |
b3ea0166 ST |
1109 | 0x60, &dev->i2c_bus[1].i2c_adap, |
1110 | &hauppauge_hvr1200_tuner_config); | |
6b926eca MK |
1111 | } |
1112 | break; | |
1113 | case CX23885_BOARD_HAUPPAUGE_HVR1210: | |
1114 | i2c_bus = &dev->i2c_bus[0]; | |
1115 | fe0->dvb.frontend = dvb_attach(tda10048_attach, | |
1116 | &hauppauge_hvr1210_config, | |
1117 | &i2c_bus->i2c_adap); | |
1118 | if (fe0->dvb.frontend != NULL) { | |
1119 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1120 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1121 | &hauppauge_hvr1210_tuner_config); | |
b3ea0166 ST |
1122 | } |
1123 | break; | |
66762373 ST |
1124 | case CX23885_BOARD_HAUPPAUGE_HVR1400: |
1125 | i2c_bus = &dev->i2c_bus[0]; | |
8abe4a0a MCC |
1126 | |
1127 | if (!dvb_attach(dib7000p_attach, &dib7000p_ops)) | |
1128 | return -ENODEV; | |
1129 | ||
1130 | fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, | |
66762373 | 1131 | 0x12, &hauppauge_hvr1400_dib7000_config); |
363c35fc | 1132 | if (fe0->dvb.frontend != NULL) { |
66762373 ST |
1133 | struct dvb_frontend *fe; |
1134 | struct xc2028_config cfg = { | |
1135 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
1136 | .i2c_addr = 0x64, | |
66762373 ST |
1137 | }; |
1138 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1139 | .fname = XC3028L_DEFAULT_FIRMWARE, |
66762373 | 1140 | .max_len = 64, |
9bed77ee | 1141 | .demod = XC3028_FE_DIBCOM52, |
9c8ced51 ST |
1142 | /* This is true for all demods with |
1143 | v36 firmware? */ | |
0975fc68 | 1144 | .type = XC2028_D2633, |
66762373 ST |
1145 | }; |
1146 | ||
1147 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 1148 | fe0->dvb.frontend, &cfg); |
66762373 ST |
1149 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
1150 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1151 | } | |
1152 | break; | |
335377b7 MK |
1153 | case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP: |
1154 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
1155 | ||
363c35fc | 1156 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
335377b7 MK |
1157 | &dvico_s5h1409_config, |
1158 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1159 | if (fe0->dvb.frontend == NULL) |
1160 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
52b50450 MK |
1161 | &dvico_s5h1411_config, |
1162 | &i2c_bus->i2c_adap); | |
363c35fc ST |
1163 | if (fe0->dvb.frontend != NULL) |
1164 | dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
30650961 MK |
1165 | &i2c_bus->i2c_adap, |
1166 | &dvico_xc5000_tunerconfig); | |
335377b7 | 1167 | break; |
aef2d186 ST |
1168 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: { |
1169 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
1170 | ||
363c35fc | 1171 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
aef2d186 ST |
1172 | &dvico_fusionhdtv_xc3028, |
1173 | &i2c_bus->i2c_adap); | |
363c35fc | 1174 | if (fe0->dvb.frontend != NULL) { |
aef2d186 ST |
1175 | struct dvb_frontend *fe; |
1176 | struct xc2028_config cfg = { | |
1177 | .i2c_adap = &i2c_bus->i2c_adap, | |
1178 | .i2c_addr = 0x61, | |
aef2d186 ST |
1179 | }; |
1180 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1181 | .fname = XC2028_DEFAULT_FIRMWARE, |
aef2d186 ST |
1182 | .max_len = 64, |
1183 | .demod = XC3028_FE_ZARLINK456, | |
1184 | }; | |
1185 | ||
363c35fc | 1186 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
aef2d186 ST |
1187 | &cfg); |
1188 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
1189 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1190 | } | |
1191 | break; | |
46b21bba JH |
1192 | } |
1193 | case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: { | |
1194 | i2c_bus = &dev->i2c_bus[port->nr - 1]; | |
1195 | /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */ | |
1196 | /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */ | |
1197 | ||
1198 | if (!dvb_attach(dib7000p_attach, &dib7000p_ops)) | |
1199 | return -ENODEV; | |
1200 | ||
1201 | if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) { | |
1202 | printk(KERN_WARNING "Unable to enumerate dib7000p\n"); | |
1203 | return -ENODEV; | |
1204 | } | |
1205 | fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config); | |
1206 | if (fe0->dvb.frontend != NULL) { | |
1207 | struct i2c_adapter *tun_i2c; | |
1208 | ||
1209 | fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL); | |
1210 | memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops)); | |
1211 | tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1); | |
1212 | if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config)) | |
1213 | return -ENODEV; | |
1214 | } | |
1215 | break; | |
aef2d186 | 1216 | } |
4c56b04a | 1217 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H: |
9bb1b7e8 | 1218 | case CX23885_BOARD_COMPRO_VIDEOMATE_E650F: |
34e383dd | 1219 | case CX23885_BOARD_COMPRO_VIDEOMATE_E800: |
4c56b04a ST |
1220 | i2c_bus = &dev->i2c_bus[0]; |
1221 | ||
363c35fc | 1222 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
4c56b04a ST |
1223 | &dvico_fusionhdtv_xc3028, |
1224 | &i2c_bus->i2c_adap); | |
363c35fc | 1225 | if (fe0->dvb.frontend != NULL) { |
4c56b04a ST |
1226 | struct dvb_frontend *fe; |
1227 | struct xc2028_config cfg = { | |
1228 | .i2c_adap = &dev->i2c_bus[1].i2c_adap, | |
1229 | .i2c_addr = 0x61, | |
4c56b04a ST |
1230 | }; |
1231 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1232 | .fname = XC2028_DEFAULT_FIRMWARE, |
4c56b04a ST |
1233 | .max_len = 64, |
1234 | .demod = XC3028_FE_ZARLINK456, | |
1235 | }; | |
1236 | ||
363c35fc | 1237 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, |
4c56b04a ST |
1238 | &cfg); |
1239 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | |
1240 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1241 | } | |
96318d0c | 1242 | break; |
0cf8af57 | 1243 | case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000: |
1244 | i2c_bus = &dev->i2c_bus[0]; | |
1245 | ||
1246 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1247 | &dvico_fusionhdtv_xc3028, | |
1248 | &i2c_bus->i2c_adap); | |
1249 | if (fe0->dvb.frontend != NULL) { | |
1250 | struct dvb_frontend *fe; | |
1251 | struct xc4000_config cfg = { | |
1252 | .i2c_address = 0x61, | |
1253 | .default_pm = 0, | |
1254 | .dvb_amplitude = 134, | |
1255 | .set_smoothedcvbs = 1, | |
1256 | .if_khz = 4560 | |
1257 | }; | |
1258 | ||
1259 | fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, | |
1260 | &dev->i2c_bus[1].i2c_adap, &cfg); | |
a7c8aada MS |
1261 | if (!fe) { |
1262 | printk(KERN_ERR "%s/2: xc4000 attach failed\n", | |
1263 | dev->name); | |
1264 | goto frontend_detach; | |
1265 | } | |
0cf8af57 | 1266 | } |
1267 | break; | |
96318d0c | 1268 | case CX23885_BOARD_TBS_6920: |
09ea33e5 | 1269 | i2c_bus = &dev->i2c_bus[1]; |
96318d0c IL |
1270 | |
1271 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
09ea33e5 IL |
1272 | &tbs_cx24116_config, |
1273 | &i2c_bus->i2c_adap); | |
96318d0c | 1274 | if (fe0->dvb.frontend != NULL) |
09ea33e5 | 1275 | fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; |
96318d0c | 1276 | |
579943f5 | 1277 | break; |
e6001482 LA |
1278 | case CX23885_BOARD_TBS_6980: |
1279 | case CX23885_BOARD_TBS_6981: | |
1280 | i2c_bus = &dev->i2c_bus[1]; | |
1281 | ||
1282 | switch (port->nr) { | |
1283 | /* PORT B */ | |
1284 | case 1: | |
1285 | fe0->dvb.frontend = dvb_attach(cx24117_attach, | |
1286 | &tbs_cx24117_config, | |
d10e8280 | 1287 | &i2c_bus->i2c_adap); |
e6001482 LA |
1288 | break; |
1289 | /* PORT C */ | |
1290 | case 2: | |
e6001482 LA |
1291 | fe0->dvb.frontend = dvb_attach(cx24117_attach, |
1292 | &tbs_cx24117_config, | |
d10e8280 | 1293 | &i2c_bus->i2c_adap); |
e6001482 LA |
1294 | break; |
1295 | } | |
1296 | break; | |
579943f5 IL |
1297 | case CX23885_BOARD_TEVII_S470: |
1298 | i2c_bus = &dev->i2c_bus[1]; | |
1299 | ||
09ea33e5 IL |
1300 | fe0->dvb.frontend = dvb_attach(ds3000_attach, |
1301 | &tevii_ds3000_config, | |
1302 | &i2c_bus->i2c_adap); | |
73f0af44 KD |
1303 | if (fe0->dvb.frontend != NULL) { |
1304 | dvb_attach(ts2020_attach, fe0->dvb.frontend, | |
1305 | &tevii_ts2020_config, &i2c_bus->i2c_adap); | |
09ea33e5 | 1306 | fe0->dvb.frontend->ops.set_voltage = f300_set_voltage; |
73f0af44 | 1307 | } |
579943f5 | 1308 | |
4c56b04a | 1309 | break; |
c9b8b04b IL |
1310 | case CX23885_BOARD_DVBWORLD_2005: |
1311 | i2c_bus = &dev->i2c_bus[1]; | |
1312 | ||
1313 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
1314 | &dvbworld_cx24116_config, | |
1315 | &i2c_bus->i2c_adap); | |
1316 | break; | |
5a23b076 IL |
1317 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: |
1318 | i2c_bus = &dev->i2c_bus[0]; | |
1319 | switch (port->nr) { | |
1320 | /* port B */ | |
1321 | case 1: | |
1322 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
1323 | &netup_stv0900_config, | |
1324 | &i2c_bus->i2c_adap, 0); | |
1325 | if (fe0->dvb.frontend != NULL) { | |
1326 | if (dvb_attach(stv6110_attach, | |
1327 | fe0->dvb.frontend, | |
1328 | &netup_stv6110_tunerconfig_a, | |
1329 | &i2c_bus->i2c_adap)) { | |
1330 | if (!dvb_attach(lnbh24_attach, | |
1331 | fe0->dvb.frontend, | |
1332 | &i2c_bus->i2c_adap, | |
9329fb5b AO |
1333 | LNBH24_PCL | LNBH24_TTX, |
1334 | LNBH24_TEN, 0x09)) | |
5a23b076 IL |
1335 | printk(KERN_ERR |
1336 | "No LNBH24 found!\n"); | |
1337 | ||
1338 | } | |
1339 | } | |
1340 | break; | |
1341 | /* port C */ | |
1342 | case 2: | |
1343 | fe0->dvb.frontend = dvb_attach(stv0900_attach, | |
1344 | &netup_stv0900_config, | |
1345 | &i2c_bus->i2c_adap, 1); | |
1346 | if (fe0->dvb.frontend != NULL) { | |
1347 | if (dvb_attach(stv6110_attach, | |
1348 | fe0->dvb.frontend, | |
1349 | &netup_stv6110_tunerconfig_b, | |
1350 | &i2c_bus->i2c_adap)) { | |
1351 | if (!dvb_attach(lnbh24_attach, | |
1352 | fe0->dvb.frontend, | |
1353 | &i2c_bus->i2c_adap, | |
9329fb5b AO |
1354 | LNBH24_PCL | LNBH24_TTX, |
1355 | LNBH24_TEN, 0x0a)) | |
5a23b076 IL |
1356 | printk(KERN_ERR |
1357 | "No LNBH24 found!\n"); | |
1358 | ||
1359 | } | |
1360 | } | |
1361 | break; | |
1362 | } | |
1363 | break; | |
493b7127 DW |
1364 | case CX23885_BOARD_MYGICA_X8506: |
1365 | i2c_bus = &dev->i2c_bus[0]; | |
1366 | i2c_bus2 = &dev->i2c_bus[1]; | |
1367 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
1368 | &mygica_x8506_lgs8gl5_config, | |
1369 | &i2c_bus->i2c_adap); | |
1370 | if (fe0->dvb.frontend != NULL) { | |
1371 | dvb_attach(xc5000_attach, | |
1372 | fe0->dvb.frontend, | |
1373 | &i2c_bus2->i2c_adap, | |
1374 | &mygica_x8506_xc5000_config); | |
1375 | } | |
15472faf | 1376 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); |
493b7127 | 1377 | break; |
0d1b5265 MCC |
1378 | case CX23885_BOARD_MYGICA_X8507: |
1379 | i2c_bus = &dev->i2c_bus[0]; | |
1380 | i2c_bus2 = &dev->i2c_bus[1]; | |
1381 | fe0->dvb.frontend = dvb_attach(mb86a20s_attach, | |
1382 | &mygica_x8507_mb86a20s_config, | |
1383 | &i2c_bus->i2c_adap); | |
1384 | if (fe0->dvb.frontend != NULL) { | |
1385 | dvb_attach(xc5000_attach, | |
1386 | fe0->dvb.frontend, | |
1387 | &i2c_bus2->i2c_adap, | |
1388 | &mygica_x8507_xc5000_config); | |
1389 | } | |
1390 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); | |
1391 | break; | |
2365b2d3 DW |
1392 | case CX23885_BOARD_MAGICPRO_PROHDTVE2: |
1393 | i2c_bus = &dev->i2c_bus[0]; | |
1394 | i2c_bus2 = &dev->i2c_bus[1]; | |
1395 | fe0->dvb.frontend = dvb_attach(lgs8gxx_attach, | |
1396 | &magicpro_prohdtve2_lgs8g75_config, | |
1397 | &i2c_bus->i2c_adap); | |
1398 | if (fe0->dvb.frontend != NULL) { | |
1399 | dvb_attach(xc5000_attach, | |
1400 | fe0->dvb.frontend, | |
1401 | &i2c_bus2->i2c_adap, | |
1402 | &magicpro_prohdtve2_xc5000_config); | |
1403 | } | |
15472faf | 1404 | cx23885_set_frontend_hook(port, fe0->dvb.frontend); |
2365b2d3 | 1405 | break; |
13697380 | 1406 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
35045137 ST |
1407 | i2c_bus = &dev->i2c_bus[0]; |
1408 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1409 | &hcw_s5h1411_config, | |
1410 | &i2c_bus->i2c_adap); | |
1411 | if (fe0->dvb.frontend != NULL) | |
1412 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1413 | 0x60, &dev->i2c_bus[0].i2c_adap, | |
1414 | &hauppauge_tda18271_config); | |
1415 | ||
1416 | tda18271_attach(&dev->ts1.analog_fe, | |
1417 | 0x60, &dev->i2c_bus[1].i2c_adap, | |
1418 | &hauppauge_tda18271_config); | |
1419 | ||
1420 | break; | |
aee0b24c | 1421 | case CX23885_BOARD_HAUPPAUGE_HVR1290: |
13697380 ST |
1422 | i2c_bus = &dev->i2c_bus[0]; |
1423 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, | |
1424 | &hcw_s5h1411_config, | |
1425 | &i2c_bus->i2c_adap); | |
1426 | if (fe0->dvb.frontend != NULL) | |
1427 | dvb_attach(tda18271_attach, fe0->dvb.frontend, | |
1428 | 0x60, &dev->i2c_bus[0].i2c_adap, | |
1429 | &hauppauge_tda18271_config); | |
1430 | break; | |
ea5697fe DW |
1431 | case CX23885_BOARD_MYGICA_X8558PRO: |
1432 | switch (port->nr) { | |
1433 | /* port B */ | |
1434 | case 1: | |
1435 | i2c_bus = &dev->i2c_bus[0]; | |
1436 | fe0->dvb.frontend = dvb_attach(atbm8830_attach, | |
1437 | &mygica_x8558pro_atbm8830_cfg1, | |
1438 | &i2c_bus->i2c_adap); | |
1439 | if (fe0->dvb.frontend != NULL) { | |
1440 | dvb_attach(max2165_attach, | |
1441 | fe0->dvb.frontend, | |
1442 | &i2c_bus->i2c_adap, | |
1443 | &mygic_x8558pro_max2165_cfg1); | |
1444 | } | |
1445 | break; | |
1446 | /* port C */ | |
1447 | case 2: | |
1448 | i2c_bus = &dev->i2c_bus[1]; | |
1449 | fe0->dvb.frontend = dvb_attach(atbm8830_attach, | |
1450 | &mygica_x8558pro_atbm8830_cfg2, | |
1451 | &i2c_bus->i2c_adap); | |
1452 | if (fe0->dvb.frontend != NULL) { | |
1453 | dvb_attach(max2165_attach, | |
1454 | fe0->dvb.frontend, | |
1455 | &i2c_bus->i2c_adap, | |
1456 | &mygic_x8558pro_max2165_cfg2); | |
1457 | } | |
1458 | break; | |
1459 | } | |
1460 | break; | |
78db8547 IL |
1461 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
1462 | i2c_bus = &dev->i2c_bus[0]; | |
1463 | mfe_shared = 1;/* MFE */ | |
1464 | port->frontends.gate = 0;/* not clear for me yet */ | |
1465 | /* ports B, C */ | |
1466 | /* MFE frontend 1 DVB-T */ | |
1467 | fe0->dvb.frontend = dvb_attach(stv0367ter_attach, | |
1468 | &netup_stv0367_config[port->nr - 1], | |
1469 | &i2c_bus->i2c_adap); | |
4174ebf5 | 1470 | if (fe0->dvb.frontend != NULL) { |
78db8547 IL |
1471 | if (NULL == dvb_attach(xc5000_attach, |
1472 | fe0->dvb.frontend, | |
1473 | &i2c_bus->i2c_adap, | |
1474 | &netup_xc5000_config[port->nr - 1])) | |
1475 | goto frontend_detach; | |
4174ebf5 AO |
1476 | /* load xc5000 firmware */ |
1477 | fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend); | |
1478 | } | |
78db8547 | 1479 | /* MFE frontend 2 */ |
453afdd9 | 1480 | fe1 = vb2_dvb_get_frontend(&port->frontends, 2); |
78db8547 IL |
1481 | if (fe1 == NULL) |
1482 | goto frontend_detach; | |
1483 | /* DVB-C init */ | |
1484 | fe1->dvb.frontend = dvb_attach(stv0367cab_attach, | |
1485 | &netup_stv0367_config[port->nr - 1], | |
1486 | &i2c_bus->i2c_adap); | |
1487 | if (fe1->dvb.frontend != NULL) { | |
1488 | fe1->dvb.frontend->id = 1; | |
1489 | if (NULL == dvb_attach(xc5000_attach, | |
1490 | fe1->dvb.frontend, | |
1491 | &i2c_bus->i2c_adap, | |
1492 | &netup_xc5000_config[port->nr - 1])) | |
1493 | goto frontend_detach; | |
1494 | } | |
1495 | break; | |
722c90eb SR |
1496 | case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL: |
1497 | i2c_bus = &dev->i2c_bus[0]; | |
1498 | i2c_bus2 = &dev->i2c_bus[1]; | |
1499 | ||
1500 | switch (port->nr) { | |
1501 | /* port b */ | |
1502 | case 1: | |
1503 | fe0->dvb.frontend = dvb_attach(drxk_attach, | |
1504 | &terratec_drxk_config[0], | |
1505 | &i2c_bus->i2c_adap); | |
1506 | if (fe0->dvb.frontend != NULL) { | |
1507 | if (!dvb_attach(mt2063_attach, | |
1508 | fe0->dvb.frontend, | |
1509 | &terratec_mt2063_config[0], | |
1510 | &i2c_bus2->i2c_adap)) | |
1511 | goto frontend_detach; | |
1512 | } | |
1513 | break; | |
1514 | /* port c */ | |
1515 | case 2: | |
1516 | fe0->dvb.frontend = dvb_attach(drxk_attach, | |
1517 | &terratec_drxk_config[1], | |
1518 | &i2c_bus->i2c_adap); | |
1519 | if (fe0->dvb.frontend != NULL) { | |
1520 | if (!dvb_attach(mt2063_attach, | |
1521 | fe0->dvb.frontend, | |
1522 | &terratec_mt2063_config[1], | |
1523 | &i2c_bus2->i2c_adap)) | |
1524 | goto frontend_detach; | |
1525 | } | |
1526 | break; | |
1527 | } | |
1528 | break; | |
7b134e85 IL |
1529 | case CX23885_BOARD_TEVII_S471: |
1530 | i2c_bus = &dev->i2c_bus[1]; | |
1531 | ||
1532 | fe0->dvb.frontend = dvb_attach(ds3000_attach, | |
1533 | &tevii_ds3000_config, | |
1534 | &i2c_bus->i2c_adap); | |
b43ea806 JK |
1535 | if (fe0->dvb.frontend != NULL) { |
1536 | dvb_attach(ts2020_attach, fe0->dvb.frontend, | |
1537 | &tevii_ts2020_config, &i2c_bus->i2c_adap); | |
1538 | } | |
7b134e85 | 1539 | break; |
f667190b MB |
1540 | case CX23885_BOARD_PROF_8000: |
1541 | i2c_bus = &dev->i2c_bus[0]; | |
1542 | ||
1543 | fe0->dvb.frontend = dvb_attach(stv090x_attach, | |
1544 | &prof_8000_stv090x_config, | |
1545 | &i2c_bus->i2c_adap, | |
1546 | STV090x_DEMODULATOR_0); | |
1547 | if (fe0->dvb.frontend != NULL) { | |
1548 | if (!dvb_attach(stb6100_attach, | |
1549 | fe0->dvb.frontend, | |
1550 | &prof_8000_stb6100_config, | |
1551 | &i2c_bus->i2c_adap)) | |
1552 | goto frontend_detach; | |
1553 | ||
1554 | fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage; | |
1555 | } | |
1556 | break; | |
7c62f5a1 MK |
1557 | case CX23885_BOARD_HAUPPAUGE_HVR4400: |
1558 | i2c_bus = &dev->i2c_bus[0]; | |
36efec48 MS |
1559 | i2c_bus2 = &dev->i2c_bus[1]; |
1560 | switch (port->nr) { | |
1561 | /* port b */ | |
1562 | case 1: | |
1563 | fe0->dvb.frontend = dvb_attach(tda10071_attach, | |
7c62f5a1 MK |
1564 | &hauppauge_tda10071_config, |
1565 | &i2c_bus->i2c_adap); | |
36efec48 MS |
1566 | if (fe0->dvb.frontend != NULL) { |
1567 | if (!dvb_attach(a8293_attach, fe0->dvb.frontend, | |
1568 | &i2c_bus->i2c_adap, | |
1569 | &hauppauge_a8293_config)) | |
1570 | goto frontend_detach; | |
1571 | } | |
1572 | break; | |
1573 | /* port c */ | |
1574 | case 2: | |
1575 | fe0->dvb.frontend = dvb_attach(si2165_attach, | |
1576 | &hauppauge_hvr4400_si2165_config, | |
1577 | &i2c_bus->i2c_adap); | |
1578 | if (fe0->dvb.frontend != NULL) { | |
711c3119 | 1579 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; |
36efec48 MS |
1580 | if (!dvb_attach(tda18271_attach, |
1581 | fe0->dvb.frontend, | |
1582 | 0x60, &i2c_bus2->i2c_adap, | |
1583 | &hauppauge_hvr4400_tuner_config)) | |
1584 | goto frontend_detach; | |
1585 | } | |
1586 | break; | |
7c62f5a1 MK |
1587 | } |
1588 | break; | |
29442266 OS |
1589 | case CX23885_BOARD_DVBSKY_T9580: |
1590 | i2c_bus = &dev->i2c_bus[0]; | |
1591 | i2c_bus2 = &dev->i2c_bus[1]; | |
1592 | switch (port->nr) { | |
1593 | /* port b - satellite */ | |
1594 | case 1: | |
1595 | /* attach frontend */ | |
1596 | fe0->dvb.frontend = dvb_attach(m88ds3103_attach, | |
1597 | &dvbsky_t9580_m88ds3103_config, | |
1598 | &i2c_bus2->i2c_adap, &adapter); | |
1599 | if (fe0->dvb.frontend == NULL) | |
1600 | break; | |
1601 | ||
1602 | /* attach tuner */ | |
143800a5 | 1603 | memset(&m88ts2022_config, 0, sizeof(m88ts2022_config)); |
29442266 OS |
1604 | m88ts2022_config.fe = fe0->dvb.frontend; |
1605 | m88ts2022_config.clock = 27000000; | |
1606 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1607 | strlcpy(info.type, "m88ts2022", I2C_NAME_SIZE); | |
1608 | info.addr = 0x60; | |
1609 | info.platform_data = &m88ts2022_config; | |
1610 | request_module(info.type); | |
1611 | client_tuner = i2c_new_device(adapter, &info); | |
1612 | if (client_tuner == NULL || | |
1613 | client_tuner->dev.driver == NULL) | |
1614 | goto frontend_detach; | |
1615 | if (!try_module_get(client_tuner->dev.driver->owner)) { | |
1616 | i2c_unregister_device(client_tuner); | |
1617 | goto frontend_detach; | |
1618 | } | |
1619 | ||
1620 | /* delegate signal strength measurement to tuner */ | |
1621 | fe0->dvb.frontend->ops.read_signal_strength = | |
1622 | fe0->dvb.frontend->ops.tuner_ops.get_rf_strength; | |
1623 | ||
1624 | /* | |
1625 | * for setting the voltage we need to set GPIOs on | |
1626 | * the card. | |
1627 | */ | |
1628 | port->fe_set_voltage = | |
1629 | fe0->dvb.frontend->ops.set_voltage; | |
1630 | fe0->dvb.frontend->ops.set_voltage = | |
1631 | dvbsky_t9580_set_voltage; | |
1632 | ||
1633 | port->i2c_client_tuner = client_tuner; | |
1634 | ||
1635 | break; | |
1636 | /* port c - terrestrial/cable */ | |
1637 | case 2: | |
1638 | /* attach frontend */ | |
143800a5 | 1639 | memset(&si2168_config, 0, sizeof(si2168_config)); |
29442266 OS |
1640 | si2168_config.i2c_adapter = &adapter; |
1641 | si2168_config.fe = &fe0->dvb.frontend; | |
1642 | si2168_config.ts_mode = SI2168_TS_SERIAL; | |
1643 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1644 | strlcpy(info.type, "si2168", I2C_NAME_SIZE); | |
1645 | info.addr = 0x64; | |
1646 | info.platform_data = &si2168_config; | |
1647 | request_module(info.type); | |
1648 | client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); | |
1649 | if (client_demod == NULL || | |
1650 | client_demod->dev.driver == NULL) | |
1651 | goto frontend_detach; | |
1652 | if (!try_module_get(client_demod->dev.driver->owner)) { | |
1653 | i2c_unregister_device(client_demod); | |
1654 | goto frontend_detach; | |
1655 | } | |
1656 | port->i2c_client_demod = client_demod; | |
1657 | ||
1658 | /* attach tuner */ | |
143800a5 | 1659 | memset(&si2157_config, 0, sizeof(si2157_config)); |
29442266 OS |
1660 | si2157_config.fe = fe0->dvb.frontend; |
1661 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1662 | strlcpy(info.type, "si2157", I2C_NAME_SIZE); | |
1663 | info.addr = 0x60; | |
1664 | info.platform_data = &si2157_config; | |
1665 | request_module(info.type); | |
1666 | client_tuner = i2c_new_device(adapter, &info); | |
1667 | if (client_tuner == NULL || | |
1668 | client_tuner->dev.driver == NULL) { | |
1669 | module_put(client_demod->dev.driver->owner); | |
1670 | i2c_unregister_device(client_demod); | |
1671 | goto frontend_detach; | |
1672 | } | |
1673 | if (!try_module_get(client_tuner->dev.driver->owner)) { | |
1674 | i2c_unregister_device(client_tuner); | |
1675 | module_put(client_demod->dev.driver->owner); | |
1676 | i2c_unregister_device(client_demod); | |
1677 | goto frontend_detach; | |
1678 | } | |
1679 | port->i2c_client_tuner = client_tuner; | |
1680 | break; | |
1681 | } | |
1682 | break; | |
82c10276 OS |
1683 | case CX23885_BOARD_DVBSKY_T980C: |
1684 | i2c_bus = &dev->i2c_bus[1]; | |
1685 | ||
1686 | /* attach frontend */ | |
1687 | memset(&si2168_config, 0, sizeof(si2168_config)); | |
1688 | si2168_config.i2c_adapter = &adapter; | |
1689 | si2168_config.fe = &fe0->dvb.frontend; | |
1690 | si2168_config.ts_mode = SI2168_TS_PARALLEL; | |
1691 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1692 | strlcpy(info.type, "si2168", I2C_NAME_SIZE); | |
1693 | info.addr = 0x64; | |
1694 | info.platform_data = &si2168_config; | |
1695 | request_module(info.type); | |
1696 | client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info); | |
1697 | if (client_demod == NULL || | |
1698 | client_demod->dev.driver == NULL) | |
1699 | goto frontend_detach; | |
1700 | if (!try_module_get(client_demod->dev.driver->owner)) { | |
1701 | i2c_unregister_device(client_demod); | |
1702 | goto frontend_detach; | |
1703 | } | |
1704 | port->i2c_client_demod = client_demod; | |
1705 | ||
1706 | /* attach tuner */ | |
1707 | memset(&si2157_config, 0, sizeof(si2157_config)); | |
1708 | si2157_config.fe = fe0->dvb.frontend; | |
1709 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
1710 | strlcpy(info.type, "si2157", I2C_NAME_SIZE); | |
1711 | info.addr = 0x60; | |
1712 | info.platform_data = &si2157_config; | |
1713 | request_module(info.type); | |
1714 | client_tuner = i2c_new_device(adapter, &info); | |
1715 | if (client_tuner == NULL || | |
1716 | client_tuner->dev.driver == NULL) { | |
1717 | module_put(client_demod->dev.driver->owner); | |
1718 | i2c_unregister_device(client_demod); | |
1719 | goto frontend_detach; | |
1720 | } | |
1721 | if (!try_module_get(client_tuner->dev.driver->owner)) { | |
1722 | i2c_unregister_device(client_tuner); | |
1723 | module_put(client_demod->dev.driver->owner); | |
1724 | i2c_unregister_device(client_demod); | |
1725 | goto frontend_detach; | |
1726 | } | |
1727 | port->i2c_client_tuner = client_tuner; | |
1728 | break; | |
d19770e5 | 1729 | default: |
9c8ced51 ST |
1730 | printk(KERN_INFO "%s: The frontend of your DVB/ATSC card " |
1731 | " isn't supported yet\n", | |
d19770e5 ST |
1732 | dev->name); |
1733 | break; | |
1734 | } | |
78db8547 IL |
1735 | |
1736 | if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) { | |
9c8ced51 | 1737 | printk(KERN_ERR "%s: frontend initialization failed\n", |
78db8547 IL |
1738 | dev->name); |
1739 | goto frontend_detach; | |
d19770e5 | 1740 | } |
78db8547 | 1741 | |
d7cba043 | 1742 | /* define general-purpose callback pointer */ |
363c35fc | 1743 | fe0->dvb.frontend->callback = cx23885_tuner_callback; |
78db8547 IL |
1744 | if (fe1) |
1745 | fe1->dvb.frontend->callback = cx23885_tuner_callback; | |
1746 | #if 0 | |
1747 | /* Ensure all frontends negotiate bus access */ | |
1748 | fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl; | |
1749 | if (fe1) | |
1750 | fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl; | |
1751 | #endif | |
d19770e5 ST |
1752 | |
1753 | /* Put the analog decoder in standby to keep it quiet */ | |
622b828a | 1754 | call_all(dev, core, s_power, 0); |
d19770e5 | 1755 | |
363c35fc ST |
1756 | if (fe0->dvb.frontend->ops.analog_ops.standby) |
1757 | fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend); | |
3ba71d21 | 1758 | |
d19770e5 | 1759 | /* register everything */ |
453afdd9 | 1760 | ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port, |
9adf6132 | 1761 | &dev->pci->dev, adapter_nr, mfe_shared); |
bee30192 | 1762 | if (ret) |
78db8547 | 1763 | goto frontend_detach; |
363c35fc | 1764 | |
5a23b076 IL |
1765 | /* init CI & MAC */ |
1766 | switch (dev->board) { | |
1767 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: { | |
1768 | static struct netup_card_info cinfo; | |
1769 | ||
1770 | netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo); | |
1771 | memcpy(port->frontends.adapter.proposed_mac, | |
1772 | cinfo.port[port->nr - 1].mac, 6); | |
be395157 | 1773 | printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n", |
1774 | port->nr, port->frontends.adapter.proposed_mac); | |
5a23b076 IL |
1775 | |
1776 | netup_ci_init(port); | |
1777 | break; | |
1778 | } | |
78db8547 IL |
1779 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: { |
1780 | struct altera_ci_config netup_ci_cfg = { | |
1781 | .dev = dev,/* magic number to identify*/ | |
1782 | .adapter = &port->frontends.adapter,/* for CI */ | |
1783 | .demux = &fe0->dvb.demux,/* for hw pid filter */ | |
1784 | .fpga_rw = netup_altera_fpga_rw, | |
1785 | }; | |
1786 | ||
1787 | altera_ci_init(&netup_ci_cfg, port->nr); | |
1788 | break; | |
1789 | } | |
16bfdaa4 PG |
1790 | case CX23885_BOARD_TEVII_S470: { |
1791 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1792 | ||
1793 | if (port->nr != 1) | |
1794 | break; | |
1795 | ||
1796 | /* Read entire EEPROM */ | |
1797 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1798 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom)); | |
5cac1f66 | 1799 | printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0); |
16bfdaa4 PG |
1800 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6); |
1801 | break; | |
1802 | } | |
29442266 OS |
1803 | case CX23885_BOARD_DVBSKY_T9580: { |
1804 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1805 | ||
1806 | if (port->nr > 2) | |
1807 | break; | |
1808 | ||
1809 | /* Read entire EEPROM */ | |
1810 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1811 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, | |
1812 | sizeof(eeprom)); | |
1813 | printk(KERN_INFO "DVBSky T9580 port %d MAC address: %pM\n", | |
1814 | port->nr, eeprom + 0xc0 + (port->nr-1) * 8); | |
1815 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 + | |
1816 | (port->nr-1) * 8, 6); | |
1817 | break; | |
1818 | } | |
82c10276 OS |
1819 | case CX23885_BOARD_DVBSKY_T980C: { |
1820 | u8 eeprom[256]; /* 24C02 i2c eeprom */ | |
1821 | ||
1822 | if (port->nr != 1) | |
1823 | break; | |
1824 | ||
1825 | /* Read entire EEPROM */ | |
1826 | dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1; | |
1827 | tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, | |
1828 | sizeof(eeprom)); | |
1829 | printk(KERN_INFO "DVBSky T980C MAC address: %pM\n", | |
1830 | eeprom + 0xc0); | |
1831 | memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6); | |
1832 | break; | |
1833 | } | |
5a23b076 IL |
1834 | } |
1835 | ||
1836 | return ret; | |
78db8547 IL |
1837 | |
1838 | frontend_detach: | |
1839 | port->gate_ctrl = NULL; | |
453afdd9 | 1840 | vb2_dvb_dealloc_frontends(&port->frontends); |
78db8547 | 1841 | return -EINVAL; |
d19770e5 ST |
1842 | } |
1843 | ||
1844 | int cx23885_dvb_register(struct cx23885_tsport *port) | |
1845 | { | |
363c35fc | 1846 | |
453afdd9 | 1847 | struct vb2_dvb_frontend *fe0; |
d19770e5 | 1848 | struct cx23885_dev *dev = port->dev; |
eb0c58bb ST |
1849 | int err, i; |
1850 | ||
1851 | /* Here we need to allocate the correct number of frontends, | |
af901ca1 | 1852 | * as reflected in the cards struct. The reality is that currently |
eb0c58bb ST |
1853 | * no cx23885 boards support this - yet. But, if we don't modify this |
1854 | * code then the second frontend would never be allocated (later) | |
1855 | * and fail with error before the attach in dvb_register(). | |
1856 | * Without these changes we risk an OOPS later. The changes here | |
1857 | * are for safety, and should provide a good foundation for the | |
1858 | * future addition of any multi-frontend cx23885 based boards. | |
1859 | */ | |
1860 | printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, | |
1861 | port->num_frontends); | |
d19770e5 | 1862 | |
eb0c58bb | 1863 | for (i = 1; i <= port->num_frontends; i++) { |
453afdd9 HV |
1864 | struct vb2_queue *q; |
1865 | ||
1866 | if (vb2_dvb_alloc_frontend( | |
9c8ced51 | 1867 | &port->frontends, i) == NULL) { |
eb0c58bb ST |
1868 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
1869 | return -ENOMEM; | |
1870 | } | |
1871 | ||
453afdd9 | 1872 | fe0 = vb2_dvb_get_frontend(&port->frontends, i); |
eb0c58bb ST |
1873 | if (!fe0) |
1874 | err = -EINVAL; | |
363c35fc | 1875 | |
eb0c58bb | 1876 | dprintk(1, "%s\n", __func__); |
9c8ced51 | 1877 | dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n", |
eb0c58bb ST |
1878 | dev->board, |
1879 | dev->name, | |
1880 | dev->pci_bus, | |
1881 | dev->pci_slot); | |
d19770e5 | 1882 | |
eb0c58bb | 1883 | err = -ENODEV; |
d19770e5 | 1884 | |
eb0c58bb ST |
1885 | /* dvb stuff */ |
1886 | /* We have to init the queue for each frontend on a port. */ | |
9c8ced51 | 1887 | printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name); |
453afdd9 HV |
1888 | q = &fe0->dvb.dvbq; |
1889 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1890 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | |
1891 | q->gfp_flags = GFP_DMA32; | |
1892 | q->min_buffers_needed = 2; | |
1893 | q->drv_priv = port; | |
1894 | q->buf_struct_size = sizeof(struct cx23885_buffer); | |
1895 | q->ops = &dvb_qops; | |
1896 | q->mem_ops = &vb2_dma_sg_memops; | |
1897 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
1898 | q->lock = &dev->lock; | |
1899 | ||
1900 | err = vb2_queue_init(q); | |
1901 | if (err < 0) | |
1902 | return err; | |
eb0c58bb | 1903 | } |
d19770e5 ST |
1904 | err = dvb_register(port); |
1905 | if (err != 0) | |
9c8ced51 ST |
1906 | printk(KERN_ERR "%s() dvb_register failed err = %d\n", |
1907 | __func__, err); | |
d19770e5 | 1908 | |
d19770e5 ST |
1909 | return err; |
1910 | } | |
1911 | ||
1912 | int cx23885_dvb_unregister(struct cx23885_tsport *port) | |
1913 | { | |
453afdd9 | 1914 | struct vb2_dvb_frontend *fe0; |
b0b12e63 OS |
1915 | struct i2c_client *client; |
1916 | ||
1917 | /* remove I2C client for tuner */ | |
1918 | client = port->i2c_client_tuner; | |
1919 | if (client) { | |
1920 | module_put(client->dev.driver->owner); | |
1921 | i2c_unregister_device(client); | |
1922 | } | |
1923 | ||
1924 | /* remove I2C client for demodulator */ | |
1925 | client = port->i2c_client_demod; | |
1926 | if (client) { | |
1927 | module_put(client->dev.driver->owner); | |
1928 | i2c_unregister_device(client); | |
1929 | } | |
363c35fc | 1930 | |
453afdd9 | 1931 | fe0 = vb2_dvb_get_frontend(&port->frontends, 1); |
b0b12e63 | 1932 | |
e66131ce | 1933 | if (fe0 && fe0->dvb.frontend) |
453afdd9 | 1934 | vb2_dvb_unregister_bus(&port->frontends); |
d19770e5 | 1935 | |
afd96668 HV |
1936 | switch (port->dev->board) { |
1937 | case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: | |
1938 | netup_ci_exit(port); | |
1939 | break; | |
78db8547 IL |
1940 | case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: |
1941 | altera_ci_release(port->dev, port->nr); | |
1942 | break; | |
afd96668 | 1943 | } |
5a23b076 | 1944 | |
78db8547 IL |
1945 | port->gate_ctrl = NULL; |
1946 | ||
d19770e5 ST |
1947 | return 0; |
1948 | } |