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[media] em2xx: use v4l2_mc_create_media_graph()
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST		 16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/fs.h>
22#include <linux/kthread.h>
23#include <linux/file.h>
24#include <linux/suspend.h>
25
26#include "cx23885.h"
d19770e5
ST		 27#include <media/v4l2-common.h>
28
5a23b076 29#include "dvb_ca_en50221.h"
d19770e5 30#include "s5h1409.h"
52b50450 31#include "s5h1411.h"
d19770e5 32#include "mt2131.h"
3ba71d21 33#include "tda8290.h"
4041f1a5 34#include "tda18271.h"
9bc37caa 35#include "lgdt330x.h"
0cf8af57 36#include "xc4000.h"
d1987d55 37#include "xc5000.h"
ea5697fe 38#include "max2165.h"
b3ea0166 39#include "tda10048.h"
07b4a835 40#include "tuner-xc2028.h"
827855d3 41#include "tuner-simple.h"
66762373 42#include "dib7000p.h"
46b21bba 43#include "dib0070.h"
66762373 44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
5a23b076 46#include "stv0900.h"
f867c3f4 47#include "stv0900_reg.h"
5a23b076
IL		 48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
e6001482 51#include "cx24117.h"
5a23b076 52#include "cimax2.h"
493b7127 53#include "lgs8gxx.h"
5a23b076
IL		 54#include "netup-eeprom.h"
55#include "netup-init.h"
a5dbf457 56#include "lgdt3305.h"
ea5697fe 57#include "atbm8830.h"
73f0af44 58#include "ts2020.h"
09ea33e5
IL		 59#include "ds3000.h"
60#include "cx23885-f300.h"
78db8547
IL		 61#include "altera-ci.h"
62#include "stv0367.h"
722c90eb
SR		 63#include "drxk.h"
64#include "mt2063.h"
f667190b
MB		 65#include "stv090x.h"
66#include "stb6100.h"
67#include "stb6100_cfg.h"
7c62f5a1
MK		 68#include "tda10071.h"
69#include "a8293.h"
0d1b5265 70#include "mb86a20s.h"
36efec48 71#include "si2165.h"
29442266
OS		 72#include "si2168.h"
73#include "si2157.h"
24e77409 74#include "sp2.h"
29442266 75#include "m88ds3103.h"
1fc77d01 76#include "m88rs6000t.h"
d19770e5 77
4513fc69 78static unsigned int debug;
d19770e5 79
4513fc69
ST		 80#define dprintk(level, fmt, arg...)\
81 do { if (debug >= level)\
82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
83 } while (0)
d19770e5
ST		 84
85/* ------------------------------------------------------------------ */
86
3ba71d21
MK		 87static unsigned int alt_tuner;
88module_param(alt_tuner, int, 0644);
89MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90
78e92006
JG		 91DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92
3ba71d21
MK		 93/* ------------------------------------------------------------------ */
94
df9ecb0c 95static int queue_setup(struct vb2_queue *q,
453afdd9
HV		 96 unsigned int *num_buffers, unsigned int *num_planes,
97 unsigned int sizes[], void *alloc_ctxs[])
d19770e5 98{
453afdd9 99 struct cx23885_tsport *port = q->drv_priv;
d19770e5
ST		 100
101 port->ts_packet_size = 188 * 4;
102 port->ts_packet_count = 32;
453afdd9
HV		 103 *num_planes = 1;
104 sizes[0] = port->ts_packet_size * port->ts_packet_count;
0c3a14c1 105 alloc_ctxs[0] = port->dev->alloc_ctx;
453afdd9 106 *num_buffers = 32;
d19770e5
ST		 107 return 0;
108}
109
453afdd9
HV		 110
111static int buffer_prepare(struct vb2_buffer *vb)
d19770e5 112{
2d700715 113 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
453afdd9
HV		 114 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
115 struct cx23885_buffer *buf =
2d700715 116 container_of(vbuf, struct cx23885_buffer, vb);
453afdd9
HV		 117
118 return cx23885_buf_prepare(buf, port);
d19770e5
ST		 119}
120
453afdd9 121static void buffer_finish(struct vb2_buffer *vb)
d19770e5 122{
2d700715 123 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
453afdd9
HV		 124 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
125 struct cx23885_dev *dev = port->dev;
2d700715 126 struct cx23885_buffer *buf = container_of(vbuf,
453afdd9 127 struct cx23885_buffer, vb);
453afdd9
HV		 128
129 cx23885_free_buffer(dev, buf);
d19770e5
ST		 130}
131
453afdd9 132static void buffer_queue(struct vb2_buffer *vb)
d19770e5 133{
2d700715 134 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
453afdd9 135 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
2d700715 136 struct cx23885_buffer *buf = container_of(vbuf,
453afdd9
HV		 137 struct cx23885_buffer, vb);
138
139 cx23885_buf_queue(port, buf);
d19770e5
ST		 140}
141
78db8547
IL		 142static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
143{
453afdd9
HV		 144 struct vb2_dvb_frontends *f;
145 struct vb2_dvb_frontend *fe;
78db8547
IL		 146
147 f = &port->frontends;
148
149 if (f->gate <= 1) /* undefined or fe0 */
453afdd9 150 fe = vb2_dvb_get_frontend(f, 1);
78db8547 151 else
453afdd9 152 fe = vb2_dvb_get_frontend(f, f->gate);
78db8547
IL		 153
154 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
155 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
156}
157
453afdd9
HV		 158static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
159{
160 struct cx23885_tsport *port = q->drv_priv;
161 struct cx23885_dmaqueue *dmaq = &port->mpegq;
162 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
163 struct cx23885_buffer, queue);
164
165 cx23885_start_dma(port, dmaq, buf);
166 return 0;
167}
168
169static void cx23885_stop_streaming(struct vb2_queue *q)
170{
171 struct cx23885_tsport *port = q->drv_priv;
172
173 cx23885_cancel_buffers(port);
174}
175
176static struct vb2_ops dvb_qops = {
177 .queue_setup = queue_setup,
178 .buf_prepare = buffer_prepare,
179 .buf_finish = buffer_finish,
180 .buf_queue = buffer_queue,
181 .wait_prepare = vb2_ops_wait_prepare,
182 .wait_finish = vb2_ops_wait_finish,
183 .start_streaming = cx23885_start_streaming,
184 .stop_streaming = cx23885_stop_streaming,
d19770e5
ST		 185};
186
86184e06 187static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST		 188 .demod_address = 0x32 >> 1,
189 .output_mode = S5H1409_SERIAL_OUTPUT,
190 .gpio = S5H1409_GPIO_ON,
2b03238a 191 .qam_if = 44000,
fc959bef 192 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 193 .status_mode = S5H1409_DEMODLOCKING,
194 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST		 195};
196
b3ea0166
ST		 197static struct tda10048_config hauppauge_hvr1200_config = {
198 .demod_address = 0x10 >> 1,
199 .output_mode = TDA10048_SERIAL_OUTPUT,
200 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05 201 .inversion = TDA10048_INVERSION_ON,
8816bef5
ST		 202 .dtv6_if_freq_khz = TDA10048_IF_3300,
203 .dtv7_if_freq_khz = TDA10048_IF_3800,
204 .dtv8_if_freq_khz = TDA10048_IF_4300,
484d9e05 205 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST		 206};
207
6b926eca
MK		 208static struct tda10048_config hauppauge_hvr1210_config = {
209 .demod_address = 0x10 >> 1,
210 .output_mode = TDA10048_SERIAL_OUTPUT,
211 .fwbulkwritelen = TDA10048_BULKWRITE_200,
212 .inversion = TDA10048_INVERSION_ON,
c27586e4
MK		 213 .dtv6_if_freq_khz = TDA10048_IF_3300,
214 .dtv7_if_freq_khz = TDA10048_IF_3500,
215 .dtv8_if_freq_khz = TDA10048_IF_4000,
6b926eca
MK		 216 .clk_freq_khz = TDA10048_CLK_16000,
217};
218
3ba71d21
MK		 219static struct s5h1409_config hauppauge_ezqam_config = {
220 .demod_address = 0x32 >> 1,
221 .output_mode = S5H1409_SERIAL_OUTPUT,
222 .gpio = S5H1409_GPIO_OFF,
223 .qam_if = 4000,
224 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST		 225 .status_mode = S5H1409_DEMODLOCKING,
226 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK		 227};
228
fc959bef 229static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST		 230 .demod_address = 0x32 >> 1,
231 .output_mode = S5H1409_SERIAL_OUTPUT,
232 .gpio = S5H1409_GPIO_OFF,
2b03238a 233 .qam_if = 44000,
fe475163 234 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 235 .status_mode = S5H1409_DEMODLOCKING,
236 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST		 237};
238
07b4a835
MK		 239static struct s5h1409_config hauppauge_hvr1500_config = {
240 .demod_address = 0x32 >> 1,
241 .output_mode = S5H1409_SERIAL_OUTPUT,
242 .gpio = S5H1409_GPIO_OFF,
243 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 244 .status_mode = S5H1409_DEMODLOCKING,
245 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK		 246};
247
86184e06 248static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST		 249 0x61
250};
251
9bc37caa
MK		 252static struct lgdt330x_config fusionhdtv_5_express = {
253 .demod_address = 0x0e,
254 .demod_chip = LGDT3303,
255 .serial_mpeg = 0x40,
256};
257
d1987d55
ST		 258static struct s5h1409_config hauppauge_hvr1500q_config = {
259 .demod_address = 0x32 >> 1,
260 .output_mode = S5H1409_SERIAL_OUTPUT,
261 .gpio = S5H1409_GPIO_ON,
262 .qam_if = 44000,
263 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 264 .status_mode = S5H1409_DEMODLOCKING,
265 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST		 266};
267
335377b7
MK		 268static struct s5h1409_config dvico_s5h1409_config = {
269 .demod_address = 0x32 >> 1,
270 .output_mode = S5H1409_SERIAL_OUTPUT,
271 .gpio = S5H1409_GPIO_ON,
272 .qam_if = 44000,
273 .inversion = S5H1409_INVERSION_OFF,
274 .status_mode = S5H1409_DEMODLOCKING,
275 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
276};
277
52b50450
MK		 278static struct s5h1411_config dvico_s5h1411_config = {
279 .output_mode = S5H1411_SERIAL_OUTPUT,
280 .gpio = S5H1411_GPIO_ON,
281 .qam_if = S5H1411_IF_44000,
282 .vsb_if = S5H1411_IF_44000,
283 .inversion = S5H1411_INVERSION_OFF,
284 .status_mode = S5H1411_DEMODLOCKING,
285 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
286};
287
19bc5796
MK		 288static struct s5h1411_config hcw_s5h1411_config = {
289 .output_mode = S5H1411_SERIAL_OUTPUT,
290 .gpio = S5H1411_GPIO_OFF,
291 .vsb_if = S5H1411_IF_44000,
292 .qam_if = S5H1411_IF_4000,
293 .inversion = S5H1411_INVERSION_ON,
294 .status_mode = S5H1411_DEMODLOCKING,
295 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
296};
297
d1987d55 298static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST		 299 .i2c_address = 0x61,
300 .if_khz = 5380,
d1987d55
ST		 301};
302
335377b7
MK		 303static struct xc5000_config dvico_xc5000_tunerconfig = {
304 .i2c_address = 0x64,
305 .if_khz = 5380,
335377b7
MK		 306};
307
4041f1a5
MK		 308static struct tda829x_config tda829x_no_probe = {
309 .probe_tuner = TDA829X_DONT_PROBE,
310};
311
f21e0d7f 312static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK		 313 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
314 .if_lvl = 6, .rfagc_top = 0x37 },
315 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
316 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK		 317};
318
b34cdc36
MK		 319static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
320 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
321 .if_lvl = 1, .rfagc_top = 0x37, },
322 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
323 .if_lvl = 1, .rfagc_top = 0x37, },
324 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
325 .if_lvl = 1, .rfagc_top = 0x37, },
326};
327
f21e0d7f
MK		 328static struct tda18271_config hauppauge_tda18271_config = {
329 .std_map = &hauppauge_tda18271_std_map,
330 .gate = TDA18271_GATE_ANALOG,
04a68baa 331 .output_opt = TDA18271_OUTPUT_LT_OFF,
f21e0d7f
MK		 332};
333
b3ea0166 334static struct tda18271_config hauppauge_hvr1200_tuner_config = {
b34cdc36 335 .std_map = &hauppauge_hvr1200_tda18271_std_map,
b3ea0166 336 .gate = TDA18271_GATE_ANALOG,
04a68baa 337 .output_opt = TDA18271_OUTPUT_LT_OFF,
b3ea0166
ST		 338};
339
6b926eca
MK		 340static struct tda18271_config hauppauge_hvr1210_tuner_config = {
341 .gate = TDA18271_GATE_DIGITAL,
04a68baa 342 .output_opt = TDA18271_OUTPUT_LT_OFF,
6b926eca
MK		 343};
344
36efec48
MS		 345static struct tda18271_config hauppauge_hvr4400_tuner_config = {
346 .gate = TDA18271_GATE_DIGITAL,
347 .output_opt = TDA18271_OUTPUT_LT_OFF,
348};
349
247bc540 350static struct tda18271_std_map hauppauge_hvr127x_std_map = {
a5dbf457
MK		 351 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
352 .if_lvl = 1, .rfagc_top = 0x58 },
353 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
354 .if_lvl = 1, .rfagc_top = 0x58 },
355};
356
247bc540
MK		 357static struct tda18271_config hauppauge_hvr127x_config = {
358 .std_map = &hauppauge_hvr127x_std_map,
04a68baa 359 .output_opt = TDA18271_OUTPUT_LT_OFF,
a5dbf457
MK		 360};
361
247bc540 362static struct lgdt3305_config hauppauge_lgdt3305_config = {
a5dbf457
MK		 363 .i2c_addr = 0x0e,
364 .mpeg_mode = LGDT3305_MPEG_SERIAL,
365 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
366 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
367 .deny_i2c_rptr = 1,
368 .spectral_inversion = 1,
369 .qam_if_khz = 4000,
370 .vsb_if_khz = 3250,
371};
372
b1721d0d 373static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST		 374 BAND_VHF | BAND_UHF, /* band_caps */
375
376 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
377 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
378 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
379 * P_agc_nb_est=2, P_agc_write=0
380 */
381 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
382 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
383
384 712, /* inv_gain */
385 21, /* time_stabiliz */
386
387 0, /* alpha_level */
388 118, /* thlock */
389
390 0, /* wbd_inv */
391 2867, /* wbd_ref */
392 0, /* wbd_sel */
393 2, /* wbd_alpha */
394
395 0, /* agc1_max */
396 0, /* agc1_min */
397 39718, /* agc2_max */
398 9930, /* agc2_min */
399 0, /* agc1_pt1 */
400 0, /* agc1_pt2 */
401 0, /* agc1_pt3 */
402 0, /* agc1_slope1 */
403 0, /* agc1_slope2 */
404 0, /* agc2_pt1 */
405 128, /* agc2_pt2 */
406 29, /* agc2_slope1 */
407 29, /* agc2_slope2 */
408
409 17, /* alpha_mant */
410 27, /* alpha_exp */
411 23, /* beta_mant */
412 51, /* beta_exp */
413
414 1, /* perform_agc_softsplit */
415};
416
417/* PLL Configuration for COFDM BW_MHz = 8.000000
418 * With external clock = 30.000000 */
b1721d0d 419static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST		 420 60000, /* internal */
421 30000, /* sampling */
422 1, /* pll_cfg: prediv */
423 8, /* pll_cfg: ratio */
424 3, /* pll_cfg: range */
425 1, /* pll_cfg: reset */
426 0, /* pll_cfg: bypass */
427 0, /* misc: refdiv */
428 0, /* misc: bypclk_div */
429 1, /* misc: IO_CLK_en_core */
430 1, /* misc: ADClkSrc */
431 0, /* misc: modulo */
432 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
433 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
434 20452225, /* timf */
435 30000000 /* xtal_hz */
436};
437
438static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
439 .output_mpeg2_in_188_bytes = 1,
440 .hostbus_diversity = 1,
441 .tuner_is_baseband = 0,
442 .update_lna = NULL,
443
444 .agc_config_count = 1,
445 .agc = &xc3028_agc_config,
446 .bw = &xc3028_bw_config,
447
448 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
449 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
450 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
451
452 .pwm_freq_div = 0,
453 .agc_control = NULL,
454 .spur_protect = 0,
455
456 .output_mode = OUTMODE_MPEG2_SERIAL,
457};
458
aef2d186
ST		 459static struct zl10353_config dvico_fusionhdtv_xc3028 = {
460 .demod_address = 0x0f,
461 .if2 = 45600,
462 .no_tuner = 1,
d4dc673d 463 .disable_i2c_gate_ctrl = 1,
aef2d186
ST		 464};
465
f867c3f4
IL		 466static struct stv0900_reg stv0900_ts_regs[] = {
467 { R0900_TSGENERAL, 0x00 },
468 { R0900_P1_TSSPEED, 0x40 },
469 { R0900_P2_TSSPEED, 0x40 },
470 { R0900_P1_TSCFGM, 0xc0 },
471 { R0900_P2_TSCFGM, 0xc0 },
472 { R0900_P1_TSCFGH, 0xe0 },
473 { R0900_P2_TSCFGH, 0xe0 },
474 { R0900_P1_TSCFGL, 0x20 },
475 { R0900_P2_TSCFGL, 0x20 },
476 { 0xffff, 0xff }, /* terminate */
477};
478
5a23b076
IL		 479static struct stv0900_config netup_stv0900_config = {
480 .demod_address = 0x68,
29372a8d 481 .demod_mode = 1, /* dual */
644c7ef0 482 .xtal = 8000000,
5a23b076
IL		 483 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
484 .diseqc_mode = 2,/* 2/3 PWM */
f867c3f4 485 .ts_config_regs = stv0900_ts_regs,
5a23b076
IL		 486 .tun1_maddress = 0,/* 0x60 */
487 .tun2_maddress = 3,/* 0x63 */
488 .tun1_adc = 1,/* 1 Vpp */
489 .tun2_adc = 1,/* 1 Vpp */
490};
491
492static struct stv6110_config netup_stv6110_tunerconfig_a = {
493 .i2c_address = 0x60,
644c7ef0
AO		 494 .mclk = 16000000,
495 .clk_div = 1,
873688cd 496 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 497};
498
499static struct stv6110_config netup_stv6110_tunerconfig_b = {
500 .i2c_address = 0x63,
644c7ef0
AO		 501 .mclk = 16000000,
502 .clk_div = 1,
873688cd 503 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 504};
505
96318d0c 506static struct cx24116_config tbs_cx24116_config = {
09ea33e5 507 .demod_address = 0x55,
96318d0c
IL		 508};
509
e6001482
LA		 510static struct cx24117_config tbs_cx24117_config = {
511 .demod_address = 0x55,
512};
513
09ea33e5
IL		 514static struct ds3000_config tevii_ds3000_config = {
515 .demod_address = 0x68,
579943f5
IL		 516};
517
73f0af44
KD		 518static struct ts2020_config tevii_ts2020_config = {
519 .tuner_address = 0x60,
b858c331 520 .clk_out_div = 1,
8d2b0229 521 .frequency_div = 1146000,
73f0af44
KD		 522};
523
c9b8b04b
IL		 524static struct cx24116_config dvbworld_cx24116_config = {
525 .demod_address = 0x05,
526};
527
493b7127
DW		 528static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
529 .prod = LGS8GXX_PROD_LGS8GL5,
530 .demod_address = 0x19,
531 .serial_ts = 0,
532 .ts_clk_pol = 1,
533 .ts_clk_gated = 1,
534 .if_clk_freq = 30400, /* 30.4 MHz */
535 .if_freq = 5380, /* 5.38 MHz */
536 .if_neg_center = 1,
537 .ext_adc = 0,
538 .adc_signed = 0,
539 .if_neg_edge = 0,
540};
541
542static struct xc5000_config mygica_x8506_xc5000_config = {
543 .i2c_address = 0x61,
544 .if_khz = 5380,
545};
546
0d1b5265
MCC		 547static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
548 .demod_address = 0x10,
549};
550
551static struct xc5000_config mygica_x8507_xc5000_config = {
552 .i2c_address = 0x61,
553 .if_khz = 4000,
554};
555
f667190b 556static struct stv090x_config prof_8000_stv090x_config = {
b858c331
IL		 557 .device = STV0903,
558 .demod_mode = STV090x_SINGLE,
559 .clk_mode = STV090x_CLK_EXT,
560 .xtal = 27000000,
561 .address = 0x6A,
562 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
563 .repeater_level = STV090x_RPTLEVEL_64,
564 .adc1_range = STV090x_ADC_2Vpp,
565 .diseqc_envelope_mode = false,
566
567 .tuner_get_frequency = stb6100_get_frequency,
568 .tuner_set_frequency = stb6100_set_frequency,
569 .tuner_set_bandwidth = stb6100_set_bandwidth,
570 .tuner_get_bandwidth = stb6100_get_bandwidth,
f667190b
MB		 571};
572
573static struct stb6100_config prof_8000_stb6100_config = {
574 .tuner_address = 0x60,
575 .refclock = 27000000,
576};
577
0df289a2
MCC		 578static int p8000_set_voltage(struct dvb_frontend *fe,
579 enum fe_sec_voltage voltage)
f667190b
MB		 580{
581 struct cx23885_tsport *port = fe->dvb->priv;
582 struct cx23885_dev *dev = port->dev;
583
584 if (voltage == SEC_VOLTAGE_18)
585 cx_write(MC417_RWD, 0x00001e00);
586 else if (voltage == SEC_VOLTAGE_13)
587 cx_write(MC417_RWD, 0x00001a00);
588 else
589 cx_write(MC417_RWD, 0x00001800);
590 return 0;
591}
592
29442266 593static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
0df289a2 594 enum fe_sec_voltage voltage)
29442266
OS		 595{
596 struct cx23885_tsport *port = fe->dvb->priv;
597 struct cx23885_dev *dev = port->dev;
598
599 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
600
601 switch (voltage) {
602 case SEC_VOLTAGE_13:
603 cx23885_gpio_set(dev, GPIO_1);
604 cx23885_gpio_clear(dev, GPIO_0);
605 break;
606 case SEC_VOLTAGE_18:
607 cx23885_gpio_set(dev, GPIO_1);
608 cx23885_gpio_set(dev, GPIO_0);
609 break;
610 case SEC_VOLTAGE_OFF:
611 cx23885_gpio_clear(dev, GPIO_1);
612 cx23885_gpio_clear(dev, GPIO_0);
613 break;
614 }
615
616 /* call the frontend set_voltage function */
617 port->fe_set_voltage(fe, voltage);
618
619 return 0;
620}
621
c29d6a83 622static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe,
0df289a2 623 enum fe_sec_voltage voltage)
c29d6a83 624{
625 struct cx23885_tsport *port = fe->dvb->priv;
626 struct cx23885_dev *dev = port->dev;
627
628 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1);
629
630 switch (voltage) {
631 case SEC_VOLTAGE_13:
632 cx23885_gpio_set(dev, GPIO_13);
633 cx23885_gpio_clear(dev, GPIO_12);
634 break;
635 case SEC_VOLTAGE_18:
636 cx23885_gpio_set(dev, GPIO_13);
637 cx23885_gpio_set(dev, GPIO_12);
638 break;
639 case SEC_VOLTAGE_OFF:
640 cx23885_gpio_clear(dev, GPIO_13);
641 cx23885_gpio_clear(dev, GPIO_12);
642 break;
643 }
644 /* call the frontend set_voltage function */
645 return port->fe_set_voltage(fe, voltage);
646}
647
24e77409
OS		 648static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
649 u8 data, int *mem)
650{
651 /* MC417 */
652 #define SP2_DATA 0x000000ff
653 #define SP2_WR 0x00008000
654 #define SP2_RD 0x00004000
655 #define SP2_ACK 0x00001000
656 #define SP2_ADHI 0x00000800
657 #define SP2_ADLO 0x00000400
658 #define SP2_CS1 0x00000200
659 #define SP2_CS0 0x00000100
660 #define SP2_EN_ALL 0x00001000
661 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
662
663 struct cx23885_tsport *port = priv;
664 struct cx23885_dev *dev = port->dev;
665 int ret;
0e6c7b01 666 int tmp = 0;
24e77409
OS		 667 unsigned long timeout;
668
669 mutex_lock(&dev->gpio_lock);
670
671 /* write addr */
672 cx_write(MC417_OEN, SP2_EN_ALL);
673 cx_write(MC417_RWD, SP2_CTRL_OFF |
674 SP2_ADLO | (0xff & addr));
675 cx_clear(MC417_RWD, SP2_ADLO);
676 cx_write(MC417_RWD, SP2_CTRL_OFF |
677 SP2_ADHI | (0xff & (addr >> 8)));
678 cx_clear(MC417_RWD, SP2_ADHI);
679
680 if (read)
681 /* data in */
682 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
683 else
684 /* data out */
685 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
686
687 /* chip select 0 */
688 cx_clear(MC417_RWD, SP2_CS0);
689
690 /* read/write */
691 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
692
693 /* wait for a maximum of 1 msec */
694 timeout = jiffies + msecs_to_jiffies(1);
695 while (!time_after(jiffies, timeout)) {
696 tmp = cx_read(MC417_RWD);
697 if ((tmp & SP2_ACK) == 0)
698 break;
699 usleep_range(50, 100);
700 }
701
702 cx_set(MC417_RWD, SP2_CTRL_OFF);
703 *mem = tmp & 0xff;
704
705 mutex_unlock(&dev->gpio_lock);
706
707 if (!read) {
708 if (*mem < 0) {
709 ret = -EREMOTEIO;
710 goto err;
711 }
712 }
713
714 return 0;
715err:
716 return ret;
717}
718
a7d44baa 719static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
f35b9e80 720{
a7d44baa 721 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
f35b9e80
MK		 722 struct cx23885_tsport *port = fe->dvb->priv;
723 struct cx23885_dev *dev = port->dev;
724
725 switch (dev->board) {
726 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a7d44baa 727 switch (p->modulation) {
f35b9e80
MK		 728 case VSB_8:
729 cx23885_gpio_clear(dev, GPIO_5);
730 break;
731 case QAM_64:
732 case QAM_256:
733 default:
734 cx23885_gpio_set(dev, GPIO_5);
735 break;
736 }
737 break;
6f0d8c02 738 case CX23885_BOARD_MYGICA_X8506:
0d1b5265 739 case CX23885_BOARD_MYGICA_X8507:
6f0d8c02
DW		 740 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
741 /* Select Digital TV */
742 cx23885_gpio_set(dev, GPIO_0);
743 break;
f35b9e80 744 }
15472faf
MCC		 745
746 /* Call the real set_frontend */
747 if (port->set_frontend)
748 return port->set_frontend(fe);
749
5bdd3962 750 return 0;
f35b9e80
MK		 751}
752
15472faf
MCC		 753static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
754 struct dvb_frontend *fe)
755{
756 port->set_frontend = fe->ops.set_frontend;
757 fe->ops.set_frontend = cx23885_dvb_set_frontend;
758}
759
2365b2d3
DW		 760static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
761 .prod = LGS8GXX_PROD_LGS8G75,
762 .demod_address = 0x19,
763 .serial_ts = 0,
764 .ts_clk_pol = 1,
765 .ts_clk_gated = 1,
766 .if_clk_freq = 30400, /* 30.4 MHz */
767 .if_freq = 6500, /* 6.50 MHz */
768 .if_neg_center = 1,
769 .ext_adc = 0,
770 .adc_signed = 1,
771 .adc_vpp = 2, /* 1.6 Vpp */
772 .if_neg_edge = 1,
773};
774
775static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
776 .i2c_address = 0x61,
777 .if_khz = 6500,
778};
779
ea5697fe
DW		 780static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
781 .prod = ATBM8830_PROD_8830,
782 .demod_address = 0x44,
783 .serial_ts = 0,
784 .ts_sampling_edge = 1,
785 .ts_clk_gated = 0,
786 .osc_clk_freq = 30400, /* in kHz */
787 .if_freq = 0, /* zero IF */
788 .zif_swap_iq = 1,
c245c75c
DW		 789 .agc_min = 0x2E,
790 .agc_max = 0xFF,
791 .agc_hold_loop = 0,
ea5697fe
DW		 792};
793
794static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
795 .i2c_address = 0x60,
796 .osc_clk = 20
797};
798
799static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
800 .prod = ATBM8830_PROD_8830,
801 .demod_address = 0x44,
802 .serial_ts = 1,
803 .ts_sampling_edge = 1,
804 .ts_clk_gated = 0,
805 .osc_clk_freq = 30400, /* in kHz */
806 .if_freq = 0, /* zero IF */
807 .zif_swap_iq = 1,
c245c75c
DW		 808 .agc_min = 0x2E,
809 .agc_max = 0xFF,
810 .agc_hold_loop = 0,
ea5697fe
DW		 811};
812
813static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
814 .i2c_address = 0x60,
815 .osc_clk = 20
816};
78db8547
IL		 817static struct stv0367_config netup_stv0367_config[] = {
818 {
819 .demod_address = 0x1c,
820 .xtal = 27000000,
821 .if_khz = 4500,
822 .if_iq_mode = 0,
823 .ts_mode = 1,
824 .clk_pol = 0,
825 }, {
826 .demod_address = 0x1d,
827 .xtal = 27000000,
828 .if_khz = 4500,
829 .if_iq_mode = 0,
830 .ts_mode = 1,
831 .clk_pol = 0,
832 },
833};
834
835static struct xc5000_config netup_xc5000_config[] = {
836 {
837 .i2c_address = 0x61,
838 .if_khz = 4500,
839 }, {
840 .i2c_address = 0x64,
841 .if_khz = 4500,
842 },
843};
844
722c90eb
SR		 845static struct drxk_config terratec_drxk_config[] = {
846 {
847 .adr = 0x29,
848 .no_i2c_bridge = 1,
849 }, {
850 .adr = 0x2a,
851 .no_i2c_bridge = 1,
852 },
853};
854
855static struct mt2063_config terratec_mt2063_config[] = {
856 {
857 .tuner_address = 0x60,
858 }, {
859 .tuner_address = 0x67,
860 },
861};
862
49bf0e67
AP		 863static const struct tda10071_platform_data hauppauge_tda10071_pdata = {
864 .clk = 40444000, /* 40.444 MHz */
865 .i2c_wr_max = 64,
866 .ts_mode = TDA10071_TS_SERIAL,
867 .pll_multiplier = 20,
868 .tuner_i2c_addr = 0x54,
869};
870
36efec48
MS		 871static const struct si2165_config hauppauge_hvr4400_si2165_config = {
872 .i2c_addr = 0x64,
873 .chip_mode = SI2165_MODE_PLL_XTAL,
874 .ref_freq_Hz = 16000000,
875};
876
29442266
OS		 877static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
878 .i2c_addr = 0x68,
879 .clock = 27000000,
880 .i2c_wr_max = 33,
881 .clock_out = 0,
882 .ts_mode = M88DS3103_TS_PARALLEL,
883 .ts_clk = 16000,
884 .ts_clk_pol = 1,
885 .lnb_en_pol = 1,
886 .lnb_hv_pol = 0,
887 .agc = 0x99,
888};
889
0e6c7b01 890static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
891 .i2c_addr = 0x68,
892 .clock = 27000000,
893 .i2c_wr_max = 33,
894 .clock_out = 0,
895 .ts_mode = M88DS3103_TS_CI,
896 .ts_clk = 10000,
897 .ts_clk_pol = 1,
898 .lnb_en_pol = 1,
899 .lnb_hv_pol = 0,
900 .agc = 0x99,
901};
902
c29d6a83 903static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = {
904 .i2c_addr = 0x68,
905 .clock = 27000000,
906 .i2c_wr_max = 33,
907 .clock_out = 0,
908 .ts_mode = M88DS3103_TS_SERIAL,
909 .ts_clk = 96000,
910 .ts_clk_pol = 0,
911 .lnb_en_pol = 1,
912 .lnb_hv_pol = 0,
913 .agc = 0x99,
914};
915
1fc77d01
AP		 916static const struct m88ds3103_config hauppauge_hvr5525_m88ds3103_config = {
917 .i2c_addr = 0x69,
918 .clock = 27000000,
919 .i2c_wr_max = 33,
920 .ts_mode = M88DS3103_TS_PARALLEL,
921 .ts_clk = 16000,
922 .ts_clk_pol = 1,
923 .agc = 0x99,
924};
925
ada73eee 926static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
78db8547
IL		 927{
928 struct cx23885_dev *dev = (struct cx23885_dev *)device;
929 unsigned long timeout = jiffies + msecs_to_jiffies(1);
d164460f 930 uint32_t mem = 0;
78db8547 931
d164460f 932 mem = cx_read(MC417_RWD);
78db8547
IL		 933 if (read)
934 cx_set(MC417_OEN, ALT_DATA);
935 else {
936 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
78db8547
IL		 937 mem &= ~ALT_DATA;
938 mem |= (data & ALT_DATA);
78db8547
IL		 939 }
940
941 if (flag)
d164460f 942 mem |= ALT_AD_RG;
78db8547 943 else
d164460f 944 mem &= ~ALT_AD_RG;
78db8547 945
d164460f 946 mem &= ~ALT_CS;
78db8547 947 if (read)
d164460f 948 mem = (mem & ~ALT_RD) | ALT_WR;
78db8547 949 else
d164460f
AO		 950 mem = (mem & ~ALT_WR) | ALT_RD;
951
952 cx_write(MC417_RWD, mem); /* start RW cycle */
78db8547
IL		 953
954 for (;;) {
955 mem = cx_read(MC417_RWD);
956 if ((mem & ALT_RDY) == 0)
957 break;
958 if (time_after(jiffies, timeout))
959 break;
960 udelay(1);
961 }
962
963 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
964 if (read)
965 return mem & ALT_DATA;
966
967 return 0;
968};
ea5697fe 969
46b21bba
JH		 970static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
971{
972 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
973
974 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
975}
976
977static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
978{
979 return 0;
980}
981
982static struct dib0070_config dib7070p_dib0070_config = {
983 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
984 .reset = dib7070_tuner_reset,
985 .sleep = dib7070_tuner_sleep,
986 .clock_khz = 12000,
46b21bba
JH		 987 .freq_offset_khz_vhf = 550,
988 /* .flip_chip = 1, */
989};
990
991/* DIB7070 generic */
992static struct dibx000_agc_config dib7070_agc_config = {
993 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
994
995 /*
996 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
997 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
998 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
999 */
1000 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
1001 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1002 .inv_gain = 600,
1003 .time_stabiliz = 10,
1004 .alpha_level = 0,
1005 .thlock = 118,
1006 .wbd_inv = 0,
1007 .wbd_ref = 3530,
1008 .wbd_sel = 1,
1009 .wbd_alpha = 5,
1010 .agc1_max = 65535,
1011 .agc1_min = 0,
1012 .agc2_max = 65535,
1013 .agc2_min = 0,
1014 .agc1_pt1 = 0,
1015 .agc1_pt2 = 40,
1016 .agc1_pt3 = 183,
1017 .agc1_slope1 = 206,
1018 .agc1_slope2 = 255,
1019 .agc2_pt1 = 72,
1020 .agc2_pt2 = 152,
1021 .agc2_slope1 = 88,
1022 .agc2_slope2 = 90,
1023 .alpha_mant = 17,
1024 .alpha_exp = 27,
1025 .beta_mant = 23,
1026 .beta_exp = 51,
1027 .perform_agc_softsplit = 0,
1028};
1029
1030static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
1031 .internal = 60000,
1032 .sampling = 15000,
1033 .pll_prediv = 1,
1034 .pll_ratio = 20,
1035 .pll_range = 3,
1036 .pll_reset = 1,
1037 .pll_bypass = 0,
1038 .enable_refdiv = 0,
1039 .bypclk_div = 0,
1040 .IO_CLK_en_core = 1,
1041 .ADClkSrc = 1,
1042 .modulo = 2,
1043 /* refsel, sel, freq_15k */
1044 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1045 .ifreq = (0 << 25) | 0,
1046 .timf = 20452225,
1047 .xtal_hz = 12000000,
1048};
1049
1050static struct dib7000p_config dib7070p_dib7000p_config = {
1051 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1052 .output_mode = OUTMODE_MPEG2_SERIAL,
1053 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1054 .output_mpeg2_in_188_bytes = 1,
1055
1056 .agc_config_count = 1,
1057 .agc = &dib7070_agc_config,
1058 .bw = &dib7070_bw_config_12_mhz,
1059 .tuner_is_baseband = 1,
1060 .spur_protect = 1,
1061
1062 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1063 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1064 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1065
1066 .hostbus_diversity = 1,
1067};
1068
2b0aac30
MCC		 1069static int dvb_register_ci_mac(struct cx23885_tsport *port)
1070{
1071 struct cx23885_dev *dev = port->dev;
1072 struct i2c_client *client_ci = NULL;
1073 struct vb2_dvb_frontend *fe0;
1074
1075 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1076 if (!fe0)
1077 return -EINVAL;
1078
1079 switch (dev->board) {
1080 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1081 static struct netup_card_info cinfo;
1082
1083 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1084 memcpy(port->frontends.adapter.proposed_mac,
1085 cinfo.port[port->nr - 1].mac, 6);
1086 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1087 port->nr, port->frontends.adapter.proposed_mac);
1088
1089 netup_ci_init(port);
1090 return 0;
1091 }
1092 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1093 struct altera_ci_config netup_ci_cfg = {
1094 .dev = dev,/* magic number to identify*/
1095 .adapter = &port->frontends.adapter,/* for CI */
1096 .demux = &fe0->dvb.demux,/* for hw pid filter */
1097 .fpga_rw = netup_altera_fpga_rw,
1098 };
1099
1100 altera_ci_init(&netup_ci_cfg, port->nr);
1101 return 0;
1102 }
1103 case CX23885_BOARD_TEVII_S470: {
1104 u8 eeprom[256]; /* 24C02 i2c eeprom */
1105
1106 if (port->nr != 1)
1107 return 0;
1108
1109 /* Read entire EEPROM */
1110 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1111 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1112 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1113 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1114 return 0;
1115 }
1116 case CX23885_BOARD_DVBSKY_T9580:
1117 case CX23885_BOARD_DVBSKY_S950:
1118 case CX23885_BOARD_DVBSKY_S952:
1119 case CX23885_BOARD_DVBSKY_T982: {
1120 u8 eeprom[256]; /* 24C02 i2c eeprom */
1121
1122 if (port->nr > 2)
1123 return 0;
1124
1125 /* Read entire EEPROM */
1126 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1127 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1128 sizeof(eeprom));
1129 printk(KERN_INFO "%s port %d MAC address: %pM\n",
1130 cx23885_boards[dev->board].name, port->nr,
1131 eeprom + 0xc0 + (port->nr-1) * 8);
1132 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1133 (port->nr-1) * 8, 6);
1134 return 0;
1135 }
1136 case CX23885_BOARD_DVBSKY_S950C:
1137 case CX23885_BOARD_DVBSKY_T980C:
1138 case CX23885_BOARD_TT_CT2_4500_CI: {
1139 u8 eeprom[256]; /* 24C02 i2c eeprom */
1140 struct sp2_config sp2_config;
1141 struct i2c_board_info info;
1142 struct cx23885_i2c *i2c_bus2 = &dev->i2c_bus[1];
1143
1144 /* attach CI */
1145 memset(&sp2_config, 0, sizeof(sp2_config));
1146 sp2_config.dvb_adap = &port->frontends.adapter;
1147 sp2_config.priv = port;
1148 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
1149 memset(&info, 0, sizeof(struct i2c_board_info));
1150 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
1151 info.addr = 0x40;
1152 info.platform_data = &sp2_config;
1153 request_module(info.type);
1154 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
1155 if (client_ci == NULL || client_ci->dev.driver == NULL)
1156 return -ENODEV;
1157 if (!try_module_get(client_ci->dev.driver->owner)) {
1158 i2c_unregister_device(client_ci);
1159 return -ENODEV;
1160 }
1161 port->i2c_client_ci = client_ci;
1162
1163 if (port->nr != 1)
1164 return 0;
1165
1166 /* Read entire EEPROM */
1167 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1168 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1169 sizeof(eeprom));
1170 printk(KERN_INFO "%s MAC address: %pM\n",
1171 cx23885_boards[dev->board].name, eeprom + 0xc0);
1172 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
1173 return 0;
1174 }
1175 }
1176 return 0;
1177}
1178
d19770e5
ST		 1179static int dvb_register(struct cx23885_tsport *port)
1180{
8abe4a0a 1181 struct dib7000p_ops dib7000p_ops;
d19770e5 1182 struct cx23885_dev *dev = port->dev;
493b7127 1183 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
453afdd9 1184 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
29442266
OS		 1185 struct si2168_config si2168_config;
1186 struct si2157_config si2157_config;
d76e0878 1187 struct ts2020_config ts2020_config;
29442266
OS		 1188 struct i2c_board_info info;
1189 struct i2c_adapter *adapter;
2b0aac30 1190 struct i2c_client *client_demod = NULL, *client_tuner = NULL;
bf5e3ef0 1191 struct i2c_client *client_sec = NULL;
c29d6a83 1192 const struct m88ds3103_config *p_m88ds3103_config = NULL;
0df289a2
MCC		 1193 int (*p_set_voltage)(struct dvb_frontend *fe,
1194 enum fe_sec_voltage voltage) = NULL;
78db8547 1195 int mfe_shared = 0; /* bus not shared by default */
5a23b076 1196 int ret;
363c35fc 1197
f972e0bd 1198 /* Get the first frontend */
453afdd9 1199 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST		 1200 if (!fe0)
1201 return -EINVAL;
d19770e5 1202
453afdd9 1203 /* init struct vb2_dvb */
363c35fc 1204 fe0->dvb.name = dev->name;
d19770e5 1205
78db8547
IL		 1206 /* multi-frontend gate control is undefined or defaults to fe0 */
1207 port->frontends.gate = 0;
1208
1209 /* Sets the gate control callback to be used by i2c command calls */
1210 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1211
d19770e5
ST		 1212 /* init frontend */
1213 switch (dev->board) {
a77743bc 1214 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 1215 i2c_bus = &dev->i2c_bus[0];
363c35fc 1216 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 1217 &hauppauge_generic_config,
f139fa71 1218 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1219 if (fe0->dvb.frontend == NULL)
1220 break;
1221 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1222 &i2c_bus->i2c_adap,
1223 &hauppauge_generic_tunerconfig, 0);
d19770e5 1224 break;
a5dbf457 1225 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1226 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK		 1227 i2c_bus = &dev->i2c_bus[0];
1228 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
247bc540 1229 &hauppauge_lgdt3305_config,
a5dbf457 1230 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1231 if (fe0->dvb.frontend == NULL)
1232 break;
1233 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1234 0x60, &dev->i2c_bus[1].i2c_adap,
1235 &hauppauge_hvr127x_config);
15472faf
MCC		 1236 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1237 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
a5dbf457 1238 break;
19bc5796 1239 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1240 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
19bc5796
MK		 1241 i2c_bus = &dev->i2c_bus[0];
1242 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1243 &hcw_s5h1411_config,
1244 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1245 if (fe0->dvb.frontend == NULL)
1246 break;
1247
1248 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1249 0x60, &dev->i2c_bus[1].i2c_adap,
1250 &hauppauge_tda18271_config);
0ac60acb
DH		 1251
1252 tda18271_attach(&dev->ts1.analog_fe,
1253 0x60, &dev->i2c_bus[1].i2c_adap,
1254 &hauppauge_tda18271_config);
1255
19bc5796 1256 break;
3ba71d21
MK		 1257 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1258 i2c_bus = &dev->i2c_bus[0];
92abe9ee 1259 switch (alt_tuner) {
3ba71d21 1260 case 1:
363c35fc 1261 fe0->dvb.frontend =
3ba71d21
MK		 1262 dvb_attach(s5h1409_attach,
1263 &hauppauge_ezqam_config,
1264 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1265 if (fe0->dvb.frontend == NULL)
1266 break;
1267
1268 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1269 &dev->i2c_bus[1].i2c_adap, 0x42,
1270 &tda829x_no_probe);
1271 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1272 0x60, &dev->i2c_bus[1].i2c_adap,
1273 &hauppauge_tda18271_config);
3ba71d21
MK		 1274 break;
1275 case 0:
1276 default:
363c35fc 1277 fe0->dvb.frontend =
3ba71d21
MK		 1278 dvb_attach(s5h1409_attach,
1279 &hauppauge_generic_config,
1280 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1281 if (fe0->dvb.frontend == NULL)
1282 break;
1283 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1284 &i2c_bus->i2c_adap,
1285 &hauppauge_generic_tunerconfig, 0);
3ba71d21
MK		 1286 }
1287 break;
fc959bef 1288 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 1289 i2c_bus = &dev->i2c_bus[0];
363c35fc 1290 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 1291 &hauppauge_hvr1800lp_config,
f139fa71 1292 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1293 if (fe0->dvb.frontend == NULL)
1294 break;
1295 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1296 &i2c_bus->i2c_adap,
1297 &hauppauge_generic_tunerconfig, 0);
fc959bef 1298 break;
9bc37caa 1299 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 1300 i2c_bus = &dev->i2c_bus[0];
363c35fc 1301 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 1302 &fusionhdtv_5_express,
f139fa71 1303 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1304 if (fe0->dvb.frontend == NULL)
1305 break;
1306 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1307 &i2c_bus->i2c_adap, 0x61,
1308 TUNER_LG_TDVS_H06XF);
9bc37caa 1309 break;
d1987d55
ST		 1310 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1311 i2c_bus = &dev->i2c_bus[1];
363c35fc 1312 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST		 1313 &hauppauge_hvr1500q_config,
1314 &dev->i2c_bus[0].i2c_adap);
ed3da2bf
MCC		 1315 if (fe0->dvb.frontend == NULL)
1316 break;
1317 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1318 &i2c_bus->i2c_adap,
1319 &hauppauge_hvr1500q_tunerconfig);
d1987d55 1320 break;
07b4a835
MK		 1321 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1322 i2c_bus = &dev->i2c_bus[1];
363c35fc 1323 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK		 1324 &hauppauge_hvr1500_config,
1325 &dev->i2c_bus[0].i2c_adap);
363c35fc 1326 if (fe0->dvb.frontend != NULL) {
07b4a835
MK		 1327 struct dvb_frontend *fe;
1328 struct xc2028_config cfg = {
1329 .i2c_adap = &i2c_bus->i2c_adap,
1330 .i2c_addr = 0x61,
07b4a835
MK		 1331 };
1332 static struct xc2028_ctrl ctl = {
ef80bfeb 1333 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 1334 .max_len = 64,
52c3d29c 1335 .demod = XC3028_FE_OREN538,
07b4a835
MK		 1336 };
1337
1338 fe = dvb_attach(xc2028_attach,
363c35fc 1339 fe0->dvb.frontend, &cfg);
07b4a835
MK		 1340 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1341 fe->ops.tuner_ops.set_config(fe, &ctl);
1342 }
1343 break;
b3ea0166 1344 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1345 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 1346 i2c_bus = &dev->i2c_bus[0];
363c35fc 1347 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST		 1348 &hauppauge_hvr1200_config,
1349 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1350 if (fe0->dvb.frontend == NULL)
1351 break;
1352 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1353 &dev->i2c_bus[1].i2c_adap, 0x42,
1354 &tda829x_no_probe);
1355 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1356 0x60, &dev->i2c_bus[1].i2c_adap,
1357 &hauppauge_hvr1200_tuner_config);
6b926eca
MK		 1358 break;
1359 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1360 i2c_bus = &dev->i2c_bus[0];
1361 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1362 &hauppauge_hvr1210_config,
1363 &i2c_bus->i2c_adap);
1364 if (fe0->dvb.frontend != NULL) {
1365 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1366 0x60, &dev->i2c_bus[1].i2c_adap,
1367 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST		 1368 }
1369 break;
66762373
ST		 1370 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1371 i2c_bus = &dev->i2c_bus[0];
8abe4a0a
MCC		 1372
1373 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1374 return -ENODEV;
1375
1376 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
66762373 1377 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 1378 if (fe0->dvb.frontend != NULL) {
66762373
ST		 1379 struct dvb_frontend *fe;
1380 struct xc2028_config cfg = {
1381 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1382 .i2c_addr = 0x64,
66762373
ST		 1383 };
1384 static struct xc2028_ctrl ctl = {
ef80bfeb 1385 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373 1386 .max_len = 64,
9bed77ee 1387 .demod = XC3028_FE_DIBCOM52,
9c8ced51
ST		 1388 /* This is true for all demods with
1389 v36 firmware? */
0975fc68 1390 .type = XC2028_D2633,
66762373
ST		 1391 };
1392
1393 fe = dvb_attach(xc2028_attach,
363c35fc 1394 fe0->dvb.frontend, &cfg);
66762373
ST		 1395 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1396 fe->ops.tuner_ops.set_config(fe, &ctl);
1397 }
1398 break;
335377b7
MK		 1399 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1400 i2c_bus = &dev->i2c_bus[port->nr - 1];
1401
363c35fc 1402 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK		 1403 &dvico_s5h1409_config,
1404 &i2c_bus->i2c_adap);
363c35fc
ST		 1405 if (fe0->dvb.frontend == NULL)
1406 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK		 1407 &dvico_s5h1411_config,
1408 &i2c_bus->i2c_adap);
363c35fc
ST		 1409 if (fe0->dvb.frontend != NULL)
1410 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 1411 &i2c_bus->i2c_adap,
1412 &dvico_xc5000_tunerconfig);
335377b7 1413 break;
aef2d186
ST		 1414 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1415 i2c_bus = &dev->i2c_bus[port->nr - 1];
1416
363c35fc 1417 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST		 1418 &dvico_fusionhdtv_xc3028,
1419 &i2c_bus->i2c_adap);
363c35fc 1420 if (fe0->dvb.frontend != NULL) {
aef2d186
ST		 1421 struct dvb_frontend *fe;
1422 struct xc2028_config cfg = {
1423 .i2c_adap = &i2c_bus->i2c_adap,
1424 .i2c_addr = 0x61,
aef2d186
ST		 1425 };
1426 static struct xc2028_ctrl ctl = {
ef80bfeb 1427 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST		 1428 .max_len = 64,
1429 .demod = XC3028_FE_ZARLINK456,
1430 };
1431
363c35fc 1432 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST		 1433 &cfg);
1434 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1435 fe->ops.tuner_ops.set_config(fe, &ctl);
1436 }
1437 break;
46b21bba
JH		 1438 }
1439 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1440 i2c_bus = &dev->i2c_bus[port->nr - 1];
1441 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1442 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1443
1444 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1445 return -ENODEV;
1446
1447 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1448 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1449 return -ENODEV;
1450 }
1451 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1452 if (fe0->dvb.frontend != NULL) {
1453 struct i2c_adapter *tun_i2c;
1454
1455 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1456 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1457 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1458 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1459 return -ENODEV;
1460 }
1461 break;
aef2d186 1462 }
4c56b04a 1463 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1464 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1465 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 1466 i2c_bus = &dev->i2c_bus[0];
1467
363c35fc 1468 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST		 1469 &dvico_fusionhdtv_xc3028,
1470 &i2c_bus->i2c_adap);
363c35fc 1471 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST		 1472 struct dvb_frontend *fe;
1473 struct xc2028_config cfg = {
1474 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1475 .i2c_addr = 0x61,
4c56b04a
ST		 1476 };
1477 static struct xc2028_ctrl ctl = {
ef80bfeb 1478 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST		 1479 .max_len = 64,
1480 .demod = XC3028_FE_ZARLINK456,
1481 };
1482
363c35fc 1483 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST		 1484 &cfg);
1485 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1486 fe->ops.tuner_ops.set_config(fe, &ctl);
1487 }
96318d0c 1488 break;
0cf8af57 1489 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1490 i2c_bus = &dev->i2c_bus[0];
1491
1492 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1493 &dvico_fusionhdtv_xc3028,
1494 &i2c_bus->i2c_adap);
1495 if (fe0->dvb.frontend != NULL) {
1496 struct dvb_frontend *fe;
1497 struct xc4000_config cfg = {
1498 .i2c_address = 0x61,
1499 .default_pm = 0,
1500 .dvb_amplitude = 134,
1501 .set_smoothedcvbs = 1,
1502 .if_khz = 4560
1503 };
1504
1505 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1506 &dev->i2c_bus[1].i2c_adap, &cfg);
a7c8aada
MS		 1507 if (!fe) {
1508 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1509 dev->name);
1510 goto frontend_detach;
1511 }
0cf8af57 1512 }
1513 break;
96318d0c 1514 case CX23885_BOARD_TBS_6920:
09ea33e5 1515 i2c_bus = &dev->i2c_bus[1];
96318d0c
IL		 1516
1517 fe0->dvb.frontend = dvb_attach(cx24116_attach,
09ea33e5
IL		 1518 &tbs_cx24116_config,
1519 &i2c_bus->i2c_adap);
96318d0c 1520 if (fe0->dvb.frontend != NULL)
09ea33e5 1521 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
96318d0c 1522
579943f5 1523 break;
e6001482
LA		 1524 case CX23885_BOARD_TBS_6980:
1525 case CX23885_BOARD_TBS_6981:
1526 i2c_bus = &dev->i2c_bus[1];
1527
1528 switch (port->nr) {
1529 /* PORT B */
1530 case 1:
1531 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1532 &tbs_cx24117_config,
d10e8280 1533 &i2c_bus->i2c_adap);
e6001482
LA		 1534 break;
1535 /* PORT C */
1536 case 2:
e6001482
LA		 1537 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1538 &tbs_cx24117_config,
d10e8280 1539 &i2c_bus->i2c_adap);
e6001482
LA		 1540 break;
1541 }
1542 break;
579943f5
IL		 1543 case CX23885_BOARD_TEVII_S470:
1544 i2c_bus = &dev->i2c_bus[1];
1545
09ea33e5
IL		 1546 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1547 &tevii_ds3000_config,
1548 &i2c_bus->i2c_adap);
73f0af44
KD		 1549 if (fe0->dvb.frontend != NULL) {
1550 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1551 &tevii_ts2020_config, &i2c_bus->i2c_adap);
09ea33e5 1552 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
73f0af44 1553 }
579943f5 1554
4c56b04a 1555 break;
c9b8b04b
IL		 1556 case CX23885_BOARD_DVBWORLD_2005:
1557 i2c_bus = &dev->i2c_bus[1];
1558
1559 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1560 &dvbworld_cx24116_config,
1561 &i2c_bus->i2c_adap);
1562 break;
5a23b076
IL		 1563 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1564 i2c_bus = &dev->i2c_bus[0];
1565 switch (port->nr) {
1566 /* port B */
1567 case 1:
1568 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1569 &netup_stv0900_config,
1570 &i2c_bus->i2c_adap, 0);
1571 if (fe0->dvb.frontend != NULL) {
1572 if (dvb_attach(stv6110_attach,
1573 fe0->dvb.frontend,
1574 &netup_stv6110_tunerconfig_a,
1575 &i2c_bus->i2c_adap)) {
1576 if (!dvb_attach(lnbh24_attach,
1577 fe0->dvb.frontend,
1578 &i2c_bus->i2c_adap,
9329fb5b
AO		 1579 LNBH24_PCL | LNBH24_TTX,
1580 LNBH24_TEN, 0x09))
5a23b076
IL		 1581 printk(KERN_ERR
1582 "No LNBH24 found!\n");
1583
1584 }
1585 }
1586 break;
1587 /* port C */
1588 case 2:
1589 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1590 &netup_stv0900_config,
1591 &i2c_bus->i2c_adap, 1);
1592 if (fe0->dvb.frontend != NULL) {
1593 if (dvb_attach(stv6110_attach,
1594 fe0->dvb.frontend,
1595 &netup_stv6110_tunerconfig_b,
1596 &i2c_bus->i2c_adap)) {
1597 if (!dvb_attach(lnbh24_attach,
1598 fe0->dvb.frontend,
1599 &i2c_bus->i2c_adap,
9329fb5b
AO		 1600 LNBH24_PCL | LNBH24_TTX,
1601 LNBH24_TEN, 0x0a))
5a23b076
IL		 1602 printk(KERN_ERR
1603 "No LNBH24 found!\n");
1604
1605 }
1606 }
1607 break;
1608 }
1609 break;
493b7127
DW		 1610 case CX23885_BOARD_MYGICA_X8506:
1611 i2c_bus = &dev->i2c_bus[0];
1612 i2c_bus2 = &dev->i2c_bus[1];
1613 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1614 &mygica_x8506_lgs8gl5_config,
1615 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1616 if (fe0->dvb.frontend == NULL)
1617 break;
1618 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1619 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config);
15472faf 1620 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
493b7127 1621 break;
0d1b5265
MCC		 1622 case CX23885_BOARD_MYGICA_X8507:
1623 i2c_bus = &dev->i2c_bus[0];
1624 i2c_bus2 = &dev->i2c_bus[1];
1625 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1626 &mygica_x8507_mb86a20s_config,
1627 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1628 if (fe0->dvb.frontend == NULL)
1629 break;
1630
1631 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1632 &i2c_bus2->i2c_adap,
1633 &mygica_x8507_xc5000_config);
0d1b5265
MCC		 1634 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1635 break;
2365b2d3
DW		 1636 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1637 i2c_bus = &dev->i2c_bus[0];
1638 i2c_bus2 = &dev->i2c_bus[1];
1639 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1640 &magicpro_prohdtve2_lgs8g75_config,
1641 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1642 if (fe0->dvb.frontend == NULL)
1643 break;
1644 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1645 &i2c_bus2->i2c_adap,
1646 &magicpro_prohdtve2_xc5000_config);
15472faf 1647 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
2365b2d3 1648 break;
13697380 1649 case CX23885_BOARD_HAUPPAUGE_HVR1850:
35045137
ST		 1650 i2c_bus = &dev->i2c_bus[0];
1651 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1652 &hcw_s5h1411_config,
1653 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1654 if (fe0->dvb.frontend == NULL)
1655 break;
1656 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1657 0x60, &dev->i2c_bus[0].i2c_adap,
1658 &hauppauge_tda18271_config);
35045137
ST		 1659
1660 tda18271_attach(&dev->ts1.analog_fe,
1661 0x60, &dev->i2c_bus[1].i2c_adap,
1662 &hauppauge_tda18271_config);
1663
1664 break;
aee0b24c 1665 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 1666 i2c_bus = &dev->i2c_bus[0];
1667 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1668 &hcw_s5h1411_config,
1669 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1670 if (fe0->dvb.frontend == NULL)
1671 break;
1672 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1673 0x60, &dev->i2c_bus[0].i2c_adap,
1674 &hauppauge_tda18271_config);
13697380 1675 break;
ea5697fe
DW		 1676 case CX23885_BOARD_MYGICA_X8558PRO:
1677 switch (port->nr) {
1678 /* port B */
1679 case 1:
1680 i2c_bus = &dev->i2c_bus[0];
1681 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1682 &mygica_x8558pro_atbm8830_cfg1,
1683 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1684 if (fe0->dvb.frontend == NULL)
1685 break;
1686 dvb_attach(max2165_attach, fe0->dvb.frontend,
1687 &i2c_bus->i2c_adap,
1688 &mygic_x8558pro_max2165_cfg1);
ea5697fe
DW		 1689 break;
1690 /* port C */
1691 case 2:
1692 i2c_bus = &dev->i2c_bus[1];
1693 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1694 &mygica_x8558pro_atbm8830_cfg2,
1695 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1696 if (fe0->dvb.frontend == NULL)
1697 break;
1698 dvb_attach(max2165_attach, fe0->dvb.frontend,
1699 &i2c_bus->i2c_adap,
1700 &mygic_x8558pro_max2165_cfg2);
ea5697fe
DW		 1701 }
1702 break;
78db8547
IL		 1703 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1704 i2c_bus = &dev->i2c_bus[0];
1705 mfe_shared = 1;/* MFE */
1706 port->frontends.gate = 0;/* not clear for me yet */
1707 /* ports B, C */
1708 /* MFE frontend 1 DVB-T */
1709 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1710 &netup_stv0367_config[port->nr - 1],
1711 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1712 if (fe0->dvb.frontend == NULL)
1713 break;
1714 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend,
78db8547
IL		 1715 &i2c_bus->i2c_adap,
1716 &netup_xc5000_config[port->nr - 1]))
ed3da2bf
MCC		 1717 goto frontend_detach;
1718 /* load xc5000 firmware */
1719 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1720
78db8547 1721 /* MFE frontend 2 */
453afdd9 1722 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
78db8547
IL		 1723 if (fe1 == NULL)
1724 goto frontend_detach;
1725 /* DVB-C init */
1726 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1727 &netup_stv0367_config[port->nr - 1],
1728 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1729 if (fe1->dvb.frontend == NULL)
1730 break;
1731
1732 fe1->dvb.frontend->id = 1;
1733 if (NULL == dvb_attach(xc5000_attach,
1734 fe1->dvb.frontend,
1735 &i2c_bus->i2c_adap,
1736 &netup_xc5000_config[port->nr - 1]))
1737 goto frontend_detach;
78db8547 1738 break;
722c90eb
SR		 1739 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1740 i2c_bus = &dev->i2c_bus[0];
1741 i2c_bus2 = &dev->i2c_bus[1];
1742
1743 switch (port->nr) {
1744 /* port b */
1745 case 1:
1746 fe0->dvb.frontend = dvb_attach(drxk_attach,
1747 &terratec_drxk_config[0],
1748 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1749 if (fe0->dvb.frontend == NULL)
1750 break;
1751 if (!dvb_attach(mt2063_attach,
1752 fe0->dvb.frontend,
1753 &terratec_mt2063_config[0],
1754 &i2c_bus2->i2c_adap))
1755 goto frontend_detach;
722c90eb
SR		 1756 break;
1757 /* port c */
1758 case 2:
1759 fe0->dvb.frontend = dvb_attach(drxk_attach,
1760 &terratec_drxk_config[1],
1761 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1762 if (fe0->dvb.frontend == NULL)
1763 break;
1764 if (!dvb_attach(mt2063_attach,
1765 fe0->dvb.frontend,
1766 &terratec_mt2063_config[1],
1767 &i2c_bus2->i2c_adap))
1768 goto frontend_detach;
722c90eb
SR		 1769 break;
1770 }
1771 break;
7b134e85
IL		 1772 case CX23885_BOARD_TEVII_S471:
1773 i2c_bus = &dev->i2c_bus[1];
1774
1775 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1776 &tevii_ds3000_config,
1777 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1778 if (fe0->dvb.frontend == NULL)
1779 break;
1780 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1781 &tevii_ts2020_config, &i2c_bus->i2c_adap);
7b134e85 1782 break;
f667190b
MB		 1783 case CX23885_BOARD_PROF_8000:
1784 i2c_bus = &dev->i2c_bus[0];
1785
1786 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1787 &prof_8000_stv090x_config,
1788 &i2c_bus->i2c_adap,
1789 STV090x_DEMODULATOR_0);
ed3da2bf
MCC		 1790 if (fe0->dvb.frontend == NULL)
1791 break;
1792 if (!dvb_attach(stb6100_attach,
1793 fe0->dvb.frontend,
1794 &prof_8000_stb6100_config,
1795 &i2c_bus->i2c_adap))
1796 goto frontend_detach;
f667190b 1797
ed3da2bf 1798 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
f667190b 1799 break;
a4569507
AP		 1800 case CX23885_BOARD_HAUPPAUGE_HVR4400: {
1801 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1802 struct a8293_platform_data a8293_pdata = {};
1803
7c62f5a1 1804 i2c_bus = &dev->i2c_bus[0];
36efec48
MS		 1805 i2c_bus2 = &dev->i2c_bus[1];
1806 switch (port->nr) {
1807 /* port b */
1808 case 1:
a4569507
AP		 1809 /* attach demod + tuner combo */
1810 memset(&info, 0, sizeof(info));
1811 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1812 info.addr = 0x05;
1813 info.platform_data = &tda10071_pdata;
1814 request_module("tda10071");
1815 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1816 if (!client_demod || !client_demod->dev.driver)
ed3da2bf 1817 goto frontend_detach;
a4569507
AP		 1818 if (!try_module_get(client_demod->dev.driver->owner)) {
1819 i2c_unregister_device(client_demod);
1820 goto frontend_detach;
1821 }
1822 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1823 port->i2c_client_demod = client_demod;
1824
1825 /* attach SEC */
1826 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1827 memset(&info, 0, sizeof(info));
1828 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1829 info.addr = 0x0b;
1830 info.platform_data = &a8293_pdata;
1831 request_module("a8293");
1832 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1833 if (!client_sec || !client_sec->dev.driver)
1834 goto frontend_detach;
1835 if (!try_module_get(client_sec->dev.driver->owner)) {
1836 i2c_unregister_device(client_sec);
1837 goto frontend_detach;
1838 }
1839 port->i2c_client_sec = client_sec;
36efec48
MS		 1840 break;
1841 /* port c */
1842 case 2:
1843 fe0->dvb.frontend = dvb_attach(si2165_attach,
1844 &hauppauge_hvr4400_si2165_config,
1845 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1846 if (fe0->dvb.frontend == NULL)
1847 break;
1848 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1849 if (!dvb_attach(tda18271_attach,
1850 fe0->dvb.frontend,
1851 0x60, &i2c_bus2->i2c_adap,
1852 &hauppauge_hvr4400_tuner_config))
1853 goto frontend_detach;
36efec48 1854 break;
7c62f5a1
MK		 1855 }
1856 break;
a4569507 1857 }
49bf0e67
AP		 1858 case CX23885_BOARD_HAUPPAUGE_STARBURST: {
1859 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1860 struct a8293_platform_data a8293_pdata = {};
1861
721f3223 1862 i2c_bus = &dev->i2c_bus[0];
49bf0e67
AP		 1863
1864 /* attach demod + tuner combo */
1865 memset(&info, 0, sizeof(info));
1866 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1867 info.addr = 0x05;
1868 info.platform_data = &tda10071_pdata;
1869 request_module("tda10071");
1870 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1871 if (!client_demod || !client_demod->dev.driver)
1872 goto frontend_detach;
1873 if (!try_module_get(client_demod->dev.driver->owner)) {
1874 i2c_unregister_device(client_demod);
1875 goto frontend_detach;
721f3223 1876 }
49bf0e67
AP		 1877 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1878 port->i2c_client_demod = client_demod;
1879
1880 /* attach SEC */
1881 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1882 memset(&info, 0, sizeof(info));
1883 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1884 info.addr = 0x0b;
1885 info.platform_data = &a8293_pdata;
1886 request_module("a8293");
1887 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1888 if (!client_sec || !client_sec->dev.driver)
1889 goto frontend_detach;
1890 if (!try_module_get(client_sec->dev.driver->owner)) {
1891 i2c_unregister_device(client_sec);
1892 goto frontend_detach;
1893 }
1894 port->i2c_client_sec = client_sec;
721f3223 1895 break;
49bf0e67 1896 }
29442266 1897 case CX23885_BOARD_DVBSKY_T9580:
cba5480c 1898 case CX23885_BOARD_DVBSKY_S950:
29442266
OS		 1899 i2c_bus = &dev->i2c_bus[0];
1900 i2c_bus2 = &dev->i2c_bus[1];
1901 switch (port->nr) {
1902 /* port b - satellite */
1903 case 1:
1904 /* attach frontend */
1905 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1906 &dvbsky_t9580_m88ds3103_config,
1907 &i2c_bus2->i2c_adap, &adapter);
1908 if (fe0->dvb.frontend == NULL)
1909 break;
1910
1911 /* attach tuner */
d76e0878
AP		 1912 memset(&ts2020_config, 0, sizeof(ts2020_config));
1913 ts2020_config.fe = fe0->dvb.frontend;
0f91c9d6 1914 ts2020_config.get_agc_pwm = m88ds3103_get_agc_pwm;
29442266 1915 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 1916 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
29442266 1917 info.addr = 0x60;
d76e0878 1918 info.platform_data = &ts2020_config;
29442266
OS		 1919 request_module(info.type);
1920 client_tuner = i2c_new_device(adapter, &info);
1921 if (client_tuner == NULL ||
1922 client_tuner->dev.driver == NULL)
1923 goto frontend_detach;
1924 if (!try_module_get(client_tuner->dev.driver->owner)) {
1925 i2c_unregister_device(client_tuner);
1926 goto frontend_detach;
1927 }
1928
1929 /* delegate signal strength measurement to tuner */
1930 fe0->dvb.frontend->ops.read_signal_strength =
1931 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1932
1933 /*
1934 * for setting the voltage we need to set GPIOs on
1935 * the card.
1936 */
1937 port->fe_set_voltage =
1938 fe0->dvb.frontend->ops.set_voltage;
1939 fe0->dvb.frontend->ops.set_voltage =
1940 dvbsky_t9580_set_voltage;
1941
1942 port->i2c_client_tuner = client_tuner;
1943
1944 break;
1945 /* port c - terrestrial/cable */
1946 case 2:
1947 /* attach frontend */
143800a5 1948 memset(&si2168_config, 0, sizeof(si2168_config));
29442266
OS		 1949 si2168_config.i2c_adapter = &adapter;
1950 si2168_config.fe = &fe0->dvb.frontend;
1951 si2168_config.ts_mode = SI2168_TS_SERIAL;
1952 memset(&info, 0, sizeof(struct i2c_board_info));
1953 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1954 info.addr = 0x64;
1955 info.platform_data = &si2168_config;
1956 request_module(info.type);
1957 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1958 if (client_demod == NULL ||
1959 client_demod->dev.driver == NULL)
1960 goto frontend_detach;
1961 if (!try_module_get(client_demod->dev.driver->owner)) {
1962 i2c_unregister_device(client_demod);
1963 goto frontend_detach;
1964 }
1965 port->i2c_client_demod = client_demod;
1966
1967 /* attach tuner */
143800a5 1968 memset(&si2157_config, 0, sizeof(si2157_config));
29442266 1969 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 1970 si2157_config.if_port = 1;
29442266
OS		 1971 memset(&info, 0, sizeof(struct i2c_board_info));
1972 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1973 info.addr = 0x60;
1974 info.platform_data = &si2157_config;
1975 request_module(info.type);
1976 client_tuner = i2c_new_device(adapter, &info);
1977 if (client_tuner == NULL ||
2b0aac30 1978 client_tuner->dev.driver == NULL)
29442266 1979 goto frontend_detach;
2b0aac30 1980
29442266
OS		 1981 if (!try_module_get(client_tuner->dev.driver->owner)) {
1982 i2c_unregister_device(client_tuner);
29442266
OS		 1983 goto frontend_detach;
1984 }
1985 port->i2c_client_tuner = client_tuner;
1986 break;
1987 }
1988 break;
82c10276 1989 case CX23885_BOARD_DVBSKY_T980C:
61b103e8 1990 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276 1991 i2c_bus = &dev->i2c_bus[1];
24e77409 1992 i2c_bus2 = &dev->i2c_bus[0];
82c10276
OS		 1993
1994 /* attach frontend */
1995 memset(&si2168_config, 0, sizeof(si2168_config));
1996 si2168_config.i2c_adapter = &adapter;
1997 si2168_config.fe = &fe0->dvb.frontend;
1998 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1999 memset(&info, 0, sizeof(struct i2c_board_info));
2000 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2001 info.addr = 0x64;
2002 info.platform_data = &si2168_config;
2003 request_module(info.type);
2004 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 2005 if (client_demod == NULL || client_demod->dev.driver == NULL)
82c10276
OS		 2006 goto frontend_detach;
2007 if (!try_module_get(client_demod->dev.driver->owner)) {
2008 i2c_unregister_device(client_demod);
2009 goto frontend_detach;
2010 }
2011 port->i2c_client_demod = client_demod;
2012
2013 /* attach tuner */
2014 memset(&si2157_config, 0, sizeof(si2157_config));
2015 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2016 si2157_config.if_port = 1;
82c10276
OS		 2017 memset(&info, 0, sizeof(struct i2c_board_info));
2018 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2019 info.addr = 0x60;
2020 info.platform_data = &si2157_config;
2021 request_module(info.type);
2022 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC		 2023 if (client_tuner == NULL ||
2024 client_tuner->dev.driver == NULL)
82c10276 2025 goto frontend_detach;
82c10276
OS		 2026 if (!try_module_get(client_tuner->dev.driver->owner)) {
2027 i2c_unregister_device(client_tuner);
82c10276
OS		 2028 goto frontend_detach;
2029 }
0e6c7b01 2030 port->i2c_client_tuner = client_tuner;
2031 break;
2032 case CX23885_BOARD_DVBSKY_S950C:
2033 i2c_bus = &dev->i2c_bus[1];
2034 i2c_bus2 = &dev->i2c_bus[0];
2035
2036 /* attach frontend */
2037 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2038 &dvbsky_s950c_m88ds3103_config,
2039 &i2c_bus->i2c_adap, &adapter);
2040 if (fe0->dvb.frontend == NULL)
2041 break;
2042
2043 /* attach tuner */
d76e0878
AP		 2044 memset(&ts2020_config, 0, sizeof(ts2020_config));
2045 ts2020_config.fe = fe0->dvb.frontend;
0f91c9d6 2046 ts2020_config.get_agc_pwm = m88ds3103_get_agc_pwm;
0e6c7b01 2047 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2048 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
0e6c7b01 2049 info.addr = 0x60;
d76e0878 2050 info.platform_data = &ts2020_config;
0e6c7b01 2051 request_module(info.type);
2052 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2053 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
0e6c7b01 2054 goto frontend_detach;
2055 if (!try_module_get(client_tuner->dev.driver->owner)) {
2056 i2c_unregister_device(client_tuner);
2057 goto frontend_detach;
2058 }
2059
2060 /* delegate signal strength measurement to tuner */
2061 fe0->dvb.frontend->ops.read_signal_strength =
2062 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2063
c29d6a83 2064 port->i2c_client_tuner = client_tuner;
2065 break;
2066 case CX23885_BOARD_DVBSKY_S952:
2067 switch (port->nr) {
2068 /* port b */
2069 case 1:
2070 i2c_bus = &dev->i2c_bus[1];
2071 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config;
2072 p_set_voltage = dvbsky_t9580_set_voltage;
2073 break;
2074 /* port c */
2075 case 2:
2076 i2c_bus = &dev->i2c_bus[0];
2077 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config;
2078 p_set_voltage = dvbsky_s952_portc_set_voltage;
2079 break;
2080 }
2081
2082 /* attach frontend */
2083 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2084 p_m88ds3103_config,
2085 &i2c_bus->i2c_adap, &adapter);
2086 if (fe0->dvb.frontend == NULL)
2087 break;
2088
2089 /* attach tuner */
d76e0878
AP		 2090 memset(&ts2020_config, 0, sizeof(ts2020_config));
2091 ts2020_config.fe = fe0->dvb.frontend;
0f91c9d6 2092 ts2020_config.get_agc_pwm = m88ds3103_get_agc_pwm;
c29d6a83 2093 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2094 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
c29d6a83 2095 info.addr = 0x60;
d76e0878 2096 info.platform_data = &ts2020_config;
c29d6a83 2097 request_module(info.type);
2098 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2099 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
c29d6a83 2100 goto frontend_detach;
2101 if (!try_module_get(client_tuner->dev.driver->owner)) {
2102 i2c_unregister_device(client_tuner);
2103 goto frontend_detach;
2104 }
2105
2106 /* delegate signal strength measurement to tuner */
2107 fe0->dvb.frontend->ops.read_signal_strength =
2108 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2109
2110 /*
2111 * for setting the voltage we need to set GPIOs on
2112 * the card.
2113 */
2114 port->fe_set_voltage =
2115 fe0->dvb.frontend->ops.set_voltage;
2116 fe0->dvb.frontend->ops.set_voltage = p_set_voltage;
2117
c02ef64a
NM		 2118 port->i2c_client_tuner = client_tuner;
2119 break;
2120 case CX23885_BOARD_DVBSKY_T982:
2121 memset(&si2168_config, 0, sizeof(si2168_config));
2122 switch (port->nr) {
2123 /* port b */
2124 case 1:
2125 i2c_bus = &dev->i2c_bus[1];
2126 si2168_config.ts_mode = SI2168_TS_PARALLEL;
2127 break;
2128 /* port c */
2129 case 2:
2130 i2c_bus = &dev->i2c_bus[0];
2131 si2168_config.ts_mode = SI2168_TS_SERIAL;
2132 break;
2133 }
2134
2135 /* attach frontend */
2136 si2168_config.i2c_adapter = &adapter;
2137 si2168_config.fe = &fe0->dvb.frontend;
2138 memset(&info, 0, sizeof(struct i2c_board_info));
2139 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2140 info.addr = 0x64;
2141 info.platform_data = &si2168_config;
2142 request_module(info.type);
2143 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 2144 if (client_demod == NULL || client_demod->dev.driver == NULL)
c02ef64a
NM		 2145 goto frontend_detach;
2146 if (!try_module_get(client_demod->dev.driver->owner)) {
2147 i2c_unregister_device(client_demod);
2148 goto frontend_detach;
2149 }
2150 port->i2c_client_demod = client_demod;
2151
2152 /* attach tuner */
2153 memset(&si2157_config, 0, sizeof(si2157_config));
2154 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2155 si2157_config.if_port = 1;
c02ef64a
NM		 2156 memset(&info, 0, sizeof(struct i2c_board_info));
2157 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2158 info.addr = 0x60;
2159 info.platform_data = &si2157_config;
2160 request_module(info.type);
2161 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC		 2162 if (client_tuner == NULL ||
2163 client_tuner->dev.driver == NULL)
c02ef64a 2164 goto frontend_detach;
c02ef64a
NM		 2165 if (!try_module_get(client_tuner->dev.driver->owner)) {
2166 i2c_unregister_device(client_tuner);
c02ef64a
NM		 2167 goto frontend_detach;
2168 }
82c10276
OS		 2169 port->i2c_client_tuner = client_tuner;
2170 break;
f0b0faff 2171 case CX23885_BOARD_HAUPPAUGE_HVR5525: {
1fc77d01 2172 struct m88rs6000t_config m88rs6000t_config;
f0b0faff
MCC		 2173 struct a8293_platform_data a8293_pdata = {};
2174
2175 switch (port->nr) {
1fc77d01
AP		 2176
2177 /* port b - satellite */
2178 case 1:
2179 /* attach frontend */
2180 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2181 &hauppauge_hvr5525_m88ds3103_config,
2182 &dev->i2c_bus[0].i2c_adap, &adapter);
2183 if (fe0->dvb.frontend == NULL)
2184 break;
2185
2186 /* attach SEC */
49b7cb5d
AP		 2187 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
2188 memset(&info, 0, sizeof(info));
2189 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
2190 info.addr = 0x0b;
2191 info.platform_data = &a8293_pdata;
2192 request_module("a8293");
2193 client_sec = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2194 if (!client_sec || !client_sec->dev.driver)
1fc77d01 2195 goto frontend_detach;
49b7cb5d
AP		 2196 if (!try_module_get(client_sec->dev.driver->owner)) {
2197 i2c_unregister_device(client_sec);
2198 goto frontend_detach;
2199 }
2200 port->i2c_client_sec = client_sec;
1fc77d01
AP		 2201
2202 /* attach tuner */
2203 memset(&m88rs6000t_config, 0, sizeof(m88rs6000t_config));
2204 m88rs6000t_config.fe = fe0->dvb.frontend;
2205 memset(&info, 0, sizeof(struct i2c_board_info));
2206 strlcpy(info.type, "m88rs6000t", I2C_NAME_SIZE);
2207 info.addr = 0x21;
2208 info.platform_data = &m88rs6000t_config;
2209 request_module("%s", info.type);
2210 client_tuner = i2c_new_device(adapter, &info);
2211 if (!client_tuner || !client_tuner->dev.driver)
2212 goto frontend_detach;
2213 if (!try_module_get(client_tuner->dev.driver->owner)) {
2214 i2c_unregister_device(client_tuner);
2215 goto frontend_detach;
2216 }
2217 port->i2c_client_tuner = client_tuner;
2218
2219 /* delegate signal strength measurement to tuner */
2220 fe0->dvb.frontend->ops.read_signal_strength =
2221 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2222 break;
2223 /* port c - terrestrial/cable */
2224 case 2:
2225 /* attach frontend */
2226 memset(&si2168_config, 0, sizeof(si2168_config));
2227 si2168_config.i2c_adapter = &adapter;
2228 si2168_config.fe = &fe0->dvb.frontend;
2229 si2168_config.ts_mode = SI2168_TS_SERIAL;
2230 memset(&info, 0, sizeof(struct i2c_board_info));
2231 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2232 info.addr = 0x64;
2233 info.platform_data = &si2168_config;
2234 request_module("%s", info.type);
2235 client_demod = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2236 if (!client_demod || !client_demod->dev.driver)
2237 goto frontend_detach;
2238 if (!try_module_get(client_demod->dev.driver->owner)) {
2239 i2c_unregister_device(client_demod);
2240 goto frontend_detach;
2241 }
2242 port->i2c_client_demod = client_demod;
2243
2244 /* attach tuner */
2245 memset(&si2157_config, 0, sizeof(si2157_config));
2246 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2247 si2157_config.if_port = 1;
1fc77d01
AP		 2248 memset(&info, 0, sizeof(struct i2c_board_info));
2249 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2250 info.addr = 0x60;
2251 info.platform_data = &si2157_config;
2252 request_module("%s", info.type);
2253 client_tuner = i2c_new_device(&dev->i2c_bus[1].i2c_adap, &info);
2254 if (!client_tuner || !client_tuner->dev.driver) {
2255 module_put(client_demod->dev.driver->owner);
2256 i2c_unregister_device(client_demod);
2257 port->i2c_client_demod = NULL;
2258 goto frontend_detach;
2259 }
2260 if (!try_module_get(client_tuner->dev.driver->owner)) {
2261 i2c_unregister_device(client_tuner);
2262 module_put(client_demod->dev.driver->owner);
2263 i2c_unregister_device(client_demod);
2264 port->i2c_client_demod = NULL;
2265 goto frontend_detach;
2266 }
2267 port->i2c_client_tuner = client_tuner;
2268 break;
2269 }
2270 break;
f0b0faff 2271 }
d19770e5 2272 default:
9c8ced51
ST		 2273 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
2274 " isn't supported yet\n",
d19770e5
ST		 2275 dev->name);
2276 break;
2277 }
78db8547
IL		 2278
2279 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
9c8ced51 2280 printk(KERN_ERR "%s: frontend initialization failed\n",
78db8547
IL		 2281 dev->name);
2282 goto frontend_detach;
d19770e5 2283 }
78db8547 2284
d7cba043 2285 /* define general-purpose callback pointer */
363c35fc 2286 fe0->dvb.frontend->callback = cx23885_tuner_callback;
78db8547
IL		 2287 if (fe1)
2288 fe1->dvb.frontend->callback = cx23885_tuner_callback;
2289#if 0
2290 /* Ensure all frontends negotiate bus access */
2291 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2292 if (fe1)
2293 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2294#endif
d19770e5
ST		 2295
2296 /* Put the analog decoder in standby to keep it quiet */
622b828a 2297 call_all(dev, core, s_power, 0);
d19770e5 2298
363c35fc
ST		 2299 if (fe0->dvb.frontend->ops.analog_ops.standby)
2300 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 2301
d19770e5 2302 /* register everything */
453afdd9 2303 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
9adf6132 2304 &dev->pci->dev, adapter_nr, mfe_shared);
bee30192 2305 if (ret)
78db8547 2306 goto frontend_detach;
363c35fc 2307
2b0aac30
MCC		 2308 ret = dvb_register_ci_mac(port);
2309 if (ret)
2310 goto frontend_detach;
24e77409 2311
2b0aac30 2312 return 0;
82c10276 2313
2b0aac30 2314frontend_detach:
bf5e3ef0
AP		 2315 /* remove I2C client for SEC */
2316 client_sec = port->i2c_client_sec;
2317 if (client_sec) {
2318 module_put(client_sec->dev.driver->owner);
2319 i2c_unregister_device(client_sec);
2320 port->i2c_client_sec = NULL;
2321 }
2322
2b0aac30
MCC		 2323 /* remove I2C client for tuner */
2324 client_tuner = port->i2c_client_tuner;
2325 if (client_tuner) {
2326 module_put(client_tuner->dev.driver->owner);
2327 i2c_unregister_device(client_tuner);
2328 port->i2c_client_tuner = NULL;
5a23b076
IL		 2329 }
2330
2b0aac30
MCC		 2331 /* remove I2C client for demodulator */
2332 client_demod = port->i2c_client_demod;
2333 if (client_demod) {
2334 module_put(client_demod->dev.driver->owner);
2335 i2c_unregister_device(client_demod);
2336 port->i2c_client_demod = NULL;
2337 }
78db8547 2338
78db8547 2339 port->gate_ctrl = NULL;
453afdd9 2340 vb2_dvb_dealloc_frontends(&port->frontends);
78db8547 2341 return -EINVAL;
d19770e5
ST		 2342}
2343
2344int cx23885_dvb_register(struct cx23885_tsport *port)
2345{
363c35fc 2346
453afdd9 2347 struct vb2_dvb_frontend *fe0;
d19770e5 2348 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST		 2349 int err, i;
2350
2351 /* Here we need to allocate the correct number of frontends,
af901ca1 2352 * as reflected in the cards struct. The reality is that currently
eb0c58bb
ST		 2353 * no cx23885 boards support this - yet. But, if we don't modify this
2354 * code then the second frontend would never be allocated (later)
2355 * and fail with error before the attach in dvb_register().
2356 * Without these changes we risk an OOPS later. The changes here
2357 * are for safety, and should provide a good foundation for the
2358 * future addition of any multi-frontend cx23885 based boards.
2359 */
2360 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2361 port->num_frontends);
d19770e5 2362
eb0c58bb 2363 for (i = 1; i <= port->num_frontends; i++) {
453afdd9
HV		 2364 struct vb2_queue *q;
2365
2366 if (vb2_dvb_alloc_frontend(
9c8ced51 2367 &port->frontends, i) == NULL) {
eb0c58bb
ST		 2368 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2369 return -ENOMEM;
2370 }
2371
453afdd9 2372 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
eb0c58bb 2373 if (!fe0)
ed3da2bf 2374 return -EINVAL;
363c35fc 2375
eb0c58bb 2376 dprintk(1, "%s\n", __func__);
9c8ced51 2377 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST		 2378 dev->board,
2379 dev->name,
2380 dev->pci_bus,
2381 dev->pci_slot);
d19770e5 2382
eb0c58bb 2383 err = -ENODEV;
d19770e5 2384
eb0c58bb
ST		 2385 /* dvb stuff */
2386 /* We have to init the queue for each frontend on a port. */
9c8ced51 2387 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
453afdd9
HV		 2388 q = &fe0->dvb.dvbq;
2389 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2390 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2391 q->gfp_flags = GFP_DMA32;
2392 q->min_buffers_needed = 2;
2393 q->drv_priv = port;
2394 q->buf_struct_size = sizeof(struct cx23885_buffer);
2395 q->ops = &dvb_qops;
2396 q->mem_ops = &vb2_dma_sg_memops;
2397 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2398 q->lock = &dev->lock;
2399
2400 err = vb2_queue_init(q);
2401 if (err < 0)
2402 return err;
eb0c58bb 2403 }
d19770e5
ST		 2404 err = dvb_register(port);
2405 if (err != 0)
9c8ced51
ST		 2406 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2407 __func__, err);
d19770e5 2408
d19770e5
ST		 2409 return err;
2410}
2411
2412int cx23885_dvb_unregister(struct cx23885_tsport *port)
2413{
453afdd9 2414 struct vb2_dvb_frontend *fe0;
b0b12e63
OS		 2415 struct i2c_client *client;
2416
e450de45
OS		 2417 /* remove I2C client for CI */
2418 client = port->i2c_client_ci;
2419 if (client) {
2420 module_put(client->dev.driver->owner);
2421 i2c_unregister_device(client);
2422 }
2423
bf5e3ef0
AP		 2424 /* remove I2C client for SEC */
2425 client = port->i2c_client_sec;
2426 if (client) {
2427 module_put(client->dev.driver->owner);
2428 i2c_unregister_device(client);
2429 }
2430
b0b12e63
OS		 2431 /* remove I2C client for tuner */
2432 client = port->i2c_client_tuner;
2433 if (client) {
2434 module_put(client->dev.driver->owner);
2435 i2c_unregister_device(client);
2436 }
2437
2438 /* remove I2C client for demodulator */
2439 client = port->i2c_client_demod;
2440 if (client) {
2441 module_put(client->dev.driver->owner);
2442 i2c_unregister_device(client);
2443 }
363c35fc 2444
453afdd9 2445 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
b0b12e63 2446
e66131ce 2447 if (fe0 && fe0->dvb.frontend)
453afdd9 2448 vb2_dvb_unregister_bus(&port->frontends);
d19770e5 2449
afd96668
HV		 2450 switch (port->dev->board) {
2451 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2452 netup_ci_exit(port);
2453 break;
78db8547
IL		 2454 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2455 altera_ci_release(port->dev, port->nr);
2456 break;
afd96668 2457 }
5a23b076 2458
78db8547
IL		 2459 port->gate_ctrl = NULL;
2460
d19770e5
ST		 2461 return 0;
2462}
Linux kernel - Deliverables
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