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[media] DocBook: add xrefs for enum fe_type
[deliverable/linux.git] / drivers / media / pci / cx23885 / cx23885-dvb.c
CommitLineData
d19770e5
ST		 1/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
6d897616 4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
d19770e5
ST		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
d19770e5
ST		 16 */
17
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/fs.h>
22#include <linux/kthread.h>
23#include <linux/file.h>
24#include <linux/suspend.h>
25
26#include "cx23885.h"
d19770e5
ST		 27#include <media/v4l2-common.h>
28
5a23b076 29#include "dvb_ca_en50221.h"
d19770e5 30#include "s5h1409.h"
52b50450 31#include "s5h1411.h"
d19770e5 32#include "mt2131.h"
3ba71d21 33#include "tda8290.h"
4041f1a5 34#include "tda18271.h"
9bc37caa 35#include "lgdt330x.h"
0cf8af57 36#include "xc4000.h"
d1987d55 37#include "xc5000.h"
ea5697fe 38#include "max2165.h"
b3ea0166 39#include "tda10048.h"
07b4a835 40#include "tuner-xc2028.h"
827855d3 41#include "tuner-simple.h"
66762373 42#include "dib7000p.h"
46b21bba 43#include "dib0070.h"
66762373 44#include "dibx000_common.h"
aef2d186 45#include "zl10353.h"
5a23b076 46#include "stv0900.h"
f867c3f4 47#include "stv0900_reg.h"
5a23b076
IL		 48#include "stv6110.h"
49#include "lnbh24.h"
96318d0c 50#include "cx24116.h"
e6001482 51#include "cx24117.h"
5a23b076 52#include "cimax2.h"
493b7127 53#include "lgs8gxx.h"
5a23b076
IL		 54#include "netup-eeprom.h"
55#include "netup-init.h"
a5dbf457 56#include "lgdt3305.h"
ea5697fe 57#include "atbm8830.h"
73f0af44 58#include "ts2020.h"
09ea33e5
IL		 59#include "ds3000.h"
60#include "cx23885-f300.h"
78db8547
IL		 61#include "altera-ci.h"
62#include "stv0367.h"
722c90eb
SR		 63#include "drxk.h"
64#include "mt2063.h"
f667190b
MB		 65#include "stv090x.h"
66#include "stb6100.h"
67#include "stb6100_cfg.h"
7c62f5a1
MK		 68#include "tda10071.h"
69#include "a8293.h"
0d1b5265 70#include "mb86a20s.h"
36efec48 71#include "si2165.h"
29442266
OS		 72#include "si2168.h"
73#include "si2157.h"
24e77409 74#include "sp2.h"
29442266 75#include "m88ds3103.h"
1fc77d01 76#include "m88rs6000t.h"
d19770e5 77
4513fc69 78static unsigned int debug;
d19770e5 79
4513fc69
ST		 80#define dprintk(level, fmt, arg...)\
81 do { if (debug >= level)\
82 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
83 } while (0)
d19770e5
ST		 84
85/* ------------------------------------------------------------------ */
86
3ba71d21
MK		 87static unsigned int alt_tuner;
88module_param(alt_tuner, int, 0644);
89MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
90
78e92006
JG		 91DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
92
3ba71d21
MK		 93/* ------------------------------------------------------------------ */
94
453afdd9
HV		 95static int queue_setup(struct vb2_queue *q, const struct v4l2_format *fmt,
96 unsigned int *num_buffers, unsigned int *num_planes,
97 unsigned int sizes[], void *alloc_ctxs[])
d19770e5 98{
453afdd9 99 struct cx23885_tsport *port = q->drv_priv;
d19770e5
ST		 100
101 port->ts_packet_size = 188 * 4;
102 port->ts_packet_count = 32;
453afdd9
HV		 103 *num_planes = 1;
104 sizes[0] = port->ts_packet_size * port->ts_packet_count;
0c3a14c1 105 alloc_ctxs[0] = port->dev->alloc_ctx;
453afdd9 106 *num_buffers = 32;
d19770e5
ST		 107 return 0;
108}
109
453afdd9
HV		 110
111static int buffer_prepare(struct vb2_buffer *vb)
d19770e5 112{
453afdd9
HV		 113 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
114 struct cx23885_buffer *buf =
115 container_of(vb, struct cx23885_buffer, vb);
116
117 return cx23885_buf_prepare(buf, port);
d19770e5
ST		 118}
119
453afdd9 120static void buffer_finish(struct vb2_buffer *vb)
d19770e5 121{
453afdd9
HV		 122 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
123 struct cx23885_dev *dev = port->dev;
124 struct cx23885_buffer *buf = container_of(vb,
125 struct cx23885_buffer, vb);
453afdd9
HV		 126
127 cx23885_free_buffer(dev, buf);
d19770e5
ST		 128}
129
453afdd9 130static void buffer_queue(struct vb2_buffer *vb)
d19770e5 131{
453afdd9
HV		 132 struct cx23885_tsport *port = vb->vb2_queue->drv_priv;
133 struct cx23885_buffer *buf = container_of(vb,
134 struct cx23885_buffer, vb);
135
136 cx23885_buf_queue(port, buf);
d19770e5
ST		 137}
138
78db8547
IL		 139static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
140{
453afdd9
HV		 141 struct vb2_dvb_frontends *f;
142 struct vb2_dvb_frontend *fe;
78db8547
IL		 143
144 f = &port->frontends;
145
146 if (f->gate <= 1) /* undefined or fe0 */
453afdd9 147 fe = vb2_dvb_get_frontend(f, 1);
78db8547 148 else
453afdd9 149 fe = vb2_dvb_get_frontend(f, f->gate);
78db8547
IL		 150
151 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
152 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
153}
154
453afdd9
HV		 155static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count)
156{
157 struct cx23885_tsport *port = q->drv_priv;
158 struct cx23885_dmaqueue *dmaq = &port->mpegq;
159 struct cx23885_buffer *buf = list_entry(dmaq->active.next,
160 struct cx23885_buffer, queue);
161
162 cx23885_start_dma(port, dmaq, buf);
163 return 0;
164}
165
166static void cx23885_stop_streaming(struct vb2_queue *q)
167{
168 struct cx23885_tsport *port = q->drv_priv;
169
170 cx23885_cancel_buffers(port);
171}
172
173static struct vb2_ops dvb_qops = {
174 .queue_setup = queue_setup,
175 .buf_prepare = buffer_prepare,
176 .buf_finish = buffer_finish,
177 .buf_queue = buffer_queue,
178 .wait_prepare = vb2_ops_wait_prepare,
179 .wait_finish = vb2_ops_wait_finish,
180 .start_streaming = cx23885_start_streaming,
181 .stop_streaming = cx23885_stop_streaming,
d19770e5
ST		 182};
183
86184e06 184static struct s5h1409_config hauppauge_generic_config = {
fc959bef
ST		 185 .demod_address = 0x32 >> 1,
186 .output_mode = S5H1409_SERIAL_OUTPUT,
187 .gpio = S5H1409_GPIO_ON,
2b03238a 188 .qam_if = 44000,
fc959bef 189 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 190 .status_mode = S5H1409_DEMODLOCKING,
191 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
fc959bef
ST		 192};
193
b3ea0166
ST		 194static struct tda10048_config hauppauge_hvr1200_config = {
195 .demod_address = 0x10 >> 1,
196 .output_mode = TDA10048_SERIAL_OUTPUT,
197 .fwbulkwritelen = TDA10048_BULKWRITE_200,
484d9e05 198 .inversion = TDA10048_INVERSION_ON,
8816bef5
ST		 199 .dtv6_if_freq_khz = TDA10048_IF_3300,
200 .dtv7_if_freq_khz = TDA10048_IF_3800,
201 .dtv8_if_freq_khz = TDA10048_IF_4300,
484d9e05 202 .clk_freq_khz = TDA10048_CLK_16000,
b3ea0166
ST		 203};
204
6b926eca
MK		 205static struct tda10048_config hauppauge_hvr1210_config = {
206 .demod_address = 0x10 >> 1,
207 .output_mode = TDA10048_SERIAL_OUTPUT,
208 .fwbulkwritelen = TDA10048_BULKWRITE_200,
209 .inversion = TDA10048_INVERSION_ON,
c27586e4
MK		 210 .dtv6_if_freq_khz = TDA10048_IF_3300,
211 .dtv7_if_freq_khz = TDA10048_IF_3500,
212 .dtv8_if_freq_khz = TDA10048_IF_4000,
6b926eca
MK		 213 .clk_freq_khz = TDA10048_CLK_16000,
214};
215
3ba71d21
MK		 216static struct s5h1409_config hauppauge_ezqam_config = {
217 .demod_address = 0x32 >> 1,
218 .output_mode = S5H1409_SERIAL_OUTPUT,
219 .gpio = S5H1409_GPIO_OFF,
220 .qam_if = 4000,
221 .inversion = S5H1409_INVERSION_ON,
dfc1c08a
ST		 222 .status_mode = S5H1409_DEMODLOCKING,
223 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
3ba71d21
MK		 224};
225
fc959bef 226static struct s5h1409_config hauppauge_hvr1800lp_config = {
d19770e5
ST		 227 .demod_address = 0x32 >> 1,
228 .output_mode = S5H1409_SERIAL_OUTPUT,
229 .gpio = S5H1409_GPIO_OFF,
2b03238a 230 .qam_if = 44000,
fe475163 231 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 232 .status_mode = S5H1409_DEMODLOCKING,
233 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d19770e5
ST		 234};
235
07b4a835
MK		 236static struct s5h1409_config hauppauge_hvr1500_config = {
237 .demod_address = 0x32 >> 1,
238 .output_mode = S5H1409_SERIAL_OUTPUT,
239 .gpio = S5H1409_GPIO_OFF,
240 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 241 .status_mode = S5H1409_DEMODLOCKING,
242 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
07b4a835
MK		 243};
244
86184e06 245static struct mt2131_config hauppauge_generic_tunerconfig = {
a77743bc
ST		 246 0x61
247};
248
9bc37caa
MK		 249static struct lgdt330x_config fusionhdtv_5_express = {
250 .demod_address = 0x0e,
251 .demod_chip = LGDT3303,
252 .serial_mpeg = 0x40,
253};
254
d1987d55
ST		 255static struct s5h1409_config hauppauge_hvr1500q_config = {
256 .demod_address = 0x32 >> 1,
257 .output_mode = S5H1409_SERIAL_OUTPUT,
258 .gpio = S5H1409_GPIO_ON,
259 .qam_if = 44000,
260 .inversion = S5H1409_INVERSION_OFF,
dfc1c08a
ST		 261 .status_mode = S5H1409_DEMODLOCKING,
262 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
d1987d55
ST		 263};
264
335377b7
MK		 265static struct s5h1409_config dvico_s5h1409_config = {
266 .demod_address = 0x32 >> 1,
267 .output_mode = S5H1409_SERIAL_OUTPUT,
268 .gpio = S5H1409_GPIO_ON,
269 .qam_if = 44000,
270 .inversion = S5H1409_INVERSION_OFF,
271 .status_mode = S5H1409_DEMODLOCKING,
272 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
273};
274
52b50450
MK		 275static struct s5h1411_config dvico_s5h1411_config = {
276 .output_mode = S5H1411_SERIAL_OUTPUT,
277 .gpio = S5H1411_GPIO_ON,
278 .qam_if = S5H1411_IF_44000,
279 .vsb_if = S5H1411_IF_44000,
280 .inversion = S5H1411_INVERSION_OFF,
281 .status_mode = S5H1411_DEMODLOCKING,
282 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
283};
284
19bc5796
MK		 285static struct s5h1411_config hcw_s5h1411_config = {
286 .output_mode = S5H1411_SERIAL_OUTPUT,
287 .gpio = S5H1411_GPIO_OFF,
288 .vsb_if = S5H1411_IF_44000,
289 .qam_if = S5H1411_IF_4000,
290 .inversion = S5H1411_INVERSION_ON,
291 .status_mode = S5H1411_DEMODLOCKING,
292 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
293};
294
d1987d55 295static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
e12671cf
ST		 296 .i2c_address = 0x61,
297 .if_khz = 5380,
d1987d55
ST		 298};
299
335377b7
MK		 300static struct xc5000_config dvico_xc5000_tunerconfig = {
301 .i2c_address = 0x64,
302 .if_khz = 5380,
335377b7
MK		 303};
304
4041f1a5
MK		 305static struct tda829x_config tda829x_no_probe = {
306 .probe_tuner = TDA829X_DONT_PROBE,
307};
308
f21e0d7f 309static struct tda18271_std_map hauppauge_tda18271_std_map = {
c0dc0c11
MK		 310 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
311 .if_lvl = 6, .rfagc_top = 0x37 },
312 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
313 .if_lvl = 6, .rfagc_top = 0x37 },
f21e0d7f
MK		 314};
315
b34cdc36
MK		 316static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
317 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
318 .if_lvl = 1, .rfagc_top = 0x37, },
319 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
320 .if_lvl = 1, .rfagc_top = 0x37, },
321 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
322 .if_lvl = 1, .rfagc_top = 0x37, },
323};
324
f21e0d7f
MK		 325static struct tda18271_config hauppauge_tda18271_config = {
326 .std_map = &hauppauge_tda18271_std_map,
327 .gate = TDA18271_GATE_ANALOG,
04a68baa 328 .output_opt = TDA18271_OUTPUT_LT_OFF,
f21e0d7f
MK		 329};
330
b3ea0166 331static struct tda18271_config hauppauge_hvr1200_tuner_config = {
b34cdc36 332 .std_map = &hauppauge_hvr1200_tda18271_std_map,
b3ea0166 333 .gate = TDA18271_GATE_ANALOG,
04a68baa 334 .output_opt = TDA18271_OUTPUT_LT_OFF,
b3ea0166
ST		 335};
336
6b926eca
MK		 337static struct tda18271_config hauppauge_hvr1210_tuner_config = {
338 .gate = TDA18271_GATE_DIGITAL,
04a68baa 339 .output_opt = TDA18271_OUTPUT_LT_OFF,
6b926eca
MK		 340};
341
36efec48
MS		 342static struct tda18271_config hauppauge_hvr4400_tuner_config = {
343 .gate = TDA18271_GATE_DIGITAL,
344 .output_opt = TDA18271_OUTPUT_LT_OFF,
345};
346
247bc540 347static struct tda18271_std_map hauppauge_hvr127x_std_map = {
a5dbf457
MK		 348 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
349 .if_lvl = 1, .rfagc_top = 0x58 },
350 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
351 .if_lvl = 1, .rfagc_top = 0x58 },
352};
353
247bc540
MK		 354static struct tda18271_config hauppauge_hvr127x_config = {
355 .std_map = &hauppauge_hvr127x_std_map,
04a68baa 356 .output_opt = TDA18271_OUTPUT_LT_OFF,
a5dbf457
MK		 357};
358
247bc540 359static struct lgdt3305_config hauppauge_lgdt3305_config = {
a5dbf457
MK		 360 .i2c_addr = 0x0e,
361 .mpeg_mode = LGDT3305_MPEG_SERIAL,
362 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
363 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
364 .deny_i2c_rptr = 1,
365 .spectral_inversion = 1,
366 .qam_if_khz = 4000,
367 .vsb_if_khz = 3250,
368};
369
b1721d0d 370static struct dibx000_agc_config xc3028_agc_config = {
66762373
ST		 371 BAND_VHF | BAND_UHF, /* band_caps */
372
373 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
374 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
375 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
376 * P_agc_nb_est=2, P_agc_write=0
377 */
378 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
379 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
380
381 712, /* inv_gain */
382 21, /* time_stabiliz */
383
384 0, /* alpha_level */
385 118, /* thlock */
386
387 0, /* wbd_inv */
388 2867, /* wbd_ref */
389 0, /* wbd_sel */
390 2, /* wbd_alpha */
391
392 0, /* agc1_max */
393 0, /* agc1_min */
394 39718, /* agc2_max */
395 9930, /* agc2_min */
396 0, /* agc1_pt1 */
397 0, /* agc1_pt2 */
398 0, /* agc1_pt3 */
399 0, /* agc1_slope1 */
400 0, /* agc1_slope2 */
401 0, /* agc2_pt1 */
402 128, /* agc2_pt2 */
403 29, /* agc2_slope1 */
404 29, /* agc2_slope2 */
405
406 17, /* alpha_mant */
407 27, /* alpha_exp */
408 23, /* beta_mant */
409 51, /* beta_exp */
410
411 1, /* perform_agc_softsplit */
412};
413
414/* PLL Configuration for COFDM BW_MHz = 8.000000
415 * With external clock = 30.000000 */
b1721d0d 416static struct dibx000_bandwidth_config xc3028_bw_config = {
66762373
ST		 417 60000, /* internal */
418 30000, /* sampling */
419 1, /* pll_cfg: prediv */
420 8, /* pll_cfg: ratio */
421 3, /* pll_cfg: range */
422 1, /* pll_cfg: reset */
423 0, /* pll_cfg: bypass */
424 0, /* misc: refdiv */
425 0, /* misc: bypclk_div */
426 1, /* misc: IO_CLK_en_core */
427 1, /* misc: ADClkSrc */
428 0, /* misc: modulo */
429 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
430 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
431 20452225, /* timf */
432 30000000 /* xtal_hz */
433};
434
435static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
436 .output_mpeg2_in_188_bytes = 1,
437 .hostbus_diversity = 1,
438 .tuner_is_baseband = 0,
439 .update_lna = NULL,
440
441 .agc_config_count = 1,
442 .agc = &xc3028_agc_config,
443 .bw = &xc3028_bw_config,
444
445 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
446 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
447 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
448
449 .pwm_freq_div = 0,
450 .agc_control = NULL,
451 .spur_protect = 0,
452
453 .output_mode = OUTMODE_MPEG2_SERIAL,
454};
455
aef2d186
ST		 456static struct zl10353_config dvico_fusionhdtv_xc3028 = {
457 .demod_address = 0x0f,
458 .if2 = 45600,
459 .no_tuner = 1,
d4dc673d 460 .disable_i2c_gate_ctrl = 1,
aef2d186
ST		 461};
462
f867c3f4
IL		 463static struct stv0900_reg stv0900_ts_regs[] = {
464 { R0900_TSGENERAL, 0x00 },
465 { R0900_P1_TSSPEED, 0x40 },
466 { R0900_P2_TSSPEED, 0x40 },
467 { R0900_P1_TSCFGM, 0xc0 },
468 { R0900_P2_TSCFGM, 0xc0 },
469 { R0900_P1_TSCFGH, 0xe0 },
470 { R0900_P2_TSCFGH, 0xe0 },
471 { R0900_P1_TSCFGL, 0x20 },
472 { R0900_P2_TSCFGL, 0x20 },
473 { 0xffff, 0xff }, /* terminate */
474};
475
5a23b076
IL		 476static struct stv0900_config netup_stv0900_config = {
477 .demod_address = 0x68,
29372a8d 478 .demod_mode = 1, /* dual */
644c7ef0 479 .xtal = 8000000,
5a23b076
IL		 480 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
481 .diseqc_mode = 2,/* 2/3 PWM */
f867c3f4 482 .ts_config_regs = stv0900_ts_regs,
5a23b076
IL		 483 .tun1_maddress = 0,/* 0x60 */
484 .tun2_maddress = 3,/* 0x63 */
485 .tun1_adc = 1,/* 1 Vpp */
486 .tun2_adc = 1,/* 1 Vpp */
487};
488
489static struct stv6110_config netup_stv6110_tunerconfig_a = {
490 .i2c_address = 0x60,
644c7ef0
AO		 491 .mclk = 16000000,
492 .clk_div = 1,
873688cd 493 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 494};
495
496static struct stv6110_config netup_stv6110_tunerconfig_b = {
497 .i2c_address = 0x63,
644c7ef0
AO		 498 .mclk = 16000000,
499 .clk_div = 1,
873688cd 500 .gain = 8, /* +16 dB - maximum gain */
5a23b076
IL		 501};
502
96318d0c 503static struct cx24116_config tbs_cx24116_config = {
09ea33e5 504 .demod_address = 0x55,
96318d0c
IL		 505};
506
e6001482
LA		 507static struct cx24117_config tbs_cx24117_config = {
508 .demod_address = 0x55,
509};
510
09ea33e5
IL		 511static struct ds3000_config tevii_ds3000_config = {
512 .demod_address = 0x68,
579943f5
IL		 513};
514
73f0af44
KD		 515static struct ts2020_config tevii_ts2020_config = {
516 .tuner_address = 0x60,
b858c331 517 .clk_out_div = 1,
8d2b0229 518 .frequency_div = 1146000,
73f0af44
KD		 519};
520
c9b8b04b
IL		 521static struct cx24116_config dvbworld_cx24116_config = {
522 .demod_address = 0x05,
523};
524
493b7127
DW		 525static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
526 .prod = LGS8GXX_PROD_LGS8GL5,
527 .demod_address = 0x19,
528 .serial_ts = 0,
529 .ts_clk_pol = 1,
530 .ts_clk_gated = 1,
531 .if_clk_freq = 30400, /* 30.4 MHz */
532 .if_freq = 5380, /* 5.38 MHz */
533 .if_neg_center = 1,
534 .ext_adc = 0,
535 .adc_signed = 0,
536 .if_neg_edge = 0,
537};
538
539static struct xc5000_config mygica_x8506_xc5000_config = {
540 .i2c_address = 0x61,
541 .if_khz = 5380,
542};
543
0d1b5265
MCC		 544static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
545 .demod_address = 0x10,
546};
547
548static struct xc5000_config mygica_x8507_xc5000_config = {
549 .i2c_address = 0x61,
550 .if_khz = 4000,
551};
552
f667190b 553static struct stv090x_config prof_8000_stv090x_config = {
b858c331
IL		 554 .device = STV0903,
555 .demod_mode = STV090x_SINGLE,
556 .clk_mode = STV090x_CLK_EXT,
557 .xtal = 27000000,
558 .address = 0x6A,
559 .ts1_mode = STV090x_TSMODE_PARALLEL_PUNCTURED,
560 .repeater_level = STV090x_RPTLEVEL_64,
561 .adc1_range = STV090x_ADC_2Vpp,
562 .diseqc_envelope_mode = false,
563
564 .tuner_get_frequency = stb6100_get_frequency,
565 .tuner_set_frequency = stb6100_set_frequency,
566 .tuner_set_bandwidth = stb6100_set_bandwidth,
567 .tuner_get_bandwidth = stb6100_get_bandwidth,
f667190b
MB		 568};
569
570static struct stb6100_config prof_8000_stb6100_config = {
571 .tuner_address = 0x60,
572 .refclock = 27000000,
573};
574
575static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
576{
577 struct cx23885_tsport *port = fe->dvb->priv;
578 struct cx23885_dev *dev = port->dev;
579
580 if (voltage == SEC_VOLTAGE_18)
581 cx_write(MC417_RWD, 0x00001e00);
582 else if (voltage == SEC_VOLTAGE_13)
583 cx_write(MC417_RWD, 0x00001a00);
584 else
585 cx_write(MC417_RWD, 0x00001800);
586 return 0;
587}
588
29442266
OS		 589static int dvbsky_t9580_set_voltage(struct dvb_frontend *fe,
590 fe_sec_voltage_t voltage)
591{
592 struct cx23885_tsport *port = fe->dvb->priv;
593 struct cx23885_dev *dev = port->dev;
594
595 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
596
597 switch (voltage) {
598 case SEC_VOLTAGE_13:
599 cx23885_gpio_set(dev, GPIO_1);
600 cx23885_gpio_clear(dev, GPIO_0);
601 break;
602 case SEC_VOLTAGE_18:
603 cx23885_gpio_set(dev, GPIO_1);
604 cx23885_gpio_set(dev, GPIO_0);
605 break;
606 case SEC_VOLTAGE_OFF:
607 cx23885_gpio_clear(dev, GPIO_1);
608 cx23885_gpio_clear(dev, GPIO_0);
609 break;
610 }
611
612 /* call the frontend set_voltage function */
613 port->fe_set_voltage(fe, voltage);
614
615 return 0;
616}
617
c29d6a83 618static int dvbsky_s952_portc_set_voltage(struct dvb_frontend *fe,
619 fe_sec_voltage_t voltage)
620{
621 struct cx23885_tsport *port = fe->dvb->priv;
622 struct cx23885_dev *dev = port->dev;
623
624 cx23885_gpio_enable(dev, GPIO_12 | GPIO_13, 1);
625
626 switch (voltage) {
627 case SEC_VOLTAGE_13:
628 cx23885_gpio_set(dev, GPIO_13);
629 cx23885_gpio_clear(dev, GPIO_12);
630 break;
631 case SEC_VOLTAGE_18:
632 cx23885_gpio_set(dev, GPIO_13);
633 cx23885_gpio_set(dev, GPIO_12);
634 break;
635 case SEC_VOLTAGE_OFF:
636 cx23885_gpio_clear(dev, GPIO_13);
637 cx23885_gpio_clear(dev, GPIO_12);
638 break;
639 }
640 /* call the frontend set_voltage function */
641 return port->fe_set_voltage(fe, voltage);
642}
643
24e77409
OS		 644static int cx23885_sp2_ci_ctrl(void *priv, u8 read, int addr,
645 u8 data, int *mem)
646{
647 /* MC417 */
648 #define SP2_DATA 0x000000ff
649 #define SP2_WR 0x00008000
650 #define SP2_RD 0x00004000
651 #define SP2_ACK 0x00001000
652 #define SP2_ADHI 0x00000800
653 #define SP2_ADLO 0x00000400
654 #define SP2_CS1 0x00000200
655 #define SP2_CS0 0x00000100
656 #define SP2_EN_ALL 0x00001000
657 #define SP2_CTRL_OFF (SP2_CS1 | SP2_CS0 | SP2_WR | SP2_RD)
658
659 struct cx23885_tsport *port = priv;
660 struct cx23885_dev *dev = port->dev;
661 int ret;
0e6c7b01 662 int tmp = 0;
24e77409
OS		 663 unsigned long timeout;
664
665 mutex_lock(&dev->gpio_lock);
666
667 /* write addr */
668 cx_write(MC417_OEN, SP2_EN_ALL);
669 cx_write(MC417_RWD, SP2_CTRL_OFF |
670 SP2_ADLO | (0xff & addr));
671 cx_clear(MC417_RWD, SP2_ADLO);
672 cx_write(MC417_RWD, SP2_CTRL_OFF |
673 SP2_ADHI | (0xff & (addr >> 8)));
674 cx_clear(MC417_RWD, SP2_ADHI);
675
676 if (read)
677 /* data in */
678 cx_write(MC417_OEN, SP2_EN_ALL | SP2_DATA);
679 else
680 /* data out */
681 cx_write(MC417_RWD, SP2_CTRL_OFF | data);
682
683 /* chip select 0 */
684 cx_clear(MC417_RWD, SP2_CS0);
685
686 /* read/write */
687 cx_clear(MC417_RWD, (read) ? SP2_RD : SP2_WR);
688
689 /* wait for a maximum of 1 msec */
690 timeout = jiffies + msecs_to_jiffies(1);
691 while (!time_after(jiffies, timeout)) {
692 tmp = cx_read(MC417_RWD);
693 if ((tmp & SP2_ACK) == 0)
694 break;
695 usleep_range(50, 100);
696 }
697
698 cx_set(MC417_RWD, SP2_CTRL_OFF);
699 *mem = tmp & 0xff;
700
701 mutex_unlock(&dev->gpio_lock);
702
703 if (!read) {
704 if (*mem < 0) {
705 ret = -EREMOTEIO;
706 goto err;
707 }
708 }
709
710 return 0;
711err:
712 return ret;
713}
714
a7d44baa 715static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
f35b9e80 716{
a7d44baa 717 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
f35b9e80
MK		 718 struct cx23885_tsport *port = fe->dvb->priv;
719 struct cx23885_dev *dev = port->dev;
720
721 switch (dev->board) {
722 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a7d44baa 723 switch (p->modulation) {
f35b9e80
MK		 724 case VSB_8:
725 cx23885_gpio_clear(dev, GPIO_5);
726 break;
727 case QAM_64:
728 case QAM_256:
729 default:
730 cx23885_gpio_set(dev, GPIO_5);
731 break;
732 }
733 break;
6f0d8c02 734 case CX23885_BOARD_MYGICA_X8506:
0d1b5265 735 case CX23885_BOARD_MYGICA_X8507:
6f0d8c02
DW		 736 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
737 /* Select Digital TV */
738 cx23885_gpio_set(dev, GPIO_0);
739 break;
f35b9e80 740 }
15472faf
MCC		 741
742 /* Call the real set_frontend */
743 if (port->set_frontend)
744 return port->set_frontend(fe);
745
5bdd3962 746 return 0;
f35b9e80
MK		 747}
748
15472faf
MCC		 749static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
750 struct dvb_frontend *fe)
751{
752 port->set_frontend = fe->ops.set_frontend;
753 fe->ops.set_frontend = cx23885_dvb_set_frontend;
754}
755
2365b2d3
DW		 756static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
757 .prod = LGS8GXX_PROD_LGS8G75,
758 .demod_address = 0x19,
759 .serial_ts = 0,
760 .ts_clk_pol = 1,
761 .ts_clk_gated = 1,
762 .if_clk_freq = 30400, /* 30.4 MHz */
763 .if_freq = 6500, /* 6.50 MHz */
764 .if_neg_center = 1,
765 .ext_adc = 0,
766 .adc_signed = 1,
767 .adc_vpp = 2, /* 1.6 Vpp */
768 .if_neg_edge = 1,
769};
770
771static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
772 .i2c_address = 0x61,
773 .if_khz = 6500,
774};
775
ea5697fe
DW		 776static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
777 .prod = ATBM8830_PROD_8830,
778 .demod_address = 0x44,
779 .serial_ts = 0,
780 .ts_sampling_edge = 1,
781 .ts_clk_gated = 0,
782 .osc_clk_freq = 30400, /* in kHz */
783 .if_freq = 0, /* zero IF */
784 .zif_swap_iq = 1,
c245c75c
DW		 785 .agc_min = 0x2E,
786 .agc_max = 0xFF,
787 .agc_hold_loop = 0,
ea5697fe
DW		 788};
789
790static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
791 .i2c_address = 0x60,
792 .osc_clk = 20
793};
794
795static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
796 .prod = ATBM8830_PROD_8830,
797 .demod_address = 0x44,
798 .serial_ts = 1,
799 .ts_sampling_edge = 1,
800 .ts_clk_gated = 0,
801 .osc_clk_freq = 30400, /* in kHz */
802 .if_freq = 0, /* zero IF */
803 .zif_swap_iq = 1,
c245c75c
DW		 804 .agc_min = 0x2E,
805 .agc_max = 0xFF,
806 .agc_hold_loop = 0,
ea5697fe
DW		 807};
808
809static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
810 .i2c_address = 0x60,
811 .osc_clk = 20
812};
78db8547
IL		 813static struct stv0367_config netup_stv0367_config[] = {
814 {
815 .demod_address = 0x1c,
816 .xtal = 27000000,
817 .if_khz = 4500,
818 .if_iq_mode = 0,
819 .ts_mode = 1,
820 .clk_pol = 0,
821 }, {
822 .demod_address = 0x1d,
823 .xtal = 27000000,
824 .if_khz = 4500,
825 .if_iq_mode = 0,
826 .ts_mode = 1,
827 .clk_pol = 0,
828 },
829};
830
831static struct xc5000_config netup_xc5000_config[] = {
832 {
833 .i2c_address = 0x61,
834 .if_khz = 4500,
835 }, {
836 .i2c_address = 0x64,
837 .if_khz = 4500,
838 },
839};
840
722c90eb
SR		 841static struct drxk_config terratec_drxk_config[] = {
842 {
843 .adr = 0x29,
844 .no_i2c_bridge = 1,
845 }, {
846 .adr = 0x2a,
847 .no_i2c_bridge = 1,
848 },
849};
850
851static struct mt2063_config terratec_mt2063_config[] = {
852 {
853 .tuner_address = 0x60,
854 }, {
855 .tuner_address = 0x67,
856 },
857};
858
49bf0e67
AP		 859static const struct tda10071_platform_data hauppauge_tda10071_pdata = {
860 .clk = 40444000, /* 40.444 MHz */
861 .i2c_wr_max = 64,
862 .ts_mode = TDA10071_TS_SERIAL,
863 .pll_multiplier = 20,
864 .tuner_i2c_addr = 0x54,
865};
866
36efec48
MS		 867static const struct si2165_config hauppauge_hvr4400_si2165_config = {
868 .i2c_addr = 0x64,
869 .chip_mode = SI2165_MODE_PLL_XTAL,
870 .ref_freq_Hz = 16000000,
871};
872
29442266
OS		 873static const struct m88ds3103_config dvbsky_t9580_m88ds3103_config = {
874 .i2c_addr = 0x68,
875 .clock = 27000000,
876 .i2c_wr_max = 33,
877 .clock_out = 0,
878 .ts_mode = M88DS3103_TS_PARALLEL,
879 .ts_clk = 16000,
880 .ts_clk_pol = 1,
881 .lnb_en_pol = 1,
882 .lnb_hv_pol = 0,
883 .agc = 0x99,
884};
885
0e6c7b01 886static const struct m88ds3103_config dvbsky_s950c_m88ds3103_config = {
887 .i2c_addr = 0x68,
888 .clock = 27000000,
889 .i2c_wr_max = 33,
890 .clock_out = 0,
891 .ts_mode = M88DS3103_TS_CI,
892 .ts_clk = 10000,
893 .ts_clk_pol = 1,
894 .lnb_en_pol = 1,
895 .lnb_hv_pol = 0,
896 .agc = 0x99,
897};
898
c29d6a83 899static const struct m88ds3103_config dvbsky_s952_portc_m88ds3103_config = {
900 .i2c_addr = 0x68,
901 .clock = 27000000,
902 .i2c_wr_max = 33,
903 .clock_out = 0,
904 .ts_mode = M88DS3103_TS_SERIAL,
905 .ts_clk = 96000,
906 .ts_clk_pol = 0,
907 .lnb_en_pol = 1,
908 .lnb_hv_pol = 0,
909 .agc = 0x99,
910};
911
1fc77d01
AP		 912static const struct m88ds3103_config hauppauge_hvr5525_m88ds3103_config = {
913 .i2c_addr = 0x69,
914 .clock = 27000000,
915 .i2c_wr_max = 33,
916 .ts_mode = M88DS3103_TS_PARALLEL,
917 .ts_clk = 16000,
918 .ts_clk_pol = 1,
919 .agc = 0x99,
920};
921
ada73eee 922static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
78db8547
IL		 923{
924 struct cx23885_dev *dev = (struct cx23885_dev *)device;
925 unsigned long timeout = jiffies + msecs_to_jiffies(1);
d164460f 926 uint32_t mem = 0;
78db8547 927
d164460f 928 mem = cx_read(MC417_RWD);
78db8547
IL		 929 if (read)
930 cx_set(MC417_OEN, ALT_DATA);
931 else {
932 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
78db8547
IL		 933 mem &= ~ALT_DATA;
934 mem |= (data & ALT_DATA);
78db8547
IL		 935 }
936
937 if (flag)
d164460f 938 mem |= ALT_AD_RG;
78db8547 939 else
d164460f 940 mem &= ~ALT_AD_RG;
78db8547 941
d164460f 942 mem &= ~ALT_CS;
78db8547 943 if (read)
d164460f 944 mem = (mem & ~ALT_RD) | ALT_WR;
78db8547 945 else
d164460f
AO		 946 mem = (mem & ~ALT_WR) | ALT_RD;
947
948 cx_write(MC417_RWD, mem); /* start RW cycle */
78db8547
IL		 949
950 for (;;) {
951 mem = cx_read(MC417_RWD);
952 if ((mem & ALT_RDY) == 0)
953 break;
954 if (time_after(jiffies, timeout))
955 break;
956 udelay(1);
957 }
958
959 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
960 if (read)
961 return mem & ALT_DATA;
962
963 return 0;
964};
ea5697fe 965
46b21bba
JH		 966static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
967{
968 struct dib7000p_ops *dib7000p_ops = fe->sec_priv;
969
970 return dib7000p_ops->set_gpio(fe, 8, 0, !onoff);
971}
972
973static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
974{
975 return 0;
976}
977
978static struct dib0070_config dib7070p_dib0070_config = {
979 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
980 .reset = dib7070_tuner_reset,
981 .sleep = dib7070_tuner_sleep,
982 .clock_khz = 12000,
46b21bba
JH		 983 .freq_offset_khz_vhf = 550,
984 /* .flip_chip = 1, */
985};
986
987/* DIB7070 generic */
988static struct dibx000_agc_config dib7070_agc_config = {
989 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
990
991 /*
992 * P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5,
993 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
994 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0
995 */
996 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) |
997 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
998 .inv_gain = 600,
999 .time_stabiliz = 10,
1000 .alpha_level = 0,
1001 .thlock = 118,
1002 .wbd_inv = 0,
1003 .wbd_ref = 3530,
1004 .wbd_sel = 1,
1005 .wbd_alpha = 5,
1006 .agc1_max = 65535,
1007 .agc1_min = 0,
1008 .agc2_max = 65535,
1009 .agc2_min = 0,
1010 .agc1_pt1 = 0,
1011 .agc1_pt2 = 40,
1012 .agc1_pt3 = 183,
1013 .agc1_slope1 = 206,
1014 .agc1_slope2 = 255,
1015 .agc2_pt1 = 72,
1016 .agc2_pt2 = 152,
1017 .agc2_slope1 = 88,
1018 .agc2_slope2 = 90,
1019 .alpha_mant = 17,
1020 .alpha_exp = 27,
1021 .beta_mant = 23,
1022 .beta_exp = 51,
1023 .perform_agc_softsplit = 0,
1024};
1025
1026static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
1027 .internal = 60000,
1028 .sampling = 15000,
1029 .pll_prediv = 1,
1030 .pll_ratio = 20,
1031 .pll_range = 3,
1032 .pll_reset = 1,
1033 .pll_bypass = 0,
1034 .enable_refdiv = 0,
1035 .bypclk_div = 0,
1036 .IO_CLK_en_core = 1,
1037 .ADClkSrc = 1,
1038 .modulo = 2,
1039 /* refsel, sel, freq_15k */
1040 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1041 .ifreq = (0 << 25) | 0,
1042 .timf = 20452225,
1043 .xtal_hz = 12000000,
1044};
1045
1046static struct dib7000p_config dib7070p_dib7000p_config = {
1047 /* .output_mode = OUTMODE_MPEG2_FIFO, */
1048 .output_mode = OUTMODE_MPEG2_SERIAL,
1049 /* .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK, */
1050 .output_mpeg2_in_188_bytes = 1,
1051
1052 .agc_config_count = 1,
1053 .agc = &dib7070_agc_config,
1054 .bw = &dib7070_bw_config_12_mhz,
1055 .tuner_is_baseband = 1,
1056 .spur_protect = 1,
1057
1058 .gpio_dir = 0xfcef, /* DIB7000P_GPIO_DEFAULT_DIRECTIONS, */
1059 .gpio_val = 0x0110, /* DIB7000P_GPIO_DEFAULT_VALUES, */
1060 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1061
1062 .hostbus_diversity = 1,
1063};
1064
2b0aac30
MCC		 1065static int dvb_register_ci_mac(struct cx23885_tsport *port)
1066{
1067 struct cx23885_dev *dev = port->dev;
1068 struct i2c_client *client_ci = NULL;
1069 struct vb2_dvb_frontend *fe0;
1070
1071 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
1072 if (!fe0)
1073 return -EINVAL;
1074
1075 switch (dev->board) {
1076 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1077 static struct netup_card_info cinfo;
1078
1079 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1080 memcpy(port->frontends.adapter.proposed_mac,
1081 cinfo.port[port->nr - 1].mac, 6);
1082 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1083 port->nr, port->frontends.adapter.proposed_mac);
1084
1085 netup_ci_init(port);
1086 return 0;
1087 }
1088 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1089 struct altera_ci_config netup_ci_cfg = {
1090 .dev = dev,/* magic number to identify*/
1091 .adapter = &port->frontends.adapter,/* for CI */
1092 .demux = &fe0->dvb.demux,/* for hw pid filter */
1093 .fpga_rw = netup_altera_fpga_rw,
1094 };
1095
1096 altera_ci_init(&netup_ci_cfg, port->nr);
1097 return 0;
1098 }
1099 case CX23885_BOARD_TEVII_S470: {
1100 u8 eeprom[256]; /* 24C02 i2c eeprom */
1101
1102 if (port->nr != 1)
1103 return 0;
1104
1105 /* Read entire EEPROM */
1106 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1107 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1108 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1109 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1110 return 0;
1111 }
1112 case CX23885_BOARD_DVBSKY_T9580:
1113 case CX23885_BOARD_DVBSKY_S950:
1114 case CX23885_BOARD_DVBSKY_S952:
1115 case CX23885_BOARD_DVBSKY_T982: {
1116 u8 eeprom[256]; /* 24C02 i2c eeprom */
1117
1118 if (port->nr > 2)
1119 return 0;
1120
1121 /* Read entire EEPROM */
1122 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1123 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1124 sizeof(eeprom));
1125 printk(KERN_INFO "%s port %d MAC address: %pM\n",
1126 cx23885_boards[dev->board].name, port->nr,
1127 eeprom + 0xc0 + (port->nr-1) * 8);
1128 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0 +
1129 (port->nr-1) * 8, 6);
1130 return 0;
1131 }
1132 case CX23885_BOARD_DVBSKY_S950C:
1133 case CX23885_BOARD_DVBSKY_T980C:
1134 case CX23885_BOARD_TT_CT2_4500_CI: {
1135 u8 eeprom[256]; /* 24C02 i2c eeprom */
1136 struct sp2_config sp2_config;
1137 struct i2c_board_info info;
1138 struct cx23885_i2c *i2c_bus2 = &dev->i2c_bus[1];
1139
1140 /* attach CI */
1141 memset(&sp2_config, 0, sizeof(sp2_config));
1142 sp2_config.dvb_adap = &port->frontends.adapter;
1143 sp2_config.priv = port;
1144 sp2_config.ci_control = cx23885_sp2_ci_ctrl;
1145 memset(&info, 0, sizeof(struct i2c_board_info));
1146 strlcpy(info.type, "sp2", I2C_NAME_SIZE);
1147 info.addr = 0x40;
1148 info.platform_data = &sp2_config;
1149 request_module(info.type);
1150 client_ci = i2c_new_device(&i2c_bus2->i2c_adap, &info);
1151 if (client_ci == NULL || client_ci->dev.driver == NULL)
1152 return -ENODEV;
1153 if (!try_module_get(client_ci->dev.driver->owner)) {
1154 i2c_unregister_device(client_ci);
1155 return -ENODEV;
1156 }
1157 port->i2c_client_ci = client_ci;
1158
1159 if (port->nr != 1)
1160 return 0;
1161
1162 /* Read entire EEPROM */
1163 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1164 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom,
1165 sizeof(eeprom));
1166 printk(KERN_INFO "%s MAC address: %pM\n",
1167 cx23885_boards[dev->board].name, eeprom + 0xc0);
1168 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xc0, 6);
1169 return 0;
1170 }
1171 }
1172 return 0;
1173}
1174
d19770e5
ST		 1175static int dvb_register(struct cx23885_tsport *port)
1176{
8abe4a0a 1177 struct dib7000p_ops dib7000p_ops;
d19770e5 1178 struct cx23885_dev *dev = port->dev;
493b7127 1179 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
453afdd9 1180 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
29442266
OS		 1181 struct si2168_config si2168_config;
1182 struct si2157_config si2157_config;
d76e0878 1183 struct ts2020_config ts2020_config;
29442266
OS		 1184 struct i2c_board_info info;
1185 struct i2c_adapter *adapter;
2b0aac30 1186 struct i2c_client *client_demod = NULL, *client_tuner = NULL;
bf5e3ef0 1187 struct i2c_client *client_sec = NULL;
c29d6a83 1188 const struct m88ds3103_config *p_m88ds3103_config = NULL;
1189 int (*p_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage) = NULL;
78db8547 1190 int mfe_shared = 0; /* bus not shared by default */
5a23b076 1191 int ret;
363c35fc 1192
f972e0bd 1193 /* Get the first frontend */
453afdd9 1194 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
363c35fc
ST		 1195 if (!fe0)
1196 return -EINVAL;
d19770e5 1197
453afdd9 1198 /* init struct vb2_dvb */
363c35fc 1199 fe0->dvb.name = dev->name;
d19770e5 1200
78db8547
IL		 1201 /* multi-frontend gate control is undefined or defaults to fe0 */
1202 port->frontends.gate = 0;
1203
1204 /* Sets the gate control callback to be used by i2c command calls */
1205 port->gate_ctrl = cx23885_dvb_gate_ctrl;
1206
d19770e5
ST		 1207 /* init frontend */
1208 switch (dev->board) {
a77743bc 1209 case CX23885_BOARD_HAUPPAUGE_HVR1250:
f139fa71 1210 i2c_bus = &dev->i2c_bus[0];
363c35fc 1211 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
86184e06 1212 &hauppauge_generic_config,
f139fa71 1213 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1214 if (fe0->dvb.frontend == NULL)
1215 break;
1216 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1217 &i2c_bus->i2c_adap,
1218 &hauppauge_generic_tunerconfig, 0);
d19770e5 1219 break;
a5dbf457 1220 case CX23885_BOARD_HAUPPAUGE_HVR1270:
d099becb 1221 case CX23885_BOARD_HAUPPAUGE_HVR1275:
a5dbf457
MK		 1222 i2c_bus = &dev->i2c_bus[0];
1223 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
247bc540 1224 &hauppauge_lgdt3305_config,
a5dbf457 1225 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1226 if (fe0->dvb.frontend == NULL)
1227 break;
1228 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1229 0x60, &dev->i2c_bus[1].i2c_adap,
1230 &hauppauge_hvr127x_config);
15472faf
MCC		 1231 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
1232 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
a5dbf457 1233 break;
19bc5796 1234 case CX23885_BOARD_HAUPPAUGE_HVR1255:
0ac60acb 1235 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
19bc5796
MK		 1236 i2c_bus = &dev->i2c_bus[0];
1237 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1238 &hcw_s5h1411_config,
1239 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1240 if (fe0->dvb.frontend == NULL)
1241 break;
1242
1243 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1244 0x60, &dev->i2c_bus[1].i2c_adap,
1245 &hauppauge_tda18271_config);
0ac60acb
DH		 1246
1247 tda18271_attach(&dev->ts1.analog_fe,
1248 0x60, &dev->i2c_bus[1].i2c_adap,
1249 &hauppauge_tda18271_config);
1250
19bc5796 1251 break;
3ba71d21
MK		 1252 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1253 i2c_bus = &dev->i2c_bus[0];
92abe9ee 1254 switch (alt_tuner) {
3ba71d21 1255 case 1:
363c35fc 1256 fe0->dvb.frontend =
3ba71d21
MK		 1257 dvb_attach(s5h1409_attach,
1258 &hauppauge_ezqam_config,
1259 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1260 if (fe0->dvb.frontend == NULL)
1261 break;
1262
1263 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1264 &dev->i2c_bus[1].i2c_adap, 0x42,
1265 &tda829x_no_probe);
1266 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1267 0x60, &dev->i2c_bus[1].i2c_adap,
1268 &hauppauge_tda18271_config);
3ba71d21
MK		 1269 break;
1270 case 0:
1271 default:
363c35fc 1272 fe0->dvb.frontend =
3ba71d21
MK		 1273 dvb_attach(s5h1409_attach,
1274 &hauppauge_generic_config,
1275 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1276 if (fe0->dvb.frontend == NULL)
1277 break;
1278 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1279 &i2c_bus->i2c_adap,
1280 &hauppauge_generic_tunerconfig, 0);
3ba71d21
MK		 1281 }
1282 break;
fc959bef 1283 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
f139fa71 1284 i2c_bus = &dev->i2c_bus[0];
363c35fc 1285 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
fc959bef 1286 &hauppauge_hvr1800lp_config,
f139fa71 1287 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1288 if (fe0->dvb.frontend == NULL)
1289 break;
1290 dvb_attach(mt2131_attach, fe0->dvb.frontend,
1291 &i2c_bus->i2c_adap,
1292 &hauppauge_generic_tunerconfig, 0);
fc959bef 1293 break;
9bc37caa 1294 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
f139fa71 1295 i2c_bus = &dev->i2c_bus[0];
363c35fc 1296 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
9bc37caa 1297 &fusionhdtv_5_express,
f139fa71 1298 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1299 if (fe0->dvb.frontend == NULL)
1300 break;
1301 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1302 &i2c_bus->i2c_adap, 0x61,
1303 TUNER_LG_TDVS_H06XF);
9bc37caa 1304 break;
d1987d55
ST		 1305 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1306 i2c_bus = &dev->i2c_bus[1];
363c35fc 1307 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
d1987d55
ST		 1308 &hauppauge_hvr1500q_config,
1309 &dev->i2c_bus[0].i2c_adap);
ed3da2bf
MCC		 1310 if (fe0->dvb.frontend == NULL)
1311 break;
1312 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1313 &i2c_bus->i2c_adap,
1314 &hauppauge_hvr1500q_tunerconfig);
d1987d55 1315 break;
07b4a835
MK		 1316 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1317 i2c_bus = &dev->i2c_bus[1];
363c35fc 1318 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
07b4a835
MK		 1319 &hauppauge_hvr1500_config,
1320 &dev->i2c_bus[0].i2c_adap);
363c35fc 1321 if (fe0->dvb.frontend != NULL) {
07b4a835
MK		 1322 struct dvb_frontend *fe;
1323 struct xc2028_config cfg = {
1324 .i2c_adap = &i2c_bus->i2c_adap,
1325 .i2c_addr = 0x61,
07b4a835
MK		 1326 };
1327 static struct xc2028_ctrl ctl = {
ef80bfeb 1328 .fname = XC2028_DEFAULT_FIRMWARE,
07b4a835 1329 .max_len = 64,
52c3d29c 1330 .demod = XC3028_FE_OREN538,
07b4a835
MK		 1331 };
1332
1333 fe = dvb_attach(xc2028_attach,
363c35fc 1334 fe0->dvb.frontend, &cfg);
07b4a835
MK		 1335 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1336 fe->ops.tuner_ops.set_config(fe, &ctl);
1337 }
1338 break;
b3ea0166 1339 case CX23885_BOARD_HAUPPAUGE_HVR1200:
a780a31c 1340 case CX23885_BOARD_HAUPPAUGE_HVR1700:
b3ea0166 1341 i2c_bus = &dev->i2c_bus[0];
363c35fc 1342 fe0->dvb.frontend = dvb_attach(tda10048_attach,
b3ea0166
ST		 1343 &hauppauge_hvr1200_config,
1344 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1345 if (fe0->dvb.frontend == NULL)
1346 break;
1347 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1348 &dev->i2c_bus[1].i2c_adap, 0x42,
1349 &tda829x_no_probe);
1350 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1351 0x60, &dev->i2c_bus[1].i2c_adap,
1352 &hauppauge_hvr1200_tuner_config);
6b926eca
MK		 1353 break;
1354 case CX23885_BOARD_HAUPPAUGE_HVR1210:
1355 i2c_bus = &dev->i2c_bus[0];
1356 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1357 &hauppauge_hvr1210_config,
1358 &i2c_bus->i2c_adap);
1359 if (fe0->dvb.frontend != NULL) {
1360 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1361 0x60, &dev->i2c_bus[1].i2c_adap,
1362 &hauppauge_hvr1210_tuner_config);
b3ea0166
ST		 1363 }
1364 break;
66762373
ST		 1365 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1366 i2c_bus = &dev->i2c_bus[0];
8abe4a0a
MCC		 1367
1368 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1369 return -ENODEV;
1370
1371 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap,
66762373 1372 0x12, &hauppauge_hvr1400_dib7000_config);
363c35fc 1373 if (fe0->dvb.frontend != NULL) {
66762373
ST		 1374 struct dvb_frontend *fe;
1375 struct xc2028_config cfg = {
1376 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1377 .i2c_addr = 0x64,
66762373
ST		 1378 };
1379 static struct xc2028_ctrl ctl = {
ef80bfeb 1380 .fname = XC3028L_DEFAULT_FIRMWARE,
66762373 1381 .max_len = 64,
9bed77ee 1382 .demod = XC3028_FE_DIBCOM52,
9c8ced51
ST		 1383 /* This is true for all demods with
1384 v36 firmware? */
0975fc68 1385 .type = XC2028_D2633,
66762373
ST		 1386 };
1387
1388 fe = dvb_attach(xc2028_attach,
363c35fc 1389 fe0->dvb.frontend, &cfg);
66762373
ST		 1390 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1391 fe->ops.tuner_ops.set_config(fe, &ctl);
1392 }
1393 break;
335377b7
MK		 1394 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1395 i2c_bus = &dev->i2c_bus[port->nr - 1];
1396
363c35fc 1397 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
335377b7
MK		 1398 &dvico_s5h1409_config,
1399 &i2c_bus->i2c_adap);
363c35fc
ST		 1400 if (fe0->dvb.frontend == NULL)
1401 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
52b50450
MK		 1402 &dvico_s5h1411_config,
1403 &i2c_bus->i2c_adap);
363c35fc
ST		 1404 if (fe0->dvb.frontend != NULL)
1405 dvb_attach(xc5000_attach, fe0->dvb.frontend,
30650961
MK		 1406 &i2c_bus->i2c_adap,
1407 &dvico_xc5000_tunerconfig);
335377b7 1408 break;
aef2d186
ST		 1409 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
1410 i2c_bus = &dev->i2c_bus[port->nr - 1];
1411
363c35fc 1412 fe0->dvb.frontend = dvb_attach(zl10353_attach,
aef2d186
ST		 1413 &dvico_fusionhdtv_xc3028,
1414 &i2c_bus->i2c_adap);
363c35fc 1415 if (fe0->dvb.frontend != NULL) {
aef2d186
ST		 1416 struct dvb_frontend *fe;
1417 struct xc2028_config cfg = {
1418 .i2c_adap = &i2c_bus->i2c_adap,
1419 .i2c_addr = 0x61,
aef2d186
ST		 1420 };
1421 static struct xc2028_ctrl ctl = {
ef80bfeb 1422 .fname = XC2028_DEFAULT_FIRMWARE,
aef2d186
ST		 1423 .max_len = 64,
1424 .demod = XC3028_FE_ZARLINK456,
1425 };
1426
363c35fc 1427 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
aef2d186
ST		 1428 &cfg);
1429 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1430 fe->ops.tuner_ops.set_config(fe, &ctl);
1431 }
1432 break;
46b21bba
JH		 1433 }
1434 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2: {
1435 i2c_bus = &dev->i2c_bus[port->nr - 1];
1436 /* cxusb_ctrl_msg(adap->dev, CMD_DIGITAL, NULL, 0, NULL, 0); */
1437 /* cxusb_bluebird_gpio_pulse(adap->dev, 0x02, 1); */
1438
1439 if (!dvb_attach(dib7000p_attach, &dib7000p_ops))
1440 return -ENODEV;
1441
1442 if (dib7000p_ops.i2c_enumeration(&i2c_bus->i2c_adap, 1, 0x12, &dib7070p_dib7000p_config) < 0) {
1443 printk(KERN_WARNING "Unable to enumerate dib7000p\n");
1444 return -ENODEV;
1445 }
1446 fe0->dvb.frontend = dib7000p_ops.init(&i2c_bus->i2c_adap, 0x80, &dib7070p_dib7000p_config);
1447 if (fe0->dvb.frontend != NULL) {
1448 struct i2c_adapter *tun_i2c;
1449
1450 fe0->dvb.frontend->sec_priv = kmalloc(sizeof(dib7000p_ops), GFP_KERNEL);
1451 memcpy(fe0->dvb.frontend->sec_priv, &dib7000p_ops, sizeof(dib7000p_ops));
1452 tun_i2c = dib7000p_ops.get_i2c_master(fe0->dvb.frontend, DIBX000_I2C_INTERFACE_TUNER, 1);
1453 if (!dvb_attach(dib0070_attach, fe0->dvb.frontend, tun_i2c, &dib7070p_dib0070_config))
1454 return -ENODEV;
1455 }
1456 break;
aef2d186 1457 }
4c56b04a 1458 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
9bb1b7e8 1459 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
34e383dd 1460 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
4c56b04a
ST		 1461 i2c_bus = &dev->i2c_bus[0];
1462
363c35fc 1463 fe0->dvb.frontend = dvb_attach(zl10353_attach,
4c56b04a
ST		 1464 &dvico_fusionhdtv_xc3028,
1465 &i2c_bus->i2c_adap);
363c35fc 1466 if (fe0->dvb.frontend != NULL) {
4c56b04a
ST		 1467 struct dvb_frontend *fe;
1468 struct xc2028_config cfg = {
1469 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
1470 .i2c_addr = 0x61,
4c56b04a
ST		 1471 };
1472 static struct xc2028_ctrl ctl = {
ef80bfeb 1473 .fname = XC2028_DEFAULT_FIRMWARE,
4c56b04a
ST		 1474 .max_len = 64,
1475 .demod = XC3028_FE_ZARLINK456,
1476 };
1477
363c35fc 1478 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
4c56b04a
ST		 1479 &cfg);
1480 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1481 fe->ops.tuner_ops.set_config(fe, &ctl);
1482 }
96318d0c 1483 break;
0cf8af57 1484 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1485 i2c_bus = &dev->i2c_bus[0];
1486
1487 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1488 &dvico_fusionhdtv_xc3028,
1489 &i2c_bus->i2c_adap);
1490 if (fe0->dvb.frontend != NULL) {
1491 struct dvb_frontend *fe;
1492 struct xc4000_config cfg = {
1493 .i2c_address = 0x61,
1494 .default_pm = 0,
1495 .dvb_amplitude = 134,
1496 .set_smoothedcvbs = 1,
1497 .if_khz = 4560
1498 };
1499
1500 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1501 &dev->i2c_bus[1].i2c_adap, &cfg);
a7c8aada
MS		 1502 if (!fe) {
1503 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1504 dev->name);
1505 goto frontend_detach;
1506 }
0cf8af57 1507 }
1508 break;
96318d0c 1509 case CX23885_BOARD_TBS_6920:
09ea33e5 1510 i2c_bus = &dev->i2c_bus[1];
96318d0c
IL		 1511
1512 fe0->dvb.frontend = dvb_attach(cx24116_attach,
09ea33e5
IL		 1513 &tbs_cx24116_config,
1514 &i2c_bus->i2c_adap);
96318d0c 1515 if (fe0->dvb.frontend != NULL)
09ea33e5 1516 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
96318d0c 1517
579943f5 1518 break;
e6001482
LA		 1519 case CX23885_BOARD_TBS_6980:
1520 case CX23885_BOARD_TBS_6981:
1521 i2c_bus = &dev->i2c_bus[1];
1522
1523 switch (port->nr) {
1524 /* PORT B */
1525 case 1:
1526 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1527 &tbs_cx24117_config,
d10e8280 1528 &i2c_bus->i2c_adap);
e6001482
LA		 1529 break;
1530 /* PORT C */
1531 case 2:
e6001482
LA		 1532 fe0->dvb.frontend = dvb_attach(cx24117_attach,
1533 &tbs_cx24117_config,
d10e8280 1534 &i2c_bus->i2c_adap);
e6001482
LA		 1535 break;
1536 }
1537 break;
579943f5
IL		 1538 case CX23885_BOARD_TEVII_S470:
1539 i2c_bus = &dev->i2c_bus[1];
1540
09ea33e5
IL		 1541 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1542 &tevii_ds3000_config,
1543 &i2c_bus->i2c_adap);
73f0af44
KD		 1544 if (fe0->dvb.frontend != NULL) {
1545 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1546 &tevii_ts2020_config, &i2c_bus->i2c_adap);
09ea33e5 1547 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
73f0af44 1548 }
579943f5 1549
4c56b04a 1550 break;
c9b8b04b
IL		 1551 case CX23885_BOARD_DVBWORLD_2005:
1552 i2c_bus = &dev->i2c_bus[1];
1553
1554 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1555 &dvbworld_cx24116_config,
1556 &i2c_bus->i2c_adap);
1557 break;
5a23b076
IL		 1558 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1559 i2c_bus = &dev->i2c_bus[0];
1560 switch (port->nr) {
1561 /* port B */
1562 case 1:
1563 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1564 &netup_stv0900_config,
1565 &i2c_bus->i2c_adap, 0);
1566 if (fe0->dvb.frontend != NULL) {
1567 if (dvb_attach(stv6110_attach,
1568 fe0->dvb.frontend,
1569 &netup_stv6110_tunerconfig_a,
1570 &i2c_bus->i2c_adap)) {
1571 if (!dvb_attach(lnbh24_attach,
1572 fe0->dvb.frontend,
1573 &i2c_bus->i2c_adap,
9329fb5b
AO		 1574 LNBH24_PCL | LNBH24_TTX,
1575 LNBH24_TEN, 0x09))
5a23b076
IL		 1576 printk(KERN_ERR
1577 "No LNBH24 found!\n");
1578
1579 }
1580 }
1581 break;
1582 /* port C */
1583 case 2:
1584 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1585 &netup_stv0900_config,
1586 &i2c_bus->i2c_adap, 1);
1587 if (fe0->dvb.frontend != NULL) {
1588 if (dvb_attach(stv6110_attach,
1589 fe0->dvb.frontend,
1590 &netup_stv6110_tunerconfig_b,
1591 &i2c_bus->i2c_adap)) {
1592 if (!dvb_attach(lnbh24_attach,
1593 fe0->dvb.frontend,
1594 &i2c_bus->i2c_adap,
9329fb5b
AO		 1595 LNBH24_PCL | LNBH24_TTX,
1596 LNBH24_TEN, 0x0a))
5a23b076
IL		 1597 printk(KERN_ERR
1598 "No LNBH24 found!\n");
1599
1600 }
1601 }
1602 break;
1603 }
1604 break;
493b7127
DW		 1605 case CX23885_BOARD_MYGICA_X8506:
1606 i2c_bus = &dev->i2c_bus[0];
1607 i2c_bus2 = &dev->i2c_bus[1];
1608 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1609 &mygica_x8506_lgs8gl5_config,
1610 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1611 if (fe0->dvb.frontend == NULL)
1612 break;
1613 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1614 &i2c_bus2->i2c_adap, &mygica_x8506_xc5000_config);
15472faf 1615 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
493b7127 1616 break;
0d1b5265
MCC		 1617 case CX23885_BOARD_MYGICA_X8507:
1618 i2c_bus = &dev->i2c_bus[0];
1619 i2c_bus2 = &dev->i2c_bus[1];
1620 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1621 &mygica_x8507_mb86a20s_config,
1622 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1623 if (fe0->dvb.frontend == NULL)
1624 break;
1625
1626 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1627 &i2c_bus2->i2c_adap,
1628 &mygica_x8507_xc5000_config);
0d1b5265
MCC		 1629 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1630 break;
2365b2d3
DW		 1631 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1632 i2c_bus = &dev->i2c_bus[0];
1633 i2c_bus2 = &dev->i2c_bus[1];
1634 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1635 &magicpro_prohdtve2_lgs8g75_config,
1636 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1637 if (fe0->dvb.frontend == NULL)
1638 break;
1639 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1640 &i2c_bus2->i2c_adap,
1641 &magicpro_prohdtve2_xc5000_config);
15472faf 1642 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
2365b2d3 1643 break;
13697380 1644 case CX23885_BOARD_HAUPPAUGE_HVR1850:
35045137
ST		 1645 i2c_bus = &dev->i2c_bus[0];
1646 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1647 &hcw_s5h1411_config,
1648 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1649 if (fe0->dvb.frontend == NULL)
1650 break;
1651 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1652 0x60, &dev->i2c_bus[0].i2c_adap,
1653 &hauppauge_tda18271_config);
35045137
ST		 1654
1655 tda18271_attach(&dev->ts1.analog_fe,
1656 0x60, &dev->i2c_bus[1].i2c_adap,
1657 &hauppauge_tda18271_config);
1658
1659 break;
aee0b24c 1660 case CX23885_BOARD_HAUPPAUGE_HVR1290:
13697380
ST		 1661 i2c_bus = &dev->i2c_bus[0];
1662 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1663 &hcw_s5h1411_config,
1664 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1665 if (fe0->dvb.frontend == NULL)
1666 break;
1667 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1668 0x60, &dev->i2c_bus[0].i2c_adap,
1669 &hauppauge_tda18271_config);
13697380 1670 break;
ea5697fe
DW		 1671 case CX23885_BOARD_MYGICA_X8558PRO:
1672 switch (port->nr) {
1673 /* port B */
1674 case 1:
1675 i2c_bus = &dev->i2c_bus[0];
1676 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1677 &mygica_x8558pro_atbm8830_cfg1,
1678 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1679 if (fe0->dvb.frontend == NULL)
1680 break;
1681 dvb_attach(max2165_attach, fe0->dvb.frontend,
1682 &i2c_bus->i2c_adap,
1683 &mygic_x8558pro_max2165_cfg1);
ea5697fe
DW		 1684 break;
1685 /* port C */
1686 case 2:
1687 i2c_bus = &dev->i2c_bus[1];
1688 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1689 &mygica_x8558pro_atbm8830_cfg2,
1690 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1691 if (fe0->dvb.frontend == NULL)
1692 break;
1693 dvb_attach(max2165_attach, fe0->dvb.frontend,
1694 &i2c_bus->i2c_adap,
1695 &mygic_x8558pro_max2165_cfg2);
ea5697fe
DW		 1696 }
1697 break;
78db8547
IL		 1698 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1699 i2c_bus = &dev->i2c_bus[0];
1700 mfe_shared = 1;/* MFE */
1701 port->frontends.gate = 0;/* not clear for me yet */
1702 /* ports B, C */
1703 /* MFE frontend 1 DVB-T */
1704 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1705 &netup_stv0367_config[port->nr - 1],
1706 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1707 if (fe0->dvb.frontend == NULL)
1708 break;
1709 if (NULL == dvb_attach(xc5000_attach, fe0->dvb.frontend,
78db8547
IL		 1710 &i2c_bus->i2c_adap,
1711 &netup_xc5000_config[port->nr - 1]))
ed3da2bf
MCC		 1712 goto frontend_detach;
1713 /* load xc5000 firmware */
1714 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1715
78db8547 1716 /* MFE frontend 2 */
453afdd9 1717 fe1 = vb2_dvb_get_frontend(&port->frontends, 2);
78db8547
IL		 1718 if (fe1 == NULL)
1719 goto frontend_detach;
1720 /* DVB-C init */
1721 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1722 &netup_stv0367_config[port->nr - 1],
1723 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1724 if (fe1->dvb.frontend == NULL)
1725 break;
1726
1727 fe1->dvb.frontend->id = 1;
1728 if (NULL == dvb_attach(xc5000_attach,
1729 fe1->dvb.frontend,
1730 &i2c_bus->i2c_adap,
1731 &netup_xc5000_config[port->nr - 1]))
1732 goto frontend_detach;
78db8547 1733 break;
722c90eb
SR		 1734 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1735 i2c_bus = &dev->i2c_bus[0];
1736 i2c_bus2 = &dev->i2c_bus[1];
1737
1738 switch (port->nr) {
1739 /* port b */
1740 case 1:
1741 fe0->dvb.frontend = dvb_attach(drxk_attach,
1742 &terratec_drxk_config[0],
1743 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1744 if (fe0->dvb.frontend == NULL)
1745 break;
1746 if (!dvb_attach(mt2063_attach,
1747 fe0->dvb.frontend,
1748 &terratec_mt2063_config[0],
1749 &i2c_bus2->i2c_adap))
1750 goto frontend_detach;
722c90eb
SR		 1751 break;
1752 /* port c */
1753 case 2:
1754 fe0->dvb.frontend = dvb_attach(drxk_attach,
1755 &terratec_drxk_config[1],
1756 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1757 if (fe0->dvb.frontend == NULL)
1758 break;
1759 if (!dvb_attach(mt2063_attach,
1760 fe0->dvb.frontend,
1761 &terratec_mt2063_config[1],
1762 &i2c_bus2->i2c_adap))
1763 goto frontend_detach;
722c90eb
SR		 1764 break;
1765 }
1766 break;
7b134e85
IL		 1767 case CX23885_BOARD_TEVII_S471:
1768 i2c_bus = &dev->i2c_bus[1];
1769
1770 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1771 &tevii_ds3000_config,
1772 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1773 if (fe0->dvb.frontend == NULL)
1774 break;
1775 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1776 &tevii_ts2020_config, &i2c_bus->i2c_adap);
7b134e85 1777 break;
f667190b
MB		 1778 case CX23885_BOARD_PROF_8000:
1779 i2c_bus = &dev->i2c_bus[0];
1780
1781 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1782 &prof_8000_stv090x_config,
1783 &i2c_bus->i2c_adap,
1784 STV090x_DEMODULATOR_0);
ed3da2bf
MCC		 1785 if (fe0->dvb.frontend == NULL)
1786 break;
1787 if (!dvb_attach(stb6100_attach,
1788 fe0->dvb.frontend,
1789 &prof_8000_stb6100_config,
1790 &i2c_bus->i2c_adap))
1791 goto frontend_detach;
f667190b 1792
ed3da2bf 1793 fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
f667190b 1794 break;
a4569507
AP		 1795 case CX23885_BOARD_HAUPPAUGE_HVR4400: {
1796 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1797 struct a8293_platform_data a8293_pdata = {};
1798
7c62f5a1 1799 i2c_bus = &dev->i2c_bus[0];
36efec48
MS		 1800 i2c_bus2 = &dev->i2c_bus[1];
1801 switch (port->nr) {
1802 /* port b */
1803 case 1:
a4569507
AP		 1804 /* attach demod + tuner combo */
1805 memset(&info, 0, sizeof(info));
1806 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1807 info.addr = 0x05;
1808 info.platform_data = &tda10071_pdata;
1809 request_module("tda10071");
1810 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1811 if (!client_demod || !client_demod->dev.driver)
ed3da2bf 1812 goto frontend_detach;
a4569507
AP		 1813 if (!try_module_get(client_demod->dev.driver->owner)) {
1814 i2c_unregister_device(client_demod);
1815 goto frontend_detach;
1816 }
1817 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1818 port->i2c_client_demod = client_demod;
1819
1820 /* attach SEC */
1821 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1822 memset(&info, 0, sizeof(info));
1823 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1824 info.addr = 0x0b;
1825 info.platform_data = &a8293_pdata;
1826 request_module("a8293");
1827 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1828 if (!client_sec || !client_sec->dev.driver)
1829 goto frontend_detach;
1830 if (!try_module_get(client_sec->dev.driver->owner)) {
1831 i2c_unregister_device(client_sec);
1832 goto frontend_detach;
1833 }
1834 port->i2c_client_sec = client_sec;
36efec48
MS		 1835 break;
1836 /* port c */
1837 case 2:
1838 fe0->dvb.frontend = dvb_attach(si2165_attach,
1839 &hauppauge_hvr4400_si2165_config,
1840 &i2c_bus->i2c_adap);
ed3da2bf
MCC		 1841 if (fe0->dvb.frontend == NULL)
1842 break;
1843 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1844 if (!dvb_attach(tda18271_attach,
1845 fe0->dvb.frontend,
1846 0x60, &i2c_bus2->i2c_adap,
1847 &hauppauge_hvr4400_tuner_config))
1848 goto frontend_detach;
36efec48 1849 break;
7c62f5a1
MK		 1850 }
1851 break;
a4569507 1852 }
49bf0e67
AP		 1853 case CX23885_BOARD_HAUPPAUGE_STARBURST: {
1854 struct tda10071_platform_data tda10071_pdata = hauppauge_tda10071_pdata;
1855 struct a8293_platform_data a8293_pdata = {};
1856
721f3223 1857 i2c_bus = &dev->i2c_bus[0];
49bf0e67
AP		 1858
1859 /* attach demod + tuner combo */
1860 memset(&info, 0, sizeof(info));
1861 strlcpy(info.type, "tda10071_cx24118", I2C_NAME_SIZE);
1862 info.addr = 0x05;
1863 info.platform_data = &tda10071_pdata;
1864 request_module("tda10071");
1865 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1866 if (!client_demod || !client_demod->dev.driver)
1867 goto frontend_detach;
1868 if (!try_module_get(client_demod->dev.driver->owner)) {
1869 i2c_unregister_device(client_demod);
1870 goto frontend_detach;
721f3223 1871 }
49bf0e67
AP		 1872 fe0->dvb.frontend = tda10071_pdata.get_dvb_frontend(client_demod);
1873 port->i2c_client_demod = client_demod;
1874
1875 /* attach SEC */
1876 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
1877 memset(&info, 0, sizeof(info));
1878 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
1879 info.addr = 0x0b;
1880 info.platform_data = &a8293_pdata;
1881 request_module("a8293");
1882 client_sec = i2c_new_device(&i2c_bus->i2c_adap, &info);
1883 if (!client_sec || !client_sec->dev.driver)
1884 goto frontend_detach;
1885 if (!try_module_get(client_sec->dev.driver->owner)) {
1886 i2c_unregister_device(client_sec);
1887 goto frontend_detach;
1888 }
1889 port->i2c_client_sec = client_sec;
721f3223 1890 break;
49bf0e67 1891 }
29442266 1892 case CX23885_BOARD_DVBSKY_T9580:
cba5480c 1893 case CX23885_BOARD_DVBSKY_S950:
29442266
OS		 1894 i2c_bus = &dev->i2c_bus[0];
1895 i2c_bus2 = &dev->i2c_bus[1];
1896 switch (port->nr) {
1897 /* port b - satellite */
1898 case 1:
1899 /* attach frontend */
1900 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
1901 &dvbsky_t9580_m88ds3103_config,
1902 &i2c_bus2->i2c_adap, &adapter);
1903 if (fe0->dvb.frontend == NULL)
1904 break;
1905
1906 /* attach tuner */
d76e0878
AP		 1907 memset(&ts2020_config, 0, sizeof(ts2020_config));
1908 ts2020_config.fe = fe0->dvb.frontend;
29442266 1909 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 1910 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
29442266 1911 info.addr = 0x60;
d76e0878 1912 info.platform_data = &ts2020_config;
29442266
OS		 1913 request_module(info.type);
1914 client_tuner = i2c_new_device(adapter, &info);
1915 if (client_tuner == NULL ||
1916 client_tuner->dev.driver == NULL)
1917 goto frontend_detach;
1918 if (!try_module_get(client_tuner->dev.driver->owner)) {
1919 i2c_unregister_device(client_tuner);
1920 goto frontend_detach;
1921 }
1922
1923 /* delegate signal strength measurement to tuner */
1924 fe0->dvb.frontend->ops.read_signal_strength =
1925 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
1926
1927 /*
1928 * for setting the voltage we need to set GPIOs on
1929 * the card.
1930 */
1931 port->fe_set_voltage =
1932 fe0->dvb.frontend->ops.set_voltage;
1933 fe0->dvb.frontend->ops.set_voltage =
1934 dvbsky_t9580_set_voltage;
1935
1936 port->i2c_client_tuner = client_tuner;
1937
1938 break;
1939 /* port c - terrestrial/cable */
1940 case 2:
1941 /* attach frontend */
143800a5 1942 memset(&si2168_config, 0, sizeof(si2168_config));
29442266
OS		 1943 si2168_config.i2c_adapter = &adapter;
1944 si2168_config.fe = &fe0->dvb.frontend;
1945 si2168_config.ts_mode = SI2168_TS_SERIAL;
1946 memset(&info, 0, sizeof(struct i2c_board_info));
1947 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1948 info.addr = 0x64;
1949 info.platform_data = &si2168_config;
1950 request_module(info.type);
1951 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
1952 if (client_demod == NULL ||
1953 client_demod->dev.driver == NULL)
1954 goto frontend_detach;
1955 if (!try_module_get(client_demod->dev.driver->owner)) {
1956 i2c_unregister_device(client_demod);
1957 goto frontend_detach;
1958 }
1959 port->i2c_client_demod = client_demod;
1960
1961 /* attach tuner */
143800a5 1962 memset(&si2157_config, 0, sizeof(si2157_config));
29442266 1963 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 1964 si2157_config.if_port = 1;
29442266
OS		 1965 memset(&info, 0, sizeof(struct i2c_board_info));
1966 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
1967 info.addr = 0x60;
1968 info.platform_data = &si2157_config;
1969 request_module(info.type);
1970 client_tuner = i2c_new_device(adapter, &info);
1971 if (client_tuner == NULL ||
2b0aac30 1972 client_tuner->dev.driver == NULL)
29442266 1973 goto frontend_detach;
2b0aac30 1974
29442266
OS		 1975 if (!try_module_get(client_tuner->dev.driver->owner)) {
1976 i2c_unregister_device(client_tuner);
29442266
OS		 1977 goto frontend_detach;
1978 }
1979 port->i2c_client_tuner = client_tuner;
1980 break;
1981 }
1982 break;
82c10276 1983 case CX23885_BOARD_DVBSKY_T980C:
61b103e8 1984 case CX23885_BOARD_TT_CT2_4500_CI:
82c10276 1985 i2c_bus = &dev->i2c_bus[1];
24e77409 1986 i2c_bus2 = &dev->i2c_bus[0];
82c10276
OS		 1987
1988 /* attach frontend */
1989 memset(&si2168_config, 0, sizeof(si2168_config));
1990 si2168_config.i2c_adapter = &adapter;
1991 si2168_config.fe = &fe0->dvb.frontend;
1992 si2168_config.ts_mode = SI2168_TS_PARALLEL;
1993 memset(&info, 0, sizeof(struct i2c_board_info));
1994 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
1995 info.addr = 0x64;
1996 info.platform_data = &si2168_config;
1997 request_module(info.type);
1998 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 1999 if (client_demod == NULL || client_demod->dev.driver == NULL)
82c10276
OS		 2000 goto frontend_detach;
2001 if (!try_module_get(client_demod->dev.driver->owner)) {
2002 i2c_unregister_device(client_demod);
2003 goto frontend_detach;
2004 }
2005 port->i2c_client_demod = client_demod;
2006
2007 /* attach tuner */
2008 memset(&si2157_config, 0, sizeof(si2157_config));
2009 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2010 si2157_config.if_port = 1;
82c10276
OS		 2011 memset(&info, 0, sizeof(struct i2c_board_info));
2012 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2013 info.addr = 0x60;
2014 info.platform_data = &si2157_config;
2015 request_module(info.type);
2016 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC		 2017 if (client_tuner == NULL ||
2018 client_tuner->dev.driver == NULL)
82c10276 2019 goto frontend_detach;
82c10276
OS		 2020 if (!try_module_get(client_tuner->dev.driver->owner)) {
2021 i2c_unregister_device(client_tuner);
82c10276
OS		 2022 goto frontend_detach;
2023 }
0e6c7b01 2024 port->i2c_client_tuner = client_tuner;
2025 break;
2026 case CX23885_BOARD_DVBSKY_S950C:
2027 i2c_bus = &dev->i2c_bus[1];
2028 i2c_bus2 = &dev->i2c_bus[0];
2029
2030 /* attach frontend */
2031 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2032 &dvbsky_s950c_m88ds3103_config,
2033 &i2c_bus->i2c_adap, &adapter);
2034 if (fe0->dvb.frontend == NULL)
2035 break;
2036
2037 /* attach tuner */
d76e0878
AP		 2038 memset(&ts2020_config, 0, sizeof(ts2020_config));
2039 ts2020_config.fe = fe0->dvb.frontend;
0e6c7b01 2040 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2041 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
0e6c7b01 2042 info.addr = 0x60;
d76e0878 2043 info.platform_data = &ts2020_config;
0e6c7b01 2044 request_module(info.type);
2045 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2046 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
0e6c7b01 2047 goto frontend_detach;
2048 if (!try_module_get(client_tuner->dev.driver->owner)) {
2049 i2c_unregister_device(client_tuner);
2050 goto frontend_detach;
2051 }
2052
2053 /* delegate signal strength measurement to tuner */
2054 fe0->dvb.frontend->ops.read_signal_strength =
2055 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2056
c29d6a83 2057 port->i2c_client_tuner = client_tuner;
2058 break;
2059 case CX23885_BOARD_DVBSKY_S952:
2060 switch (port->nr) {
2061 /* port b */
2062 case 1:
2063 i2c_bus = &dev->i2c_bus[1];
2064 p_m88ds3103_config = &dvbsky_t9580_m88ds3103_config;
2065 p_set_voltage = dvbsky_t9580_set_voltage;
2066 break;
2067 /* port c */
2068 case 2:
2069 i2c_bus = &dev->i2c_bus[0];
2070 p_m88ds3103_config = &dvbsky_s952_portc_m88ds3103_config;
2071 p_set_voltage = dvbsky_s952_portc_set_voltage;
2072 break;
2073 }
2074
2075 /* attach frontend */
2076 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2077 p_m88ds3103_config,
2078 &i2c_bus->i2c_adap, &adapter);
2079 if (fe0->dvb.frontend == NULL)
2080 break;
2081
2082 /* attach tuner */
d76e0878
AP		 2083 memset(&ts2020_config, 0, sizeof(ts2020_config));
2084 ts2020_config.fe = fe0->dvb.frontend;
c29d6a83 2085 memset(&info, 0, sizeof(struct i2c_board_info));
d76e0878 2086 strlcpy(info.type, "ts2020", I2C_NAME_SIZE);
c29d6a83 2087 info.addr = 0x60;
d76e0878 2088 info.platform_data = &ts2020_config;
c29d6a83 2089 request_module(info.type);
2090 client_tuner = i2c_new_device(adapter, &info);
a593f2cf 2091 if (client_tuner == NULL || client_tuner->dev.driver == NULL)
c29d6a83 2092 goto frontend_detach;
2093 if (!try_module_get(client_tuner->dev.driver->owner)) {
2094 i2c_unregister_device(client_tuner);
2095 goto frontend_detach;
2096 }
2097
2098 /* delegate signal strength measurement to tuner */
2099 fe0->dvb.frontend->ops.read_signal_strength =
2100 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2101
2102 /*
2103 * for setting the voltage we need to set GPIOs on
2104 * the card.
2105 */
2106 port->fe_set_voltage =
2107 fe0->dvb.frontend->ops.set_voltage;
2108 fe0->dvb.frontend->ops.set_voltage = p_set_voltage;
2109
c02ef64a
NM		 2110 port->i2c_client_tuner = client_tuner;
2111 break;
2112 case CX23885_BOARD_DVBSKY_T982:
2113 memset(&si2168_config, 0, sizeof(si2168_config));
2114 switch (port->nr) {
2115 /* port b */
2116 case 1:
2117 i2c_bus = &dev->i2c_bus[1];
2118 si2168_config.ts_mode = SI2168_TS_PARALLEL;
2119 break;
2120 /* port c */
2121 case 2:
2122 i2c_bus = &dev->i2c_bus[0];
2123 si2168_config.ts_mode = SI2168_TS_SERIAL;
2124 break;
2125 }
2126
2127 /* attach frontend */
2128 si2168_config.i2c_adapter = &adapter;
2129 si2168_config.fe = &fe0->dvb.frontend;
2130 memset(&info, 0, sizeof(struct i2c_board_info));
2131 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2132 info.addr = 0x64;
2133 info.platform_data = &si2168_config;
2134 request_module(info.type);
2135 client_demod = i2c_new_device(&i2c_bus->i2c_adap, &info);
a593f2cf 2136 if (client_demod == NULL || client_demod->dev.driver == NULL)
c02ef64a
NM		 2137 goto frontend_detach;
2138 if (!try_module_get(client_demod->dev.driver->owner)) {
2139 i2c_unregister_device(client_demod);
2140 goto frontend_detach;
2141 }
2142 port->i2c_client_demod = client_demod;
2143
2144 /* attach tuner */
2145 memset(&si2157_config, 0, sizeof(si2157_config));
2146 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2147 si2157_config.if_port = 1;
c02ef64a
NM		 2148 memset(&info, 0, sizeof(struct i2c_board_info));
2149 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2150 info.addr = 0x60;
2151 info.platform_data = &si2157_config;
2152 request_module(info.type);
2153 client_tuner = i2c_new_device(adapter, &info);
2b0aac30
MCC		 2154 if (client_tuner == NULL ||
2155 client_tuner->dev.driver == NULL)
c02ef64a 2156 goto frontend_detach;
c02ef64a
NM		 2157 if (!try_module_get(client_tuner->dev.driver->owner)) {
2158 i2c_unregister_device(client_tuner);
c02ef64a
NM		 2159 goto frontend_detach;
2160 }
82c10276
OS		 2161 port->i2c_client_tuner = client_tuner;
2162 break;
1fc77d01
AP		 2163 case CX23885_BOARD_HAUPPAUGE_HVR5525:
2164 switch (port->nr) {
2165 struct m88rs6000t_config m88rs6000t_config;
49b7cb5d 2166 struct a8293_platform_data a8293_pdata = {};
1fc77d01
AP		 2167
2168 /* port b - satellite */
2169 case 1:
2170 /* attach frontend */
2171 fe0->dvb.frontend = dvb_attach(m88ds3103_attach,
2172 &hauppauge_hvr5525_m88ds3103_config,
2173 &dev->i2c_bus[0].i2c_adap, &adapter);
2174 if (fe0->dvb.frontend == NULL)
2175 break;
2176
2177 /* attach SEC */
49b7cb5d
AP		 2178 a8293_pdata.dvb_frontend = fe0->dvb.frontend;
2179 memset(&info, 0, sizeof(info));
2180 strlcpy(info.type, "a8293", I2C_NAME_SIZE);
2181 info.addr = 0x0b;
2182 info.platform_data = &a8293_pdata;
2183 request_module("a8293");
2184 client_sec = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2185 if (!client_sec || !client_sec->dev.driver)
1fc77d01 2186 goto frontend_detach;
49b7cb5d
AP		 2187 if (!try_module_get(client_sec->dev.driver->owner)) {
2188 i2c_unregister_device(client_sec);
2189 goto frontend_detach;
2190 }
2191 port->i2c_client_sec = client_sec;
1fc77d01
AP		 2192
2193 /* attach tuner */
2194 memset(&m88rs6000t_config, 0, sizeof(m88rs6000t_config));
2195 m88rs6000t_config.fe = fe0->dvb.frontend;
2196 memset(&info, 0, sizeof(struct i2c_board_info));
2197 strlcpy(info.type, "m88rs6000t", I2C_NAME_SIZE);
2198 info.addr = 0x21;
2199 info.platform_data = &m88rs6000t_config;
2200 request_module("%s", info.type);
2201 client_tuner = i2c_new_device(adapter, &info);
2202 if (!client_tuner || !client_tuner->dev.driver)
2203 goto frontend_detach;
2204 if (!try_module_get(client_tuner->dev.driver->owner)) {
2205 i2c_unregister_device(client_tuner);
2206 goto frontend_detach;
2207 }
2208 port->i2c_client_tuner = client_tuner;
2209
2210 /* delegate signal strength measurement to tuner */
2211 fe0->dvb.frontend->ops.read_signal_strength =
2212 fe0->dvb.frontend->ops.tuner_ops.get_rf_strength;
2213 break;
2214 /* port c - terrestrial/cable */
2215 case 2:
2216 /* attach frontend */
2217 memset(&si2168_config, 0, sizeof(si2168_config));
2218 si2168_config.i2c_adapter = &adapter;
2219 si2168_config.fe = &fe0->dvb.frontend;
2220 si2168_config.ts_mode = SI2168_TS_SERIAL;
2221 memset(&info, 0, sizeof(struct i2c_board_info));
2222 strlcpy(info.type, "si2168", I2C_NAME_SIZE);
2223 info.addr = 0x64;
2224 info.platform_data = &si2168_config;
2225 request_module("%s", info.type);
2226 client_demod = i2c_new_device(&dev->i2c_bus[0].i2c_adap, &info);
2227 if (!client_demod || !client_demod->dev.driver)
2228 goto frontend_detach;
2229 if (!try_module_get(client_demod->dev.driver->owner)) {
2230 i2c_unregister_device(client_demod);
2231 goto frontend_detach;
2232 }
2233 port->i2c_client_demod = client_demod;
2234
2235 /* attach tuner */
2236 memset(&si2157_config, 0, sizeof(si2157_config));
2237 si2157_config.fe = fe0->dvb.frontend;
ee3c3e46 2238 si2157_config.if_port = 1;
1fc77d01
AP		 2239 memset(&info, 0, sizeof(struct i2c_board_info));
2240 strlcpy(info.type, "si2157", I2C_NAME_SIZE);
2241 info.addr = 0x60;
2242 info.platform_data = &si2157_config;
2243 request_module("%s", info.type);
2244 client_tuner = i2c_new_device(&dev->i2c_bus[1].i2c_adap, &info);
2245 if (!client_tuner || !client_tuner->dev.driver) {
2246 module_put(client_demod->dev.driver->owner);
2247 i2c_unregister_device(client_demod);
2248 port->i2c_client_demod = NULL;
2249 goto frontend_detach;
2250 }
2251 if (!try_module_get(client_tuner->dev.driver->owner)) {
2252 i2c_unregister_device(client_tuner);
2253 module_put(client_demod->dev.driver->owner);
2254 i2c_unregister_device(client_demod);
2255 port->i2c_client_demod = NULL;
2256 goto frontend_detach;
2257 }
2258 port->i2c_client_tuner = client_tuner;
2259 break;
2260 }
2261 break;
d19770e5 2262 default:
9c8ced51
ST		 2263 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
2264 " isn't supported yet\n",
d19770e5
ST		 2265 dev->name);
2266 break;
2267 }
78db8547
IL		 2268
2269 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
9c8ced51 2270 printk(KERN_ERR "%s: frontend initialization failed\n",
78db8547
IL		 2271 dev->name);
2272 goto frontend_detach;
d19770e5 2273 }
78db8547 2274
d7cba043 2275 /* define general-purpose callback pointer */
363c35fc 2276 fe0->dvb.frontend->callback = cx23885_tuner_callback;
78db8547
IL		 2277 if (fe1)
2278 fe1->dvb.frontend->callback = cx23885_tuner_callback;
2279#if 0
2280 /* Ensure all frontends negotiate bus access */
2281 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2282 if (fe1)
2283 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
2284#endif
d19770e5
ST		 2285
2286 /* Put the analog decoder in standby to keep it quiet */
622b828a 2287 call_all(dev, core, s_power, 0);
d19770e5 2288
363c35fc
ST		 2289 if (fe0->dvb.frontend->ops.analog_ops.standby)
2290 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
3ba71d21 2291
d19770e5 2292 /* register everything */
453afdd9 2293 ret = vb2_dvb_register_bus(&port->frontends, THIS_MODULE, port,
9adf6132 2294 &dev->pci->dev, adapter_nr, mfe_shared);
bee30192 2295 if (ret)
78db8547 2296 goto frontend_detach;
363c35fc 2297
2b0aac30
MCC		 2298 ret = dvb_register_ci_mac(port);
2299 if (ret)
2300 goto frontend_detach;
24e77409 2301
2b0aac30 2302 return 0;
82c10276 2303
2b0aac30 2304frontend_detach:
bf5e3ef0
AP		 2305 /* remove I2C client for SEC */
2306 client_sec = port->i2c_client_sec;
2307 if (client_sec) {
2308 module_put(client_sec->dev.driver->owner);
2309 i2c_unregister_device(client_sec);
2310 port->i2c_client_sec = NULL;
2311 }
2312
2b0aac30
MCC		 2313 /* remove I2C client for tuner */
2314 client_tuner = port->i2c_client_tuner;
2315 if (client_tuner) {
2316 module_put(client_tuner->dev.driver->owner);
2317 i2c_unregister_device(client_tuner);
2318 port->i2c_client_tuner = NULL;
5a23b076
IL		 2319 }
2320
2b0aac30
MCC		 2321 /* remove I2C client for demodulator */
2322 client_demod = port->i2c_client_demod;
2323 if (client_demod) {
2324 module_put(client_demod->dev.driver->owner);
2325 i2c_unregister_device(client_demod);
2326 port->i2c_client_demod = NULL;
2327 }
78db8547 2328
78db8547 2329 port->gate_ctrl = NULL;
453afdd9 2330 vb2_dvb_dealloc_frontends(&port->frontends);
78db8547 2331 return -EINVAL;
d19770e5
ST		 2332}
2333
2334int cx23885_dvb_register(struct cx23885_tsport *port)
2335{
363c35fc 2336
453afdd9 2337 struct vb2_dvb_frontend *fe0;
d19770e5 2338 struct cx23885_dev *dev = port->dev;
eb0c58bb
ST		 2339 int err, i;
2340
2341 /* Here we need to allocate the correct number of frontends,
af901ca1 2342 * as reflected in the cards struct. The reality is that currently
eb0c58bb
ST		 2343 * no cx23885 boards support this - yet. But, if we don't modify this
2344 * code then the second frontend would never be allocated (later)
2345 * and fail with error before the attach in dvb_register().
2346 * Without these changes we risk an OOPS later. The changes here
2347 * are for safety, and should provide a good foundation for the
2348 * future addition of any multi-frontend cx23885 based boards.
2349 */
2350 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
2351 port->num_frontends);
d19770e5 2352
eb0c58bb 2353 for (i = 1; i <= port->num_frontends; i++) {
453afdd9
HV		 2354 struct vb2_queue *q;
2355
2356 if (vb2_dvb_alloc_frontend(
9c8ced51 2357 &port->frontends, i) == NULL) {
eb0c58bb
ST		 2358 printk(KERN_ERR "%s() failed to alloc\n", __func__);
2359 return -ENOMEM;
2360 }
2361
453afdd9 2362 fe0 = vb2_dvb_get_frontend(&port->frontends, i);
eb0c58bb 2363 if (!fe0)
ed3da2bf 2364 return -EINVAL;
363c35fc 2365
eb0c58bb 2366 dprintk(1, "%s\n", __func__);
9c8ced51 2367 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
eb0c58bb
ST		 2368 dev->board,
2369 dev->name,
2370 dev->pci_bus,
2371 dev->pci_slot);
d19770e5 2372
eb0c58bb 2373 err = -ENODEV;
d19770e5 2374
eb0c58bb
ST		 2375 /* dvb stuff */
2376 /* We have to init the queue for each frontend on a port. */
9c8ced51 2377 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
453afdd9
HV		 2378 q = &fe0->dvb.dvbq;
2379 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2380 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
2381 q->gfp_flags = GFP_DMA32;
2382 q->min_buffers_needed = 2;
2383 q->drv_priv = port;
2384 q->buf_struct_size = sizeof(struct cx23885_buffer);
2385 q->ops = &dvb_qops;
2386 q->mem_ops = &vb2_dma_sg_memops;
2387 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2388 q->lock = &dev->lock;
2389
2390 err = vb2_queue_init(q);
2391 if (err < 0)
2392 return err;
eb0c58bb 2393 }
d19770e5
ST		 2394 err = dvb_register(port);
2395 if (err != 0)
9c8ced51
ST		 2396 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
2397 __func__, err);
d19770e5 2398
d19770e5
ST		 2399 return err;
2400}
2401
2402int cx23885_dvb_unregister(struct cx23885_tsport *port)
2403{
453afdd9 2404 struct vb2_dvb_frontend *fe0;
b0b12e63
OS		 2405 struct i2c_client *client;
2406
e450de45
OS		 2407 /* remove I2C client for CI */
2408 client = port->i2c_client_ci;
2409 if (client) {
2410 module_put(client->dev.driver->owner);
2411 i2c_unregister_device(client);
2412 }
2413
bf5e3ef0
AP		 2414 /* remove I2C client for SEC */
2415 client = port->i2c_client_sec;
2416 if (client) {
2417 module_put(client->dev.driver->owner);
2418 i2c_unregister_device(client);
2419 }
2420
b0b12e63
OS		 2421 /* remove I2C client for tuner */
2422 client = port->i2c_client_tuner;
2423 if (client) {
2424 module_put(client->dev.driver->owner);
2425 i2c_unregister_device(client);
2426 }
2427
2428 /* remove I2C client for demodulator */
2429 client = port->i2c_client_demod;
2430 if (client) {
2431 module_put(client->dev.driver->owner);
2432 i2c_unregister_device(client);
2433 }
363c35fc 2434
453afdd9 2435 fe0 = vb2_dvb_get_frontend(&port->frontends, 1);
b0b12e63 2436
e66131ce 2437 if (fe0 && fe0->dvb.frontend)
453afdd9 2438 vb2_dvb_unregister_bus(&port->frontends);
d19770e5 2439
afd96668
HV		 2440 switch (port->dev->board) {
2441 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
2442 netup_ci_exit(port);
2443 break;
78db8547
IL		 2444 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
2445 altera_ci_release(port->dev, port->nr);
2446 break;
afd96668 2447 }
5a23b076 2448
78db8547
IL		 2449 port->gate_ctrl = NULL;
2450
d19770e5
ST		 2451 return 0;
2452}
Linux kernel - Deliverables
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